i965: Correct build_lighting in i965 driver according to
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_util.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "glheader.h"
34 #include "macros.h"
35 #include "enums.h"
36
37 #include "shader/program.h"
38 #include "intel_batchbuffer.h"
39
40 #include "brw_defines.h"
41 #include "brw_context.h"
42 #include "brw_eu.h"
43 #include "brw_util.h"
44 #include "brw_clip.h"
45
46
47
48
49
50 static struct brw_reg get_tmp( struct brw_clip_compile *c )
51 {
52 struct brw_reg tmp = brw_vec4_grf(c->last_tmp, 0);
53
54 if (++c->last_tmp > c->prog_data.total_grf)
55 c->prog_data.total_grf = c->last_tmp;
56
57 return tmp;
58 }
59
60 static void release_tmp( struct brw_clip_compile *c, struct brw_reg tmp )
61 {
62 if (tmp.nr == c->last_tmp-1)
63 c->last_tmp--;
64 }
65
66
67 static struct brw_reg make_plane_ud(GLuint x, GLuint y, GLuint z, GLuint w)
68 {
69 return brw_imm_ud((w<<24) | (z<<16) | (y<<8) | x);
70 }
71
72
73 void brw_clip_init_planes( struct brw_clip_compile *c )
74 {
75 struct brw_compile *p = &c->func;
76
77 if (!c->key.nr_userclip) {
78 brw_MOV(p, get_element_ud(c->reg.fixed_planes, 0), make_plane_ud( 0, 0, 0xff, 1));
79 brw_MOV(p, get_element_ud(c->reg.fixed_planes, 1), make_plane_ud( 0, 0, 1, 1));
80 brw_MOV(p, get_element_ud(c->reg.fixed_planes, 2), make_plane_ud( 0, 0xff, 0, 1));
81 brw_MOV(p, get_element_ud(c->reg.fixed_planes, 3), make_plane_ud( 0, 1, 0, 1));
82 brw_MOV(p, get_element_ud(c->reg.fixed_planes, 4), make_plane_ud(0xff, 0, 0, 1));
83 brw_MOV(p, get_element_ud(c->reg.fixed_planes, 5), make_plane_ud( 1, 0, 0, 1));
84 }
85 }
86
87
88
89 #define W 3
90
91 /* Project 'pos' to screen space (or back again), overwrite with results:
92 */
93 static void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
94 {
95 struct brw_compile *p = &c->func;
96
97 /* calc rhw
98 */
99 brw_math_invert(p, get_element(pos, W), get_element(pos, W));
100
101 /* value.xyz *= value.rhw
102 */
103 brw_set_access_mode(p, BRW_ALIGN_16);
104 brw_MUL(p, brw_writemask(pos, WRITEMASK_XYZ), pos, brw_swizzle1(pos, W));
105 brw_set_access_mode(p, BRW_ALIGN_1);
106 }
107
108
109 static void brw_clip_project_vertex( struct brw_clip_compile *c,
110 struct brw_indirect vert_addr )
111 {
112 struct brw_compile *p = &c->func;
113 struct brw_reg tmp = get_tmp(c);
114
115 /* Fixup position. Extract from the original vertex and re-project
116 * to screen space:
117 */
118 brw_MOV(p, tmp, deref_4f(vert_addr, c->offset[VERT_RESULT_HPOS]));
119 brw_clip_project_position(c, tmp);
120 brw_MOV(p, deref_4f(vert_addr, c->header_position_offset), tmp);
121
122 release_tmp(c, tmp);
123 }
124
125
126
127
128 /* Interpolate between two vertices and put the result into a0.0.
129 * Increment a0.0 accordingly.
130 */
131 void brw_clip_interp_vertex( struct brw_clip_compile *c,
132 struct brw_indirect dest_ptr,
133 struct brw_indirect v0_ptr, /* from */
134 struct brw_indirect v1_ptr, /* to */
135 struct brw_reg t0,
136 GLboolean force_edgeflag)
137 {
138 struct brw_compile *p = &c->func;
139 struct brw_reg tmp = get_tmp(c);
140 GLuint i;
141
142 /* Just copy the vertex header:
143 */
144 brw_copy_indirect_to_indirect(p, dest_ptr, v0_ptr, 1);
145
146 /* Iterate over each attribute (could be done in pairs?)
147 */
148 for (i = 0; i < c->nr_attrs; i++) {
149 GLuint delta = i*16 + 32;
150
151 if (delta == c->offset[VERT_RESULT_EDGE]) {
152 if (force_edgeflag)
153 brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(1));
154 else
155 brw_MOV(p, deref_4f(dest_ptr, delta), deref_4f(v0_ptr, delta));
156 }
157 else {
158 /* Interpolate:
159 *
160 * New = attr0 + t*attr1 - t*attr0
161 */
162 brw_MUL(p,
163 vec4(brw_null_reg()),
164 deref_4f(v1_ptr, delta),
165 t0);
166
167 brw_MAC(p,
168 tmp,
169 negate(deref_4f(v0_ptr, delta)),
170 t0);
171
172 brw_ADD(p,
173 deref_4f(dest_ptr, delta),
174 deref_4f(v0_ptr, delta),
175 tmp);
176 }
177 }
178
179 if (i & 1) {
180 GLuint delta = i*16 + 32;
181 brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(0));
182 }
183
184 release_tmp(c, tmp);
185
186 /* Recreate the projected (NDC) coordinate in the new vertex
187 * header:
188 */
189 brw_clip_project_vertex(c, dest_ptr );
190 }
191
192
193
194
195 #define MAX_MRF 16
196
197 void brw_clip_emit_vue(struct brw_clip_compile *c,
198 struct brw_indirect vert,
199 GLboolean allocate,
200 GLboolean eot,
201 GLuint header)
202 {
203 struct brw_compile *p = &c->func;
204 GLuint start = c->last_mrf;
205
206 assert(!(allocate && eot));
207
208 /* Cycle through mrf regs - probably futile as we have to wait for
209 * the allocation response anyway. Also, the order this function
210 * is invoked doesn't correspond to the order the instructions will
211 * be executed, so it won't have any effect in many cases.
212 */
213 #if 0
214 if (start + c->nr_regs + 1 >= MAX_MRF)
215 start = 0;
216
217 c->last_mrf = start + c->nr_regs + 1;
218 #endif
219
220 /* Copy the vertex from vertn into m1..mN+1:
221 */
222 brw_copy_from_indirect(p, brw_message_reg(start+1), vert, c->nr_regs);
223
224 /* Overwrite PrimType and PrimStart in the message header, for
225 * each vertex in turn:
226 */
227 brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header));
228
229
230 /* Send each vertex as a seperate write to the urb. This
231 * is different to the concept in brw_sf_emit.c, where
232 * subsequent writes are used to build up a single urb
233 * entry. Each of these writes instantiates a seperate
234 * urb entry - (I think... what about 'allocate'?)
235 */
236 brw_urb_WRITE(p,
237 allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
238 start,
239 c->reg.R0,
240 allocate,
241 1, /* used */
242 c->nr_regs + 1, /* msg length */
243 allocate ? 1 : 0, /* response_length */
244 eot, /* eot */
245 1, /* writes_complete */
246 0, /* urb offset */
247 BRW_URB_SWIZZLE_NONE);
248 }
249
250
251
252 void brw_clip_kill_thread(struct brw_clip_compile *c)
253 {
254 struct brw_compile *p = &c->func;
255
256 /* Send an empty message to kill the thread and release any
257 * allocated urb entry:
258 */
259 brw_urb_WRITE(p,
260 retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
261 0,
262 c->reg.R0,
263 0, /* allocate */
264 0, /* used */
265 0, /* msg len */
266 0, /* response len */
267 1, /* eot */
268 1, /* writes complete */
269 0,
270 BRW_URB_SWIZZLE_NONE);
271 }
272
273
274
275
276 struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c )
277 {
278 return brw_address(c->reg.fixed_planes);
279 }
280
281
282 struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c )
283 {
284 if (c->key.nr_userclip) {
285 return brw_imm_uw(16);
286 }
287 else {
288 return brw_imm_uw(4);
289 }
290 }
291
292
293 /* If flatshading, distribute color from provoking vertex prior to
294 * clipping.
295 */
296 void brw_clip_copy_colors( struct brw_clip_compile *c,
297 GLuint to, GLuint from )
298 {
299 struct brw_compile *p = &c->func;
300
301 if (c->offset[VERT_RESULT_COL0])
302 brw_MOV(p,
303 byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_COL0]),
304 byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_COL0]));
305
306 if (c->offset[VERT_RESULT_COL1])
307 brw_MOV(p,
308 byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_COL1]),
309 byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_COL1]));
310
311 if (c->offset[VERT_RESULT_BFC0])
312 brw_MOV(p,
313 byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_BFC0]),
314 byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_BFC0]));
315
316 if (c->offset[VERT_RESULT_BFC1])
317 brw_MOV(p,
318 byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_BFC1]),
319 byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_BFC1]));
320 }
321
322
323
324 void brw_clip_init_clipmask( struct brw_clip_compile *c )
325 {
326 struct brw_compile *p = &c->func;
327 struct brw_reg incoming = get_element_ud(c->reg.R0, 2);
328
329 /* Shift so that lowest outcode bit is rightmost:
330 */
331 brw_SHR(p, c->reg.planemask, incoming, brw_imm_ud(26));
332
333 if (c->key.nr_userclip) {
334 struct brw_reg tmp = retype(vec1(get_tmp(c)), BRW_REGISTER_TYPE_UD);
335
336 /* Rearrange userclip outcodes so that they come directly after
337 * the fixed plane bits.
338 */
339 brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14));
340 brw_SHR(p, tmp, tmp, brw_imm_ud(8));
341 brw_OR(p, c->reg.planemask, c->reg.planemask, tmp);
342
343 release_tmp(c, tmp);
344 }
345 }
346