src/mesa/drivers/dri/i965/brw_clip_util.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/glheader.h"
  34 #include "main/macros.h"
  35 #include "main/enums.h"
  36 #include "program/program.h"
  37
  38 #include "intel_batchbuffer.h"
  39
  40 #include "brw_defines.h"
  41 #include "brw_context.h"
  42 #include "brw_eu.h"
  43 #include "brw_clip.h"
  44
  45
  46
  47
  48 struct brw_reg get_tmp( struct brw_clip_compile *c )
  49 {
  50    struct brw_reg tmp = brw_vec4_grf(c->last_tmp, 0);
  51
  52    if (++c->last_tmp > c->prog_data.total_grf)
  53       c->prog_data.total_grf = c->last_tmp;
  54
  55    return tmp;
  56 }
  57
  58 static void release_tmp( struct brw_clip_compile *c, struct brw_reg tmp )
  59 {
  60    if (tmp.nr == c->last_tmp-1)
  61       c->last_tmp--;
  62 }
  63
  64
  65 static struct brw_reg make_plane_ud(GLuint x, GLuint y, GLuint z, GLuint w)
  66 {
  67    return brw_imm_ud((w<<24) | (z<<16) | (y<<8) | x);
  68 }
  69
  70
  71 void brw_clip_init_planes( struct brw_clip_compile *c )
  72 {
  73    struct brw_compile *p = &c->func;
  74
  75    if (!c->key.nr_userclip) {
  76       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 0), make_plane_ud( 0,    0, 0xff, 1));
  77       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 1), make_plane_ud( 0,    0,    1, 1));
  78       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 2), make_plane_ud( 0, 0xff,    0, 1));
  79       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 3), make_plane_ud( 0,    1,    0, 1));
  80       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 4), make_plane_ud(0xff,  0,    0, 1));
  81       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 5), make_plane_ud( 1,    0,    0, 1));
  82    }
  83 }
  84
  85
  86
  87 #define W 3
  88
  89 /* Project 'pos' to screen space (or back again), overwrite with results:
  90  */
  91 void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
  92 {
  93    struct brw_compile *p = &c->func;
  94
  95    /* calc rhw
  96     */
  97    brw_math_invert(p, get_element(pos, W), get_element(pos, W));
  98
  99    /* value.xyz *= value.rhw
 100     */
 101    brw_set_access_mode(p, BRW_ALIGN_16);
 102    brw_MUL(p, brw_writemask(pos, WRITEMASK_XYZ), pos, brw_swizzle1(pos, W));
 103    brw_set_access_mode(p, BRW_ALIGN_1);
 104 }
 105
 106
 107 static void brw_clip_project_vertex( struct brw_clip_compile *c,
 108                                      struct brw_indirect vert_addr )
 109 {
 110    struct brw_compile *p = &c->func;
 111    struct brw_reg tmp = get_tmp(c);
 112
 113    /* Fixup position.  Extract from the original vertex and re-project
 114     * to screen space:
 115     */
 116    brw_MOV(p, tmp, deref_4f(vert_addr, c->offset[VERT_RESULT_HPOS]));
 117    brw_clip_project_position(c, tmp);
 118    brw_MOV(p, deref_4f(vert_addr, c->header_position_offset), tmp);
 119
 120    release_tmp(c, tmp);
 121 }
 122
 123
 124
 125
 126 /* Interpolate between two vertices and put the result into a0.0.
 127  * Increment a0.0 accordingly.
 128  */
 129 void brw_clip_interp_vertex( struct brw_clip_compile *c,
 130                              struct brw_indirect dest_ptr,
 131                              struct brw_indirect v0_ptr, /* from */
 132                              struct brw_indirect v1_ptr, /* to */
 133                              struct brw_reg t0,
 134                              GLboolean force_edgeflag)
 135 {
 136    struct brw_compile *p = &c->func;
 137    struct brw_reg tmp = get_tmp(c);
 138    GLuint i;
 139
 140    /* Just copy the vertex header:
 141     */
 142    /*
 143     * After CLIP stage, only first 256 bits of the VUE are read
 144     * back on Ironlake, so needn't change it
 145     */
 146    brw_copy_indirect_to_indirect(p, dest_ptr, v0_ptr, 1);
 147
 148    /* Iterate over each attribute (could be done in pairs?)
 149     */
 150    for (i = 0; i < c->nr_attrs; i++) {
 151       GLuint delta = c->offset[c->idx_to_attr[i]];
 152
 153       if (c->idx_to_attr[i] == VERT_RESULT_EDGE) {
 154          if (force_edgeflag)
 155             brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(1));
 156          else
 157             brw_MOV(p, deref_4f(dest_ptr, delta), deref_4f(v0_ptr, delta));
 158       }
 159       else {
 160          /* Interpolate:
 161           *
 162           *        New = attr0 + t*attr1 - t*attr0
 163           */
 164          brw_MUL(p,
 165                  vec4(brw_null_reg()),
 166                  deref_4f(v1_ptr, delta),
 167                  t0);
 168
 169          brw_MAC(p,
 170                  tmp,
 171                  negate(deref_4f(v0_ptr, delta)),
 172                  t0);
 173
 174          brw_ADD(p,
 175                  deref_4f(dest_ptr, delta),
 176                  deref_4f(v0_ptr, delta),
 177                  tmp);
 178       }
 179    }
 180
 181    if (i & 1) {
 182       GLuint delta = c->offset[c->idx_to_attr[c->nr_attrs - 1]] + ATTR_SIZE;
 183
 184       brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(0));
 185    }
 186
 187    release_tmp(c, tmp);
 188
 189    /* Recreate the projected (NDC) coordinate in the new vertex
 190     * header:
 191     */
 192    brw_clip_project_vertex(c, dest_ptr );
 193 }
 194
 195 void brw_clip_emit_vue(struct brw_clip_compile *c,
 196                        struct brw_indirect vert,
 197                        GLboolean allocate,
 198                        GLboolean eot,
 199                        GLuint header)
 200 {
 201    struct brw_compile *p = &c->func;
 202
 203    brw_clip_ff_sync(c);
 204
 205    assert(!(allocate && eot));
 206
 207    /* Copy the vertex from vertn into m1..mN+1:
 208     */
 209    brw_copy_from_indirect(p, brw_message_reg(1), vert, c->nr_regs);
 210
 211    /* Overwrite PrimType and PrimStart in the message header, for
 212     * each vertex in turn:
 213     */
 214    brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header));
 215
 216
 217    /* Send each vertex as a seperate write to the urb.  This
 218     * is different to the concept in brw_sf_emit.c, where
 219     * subsequent writes are used to build up a single urb
 220     * entry.  Each of these writes instantiates a seperate
 221     * urb entry - (I think... what about 'allocate'?)
 222     */
 223    brw_urb_WRITE(p,
 224                  allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
 225                  0,
 226                  c->reg.R0,
 227                  allocate,
 228                  1,             /* used */
 229                  c->nr_regs + 1, /* msg length */
 230                  allocate ? 1 : 0, /* response_length */
 231                  eot,           /* eot */
 232                  1,             /* writes_complete */
 233                  0,             /* urb offset */
 234                  BRW_URB_SWIZZLE_NONE);
 235 }
 236
 237
 238
 239 void brw_clip_kill_thread(struct brw_clip_compile *c)
 240 {
 241    struct brw_compile *p = &c->func;
 242
 243    brw_clip_ff_sync(c);
 244    /* Send an empty message to kill the thread and release any
 245     * allocated urb entry:
 246     */
 247    brw_urb_WRITE(p,
 248                  retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
 249                  0,
 250                  c->reg.R0,
 251                  0,             /* allocate */
 252                  0,             /* used */
 253                  1,             /* msg len */
 254                  0,             /* response len */
 255                  1,             /* eot */
 256                  1,             /* writes complete */
 257                  0,
 258                  BRW_URB_SWIZZLE_NONE);
 259 }
 260
 261
 262
 263
 264 struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c )
 265 {
 266    return brw_address(c->reg.fixed_planes);
 267 }
 268
 269
 270 struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c )
 271 {
 272    if (c->key.nr_userclip) {
 273       return brw_imm_uw(16);
 274    }
 275    else {
 276       return brw_imm_uw(4);
 277    }
 278 }
 279
 280
 281 /* If flatshading, distribute color from provoking vertex prior to
 282  * clipping.
 283  */
 284 void brw_clip_copy_colors( struct brw_clip_compile *c,
 285                            GLuint to, GLuint from )
 286 {
 287    struct brw_compile *p = &c->func;
 288
 289    if (c->offset[VERT_RESULT_COL0])
 290       brw_MOV(p,
 291               byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_COL0]),
 292               byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_COL0]));
 293
 294    if (c->offset[VERT_RESULT_COL1])
 295       brw_MOV(p,
 296               byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_COL1]),
 297               byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_COL1]));
 298
 299    if (c->offset[VERT_RESULT_BFC0])
 300       brw_MOV(p,
 301               byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_BFC0]),
 302               byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_BFC0]));
 303
 304    if (c->offset[VERT_RESULT_BFC1])
 305       brw_MOV(p,
 306               byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_BFC1]),
 307               byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_BFC1]));
 308 }
 309
 310
 311
 312 void brw_clip_init_clipmask( struct brw_clip_compile *c )
 313 {
 314    struct brw_compile *p = &c->func;
 315    struct brw_reg incoming = get_element_ud(c->reg.R0, 2);
 316
 317    /* Shift so that lowest outcode bit is rightmost:
 318     */
 319    brw_SHR(p, c->reg.planemask, incoming, brw_imm_ud(26));
 320
 321    if (c->key.nr_userclip) {
 322       struct brw_reg tmp = retype(vec1(get_tmp(c)), BRW_REGISTER_TYPE_UD);
 323
 324       /* Rearrange userclip outcodes so that they come directly after
 325        * the fixed plane bits.
 326        */
 327       brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14));
 328       brw_SHR(p, tmp, tmp, brw_imm_ud(8));
 329       brw_OR(p, c->reg.planemask, c->reg.planemask, tmp);
 330
 331       release_tmp(c, tmp);
 332    }
 333 }
 334
 335 void brw_clip_ff_sync(struct brw_clip_compile *c)
 336 {
 337     struct intel_context *intel = &c->func.brw->intel;
 338
 339     if (intel->needs_ff_sync) {
 340         struct brw_compile *p = &c->func;
 341         struct brw_instruction *need_ff_sync;
 342
 343         brw_set_conditionalmod(p, BRW_CONDITIONAL_Z);
 344         brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1));
 345         need_ff_sync = brw_IF(p, BRW_EXECUTE_1);
 346         {
 347             brw_OR(p, c->reg.ff_sync, c->reg.ff_sync, brw_imm_ud(0x1));
 348             brw_ff_sync(p,
 349                         c->reg.R0,
 350                         0,
 351                         c->reg.R0,
 352                         1, /* allocate */
 353                         1, /* response length */
 354                         0 /* eot */);
 355         }
 356         brw_ENDIF(p, need_ff_sync);
 357         brw_set_predicate_control(p, BRW_PREDICATE_NONE);
 358     }
 359 }
 360
 361 void brw_clip_init_ff_sync(struct brw_clip_compile *c)
 362 {
 363     struct intel_context *intel = &c->func.brw->intel;
 364
 365     if (intel->needs_ff_sync) {
 366         struct brw_compile *p = &c->func;
 367
 368         brw_MOV(p, c->reg.ff_sync, brw_imm_ud(0));
 369     }
 370 }