2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
37 #include "shader/program.h"
38 #include "intel_batchbuffer.h"
40 #include "brw_defines.h"
41 #include "brw_context.h"
49 struct brw_reg
get_tmp( struct brw_clip_compile
*c
)
51 struct brw_reg tmp
= brw_vec4_grf(c
->last_tmp
, 0);
53 if (++c
->last_tmp
> c
->prog_data
.total_grf
)
54 c
->prog_data
.total_grf
= c
->last_tmp
;
59 static void release_tmp( struct brw_clip_compile
*c
, struct brw_reg tmp
)
61 if (tmp
.nr
== c
->last_tmp
-1)
66 static struct brw_reg
make_plane_ud(GLuint x
, GLuint y
, GLuint z
, GLuint w
)
68 return brw_imm_ud((w
<<24) | (z
<<16) | (y
<<8) | x
);
72 void brw_clip_init_planes( struct brw_clip_compile
*c
)
74 struct brw_compile
*p
= &c
->func
;
76 if (!c
->key
.nr_userclip
) {
77 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 0), make_plane_ud( 0, 0, 0xff, 1));
78 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 1), make_plane_ud( 0, 0, 1, 1));
79 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 2), make_plane_ud( 0, 0xff, 0, 1));
80 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 3), make_plane_ud( 0, 1, 0, 1));
81 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 4), make_plane_ud(0xff, 0, 0, 1));
82 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 5), make_plane_ud( 1, 0, 0, 1));
90 /* Project 'pos' to screen space (or back again), overwrite with results:
92 void brw_clip_project_position(struct brw_clip_compile
*c
, struct brw_reg pos
)
94 struct brw_compile
*p
= &c
->func
;
98 brw_math_invert(p
, get_element(pos
, W
), get_element(pos
, W
));
100 /* value.xyz *= value.rhw
102 brw_set_access_mode(p
, BRW_ALIGN_16
);
103 brw_MUL(p
, brw_writemask(pos
, WRITEMASK_XYZ
), pos
, brw_swizzle1(pos
, W
));
104 brw_set_access_mode(p
, BRW_ALIGN_1
);
108 static void brw_clip_project_vertex( struct brw_clip_compile
*c
,
109 struct brw_indirect vert_addr
)
111 struct brw_compile
*p
= &c
->func
;
112 struct brw_reg tmp
= get_tmp(c
);
114 /* Fixup position. Extract from the original vertex and re-project
117 brw_MOV(p
, tmp
, deref_4f(vert_addr
, c
->offset
[VERT_RESULT_HPOS
]));
118 brw_clip_project_position(c
, tmp
);
119 brw_MOV(p
, deref_4f(vert_addr
, c
->header_position_offset
), tmp
);
127 /* Interpolate between two vertices and put the result into a0.0.
128 * Increment a0.0 accordingly.
130 void brw_clip_interp_vertex( struct brw_clip_compile
*c
,
131 struct brw_indirect dest_ptr
,
132 struct brw_indirect v0_ptr
, /* from */
133 struct brw_indirect v1_ptr
, /* to */
135 GLboolean force_edgeflag
)
137 struct brw_compile
*p
= &c
->func
;
138 struct brw_reg tmp
= get_tmp(c
);
141 /* Just copy the vertex header:
143 brw_copy_indirect_to_indirect(p
, dest_ptr
, v0_ptr
, 1);
145 /* Iterate over each attribute (could be done in pairs?)
147 for (i
= 0; i
< c
->nr_attrs
; i
++) {
148 GLuint delta
= i
*16 + 32;
150 if (delta
== c
->offset
[VERT_RESULT_EDGE
]) {
152 brw_MOV(p
, deref_4f(dest_ptr
, delta
), brw_imm_f(1));
154 brw_MOV(p
, deref_4f(dest_ptr
, delta
), deref_4f(v0_ptr
, delta
));
159 * New = attr0 + t*attr1 - t*attr0
162 vec4(brw_null_reg()),
163 deref_4f(v1_ptr
, delta
),
168 negate(deref_4f(v0_ptr
, delta
)),
172 deref_4f(dest_ptr
, delta
),
173 deref_4f(v0_ptr
, delta
),
179 GLuint delta
= i
*16 + 32;
180 brw_MOV(p
, deref_4f(dest_ptr
, delta
), brw_imm_f(0));
185 /* Recreate the projected (NDC) coordinate in the new vertex
188 brw_clip_project_vertex(c
, dest_ptr
);
196 void brw_clip_emit_vue(struct brw_clip_compile
*c
,
197 struct brw_indirect vert
,
202 struct brw_compile
*p
= &c
->func
;
203 GLuint start
= c
->last_mrf
;
205 assert(!(allocate
&& eot
));
207 /* Cycle through mrf regs - probably futile as we have to wait for
208 * the allocation response anyway. Also, the order this function
209 * is invoked doesn't correspond to the order the instructions will
210 * be executed, so it won't have any effect in many cases.
213 if (start
+ c
->nr_regs
+ 1 >= MAX_MRF
)
216 c
->last_mrf
= start
+ c
->nr_regs
+ 1;
219 /* Copy the vertex from vertn into m1..mN+1:
221 brw_copy_from_indirect(p
, brw_message_reg(start
+1), vert
, c
->nr_regs
);
223 /* Overwrite PrimType and PrimStart in the message header, for
224 * each vertex in turn:
226 brw_MOV(p
, get_element_ud(c
->reg
.R0
, 2), brw_imm_ud(header
));
229 /* Send each vertex as a seperate write to the urb. This
230 * is different to the concept in brw_sf_emit.c, where
231 * subsequent writes are used to build up a single urb
232 * entry. Each of these writes instantiates a seperate
233 * urb entry - (I think... what about 'allocate'?)
236 allocate
? c
->reg
.R0
: retype(brw_null_reg(), BRW_REGISTER_TYPE_UD
),
241 c
->nr_regs
+ 1, /* msg length */
242 allocate
? 1 : 0, /* response_length */
244 1, /* writes_complete */
246 BRW_URB_SWIZZLE_NONE
);
251 void brw_clip_kill_thread(struct brw_clip_compile
*c
)
253 struct brw_compile
*p
= &c
->func
;
255 /* Send an empty message to kill the thread and release any
256 * allocated urb entry:
259 retype(brw_null_reg(), BRW_REGISTER_TYPE_UD
),
265 0, /* response len */
267 1, /* writes complete */
269 BRW_URB_SWIZZLE_NONE
);
275 struct brw_reg
brw_clip_plane0_address( struct brw_clip_compile
*c
)
277 return brw_address(c
->reg
.fixed_planes
);
281 struct brw_reg
brw_clip_plane_stride( struct brw_clip_compile
*c
)
283 if (c
->key
.nr_userclip
) {
284 return brw_imm_uw(16);
287 return brw_imm_uw(4);
292 /* If flatshading, distribute color from provoking vertex prior to
295 void brw_clip_copy_colors( struct brw_clip_compile
*c
,
296 GLuint to
, GLuint from
)
298 struct brw_compile
*p
= &c
->func
;
300 if (c
->offset
[VERT_RESULT_COL0
])
302 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_COL0
]),
303 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_COL0
]));
305 if (c
->offset
[VERT_RESULT_COL1
])
307 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_COL1
]),
308 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_COL1
]));
310 if (c
->offset
[VERT_RESULT_BFC0
])
312 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_BFC0
]),
313 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_BFC0
]));
315 if (c
->offset
[VERT_RESULT_BFC1
])
317 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_BFC1
]),
318 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_BFC1
]));
323 void brw_clip_init_clipmask( struct brw_clip_compile
*c
)
325 struct brw_compile
*p
= &c
->func
;
326 struct brw_reg incoming
= get_element_ud(c
->reg
.R0
, 2);
328 /* Shift so that lowest outcode bit is rightmost:
330 brw_SHR(p
, c
->reg
.planemask
, incoming
, brw_imm_ud(26));
332 if (c
->key
.nr_userclip
) {
333 struct brw_reg tmp
= retype(vec1(get_tmp(c
)), BRW_REGISTER_TYPE_UD
);
335 /* Rearrange userclip outcodes so that they come directly after
336 * the fixed plane bits.
338 brw_AND(p
, tmp
, incoming
, brw_imm_ud(0x3f<<14));
339 brw_SHR(p
, tmp
, tmp
, brw_imm_ud(8));
340 brw_OR(p
, c
->reg
.planemask
, c
->reg
.planemask
, tmp
);