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26 #include "brw_device_info.h"
27 #include "main/mtypes.h"
35 struct brw_geometry_program
;
36 union gl_constant_value
;
39 const struct brw_device_info
*devinfo
;
45 * Array of the ra classes for the unaligned contiguous register
51 * Mapping for register-allocated objects in *regs to the first
52 * GRF for that object.
54 uint8_t *ra_reg_to_grf
;
61 * Array of the ra classes for the unaligned contiguous register
62 * block sizes used, indexed by register size.
67 * Mapping from classes to ra_reg ranges. Each of the per-size
68 * classes corresponds to a range of ra_reg nodes. This array stores
69 * those ranges in the form of first ra_reg in each class and the
70 * total number of ra_reg elements in the last array element. This
71 * way the range of the i'th class is given by:
72 * [ class_to_ra_reg_range[i], class_to_ra_reg_range[i+1] )
74 int class_to_ra_reg_range
[17];
77 * Mapping for register-allocated objects in *regs to the first
78 * GRF for that object.
80 uint8_t *ra_reg_to_grf
;
83 * ra class for the aligned pairs we use for PLN, which doesn't
86 int aligned_pairs_class
;
89 void (*shader_debug_log
)(void *, const char *str
, ...) PRINTFLIKE(2, 3);
90 void (*shader_perf_log
)(void *, const char *str
, ...) PRINTFLIKE(2, 3);
93 struct gl_shader_compiler_options glsl_compiler_options
[MESA_SHADER_STAGES
];
98 * Program key structures.
100 * When drawing, we look for the currently bound shaders in the program
101 * cache. This is essentially a hash table lookup, and these are the keys.
103 * Sometimes OpenGL features specified as state need to be simulated via
104 * shader code, due to a mismatch between the API and the hardware. This
105 * is often referred to as "non-orthagonal state" or "NOS". We store NOS
106 * in the program key so it's considered when searching for a program. If
107 * we haven't seen a particular combination before, we have to recompile a
108 * new specialized version.
110 * Shader compilation should not look up state in gl_context directly, but
111 * instead use the copy in the program key. This guarantees recompiles will
117 enum PACKED gen6_gather_sampler_wa
{
118 WA_SIGN
= 1, /* whether we need to sign extend */
119 WA_8BIT
= 2, /* if we have an 8bit format needing wa */
120 WA_16BIT
= 4, /* if we have a 16bit format needing wa */
124 * Sampler information needed by VS, WM, and GS program cache keys.
126 struct brw_sampler_prog_key_data
{
128 * EXT_texture_swizzle and DEPTH_TEXTURE_MODE swizzles.
130 uint16_t swizzles
[MAX_SAMPLERS
];
132 uint32_t gl_clamp_mask
[3];
135 * For RG32F, gather4's channel select is broken.
137 uint32_t gather_channel_quirk_mask
;
140 * Whether this sampler uses the compressed multisample surface layout.
142 uint32_t compressed_multisample_layout_mask
;
145 * For Sandybridge, which shader w/a we need for gather quirks.
147 enum gen6_gather_sampler_wa gen6_gather_wa
[MAX_SAMPLERS
];
151 /** The program key for Vertex Shaders. */
152 struct brw_vs_prog_key
{
153 unsigned program_string_id
;
156 * Per-attribute workaround flags
158 uint8_t gl_attrib_wa_flags
[VERT_ATTRIB_MAX
];
160 bool copy_edgeflag
:1;
162 bool clamp_vertex_color
:1;
165 * How many user clipping planes are being uploaded to the vertex shader as
168 * These are used for lowering legacy gl_ClipVertex/gl_Position clipping to
171 unsigned nr_userclip_plane_consts
:4;
174 * For pre-Gen6 hardware, a bitfield indicating which texture coordinates
175 * are going to be replaced with point coordinates (as a consequence of a
176 * call to glTexEnvi(GL_POINT_SPRITE, GL_COORD_REPLACE, GL_TRUE)). Because
177 * our SF thread requires exact matching between VS outputs and FS inputs,
178 * these texture coordinates will need to be unconditionally included in
179 * the VUE, even if they aren't written by the vertex shader.
181 uint8_t point_coord_replace
;
183 struct brw_sampler_prog_key_data tex
;
186 /** The program key for Geometry Shaders. */
187 struct brw_gs_prog_key
189 unsigned program_string_id
;
191 struct brw_sampler_prog_key_data tex
;
194 /** The program key for Fragment/Pixel Shaders. */
195 struct brw_wm_prog_key
{
199 bool persample_shading
:1;
201 unsigned nr_color_regions
:5;
202 bool replicate_alpha
:1;
203 bool render_to_fbo
:1;
204 bool clamp_fragment_color
:1;
205 bool compute_pos_offset
:1;
206 bool compute_sample_id
:1;
208 bool high_quality_derivatives
:1;
210 uint16_t drawable_height
;
211 uint64_t input_slots_valid
;
212 unsigned program_string_id
;
213 GLenum alpha_test_func
; /* < For Gen4/5 MRT alpha test */
214 float alpha_test_ref
;
216 struct brw_sampler_prog_key_data tex
;
219 struct brw_cs_prog_key
{
220 uint32_t program_string_id
;
221 struct brw_sampler_prog_key_data tex
;
225 * Image metadata structure as laid out in the shader parameter
226 * buffer. Entries have to be 16B-aligned for the vec4 back-end to be
227 * able to use them. That's okay because the padding and any unused
228 * entries [most of them except when we're doing untyped surface
229 * access] will be removed by the uniform packing pass.
231 #define BRW_IMAGE_PARAM_SURFACE_IDX_OFFSET 0
232 #define BRW_IMAGE_PARAM_OFFSET_OFFSET 4
233 #define BRW_IMAGE_PARAM_SIZE_OFFSET 8
234 #define BRW_IMAGE_PARAM_STRIDE_OFFSET 12
235 #define BRW_IMAGE_PARAM_TILING_OFFSET 16
236 #define BRW_IMAGE_PARAM_SWIZZLING_OFFSET 20
237 #define BRW_IMAGE_PARAM_SIZE 24
239 struct brw_image_param
{
240 /** Surface binding table index. */
241 uint32_t surface_idx
;
243 /** Offset applied to the X and Y surface coordinates. */
246 /** Surface X, Y and Z dimensions. */
249 /** X-stride in bytes, Y-stride in pixels, horizontal slice stride in
250 * pixels, vertical slice stride in pixels.
254 /** Log2 of the tiling modulus in the X, Y and Z dimension. */
258 * Right shift to apply for bit 6 address swizzling. Two different
259 * swizzles can be specified and will be applied one after the other. The
260 * resulting address will be:
262 * addr' = addr ^ ((1 << 6) & ((addr >> swizzling[0]) ^
263 * (addr >> swizzling[1])))
265 * Use \c 0xff if any of the swizzles is not required.
267 uint32_t swizzling
[2];
270 struct brw_stage_prog_data
{
272 /** size of our binding table. */
276 * surface indices for the various groups of surfaces
278 uint32_t pull_constants_start
;
279 uint32_t texture_start
;
280 uint32_t gather_texture_start
;
284 uint32_t image_start
;
285 uint32_t shader_time_start
;
289 GLuint nr_params
; /**< number of float params/constants */
290 GLuint nr_pull_params
;
291 unsigned nr_image_params
;
293 unsigned curb_read_length
;
294 unsigned total_scratch
;
297 * Register where the thread expects to find input data from the URB
298 * (typically uniforms, followed by vertex or fragment attributes).
300 unsigned dispatch_grf_start_reg
;
302 bool use_alt_mode
; /**< Use ALT floating point mode? Otherwise, IEEE. */
304 /* Pointers to tracked values (only valid once
305 * _mesa_load_state_parameters has been called at runtime).
307 const union gl_constant_value
**param
;
308 const union gl_constant_value
**pull_param
;
310 /** Image metadata passed to the shader as uniforms. */
311 struct brw_image_param
*image_param
;
314 /* Data about a particular attempt to compile a program. Note that
315 * there can be many of these, each in a different GL state
316 * corresponding to a different brw_wm_prog_key struct, with different
319 struct brw_wm_prog_data
{
320 struct brw_stage_prog_data base
;
322 GLuint num_varying_inputs
;
324 GLuint dispatch_grf_start_reg_16
;
326 GLuint reg_blocks_16
;
330 * surface indices the WM-specific surfaces
332 uint32_t render_target_start
;
336 uint8_t computed_depth_mode
;
338 bool early_fragment_tests
;
341 bool uses_pos_offset
;
345 uint32_t prog_offset_16
;
348 * Mask of which interpolation modes are required by the fragment shader.
349 * Used in hardware setup on gen6+.
351 uint32_t barycentric_interp_modes
;
354 * Map from gl_varying_slot to the position within the FS setup data
355 * payload where the varying's attribute vertex deltas should be delivered.
356 * For varying slots that are not used by the FS, the value is -1.
358 int urb_setup
[VARYING_SLOT_MAX
];
361 struct brw_cs_prog_data
{
362 struct brw_stage_prog_data base
;
364 GLuint dispatch_grf_start_reg_16
;
365 unsigned local_size
[3];
368 bool uses_num_work_groups
;
369 unsigned local_invocation_id_regs
;
373 * surface indices the CS-specific surfaces
375 uint32_t work_groups_start
;
381 * Enum representing the i965-specific vertex results that don't correspond
382 * exactly to any element of gl_varying_slot. The values of this enum are
383 * assigned such that they don't conflict with gl_varying_slot.
387 BRW_VARYING_SLOT_NDC
= VARYING_SLOT_MAX
,
388 BRW_VARYING_SLOT_PAD
,
390 * Technically this is not a varying but just a placeholder that
391 * compile_sf_prog() inserts into its VUE map to cause the gl_PointCoord
392 * builtin variable to be compiled correctly. see compile_sf_prog() for
395 BRW_VARYING_SLOT_PNTC
,
396 BRW_VARYING_SLOT_COUNT
400 * Data structure recording the relationship between the gl_varying_slot enum
401 * and "slots" within the vertex URB entry (VUE). A "slot" is defined as a
402 * single octaword within the VUE (128 bits).
404 * Note that each BRW register contains 256 bits (2 octawords), so when
405 * accessing the VUE in URB_NOSWIZZLE mode, each register corresponds to two
406 * consecutive VUE slots. When accessing the VUE in URB_INTERLEAVED mode (as
407 * in a vertex shader), each register corresponds to a single VUE slot, since
408 * it contains data for two separate vertices.
412 * Bitfield representing all varying slots that are (a) stored in this VUE
413 * map, and (b) actually written by the shader. Does not include any of
414 * the additional varying slots defined in brw_varying_slot.
416 GLbitfield64 slots_valid
;
419 * Is this VUE map for a separate shader pipeline?
421 * Separable programs (GL_ARB_separate_shader_objects) can be mixed and matched
422 * without the linker having a chance to dead code eliminate unused varyings.
424 * This means that we have to use a fixed slot layout, based on the output's
425 * location field, rather than assigning slots in a compact contiguous block.
430 * Map from gl_varying_slot value to VUE slot. For gl_varying_slots that are
431 * not stored in a slot (because they are not written, or because
432 * additional processing is applied before storing them in the VUE), the
435 signed char varying_to_slot
[BRW_VARYING_SLOT_COUNT
];
438 * Map from VUE slot to gl_varying_slot value. For slots that do not
439 * directly correspond to a gl_varying_slot, the value comes from
442 * For slots that are not in use, the value is BRW_VARYING_SLOT_COUNT (this
443 * simplifies code that uses the value stored in slot_to_varying to
444 * create a bit mask).
446 signed char slot_to_varying
[BRW_VARYING_SLOT_COUNT
];
449 * Total number of VUE slots in use
455 * Convert a VUE slot number into a byte offset within the VUE.
457 static inline GLuint
brw_vue_slot_to_offset(GLuint slot
)
463 * Convert a vertex output (brw_varying_slot) into a byte offset within the
466 static inline GLuint
brw_varying_to_offset(struct brw_vue_map
*vue_map
,
469 return brw_vue_slot_to_offset(vue_map
->varying_to_slot
[varying
]);
472 void brw_compute_vue_map(const struct brw_device_info
*devinfo
,
473 struct brw_vue_map
*vue_map
,
474 GLbitfield64 slots_valid
,
475 bool separate_shader
);
477 enum shader_dispatch_mode
{
478 DISPATCH_MODE_4X1_SINGLE
= 0,
479 DISPATCH_MODE_4X2_DUAL_INSTANCE
= 1,
480 DISPATCH_MODE_4X2_DUAL_OBJECT
= 2,
481 DISPATCH_MODE_SIMD8
= 3,
484 struct brw_vue_prog_data
{
485 struct brw_stage_prog_data base
;
486 struct brw_vue_map vue_map
;
488 GLuint urb_read_length
;
491 /* Used for calculating urb partitions. In the VS, this is the size of the
492 * URB entry used for both input and output to the thread. In the GS, this
493 * is the size of the URB entry used for output.
495 GLuint urb_entry_size
;
497 enum shader_dispatch_mode dispatch_mode
;
500 struct brw_vs_prog_data
{
501 struct brw_vue_prog_data base
;
503 GLbitfield64 inputs_read
;
505 unsigned nr_attributes
;
508 bool uses_instanceid
;
511 struct brw_gs_prog_data
513 struct brw_vue_prog_data base
;
516 * Size of an output vertex, measured in HWORDS (32 bytes).
518 unsigned output_vertex_size_hwords
;
520 unsigned output_topology
;
523 * Size of the control data (cut bits or StreamID bits), in hwords (32
524 * bytes). 0 if there is no control data.
526 unsigned control_data_header_size_hwords
;
529 * Format of the control data (either GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID
530 * if the control data is StreamID bits, or
531 * GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_CUT if the control data is cut bits).
532 * Ignored if control_data_header_size is 0.
534 unsigned control_data_format
;
536 bool include_primitive_id
;
539 * The number of vertices emitted, if constant - otherwise -1.
541 int static_vertex_count
;
546 * Gen6 transform feedback enabled flag.
548 bool gen6_xfb_enabled
;
551 * Gen6: Provoking vertex convention for odd-numbered triangles
557 * Gen6: Number of varyings that are output to transform feedback.
559 GLuint num_transform_feedback_bindings
:7; /* 0-BRW_MAX_SOL_BINDINGS */
562 * Gen6: Map from the index of a transform feedback binding table entry to the
563 * gl_varying_slot that should be streamed out through that binding table
566 unsigned char transform_feedback_bindings
[64 /* BRW_MAX_SOL_BINDINGS */];
569 * Gen6: Map from the index of a transform feedback binding table entry to the
570 * swizzles that should be used when streaming out data through that
571 * binding table entry.
573 unsigned char transform_feedback_swizzles
[64 /* BRW_MAX_SOL_BINDINGS */];
580 * Compile a vertex shader.
582 * Returns the final assembly and the program's size.
585 brw_compile_vs(const struct brw_compiler
*compiler
, void *log_data
,
587 const struct brw_vs_prog_key
*key
,
588 struct brw_vs_prog_data
*prog_data
,
589 const struct nir_shader
*shader
,
590 gl_clip_plane
*clip_planes
,
591 bool use_legacy_snorm_formula
,
592 int shader_time_index
,
593 unsigned *final_assembly_size
,
597 * Scratch data used when compiling a GLSL geometry shader.
599 struct brw_gs_compile
601 struct brw_gs_prog_key key
;
602 struct brw_gs_prog_data prog_data
;
603 struct brw_vue_map input_vue_map
;
605 struct brw_geometry_program
*gp
;
607 unsigned control_data_bits_per_vertex
;
608 unsigned control_data_header_size_bits
;
612 * Compile a vertex shader.
614 * Returns the final assembly and the program's size.
617 brw_compile_gs(const struct brw_compiler
*compiler
, void *log_data
,
619 struct brw_gs_compile
*c
,
620 const struct nir_shader
*shader
,
621 struct gl_shader_program
*shader_prog
,
622 int shader_time_index
,
623 unsigned *final_assembly_size
,
627 * Compile a fragment shader.
629 * Returns the final assembly and the program's size.
632 brw_compile_fs(const struct brw_compiler
*compiler
, void *log_data
,
634 const struct brw_wm_prog_key
*key
,
635 struct brw_wm_prog_data
*prog_data
,
636 const struct nir_shader
*shader
,
637 struct gl_program
*prog
,
638 int shader_time_index8
,
639 int shader_time_index16
,
641 unsigned *final_assembly_size
,
645 * Compile a compute shader.
647 * Returns the final assembly and the program's size.
650 brw_compile_cs(const struct brw_compiler
*compiler
, void *log_data
,
652 const struct brw_cs_prog_key
*key
,
653 struct brw_cs_prog_data
*prog_data
,
654 const struct nir_shader
*shader
,
655 int shader_time_index
,
656 unsigned *final_assembly_size
,