i965: Move brw_select_clip_planes() to brw_shader.cpp
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "main/api_exec.h"
35 #include "main/context.h"
36 #include "main/fbobject.h"
37 #include "main/extensions.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
40 #include "main/points.h"
41 #include "main/version.h"
42 #include "main/vtxfmt.h"
43 #include "main/texobj.h"
44 #include "main/framebuffer.h"
45
46 #include "vbo/vbo_context.h"
47
48 #include "drivers/common/driverfuncs.h"
49 #include "drivers/common/meta.h"
50 #include "utils.h"
51
52 #include "brw_context.h"
53 #include "brw_defines.h"
54 #include "brw_shader.h"
55 #include "brw_draw.h"
56 #include "brw_state.h"
57
58 #include "intel_batchbuffer.h"
59 #include "intel_buffer_objects.h"
60 #include "intel_buffers.h"
61 #include "intel_fbo.h"
62 #include "intel_mipmap_tree.h"
63 #include "intel_pixel.h"
64 #include "intel_image.h"
65 #include "intel_tex.h"
66 #include "intel_tex_obj.h"
67
68 #include "swrast_setup/swrast_setup.h"
69 #include "tnl/tnl.h"
70 #include "tnl/t_pipeline.h"
71 #include "util/ralloc.h"
72
73 /***************************************
74 * Mesa's Driver Functions
75 ***************************************/
76
77 static size_t
78 brw_query_samples_for_format(struct gl_context *ctx, GLenum target,
79 GLenum internalFormat, int samples[16])
80 {
81 struct brw_context *brw = brw_context(ctx);
82
83 (void) target;
84
85 switch (brw->gen) {
86 case 9:
87 case 8:
88 samples[0] = 8;
89 samples[1] = 4;
90 samples[2] = 2;
91 return 3;
92
93 case 7:
94 samples[0] = 8;
95 samples[1] = 4;
96 return 2;
97
98 case 6:
99 samples[0] = 4;
100 return 1;
101
102 default:
103 assert(brw->gen < 6);
104 samples[0] = 1;
105 return 1;
106 }
107 }
108
109 const char *const brw_vendor_string = "Intel Open Source Technology Center";
110
111 const char *
112 brw_get_renderer_string(unsigned deviceID)
113 {
114 const char *chipset;
115 static char buffer[128];
116
117 switch (deviceID) {
118 #undef CHIPSET
119 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
120 #include "pci_ids/i965_pci_ids.h"
121 default:
122 chipset = "Unknown Intel Chipset";
123 break;
124 }
125
126 (void) driGetRendererString(buffer, chipset, 0);
127 return buffer;
128 }
129
130 static const GLubyte *
131 intel_get_string(struct gl_context * ctx, GLenum name)
132 {
133 const struct brw_context *const brw = brw_context(ctx);
134
135 switch (name) {
136 case GL_VENDOR:
137 return (GLubyte *) brw_vendor_string;
138
139 case GL_RENDERER:
140 return
141 (GLubyte *) brw_get_renderer_string(brw->intelScreen->deviceID);
142
143 default:
144 return NULL;
145 }
146 }
147
148 static void
149 intel_viewport(struct gl_context *ctx)
150 {
151 struct brw_context *brw = brw_context(ctx);
152 __DRIcontext *driContext = brw->driContext;
153
154 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
155 dri2InvalidateDrawable(driContext->driDrawablePriv);
156 dri2InvalidateDrawable(driContext->driReadablePriv);
157 }
158 }
159
160 static void
161 intel_update_state(struct gl_context * ctx, GLuint new_state)
162 {
163 struct brw_context *brw = brw_context(ctx);
164 struct intel_texture_object *tex_obj;
165 struct intel_renderbuffer *depth_irb;
166
167 if (ctx->swrast_context)
168 _swrast_InvalidateState(ctx, new_state);
169 _vbo_InvalidateState(ctx, new_state);
170
171 brw->NewGLState |= new_state;
172
173 _mesa_unlock_context_textures(ctx);
174
175 /* Resolve the depth buffer's HiZ buffer. */
176 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
177 if (depth_irb)
178 intel_renderbuffer_resolve_hiz(brw, depth_irb);
179
180 /* Resolve depth buffer and render cache of each enabled texture. */
181 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
182 for (int i = 0; i <= maxEnabledUnit; i++) {
183 if (!ctx->Texture.Unit[i]._Current)
184 continue;
185 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
186 if (!tex_obj || !tex_obj->mt)
187 continue;
188 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
189 intel_miptree_resolve_color(brw, tex_obj->mt);
190 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
191 }
192
193 _mesa_lock_context_textures(ctx);
194 }
195
196 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
197
198 static void
199 intel_flush_front(struct gl_context *ctx)
200 {
201 struct brw_context *brw = brw_context(ctx);
202 __DRIcontext *driContext = brw->driContext;
203 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
204 __DRIscreen *const screen = brw->intelScreen->driScrnPriv;
205
206 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
207 if (flushFront(screen) && driDrawable &&
208 driDrawable->loaderPrivate) {
209
210 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
211 *
212 * This potentially resolves both front and back buffer. It
213 * is unnecessary to resolve the back, but harms nothing except
214 * performance. And no one cares about front-buffer render
215 * performance.
216 */
217 intel_resolve_for_dri2_flush(brw, driDrawable);
218 intel_batchbuffer_flush(brw);
219
220 flushFront(screen)(driDrawable, driDrawable->loaderPrivate);
221
222 /* We set the dirty bit in intel_prepare_render() if we're
223 * front buffer rendering once we get there.
224 */
225 brw->front_buffer_dirty = false;
226 }
227 }
228 }
229
230 static void
231 intel_glFlush(struct gl_context *ctx)
232 {
233 struct brw_context *brw = brw_context(ctx);
234
235 intel_batchbuffer_flush(brw);
236 intel_flush_front(ctx);
237
238 brw->need_flush_throttle = true;
239 }
240
241 static void
242 intel_finish(struct gl_context * ctx)
243 {
244 struct brw_context *brw = brw_context(ctx);
245
246 intel_glFlush(ctx);
247
248 if (brw->batch.last_bo)
249 drm_intel_bo_wait_rendering(brw->batch.last_bo);
250 }
251
252 static void
253 brw_init_driver_functions(struct brw_context *brw,
254 struct dd_function_table *functions)
255 {
256 _mesa_init_driver_functions(functions);
257
258 /* GLX uses DRI2 invalidate events to handle window resizing.
259 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
260 * which doesn't provide a mechanism for snooping the event queues.
261 *
262 * So EGL still relies on viewport hacks to handle window resizing.
263 * This should go away with DRI3000.
264 */
265 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
266 functions->Viewport = intel_viewport;
267
268 functions->Flush = intel_glFlush;
269 functions->Finish = intel_finish;
270 functions->GetString = intel_get_string;
271 functions->UpdateState = intel_update_state;
272
273 intelInitTextureFuncs(functions);
274 intelInitTextureImageFuncs(functions);
275 intelInitTextureSubImageFuncs(functions);
276 intelInitTextureCopyImageFuncs(functions);
277 intelInitCopyImageFuncs(functions);
278 intelInitClearFuncs(functions);
279 intelInitBufferFuncs(functions);
280 intelInitPixelFuncs(functions);
281 intelInitBufferObjectFuncs(functions);
282 intel_init_syncobj_functions(functions);
283 brw_init_object_purgeable_functions(functions);
284
285 brwInitFragProgFuncs( functions );
286 brw_init_common_queryobj_functions(functions);
287 if (brw->gen >= 6)
288 gen6_init_queryobj_functions(functions);
289 else
290 gen4_init_queryobj_functions(functions);
291 brw_init_compute_functions(functions);
292 if (brw->gen >= 7)
293 brw_init_conditional_render_functions(functions);
294
295 functions->QuerySamplesForFormat = brw_query_samples_for_format;
296
297 functions->NewTransformFeedback = brw_new_transform_feedback;
298 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
299 functions->GetTransformFeedbackVertexCount =
300 brw_get_transform_feedback_vertex_count;
301 if (brw->gen >= 7) {
302 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
303 functions->EndTransformFeedback = gen7_end_transform_feedback;
304 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
305 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
306 } else {
307 functions->BeginTransformFeedback = brw_begin_transform_feedback;
308 functions->EndTransformFeedback = brw_end_transform_feedback;
309 }
310
311 if (brw->gen >= 6)
312 functions->GetSamplePosition = gen6_get_sample_position;
313 }
314
315 static void
316 brw_initialize_context_constants(struct brw_context *brw)
317 {
318 struct gl_context *ctx = &brw->ctx;
319
320 unsigned max_samplers =
321 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
322
323 ctx->Const.QueryCounterBits.Timestamp = 36;
324
325 ctx->Const.StripTextureBorder = true;
326
327 ctx->Const.MaxUniformBlockSize = 65536;
328 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
329 struct gl_program_constants *prog = &ctx->Const.Program[i];
330 prog->MaxUniformBlocks = BRW_MAX_UBO;
331 prog->MaxCombinedUniformComponents =
332 prog->MaxUniformComponents +
333 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
334 }
335
336 ctx->Const.MaxDualSourceDrawBuffers = 1;
337 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
338 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = max_samplers;
339 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
340 ctx->Const.MaxTextureUnits =
341 MIN2(ctx->Const.MaxTextureCoordUnits,
342 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
343 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits = max_samplers;
344 if (brw->gen >= 6)
345 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits = max_samplers;
346 else
347 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits = 0;
348 if (_mesa_extension_override_enables.ARB_compute_shader) {
349 ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
350 ctx->Const.MaxUniformBufferBindings += BRW_MAX_UBO;
351 } else {
352 ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits = 0;
353 }
354 ctx->Const.MaxCombinedTextureImageUnits =
355 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits +
356 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits +
357 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits +
358 ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits;
359
360 ctx->Const.MaxTextureLevels = 14; /* 8192 */
361 if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
362 ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
363 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
364 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
365 ctx->Const.MaxTextureMbytes = 1536;
366
367 if (brw->gen >= 7)
368 ctx->Const.MaxArrayTextureLayers = 2048;
369 else
370 ctx->Const.MaxArrayTextureLayers = 512;
371
372 ctx->Const.MaxTextureRectSize = 1 << 12;
373
374 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
375
376 ctx->Const.MaxRenderbufferSize = 8192;
377
378 /* Hardware only supports a limited number of transform feedback buffers.
379 * So we need to override the Mesa default (which is based only on software
380 * limits).
381 */
382 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
383
384 /* On Gen6, in the worst case, we use up one binding table entry per
385 * transform feedback component (see comments above the definition of
386 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
387 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
388 * BRW_MAX_SOL_BINDINGS.
389 *
390 * In "separate components" mode, we need to divide this value by
391 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
392 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
393 */
394 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
395 ctx->Const.MaxTransformFeedbackSeparateComponents =
396 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
397
398 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount = true;
399
400 int max_samples;
401 const int *msaa_modes = intel_supported_msaa_modes(brw->intelScreen);
402 const int clamp_max_samples =
403 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
404
405 if (clamp_max_samples < 0) {
406 max_samples = msaa_modes[0];
407 } else {
408 /* Select the largest supported MSAA mode that does not exceed
409 * clamp_max_samples.
410 */
411 max_samples = 0;
412 for (int i = 0; msaa_modes[i] != 0; ++i) {
413 if (msaa_modes[i] <= clamp_max_samples) {
414 max_samples = msaa_modes[i];
415 break;
416 }
417 }
418 }
419
420 ctx->Const.MaxSamples = max_samples;
421 ctx->Const.MaxColorTextureSamples = max_samples;
422 ctx->Const.MaxDepthTextureSamples = max_samples;
423 ctx->Const.MaxIntegerSamples = max_samples;
424
425 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
426 * to map indices of rectangular grid to sample numbers within a pixel.
427 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
428 * extension implementation. For more details see the comment above
429 * gen6_set_sample_maps() definition.
430 */
431 gen6_set_sample_maps(ctx);
432
433 if (brw->gen >= 7)
434 ctx->Const.MaxProgramTextureGatherComponents = 4;
435 else if (brw->gen == 6)
436 ctx->Const.MaxProgramTextureGatherComponents = 1;
437
438 ctx->Const.MinLineWidth = 1.0;
439 ctx->Const.MinLineWidthAA = 1.0;
440 if (brw->gen >= 6) {
441 ctx->Const.MaxLineWidth = 7.375;
442 ctx->Const.MaxLineWidthAA = 7.375;
443 ctx->Const.LineWidthGranularity = 0.125;
444 } else {
445 ctx->Const.MaxLineWidth = 7.0;
446 ctx->Const.MaxLineWidthAA = 7.0;
447 ctx->Const.LineWidthGranularity = 0.5;
448 }
449
450 /* For non-antialiased lines, we have to round the line width to the
451 * nearest whole number. Make sure that we don't advertise a line
452 * width that, when rounded, will be beyond the actual hardware
453 * maximum.
454 */
455 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
456
457 ctx->Const.MinPointSize = 1.0;
458 ctx->Const.MinPointSizeAA = 1.0;
459 ctx->Const.MaxPointSize = 255.0;
460 ctx->Const.MaxPointSizeAA = 255.0;
461 ctx->Const.PointSizeGranularity = 1.0;
462
463 if (brw->gen >= 5 || brw->is_g4x)
464 ctx->Const.MaxClipPlanes = 8;
465
466 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
467 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
468 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
469 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
470 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
471 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
472 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
473 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
474 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
475 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
476 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
477 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
478 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
479 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
480
481 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
482 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
483 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
484 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
485 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
486 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
487 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
488 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
489 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
490 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
491 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
492
493 /* Fragment shaders use real, 32-bit twos-complement integers for all
494 * integer types.
495 */
496 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
497 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
498 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
499 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
500 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
501
502 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
503 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
504 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
505 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
506 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
507
508 if (brw->gen >= 7) {
509 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
510 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
511 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
512 ctx->Const.Program[MESA_SHADER_COMPUTE].MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
513 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers = BRW_MAX_ABO;
514 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAtomicBuffers = BRW_MAX_ABO;
515 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicBuffers = BRW_MAX_ABO;
516 ctx->Const.Program[MESA_SHADER_COMPUTE].MaxAtomicBuffers = BRW_MAX_ABO;
517 ctx->Const.MaxCombinedAtomicBuffers = 3 * BRW_MAX_ABO;
518
519 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms =
520 BRW_MAX_IMAGES;
521 ctx->Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms =
522 (brw->intelScreen->compiler->scalar_vs ? BRW_MAX_IMAGES : 0);
523 ctx->Const.Program[MESA_SHADER_COMPUTE].MaxImageUniforms =
524 BRW_MAX_IMAGES;
525 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
526 ctx->Const.MaxCombinedShaderOutputResources =
527 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
528 ctx->Const.MaxImageSamples = 0;
529 ctx->Const.MaxCombinedImageUniforms = 3 * BRW_MAX_IMAGES;
530 }
531
532 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
533 * but we're not sure how it's actually done for vertex order,
534 * that affect provoking vertex decision. Always use last vertex
535 * convention for quad primitive which works as expected for now.
536 */
537 if (brw->gen >= 6)
538 ctx->Const.QuadsFollowProvokingVertexConvention = false;
539
540 ctx->Const.NativeIntegers = true;
541 ctx->Const.VertexID_is_zero_based = true;
542
543 /* Regarding the CMP instruction, the Ivybridge PRM says:
544 *
545 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
546 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
547 * 0xFFFFFFFF) is assigned to dst."
548 *
549 * but PRMs for earlier generations say
550 *
551 * "In dword format, one GRF may store up to 8 results. When the register
552 * is used later as a vector of Booleans, as only LSB at each channel
553 * contains meaning [sic] data, software should make sure all higher bits
554 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
555 *
556 * We select the representation of a true boolean uniform to be ~0, and fix
557 * the results of Gen <= 5 CMP instruction's with -(result & 1).
558 */
559 ctx->Const.UniformBooleanTrue = ~0;
560
561 /* From the gen4 PRM, volume 4 page 127:
562 *
563 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
564 * the base address of the first element of the surface, computed in
565 * software by adding the surface base address to the byte offset of
566 * the element in the buffer."
567 *
568 * However, unaligned accesses are slower, so enforce buffer alignment.
569 */
570 ctx->Const.UniformBufferOffsetAlignment = 16;
571
572 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
573 * that we can safely have the CPU and GPU writing the same SSBO on
574 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
575 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
576 * be updating disjoint regions of the buffer simultaneously and that will
577 * break if the regions overlap the same cacheline.
578 */
579 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
580 ctx->Const.TextureBufferOffsetAlignment = 16;
581 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
582
583 /* FIXME: Tessellation stages are not yet supported in i965, so
584 * MaxCombinedShaderStorageBlocks doesn't take them into account.
585 */
586 ctx->Const.Program[MESA_SHADER_VERTEX].MaxShaderStorageBlocks = BRW_MAX_SSBO;
587 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxShaderStorageBlocks = BRW_MAX_SSBO;
588 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxShaderStorageBlocks = 0;
589 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxShaderStorageBlocks = 0;
590 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxShaderStorageBlocks = BRW_MAX_SSBO;
591 ctx->Const.Program[MESA_SHADER_COMPUTE].MaxShaderStorageBlocks = BRW_MAX_SSBO;
592 ctx->Const.MaxCombinedShaderStorageBlocks = BRW_MAX_SSBO * 3;
593 ctx->Const.MaxShaderStorageBufferBindings = BRW_MAX_SSBO * 3;
594
595 if (_mesa_extension_override_enables.ARB_compute_shader)
596 ctx->Const.MaxShaderStorageBufferBindings += BRW_MAX_SSBO;
597
598 if (brw->gen >= 6) {
599 ctx->Const.MaxVarying = 32;
600 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
601 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
602 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
603 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
604 }
605
606 /* We want the GLSL compiler to emit code that uses condition codes */
607 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
608 ctx->Const.ShaderCompilerOptions[i] =
609 brw->intelScreen->compiler->glsl_compiler_options[i];
610 }
611
612 /* ARB_viewport_array */
613 if (brw->gen >= 6 && ctx->API == API_OPENGL_CORE) {
614 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
615 ctx->Const.ViewportSubpixelBits = 0;
616
617 /* Cast to float before negating because MaxViewportWidth is unsigned.
618 */
619 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
620 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
621 }
622
623 /* ARB_gpu_shader5 */
624 if (brw->gen >= 7)
625 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
626
627 /* ARB_framebuffer_no_attachments */
628 ctx->Const.MaxFramebufferWidth = ctx->Const.MaxViewportWidth;
629 ctx->Const.MaxFramebufferHeight = ctx->Const.MaxViewportHeight;
630 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
631 ctx->Const.MaxFramebufferSamples = max_samples;
632 }
633
634 static void
635 brw_adjust_cs_context_constants(struct brw_context *brw)
636 {
637 struct gl_context *ctx = &brw->ctx;
638
639 /* For ES, we set these constants based on SIMD8.
640 *
641 * TODO: Once we can always generate SIMD16, we should update this.
642 *
643 * For GL, we assume we can generate a SIMD16 program, but this currently
644 * is not always true. This allows us to run more test cases, and will be
645 * required based on desktop GL compute shader requirements.
646 */
647 const int simd_size = ctx->API == API_OPENGL_CORE ? 16 : 8;
648
649 const uint32_t max_invocations = simd_size * brw->max_cs_threads;
650 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
651 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
652 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
653 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
654 }
655
656 /**
657 * Process driconf (drirc) options, setting appropriate context flags.
658 *
659 * intelInitExtensions still pokes at optionCache directly, in order to
660 * avoid advertising various extensions. No flags are set, so it makes
661 * sense to continue doing that there.
662 */
663 static void
664 brw_process_driconf_options(struct brw_context *brw)
665 {
666 struct gl_context *ctx = &brw->ctx;
667
668 driOptionCache *options = &brw->optionCache;
669 driParseConfigFiles(options, &brw->intelScreen->optionCache,
670 brw->driContext->driScreenPriv->myNum, "i965");
671
672 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
673 switch (bo_reuse_mode) {
674 case DRI_CONF_BO_REUSE_DISABLED:
675 break;
676 case DRI_CONF_BO_REUSE_ALL:
677 intel_bufmgr_gem_enable_reuse(brw->bufmgr);
678 break;
679 }
680
681 if (!driQueryOptionb(options, "hiz")) {
682 brw->has_hiz = false;
683 /* On gen6, you can only do separate stencil with HIZ. */
684 if (brw->gen == 6)
685 brw->has_separate_stencil = false;
686 }
687
688 if (driQueryOptionb(options, "always_flush_batch")) {
689 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
690 brw->always_flush_batch = true;
691 }
692
693 if (driQueryOptionb(options, "always_flush_cache")) {
694 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
695 brw->always_flush_cache = true;
696 }
697
698 if (driQueryOptionb(options, "disable_throttling")) {
699 fprintf(stderr, "disabling flush throttling\n");
700 brw->disable_throttling = true;
701 }
702
703 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
704
705 ctx->Const.ForceGLSLExtensionsWarn =
706 driQueryOptionb(options, "force_glsl_extensions_warn");
707
708 ctx->Const.DisableGLSLLineContinuations =
709 driQueryOptionb(options, "disable_glsl_line_continuations");
710
711 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
712 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
713 }
714
715 GLboolean
716 brwCreateContext(gl_api api,
717 const struct gl_config *mesaVis,
718 __DRIcontext *driContextPriv,
719 unsigned major_version,
720 unsigned minor_version,
721 uint32_t flags,
722 bool notify_reset,
723 unsigned *dri_ctx_error,
724 void *sharedContextPrivate)
725 {
726 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
727 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
728 struct intel_screen *screen = sPriv->driverPrivate;
729 const struct brw_device_info *devinfo = screen->devinfo;
730 struct dd_function_table functions;
731
732 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
733 * provides us with context reset notifications.
734 */
735 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
736 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
737
738 if (screen->has_context_reset_notification)
739 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
740
741 if (flags & ~allowed_flags) {
742 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
743 return false;
744 }
745
746 struct brw_context *brw = rzalloc(NULL, struct brw_context);
747 if (!brw) {
748 fprintf(stderr, "%s: failed to alloc context\n", __func__);
749 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
750 return false;
751 }
752
753 driContextPriv->driverPrivate = brw;
754 brw->driContext = driContextPriv;
755 brw->intelScreen = screen;
756 brw->bufmgr = screen->bufmgr;
757
758 brw->gen = devinfo->gen;
759 brw->gt = devinfo->gt;
760 brw->is_g4x = devinfo->is_g4x;
761 brw->is_baytrail = devinfo->is_baytrail;
762 brw->is_haswell = devinfo->is_haswell;
763 brw->is_cherryview = devinfo->is_cherryview;
764 brw->is_broxton = devinfo->is_broxton;
765 brw->has_llc = devinfo->has_llc;
766 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
767 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
768 brw->has_pln = devinfo->has_pln;
769 brw->has_compr4 = devinfo->has_compr4;
770 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
771 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
772 brw->needs_unlit_centroid_workaround =
773 devinfo->needs_unlit_centroid_workaround;
774
775 brw->must_use_separate_stencil = screen->hw_must_use_separate_stencil;
776 brw->has_swizzling = screen->hw_has_swizzling;
777
778 brw->vs.base.stage = MESA_SHADER_VERTEX;
779 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
780 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
781 if (brw->gen >= 8) {
782 gen8_init_vtable_surface_functions(brw);
783 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
784 } else if (brw->gen >= 7) {
785 gen7_init_vtable_surface_functions(brw);
786 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
787 } else if (brw->gen >= 6) {
788 gen6_init_vtable_surface_functions(brw);
789 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
790 } else {
791 gen4_init_vtable_surface_functions(brw);
792 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
793 }
794
795 brw_init_driver_functions(brw, &functions);
796
797 if (notify_reset)
798 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
799
800 struct gl_context *ctx = &brw->ctx;
801
802 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
803 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
804 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
805 intelDestroyContext(driContextPriv);
806 return false;
807 }
808
809 driContextSetFlags(ctx, flags);
810
811 /* Initialize the software rasterizer and helper modules.
812 *
813 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
814 * software fallbacks (which we have to support on legacy GL to do weird
815 * glDrawPixels(), glBitmap(), and other functions).
816 */
817 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
818 _swrast_CreateContext(ctx);
819 }
820
821 _vbo_CreateContext(ctx);
822 if (ctx->swrast_context) {
823 _tnl_CreateContext(ctx);
824 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
825 _swsetup_CreateContext(ctx);
826
827 /* Configure swrast to match hardware characteristics: */
828 _swrast_allow_pixel_fog(ctx, false);
829 _swrast_allow_vertex_fog(ctx, true);
830 }
831
832 _mesa_meta_init(ctx);
833
834 brw_process_driconf_options(brw);
835
836 if (INTEL_DEBUG & DEBUG_PERF)
837 brw->perf_debug = true;
838
839 brw_initialize_context_constants(brw);
840
841 ctx->Const.ResetStrategy = notify_reset
842 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
843
844 /* Reinitialize the context point state. It depends on ctx->Const values. */
845 _mesa_init_point(ctx);
846
847 intel_fbo_init(brw);
848
849 intel_batchbuffer_init(brw);
850
851 if (brw->gen >= 6) {
852 /* Create a new hardware context. Using a hardware context means that
853 * our GPU state will be saved/restored on context switch, allowing us
854 * to assume that the GPU is in the same state we left it in.
855 *
856 * This is required for transform feedback buffer offsets, query objects,
857 * and also allows us to reduce how much state we have to emit.
858 */
859 brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr);
860
861 if (!brw->hw_ctx) {
862 fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
863 intelDestroyContext(driContextPriv);
864 return false;
865 }
866 }
867
868 if (brw_init_pipe_control(brw, devinfo)) {
869 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
870 intelDestroyContext(driContextPriv);
871 return false;
872 }
873
874 brw_init_state(brw);
875
876 intelInitExtensions(ctx);
877
878 brw_init_surface_formats(brw);
879
880 brw->max_vs_threads = devinfo->max_vs_threads;
881 brw->max_hs_threads = devinfo->max_hs_threads;
882 brw->max_ds_threads = devinfo->max_ds_threads;
883 brw->max_gs_threads = devinfo->max_gs_threads;
884 brw->max_wm_threads = devinfo->max_wm_threads;
885 brw->max_cs_threads = devinfo->max_cs_threads;
886 brw->urb.size = devinfo->urb.size;
887 brw->urb.min_vs_entries = devinfo->urb.min_vs_entries;
888 brw->urb.max_vs_entries = devinfo->urb.max_vs_entries;
889 brw->urb.max_hs_entries = devinfo->urb.max_hs_entries;
890 brw->urb.max_ds_entries = devinfo->urb.max_ds_entries;
891 brw->urb.max_gs_entries = devinfo->urb.max_gs_entries;
892
893 brw_adjust_cs_context_constants(brw);
894
895 /* Estimate the size of the mappable aperture into the GTT. There's an
896 * ioctl to get the whole GTT size, but not one to get the mappable subset.
897 * It turns out it's basically always 256MB, though some ancient hardware
898 * was smaller.
899 */
900 uint32_t gtt_size = 256 * 1024 * 1024;
901
902 /* We don't want to map two objects such that a memcpy between them would
903 * just fault one mapping in and then the other over and over forever. So
904 * we would need to divide the GTT size by 2. Additionally, some GTT is
905 * taken up by things like the framebuffer and the ringbuffer and such, so
906 * be more conservative.
907 */
908 brw->max_gtt_map_object_size = gtt_size / 4;
909
910 if (brw->gen == 6)
911 brw->urb.gs_present = false;
912
913 brw->prim_restart.in_progress = false;
914 brw->prim_restart.enable_cut_index = false;
915 brw->gs.enabled = false;
916 brw->sf.viewport_transform_enable = true;
917
918 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
919
920 brw->use_resource_streamer = screen->has_resource_streamer &&
921 (brw_env_var_as_boolean("INTEL_USE_HW_BT", false) ||
922 brw_env_var_as_boolean("INTEL_USE_GATHER", false));
923
924 ctx->VertexProgram._MaintainTnlProgram = true;
925 ctx->FragmentProgram._MaintainTexEnvProgram = true;
926
927 brw_draw_init( brw );
928
929 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
930 /* Turn on some extra GL_ARB_debug_output generation. */
931 brw->perf_debug = true;
932 }
933
934 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0)
935 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
936
937 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
938 brw_init_shader_time(brw);
939
940 _mesa_compute_version(ctx);
941
942 _mesa_initialize_dispatch_tables(ctx);
943 _mesa_initialize_vbo_vtxfmt(ctx);
944
945 if (ctx->Extensions.AMD_performance_monitor) {
946 brw_init_performance_monitors(brw);
947 }
948
949 vbo_use_buffer_objects(ctx);
950 vbo_always_unmap_buffers(ctx);
951
952 return true;
953 }
954
955 void
956 intelDestroyContext(__DRIcontext * driContextPriv)
957 {
958 struct brw_context *brw =
959 (struct brw_context *) driContextPriv->driverPrivate;
960 struct gl_context *ctx = &brw->ctx;
961
962 /* Dump a final BMP in case the application doesn't call SwapBuffers */
963 if (INTEL_DEBUG & DEBUG_AUB) {
964 intel_batchbuffer_flush(brw);
965 aub_dump_bmp(&brw->ctx);
966 }
967
968 _mesa_meta_free(&brw->ctx);
969 brw_meta_fast_clear_free(brw);
970
971 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
972 /* Force a report. */
973 brw->shader_time.report_time = 0;
974
975 brw_collect_and_report_shader_time(brw);
976 brw_destroy_shader_time(brw);
977 }
978
979 brw_destroy_state(brw);
980 brw_draw_destroy(brw);
981
982 drm_intel_bo_unreference(brw->curbe.curbe_bo);
983 if (brw->vs.base.scratch_bo)
984 drm_intel_bo_unreference(brw->vs.base.scratch_bo);
985 if (brw->gs.base.scratch_bo)
986 drm_intel_bo_unreference(brw->gs.base.scratch_bo);
987 if (brw->wm.base.scratch_bo)
988 drm_intel_bo_unreference(brw->wm.base.scratch_bo);
989
990 gen7_reset_hw_bt_pool_offsets(brw);
991 drm_intel_bo_unreference(brw->hw_bt_pool.bo);
992 brw->hw_bt_pool.bo = NULL;
993
994 drm_intel_gem_context_destroy(brw->hw_ctx);
995
996 if (ctx->swrast_context) {
997 _swsetup_DestroyContext(&brw->ctx);
998 _tnl_DestroyContext(&brw->ctx);
999 }
1000 _vbo_DestroyContext(&brw->ctx);
1001
1002 if (ctx->swrast_context)
1003 _swrast_DestroyContext(&brw->ctx);
1004
1005 brw_fini_pipe_control(brw);
1006 intel_batchbuffer_free(brw);
1007
1008 drm_intel_bo_unreference(brw->throttle_batch[1]);
1009 drm_intel_bo_unreference(brw->throttle_batch[0]);
1010 brw->throttle_batch[1] = NULL;
1011 brw->throttle_batch[0] = NULL;
1012
1013 driDestroyOptionCache(&brw->optionCache);
1014
1015 /* free the Mesa context */
1016 _mesa_free_context_data(&brw->ctx);
1017
1018 ralloc_free(brw);
1019 driContextPriv->driverPrivate = NULL;
1020 }
1021
1022 GLboolean
1023 intelUnbindContext(__DRIcontext * driContextPriv)
1024 {
1025 /* Unset current context and dispath table */
1026 _mesa_make_current(NULL, NULL, NULL);
1027
1028 return true;
1029 }
1030
1031 /**
1032 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1033 * on window system framebuffers.
1034 *
1035 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1036 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1037 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1038 * for a visual where you're guaranteed to be capable, but it turns out that
1039 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1040 * incapable ones, because there's no difference between the two in resources
1041 * used. Applications thus get built that accidentally rely on the default
1042 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1043 * great...
1044 *
1045 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1046 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1047 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1048 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1049 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1050 * and get no sRGB encode (assuming that both kinds of visual are available).
1051 * Thus our choice to support sRGB by default on our visuals for desktop would
1052 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1053 *
1054 * Unfortunately, renderbuffer setup happens before a context is created. So
1055 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1056 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1057 * yet), we go turn that back off before anyone finds out.
1058 */
1059 static void
1060 intel_gles3_srgb_workaround(struct brw_context *brw,
1061 struct gl_framebuffer *fb)
1062 {
1063 struct gl_context *ctx = &brw->ctx;
1064
1065 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1066 return;
1067
1068 /* Some day when we support the sRGB capable bit on visuals available for
1069 * GLES, we'll need to respect that and not disable things here.
1070 */
1071 fb->Visual.sRGBCapable = false;
1072 for (int i = 0; i < BUFFER_COUNT; i++) {
1073 if (fb->Attachment[i].Renderbuffer &&
1074 fb->Attachment[i].Renderbuffer->Format == MESA_FORMAT_B8G8R8A8_SRGB) {
1075 fb->Attachment[i].Renderbuffer->Format = MESA_FORMAT_B8G8R8A8_UNORM;
1076 }
1077 }
1078 }
1079
1080 GLboolean
1081 intelMakeCurrent(__DRIcontext * driContextPriv,
1082 __DRIdrawable * driDrawPriv,
1083 __DRIdrawable * driReadPriv)
1084 {
1085 struct brw_context *brw;
1086 GET_CURRENT_CONTEXT(curCtx);
1087
1088 if (driContextPriv)
1089 brw = (struct brw_context *) driContextPriv->driverPrivate;
1090 else
1091 brw = NULL;
1092
1093 /* According to the glXMakeCurrent() man page: "Pending commands to
1094 * the previous context, if any, are flushed before it is released."
1095 * But only flush if we're actually changing contexts.
1096 */
1097 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1098 _mesa_flush(curCtx);
1099 }
1100
1101 if (driContextPriv) {
1102 struct gl_context *ctx = &brw->ctx;
1103 struct gl_framebuffer *fb, *readFb;
1104
1105 if (driDrawPriv == NULL) {
1106 fb = _mesa_get_incomplete_framebuffer();
1107 } else {
1108 fb = driDrawPriv->driverPrivate;
1109 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1110 }
1111
1112 if (driReadPriv == NULL) {
1113 readFb = _mesa_get_incomplete_framebuffer();
1114 } else {
1115 readFb = driReadPriv->driverPrivate;
1116 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1117 }
1118
1119 /* The sRGB workaround changes the renderbuffer's format. We must change
1120 * the format before the renderbuffer's miptree get's allocated, otherwise
1121 * the formats of the renderbuffer and its miptree will differ.
1122 */
1123 intel_gles3_srgb_workaround(brw, fb);
1124 intel_gles3_srgb_workaround(brw, readFb);
1125
1126 /* If the context viewport hasn't been initialized, force a call out to
1127 * the loader to get buffers so we have a drawable size for the initial
1128 * viewport. */
1129 if (!brw->ctx.ViewportInitialized)
1130 intel_prepare_render(brw);
1131
1132 _mesa_make_current(ctx, fb, readFb);
1133 } else {
1134 _mesa_make_current(NULL, NULL, NULL);
1135 }
1136
1137 return true;
1138 }
1139
1140 void
1141 intel_resolve_for_dri2_flush(struct brw_context *brw,
1142 __DRIdrawable *drawable)
1143 {
1144 if (brw->gen < 6) {
1145 /* MSAA and fast color clear are not supported, so don't waste time
1146 * checking whether a resolve is needed.
1147 */
1148 return;
1149 }
1150
1151 struct gl_framebuffer *fb = drawable->driverPrivate;
1152 struct intel_renderbuffer *rb;
1153
1154 /* Usually, only the back buffer will need to be downsampled. However,
1155 * the front buffer will also need it if the user has rendered into it.
1156 */
1157 static const gl_buffer_index buffers[2] = {
1158 BUFFER_BACK_LEFT,
1159 BUFFER_FRONT_LEFT,
1160 };
1161
1162 for (int i = 0; i < 2; ++i) {
1163 rb = intel_get_renderbuffer(fb, buffers[i]);
1164 if (rb == NULL || rb->mt == NULL)
1165 continue;
1166 if (rb->mt->num_samples <= 1)
1167 intel_miptree_resolve_color(brw, rb->mt);
1168 else
1169 intel_renderbuffer_downsample(brw, rb);
1170 }
1171 }
1172
1173 static unsigned
1174 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1175 {
1176 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1177 }
1178
1179 static void
1180 intel_query_dri2_buffers(struct brw_context *brw,
1181 __DRIdrawable *drawable,
1182 __DRIbuffer **buffers,
1183 int *count);
1184
1185 static void
1186 intel_process_dri2_buffer(struct brw_context *brw,
1187 __DRIdrawable *drawable,
1188 __DRIbuffer *buffer,
1189 struct intel_renderbuffer *rb,
1190 const char *buffer_name);
1191
1192 static void
1193 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1194
1195 static void
1196 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1197 {
1198 struct gl_framebuffer *fb = drawable->driverPrivate;
1199 struct intel_renderbuffer *rb;
1200 __DRIbuffer *buffers = NULL;
1201 int i, count;
1202 const char *region_name;
1203
1204 /* Set this up front, so that in case our buffers get invalidated
1205 * while we're getting new buffers, we don't clobber the stamp and
1206 * thus ignore the invalidate. */
1207 drawable->lastStamp = drawable->dri2.stamp;
1208
1209 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1210 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1211
1212 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1213
1214 if (buffers == NULL)
1215 return;
1216
1217 for (i = 0; i < count; i++) {
1218 switch (buffers[i].attachment) {
1219 case __DRI_BUFFER_FRONT_LEFT:
1220 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1221 region_name = "dri2 front buffer";
1222 break;
1223
1224 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1225 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1226 region_name = "dri2 fake front buffer";
1227 break;
1228
1229 case __DRI_BUFFER_BACK_LEFT:
1230 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1231 region_name = "dri2 back buffer";
1232 break;
1233
1234 case __DRI_BUFFER_DEPTH:
1235 case __DRI_BUFFER_HIZ:
1236 case __DRI_BUFFER_DEPTH_STENCIL:
1237 case __DRI_BUFFER_STENCIL:
1238 case __DRI_BUFFER_ACCUM:
1239 default:
1240 fprintf(stderr,
1241 "unhandled buffer attach event, attachment type %d\n",
1242 buffers[i].attachment);
1243 return;
1244 }
1245
1246 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1247 }
1248
1249 }
1250
1251 void
1252 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1253 {
1254 struct brw_context *brw = context->driverPrivate;
1255 __DRIscreen *screen = brw->intelScreen->driScrnPriv;
1256
1257 /* Set this up front, so that in case our buffers get invalidated
1258 * while we're getting new buffers, we don't clobber the stamp and
1259 * thus ignore the invalidate. */
1260 drawable->lastStamp = drawable->dri2.stamp;
1261
1262 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1263 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1264
1265 if (screen->image.loader)
1266 intel_update_image_buffers(brw, drawable);
1267 else
1268 intel_update_dri2_buffers(brw, drawable);
1269
1270 driUpdateFramebufferSize(&brw->ctx, drawable);
1271 }
1272
1273 /**
1274 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1275 * state is required.
1276 */
1277 void
1278 intel_prepare_render(struct brw_context *brw)
1279 {
1280 struct gl_context *ctx = &brw->ctx;
1281 __DRIcontext *driContext = brw->driContext;
1282 __DRIdrawable *drawable;
1283
1284 drawable = driContext->driDrawablePriv;
1285 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1286 if (drawable->lastStamp != drawable->dri2.stamp)
1287 intel_update_renderbuffers(driContext, drawable);
1288 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1289 }
1290
1291 drawable = driContext->driReadablePriv;
1292 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1293 if (drawable->lastStamp != drawable->dri2.stamp)
1294 intel_update_renderbuffers(driContext, drawable);
1295 driContext->dri2.read_stamp = drawable->dri2.stamp;
1296 }
1297
1298 /* If we're currently rendering to the front buffer, the rendering
1299 * that will happen next will probably dirty the front buffer. So
1300 * mark it as dirty here.
1301 */
1302 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1303 brw->front_buffer_dirty = true;
1304 }
1305
1306 /**
1307 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1308 *
1309 * To determine which DRI buffers to request, examine the renderbuffers
1310 * attached to the drawable's framebuffer. Then request the buffers with
1311 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1312 *
1313 * This is called from intel_update_renderbuffers().
1314 *
1315 * \param drawable Drawable whose buffers are queried.
1316 * \param buffers [out] List of buffers returned by DRI2 query.
1317 * \param buffer_count [out] Number of buffers returned.
1318 *
1319 * \see intel_update_renderbuffers()
1320 * \see DRI2GetBuffers()
1321 * \see DRI2GetBuffersWithFormat()
1322 */
1323 static void
1324 intel_query_dri2_buffers(struct brw_context *brw,
1325 __DRIdrawable *drawable,
1326 __DRIbuffer **buffers,
1327 int *buffer_count)
1328 {
1329 __DRIscreen *screen = brw->intelScreen->driScrnPriv;
1330 struct gl_framebuffer *fb = drawable->driverPrivate;
1331 int i = 0;
1332 unsigned attachments[8];
1333
1334 struct intel_renderbuffer *front_rb;
1335 struct intel_renderbuffer *back_rb;
1336
1337 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1338 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1339
1340 memset(attachments, 0, sizeof(attachments));
1341 if ((_mesa_is_front_buffer_drawing(fb) ||
1342 _mesa_is_front_buffer_reading(fb) ||
1343 !back_rb) && front_rb) {
1344 /* If a fake front buffer is in use, then querying for
1345 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1346 * the real front buffer to the fake front buffer. So before doing the
1347 * query, we need to make sure all the pending drawing has landed in the
1348 * real front buffer.
1349 */
1350 intel_batchbuffer_flush(brw);
1351 intel_flush_front(&brw->ctx);
1352
1353 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1354 attachments[i++] = intel_bits_per_pixel(front_rb);
1355 } else if (front_rb && brw->front_buffer_dirty) {
1356 /* We have pending front buffer rendering, but we aren't querying for a
1357 * front buffer. If the front buffer we have is a fake front buffer,
1358 * the X server is going to throw it away when it processes the query.
1359 * So before doing the query, make sure all the pending drawing has
1360 * landed in the real front buffer.
1361 */
1362 intel_batchbuffer_flush(brw);
1363 intel_flush_front(&brw->ctx);
1364 }
1365
1366 if (back_rb) {
1367 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1368 attachments[i++] = intel_bits_per_pixel(back_rb);
1369 }
1370
1371 assert(i <= ARRAY_SIZE(attachments));
1372
1373 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1374 &drawable->w,
1375 &drawable->h,
1376 attachments, i / 2,
1377 buffer_count,
1378 drawable->loaderPrivate);
1379 }
1380
1381 /**
1382 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1383 *
1384 * This is called from intel_update_renderbuffers().
1385 *
1386 * \par Note:
1387 * DRI buffers whose attachment point is DRI2BufferStencil or
1388 * DRI2BufferDepthStencil are handled as special cases.
1389 *
1390 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1391 * that is passed to drm_intel_bo_gem_create_from_name().
1392 *
1393 * \see intel_update_renderbuffers()
1394 */
1395 static void
1396 intel_process_dri2_buffer(struct brw_context *brw,
1397 __DRIdrawable *drawable,
1398 __DRIbuffer *buffer,
1399 struct intel_renderbuffer *rb,
1400 const char *buffer_name)
1401 {
1402 struct gl_framebuffer *fb = drawable->driverPrivate;
1403 drm_intel_bo *bo;
1404
1405 if (!rb)
1406 return;
1407
1408 unsigned num_samples = rb->Base.Base.NumSamples;
1409
1410 /* We try to avoid closing and reopening the same BO name, because the first
1411 * use of a mapping of the buffer involves a bunch of page faulting which is
1412 * moderately expensive.
1413 */
1414 struct intel_mipmap_tree *last_mt;
1415 if (num_samples == 0)
1416 last_mt = rb->mt;
1417 else
1418 last_mt = rb->singlesample_mt;
1419
1420 uint32_t old_name = 0;
1421 if (last_mt) {
1422 /* The bo already has a name because the miptree was created by a
1423 * previous call to intel_process_dri2_buffer(). If a bo already has a
1424 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1425 * create a new name.
1426 */
1427 drm_intel_bo_flink(last_mt->bo, &old_name);
1428 }
1429
1430 if (old_name == buffer->name)
1431 return;
1432
1433 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1434 fprintf(stderr,
1435 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1436 buffer->name, buffer->attachment,
1437 buffer->cpp, buffer->pitch);
1438 }
1439
1440 bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1441 buffer->name);
1442 if (!bo) {
1443 fprintf(stderr,
1444 "Failed to open BO for returned DRI2 buffer "
1445 "(%dx%d, %s, named %d).\n"
1446 "This is likely a bug in the X Server that will lead to a "
1447 "crash soon.\n",
1448 drawable->w, drawable->h, buffer_name, buffer->name);
1449 return;
1450 }
1451
1452 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1453 drawable->w, drawable->h,
1454 buffer->pitch);
1455
1456 if (_mesa_is_front_buffer_drawing(fb) &&
1457 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1458 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1459 rb->Base.Base.NumSamples > 1) {
1460 intel_renderbuffer_upsample(brw, rb);
1461 }
1462
1463 assert(rb->mt);
1464
1465 drm_intel_bo_unreference(bo);
1466 }
1467
1468 /**
1469 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1470 *
1471 * To determine which DRI buffers to request, examine the renderbuffers
1472 * attached to the drawable's framebuffer. Then request the buffers from
1473 * the image loader
1474 *
1475 * This is called from intel_update_renderbuffers().
1476 *
1477 * \param drawable Drawable whose buffers are queried.
1478 * \param buffers [out] List of buffers returned by DRI2 query.
1479 * \param buffer_count [out] Number of buffers returned.
1480 *
1481 * \see intel_update_renderbuffers()
1482 */
1483
1484 static void
1485 intel_update_image_buffer(struct brw_context *intel,
1486 __DRIdrawable *drawable,
1487 struct intel_renderbuffer *rb,
1488 __DRIimage *buffer,
1489 enum __DRIimageBufferMask buffer_type)
1490 {
1491 struct gl_framebuffer *fb = drawable->driverPrivate;
1492
1493 if (!rb || !buffer->bo)
1494 return;
1495
1496 unsigned num_samples = rb->Base.Base.NumSamples;
1497
1498 /* Check and see if we're already bound to the right
1499 * buffer object
1500 */
1501 struct intel_mipmap_tree *last_mt;
1502 if (num_samples == 0)
1503 last_mt = rb->mt;
1504 else
1505 last_mt = rb->singlesample_mt;
1506
1507 if (last_mt && last_mt->bo == buffer->bo)
1508 return;
1509
1510 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1511 buffer->width, buffer->height,
1512 buffer->pitch);
1513
1514 if (_mesa_is_front_buffer_drawing(fb) &&
1515 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1516 rb->Base.Base.NumSamples > 1) {
1517 intel_renderbuffer_upsample(intel, rb);
1518 }
1519 }
1520
1521 static void
1522 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1523 {
1524 struct gl_framebuffer *fb = drawable->driverPrivate;
1525 __DRIscreen *screen = brw->intelScreen->driScrnPriv;
1526 struct intel_renderbuffer *front_rb;
1527 struct intel_renderbuffer *back_rb;
1528 struct __DRIimageList images;
1529 unsigned int format;
1530 uint32_t buffer_mask = 0;
1531
1532 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1533 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1534
1535 if (back_rb)
1536 format = intel_rb_format(back_rb);
1537 else if (front_rb)
1538 format = intel_rb_format(front_rb);
1539 else
1540 return;
1541
1542 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1543 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1544 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1545 }
1546
1547 if (back_rb)
1548 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1549
1550 (*screen->image.loader->getBuffers) (drawable,
1551 driGLFormatToImageFormat(format),
1552 &drawable->dri2.stamp,
1553 drawable->loaderPrivate,
1554 buffer_mask,
1555 &images);
1556
1557 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1558 drawable->w = images.front->width;
1559 drawable->h = images.front->height;
1560 intel_update_image_buffer(brw,
1561 drawable,
1562 front_rb,
1563 images.front,
1564 __DRI_IMAGE_BUFFER_FRONT);
1565 }
1566 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1567 drawable->w = images.back->width;
1568 drawable->h = images.back->height;
1569 intel_update_image_buffer(brw,
1570 drawable,
1571 back_rb,
1572 images.back,
1573 __DRI_IMAGE_BUFFER_BACK);
1574 }
1575 }