src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/api_exec.h"
  34 #include "main/imports.h"
  35 #include "main/macros.h"
  36 #include "main/simple_list.h"
  37 #include "main/version.h"
  38 #include "main/vtxfmt.h"
  39
  40 #include "vbo/vbo_context.h"
  41
  42 #include "brw_context.h"
  43 #include "brw_defines.h"
  44 #include "brw_draw.h"
  45 #include "brw_state.h"
  46
  47 #include "intel_fbo.h"
  48 #include "intel_mipmap_tree.h"
  49 #include "intel_regions.h"
  50 #include "intel_tex.h"
  51 #include "intel_tex_obj.h"
  52
  53 #include "tnl/t_pipeline.h"
  54 #include "glsl/ralloc.h"
  55
  56 /***************************************
  57  * Mesa's Driver Functions
  58  ***************************************/
  59
  60 static size_t
  61 brw_query_samples_for_format(struct gl_context *ctx, GLenum target,
  62                              GLenum internalFormat, int samples[16])
  63 {
  64    struct intel_context *intel = intel_context(ctx);
  65
  66    (void) target;
  67
  68    switch (intel->gen) {
  69    case 7:
  70       samples[0] = 8;
  71       samples[1] = 4;
  72       return 2;
  73
  74    case 6:
  75       samples[0] = 4;
  76       return 1;
  77
  78    default:
  79       samples[0] = 1;
  80       return 1;
  81    }
  82 }
  83
  84 static void brwInitDriverFunctions(struct intel_screen *screen,
  85                                    struct dd_function_table *functions)
  86 {
  87    intelInitDriverFunctions( functions );
  88
  89    brwInitFragProgFuncs( functions );
  90    brw_init_queryobj_functions(functions);
  91
  92    functions->QuerySamplesForFormat = brw_query_samples_for_format;
  93    functions->BeginTransformFeedback = brw_begin_transform_feedback;
  94
  95    if (screen->gen >= 7)
  96       functions->EndTransformFeedback = gen7_end_transform_feedback;
  97    else
  98       functions->EndTransformFeedback = brw_end_transform_feedback;
  99
 100    if (screen->gen >= 6)
 101       functions->GetSamplePosition = gen6_get_sample_position;
 102 }
 103
 104 bool
 105 brwCreateContext(int api,
 106                  const struct gl_config *mesaVis,
 107                  __DRIcontext *driContextPriv,
 108                  unsigned major_version,
 109                  unsigned minor_version,
 110                  uint32_t flags,
 111                  unsigned *error,
 112                  void *sharedContextPrivate)
 113 {
 114    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 115    struct intel_screen *screen = sPriv->driverPrivate;
 116    struct dd_function_table functions;
 117    unsigned i;
 118
 119    struct brw_context *brw = rzalloc(NULL, struct brw_context);
 120    if (!brw) {
 121       printf("%s: failed to alloc context\n", __FUNCTION__);
 122       *error = __DRI_CTX_ERROR_NO_MEMORY;
 123       return false;
 124    }
 125
 126    /* brwInitVtbl needs to know the chipset generation so that it can set the
 127     * right pointers.
 128     */
 129    brw->intel.gen = screen->gen;
 130
 131    brwInitVtbl( brw );
 132
 133    brwInitDriverFunctions(screen, &functions);
 134
 135    struct intel_context *intel = &brw->intel;
 136    struct gl_context *ctx = &intel->ctx;
 137
 138    if (!intelInitContext( intel, api, major_version, minor_version,
 139                           mesaVis, driContextPriv,
 140                           sharedContextPrivate, &functions,
 141                           error)) {
 142       ralloc_free(brw);
 143       return false;
 144    }
 145
 146    brw_init_surface_formats(brw);
 147
 148    /* Initialize swrast, tnl driver tables: */
 149    TNLcontext *tnl = TNL_CONTEXT(ctx);
 150    if (tnl)
 151       tnl->Driver.RunPipeline = _tnl_run_pipeline;
 152
 153    ctx->DriverFlags.NewTransformFeedback = BRW_NEW_TRANSFORM_FEEDBACK;
 154    ctx->DriverFlags.NewRasterizerDiscard = BRW_NEW_RASTERIZER_DISCARD;
 155    ctx->DriverFlags.NewUniformBuffer = BRW_NEW_UNIFORM_BUFFER;
 156
 157    ctx->Const.MaxDualSourceDrawBuffers = 1;
 158    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
 159    ctx->Const.FragmentProgram.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
 160    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
 161    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
 162                                      ctx->Const.FragmentProgram.MaxTextureImageUnits);
 163    ctx->Const.VertexProgram.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
 164    ctx->Const.MaxCombinedTextureImageUnits =
 165       ctx->Const.VertexProgram.MaxTextureImageUnits +
 166       ctx->Const.FragmentProgram.MaxTextureImageUnits;
 167
 168    ctx->Const.MaxTextureLevels = 14; /* 8192 */
 169    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 170            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 171    ctx->Const.Max3DTextureLevels = 9;
 172    ctx->Const.MaxCubeTextureLevels = 12;
 173
 174    if (intel->gen >= 7)
 175       ctx->Const.MaxArrayTextureLayers = 2048;
 176    else
 177       ctx->Const.MaxArrayTextureLayers = 512;
 178
 179    ctx->Const.MaxTextureRectSize = (1<<12);
 180
 181    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 182
 183    /* Hardware only supports a limited number of transform feedback buffers.
 184     * So we need to override the Mesa default (which is based only on software
 185     * limits).
 186     */
 187    ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
 188
 189    /* On Gen6, in the worst case, we use up one binding table entry per
 190     * transform feedback component (see comments above the definition of
 191     * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
 192     * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
 193     * BRW_MAX_SOL_BINDINGS.
 194     *
 195     * In "separate components" mode, we need to divide this value by
 196     * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
 197     * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
 198     */
 199    ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
 200    ctx->Const.MaxTransformFeedbackSeparateComponents =
 201       BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
 202
 203    if (intel->gen == 6) {
 204       ctx->Const.MaxSamples = 4;
 205       ctx->Const.MaxColorTextureSamples = 4;
 206       ctx->Const.MaxDepthTextureSamples = 4;
 207       ctx->Const.MaxIntegerSamples = 4;
 208    }
 209    else if (intel->gen >= 7) {
 210       ctx->Const.MaxSamples = 8;
 211       ctx->Const.MaxColorTextureSamples = 8;
 212       ctx->Const.MaxDepthTextureSamples = 8;
 213       ctx->Const.MaxIntegerSamples = 8;
 214    }
 215
 216    /* if conformance mode is set, swrast can handle any size AA point */
 217    ctx->Const.MaxPointSizeAA = 255.0;
 218
 219    /* We want the GLSL compiler to emit code that uses condition codes */
 220    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 221       ctx->ShaderCompilerOptions[i].MaxIfDepth = intel->gen < 6 ? 16 : UINT_MAX;
 222       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
 223       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
 224       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
 225       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
 226       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
 227
 228       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 229          (i == MESA_SHADER_FRAGMENT);
 230       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 231          (i == MESA_SHADER_FRAGMENT);
 232       ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
 233    }
 234
 235    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 236    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 237    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 238    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 239    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 240    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 241    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 242    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 243    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 244    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 245    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 246    ctx->Const.VertexProgram.MaxEnvParams =
 247       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 248            ctx->Const.VertexProgram.MaxEnvParams);
 249
 250    ctx->Const.FragmentProgram.MaxNativeInstructions = (1 * 1024);
 251    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (1 * 1024);
 252    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (1 * 1024);
 253    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (1 * 1024);
 254    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 255    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 256    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 257    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 258    ctx->Const.FragmentProgram.MaxEnvParams =
 259       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 260            ctx->Const.FragmentProgram.MaxEnvParams);
 261
 262    /* Fragment shaders use real, 32-bit twos-complement integers for all
 263     * integer types.
 264     */
 265    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 266    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 267    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 268    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 269       = ctx->Const.FragmentProgram.LowInt;
 270
 271    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 272       but we're not sure how it's actually done for vertex order,
 273       that affect provoking vertex decision. Always use last vertex
 274       convention for quad primitive which works as expected for now. */
 275    if (intel->gen >= 6)
 276        ctx->Const.QuadsFollowProvokingVertexConvention = false;
 277
 278    ctx->Const.QueryCounterBits.Timestamp = 36;
 279
 280    if (intel->is_g4x || intel->gen >= 5) {
 281       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 282       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 283       brw->has_surface_tile_offset = true;
 284       if (intel->gen < 6)
 285           brw->has_compr4 = true;
 286       brw->has_aa_line_parameters = true;
 287       brw->has_pln = true;
 288   } else {
 289       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 290       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 291    }
 292
 293    /* WM maximum threads is number of EUs times number of threads per EU. */
 294    assert(intel->gen <= 7);
 295
 296    if (intel->is_haswell) {
 297       if (intel->gt == 1) {
 298          brw->max_wm_threads = 102;
 299          brw->max_vs_threads = 70;
 300          brw->urb.size = 128;
 301          brw->urb.max_vs_entries = 640;
 302          brw->urb.max_gs_entries = 256;
 303       } else if (intel->gt == 2) {
 304          brw->max_wm_threads = 204;
 305          brw->max_vs_threads = 280;
 306          brw->urb.size = 256;
 307          brw->urb.max_vs_entries = 1664;
 308          brw->urb.max_gs_entries = 640;
 309       } else if (intel->gt == 3) {
 310          brw->max_wm_threads = 408;
 311          brw->max_vs_threads = 280;
 312          brw->urb.size = 512;
 313          brw->urb.max_vs_entries = 1664;
 314          brw->urb.max_gs_entries = 640;
 315       }
 316    } else if (intel->gen == 7) {
 317       if (intel->gt == 1) {
 318          brw->max_wm_threads = 48;
 319          brw->max_vs_threads = 36;
 320          brw->max_gs_threads = 36;
 321          brw->urb.size = 128;
 322          brw->urb.max_vs_entries = 512;
 323          brw->urb.max_gs_entries = 192;
 324       } else if (intel->gt == 2) {
 325          brw->max_wm_threads = 172;
 326          brw->max_vs_threads = 128;
 327          brw->max_gs_threads = 128;
 328          brw->urb.size = 256;
 329          brw->urb.max_vs_entries = 704;
 330          brw->urb.max_gs_entries = 320;
 331       } else {
 332          assert(!"Unknown gen7 device.");
 333       }
 334    } else if (intel->gen == 6) {
 335       if (intel->gt == 2) {
 336          brw->max_wm_threads = 80;
 337          brw->max_vs_threads = 60;
 338          brw->max_gs_threads = 60;
 339          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 340          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 341          brw->urb.max_gs_entries = 256;
 342       } else {
 343          brw->max_wm_threads = 40;
 344          brw->max_vs_threads = 24;
 345          brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
 346          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 347          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 348          brw->urb.max_gs_entries = 256;
 349       }
 350       brw->urb.gen6_gs_previously_active = false;
 351    } else if (intel->gen == 5) {
 352       brw->urb.size = 1024;
 353       brw->max_vs_threads = 72;
 354       brw->max_gs_threads = 32;
 355       brw->max_wm_threads = 12 * 6;
 356    } else if (intel->is_g4x) {
 357       brw->urb.size = 384;
 358       brw->max_vs_threads = 32;
 359       brw->max_gs_threads = 2;
 360       brw->max_wm_threads = 10 * 5;
 361    } else if (intel->gen < 6) {
 362       brw->urb.size = 256;
 363       brw->max_vs_threads = 16;
 364       brw->max_gs_threads = 2;
 365       brw->max_wm_threads = 8 * 4;
 366       brw->has_negative_rhw_bug = true;
 367    }
 368
 369    if (intel->gen <= 7) {
 370       brw->needs_unlit_centroid_workaround = true;
 371    }
 372
 373    brw->prim_restart.in_progress = false;
 374    brw->prim_restart.enable_cut_index = false;
 375    intel->hw_ctx = drm_intel_gem_context_create(intel->bufmgr);
 376
 377    brw_init_state( brw );
 378
 379    brw->curbe.last_buf = calloc(1, 4096);
 380    brw->curbe.next_buf = calloc(1, 4096);
 381
 382    brw->state.dirty.mesa = ~0;
 383    brw->state.dirty.brw = ~0;
 384
 385    brw->emit_state_always = 0;
 386
 387    intel->batch.need_workaround_flush = true;
 388
 389    ctx->VertexProgram._MaintainTnlProgram = true;
 390    ctx->FragmentProgram._MaintainTexEnvProgram = true;
 391
 392    brw_draw_init( brw );
 393
 394    brw->precompile = driQueryOptionb(&intel->optionCache, "shader_precompile");
 395
 396    ctx->Const.NativeIntegers = true;
 397    ctx->Const.UniformBooleanTrue = 1;
 398    ctx->Const.UniformBufferOffsetAlignment = 16;
 399
 400    ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(&intel->optionCache, "force_glsl_extensions_warn");
 401
 402    ctx->Const.DisableGLSLLineContinuations = driQueryOptionb(&intel->optionCache, "disable_glsl_line_continuations");
 403
 404    ctx->Const.ContextFlags = 0;
 405    if ((flags & __DRI_CTX_FLAG_FORWARD_COMPATIBLE) != 0)
 406       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_FORWARD_COMPATIBLE_BIT;
 407
 408    if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
 409       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_DEBUG_BIT;
 410
 411       /* Turn on some extra GL_ARB_debug_output generation. */
 412       intel->perf_debug = true;
 413    }
 414
 415    brw_fs_alloc_reg_sets(brw);
 416
 417    if (INTEL_DEBUG & DEBUG_SHADER_TIME)
 418       brw_init_shader_time(brw);
 419
 420    _mesa_compute_version(ctx);
 421
 422    _mesa_initialize_dispatch_tables(ctx);
 423    _mesa_initialize_vbo_vtxfmt(ctx);
 424
 425    return true;
 426 }
 427