mesa: Only expose GLES's EXT_texture_type_2_10_10_10_REV if supported in HW.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46 #include "main/stencil.h"
47 #include "main/state.h"
48
49 #include "vbo/vbo_context.h"
50
51 #include "drivers/common/driverfuncs.h"
52 #include "drivers/common/meta.h"
53 #include "utils.h"
54
55 #include "brw_context.h"
56 #include "brw_defines.h"
57 #include "brw_blorp.h"
58 #include "brw_draw.h"
59 #include "brw_state.h"
60
61 #include "intel_batchbuffer.h"
62 #include "intel_buffer_objects.h"
63 #include "intel_buffers.h"
64 #include "intel_fbo.h"
65 #include "intel_mipmap_tree.h"
66 #include "intel_pixel.h"
67 #include "intel_image.h"
68 #include "intel_tex.h"
69 #include "intel_tex_obj.h"
70
71 #include "swrast_setup/swrast_setup.h"
72 #include "tnl/tnl.h"
73 #include "tnl/t_pipeline.h"
74 #include "util/ralloc.h"
75 #include "util/debug.h"
76 #include "isl/isl.h"
77
78 /***************************************
79 * Mesa's Driver Functions
80 ***************************************/
81
82 const char *const brw_vendor_string = "Intel Open Source Technology Center";
83
84 static const char *
85 get_bsw_model(const struct intel_screen *screen)
86 {
87 switch (screen->eu_total) {
88 case 16:
89 return "405";
90 case 12:
91 return "400";
92 default:
93 return " ";
94 }
95 }
96
97 const char *
98 brw_get_renderer_string(const struct intel_screen *screen)
99 {
100 const char *chipset;
101 static char buffer[128];
102 char *bsw = NULL;
103
104 switch (screen->deviceID) {
105 #undef CHIPSET
106 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
107 #include "pci_ids/i965_pci_ids.h"
108 default:
109 chipset = "Unknown Intel Chipset";
110 break;
111 }
112
113 /* Braswell branding is funny, so we have to fix it up here */
114 if (screen->deviceID == 0x22B1) {
115 bsw = strdup(chipset);
116 char *needle = strstr(bsw, "XXX");
117 if (needle) {
118 memcpy(needle, get_bsw_model(screen), 3);
119 chipset = bsw;
120 }
121 }
122
123 (void) driGetRendererString(buffer, chipset, 0);
124 free(bsw);
125 return buffer;
126 }
127
128 static const GLubyte *
129 intel_get_string(struct gl_context * ctx, GLenum name)
130 {
131 const struct brw_context *const brw = brw_context(ctx);
132
133 switch (name) {
134 case GL_VENDOR:
135 return (GLubyte *) brw_vendor_string;
136
137 case GL_RENDERER:
138 return
139 (GLubyte *) brw_get_renderer_string(brw->screen);
140
141 default:
142 return NULL;
143 }
144 }
145
146 static void
147 intel_viewport(struct gl_context *ctx)
148 {
149 struct brw_context *brw = brw_context(ctx);
150 __DRIcontext *driContext = brw->driContext;
151
152 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
153 if (driContext->driDrawablePriv)
154 dri2InvalidateDrawable(driContext->driDrawablePriv);
155 if (driContext->driReadablePriv)
156 dri2InvalidateDrawable(driContext->driReadablePriv);
157 }
158 }
159
160 static void
161 intel_update_framebuffer(struct gl_context *ctx,
162 struct gl_framebuffer *fb)
163 {
164 struct brw_context *brw = brw_context(ctx);
165
166 /* Quantize the derived default number of samples
167 */
168 fb->DefaultGeometry._NumSamples =
169 intel_quantize_num_samples(brw->screen,
170 fb->DefaultGeometry.NumSamples);
171 }
172
173 static void
174 intel_update_state(struct gl_context * ctx)
175 {
176 GLuint new_state = ctx->NewState;
177 struct brw_context *brw = brw_context(ctx);
178
179 if (ctx->swrast_context)
180 _swrast_InvalidateState(ctx, new_state);
181
182 brw->NewGLState |= new_state;
183
184 if (new_state & (_NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT))
185 _mesa_update_draw_buffer_bounds(ctx, ctx->DrawBuffer);
186
187 if (new_state & (_NEW_STENCIL | _NEW_BUFFERS)) {
188 brw->stencil_enabled = _mesa_stencil_is_enabled(ctx);
189 brw->stencil_two_sided = _mesa_stencil_is_two_sided(ctx);
190 brw->stencil_write_enabled =
191 _mesa_stencil_is_write_enabled(ctx, brw->stencil_two_sided);
192 }
193
194 if (new_state & _NEW_POLYGON)
195 brw->polygon_front_bit = _mesa_polygon_get_front_bit(ctx);
196
197 if (new_state & _NEW_BUFFERS) {
198 intel_update_framebuffer(ctx, ctx->DrawBuffer);
199 if (ctx->DrawBuffer != ctx->ReadBuffer)
200 intel_update_framebuffer(ctx, ctx->ReadBuffer);
201 }
202 }
203
204 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
205
206 static void
207 intel_flush_front(struct gl_context *ctx)
208 {
209 struct brw_context *brw = brw_context(ctx);
210 __DRIcontext *driContext = brw->driContext;
211 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
212 __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
213
214 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
215 if (flushFront(dri_screen) && driDrawable &&
216 driDrawable->loaderPrivate) {
217
218 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
219 *
220 * This potentially resolves both front and back buffer. It
221 * is unnecessary to resolve the back, but harms nothing except
222 * performance. And no one cares about front-buffer render
223 * performance.
224 */
225 intel_resolve_for_dri2_flush(brw, driDrawable);
226 intel_batchbuffer_flush(brw);
227
228 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
229
230 /* We set the dirty bit in intel_prepare_render() if we're
231 * front buffer rendering once we get there.
232 */
233 brw->front_buffer_dirty = false;
234 }
235 }
236 }
237
238 static void
239 intel_glFlush(struct gl_context *ctx)
240 {
241 struct brw_context *brw = brw_context(ctx);
242
243 intel_batchbuffer_flush(brw);
244 intel_flush_front(ctx);
245
246 brw->need_flush_throttle = true;
247 }
248
249 static void
250 intel_finish(struct gl_context * ctx)
251 {
252 struct brw_context *brw = brw_context(ctx);
253
254 intel_glFlush(ctx);
255
256 if (brw->batch.last_bo)
257 brw_bo_wait_rendering(brw->batch.last_bo);
258 }
259
260 static void
261 brw_init_driver_functions(struct brw_context *brw,
262 struct dd_function_table *functions)
263 {
264 const struct gen_device_info *devinfo = &brw->screen->devinfo;
265
266 _mesa_init_driver_functions(functions);
267
268 /* GLX uses DRI2 invalidate events to handle window resizing.
269 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
270 * which doesn't provide a mechanism for snooping the event queues.
271 *
272 * So EGL still relies on viewport hacks to handle window resizing.
273 * This should go away with DRI3000.
274 */
275 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
276 functions->Viewport = intel_viewport;
277
278 functions->Flush = intel_glFlush;
279 functions->Finish = intel_finish;
280 functions->GetString = intel_get_string;
281 functions->UpdateState = intel_update_state;
282
283 intelInitTextureFuncs(functions);
284 intelInitTextureImageFuncs(functions);
285 intelInitTextureCopyImageFuncs(functions);
286 intelInitCopyImageFuncs(functions);
287 intelInitClearFuncs(functions);
288 intelInitBufferFuncs(functions);
289 intelInitPixelFuncs(functions);
290 intelInitBufferObjectFuncs(functions);
291 brw_init_syncobj_functions(functions);
292 brw_init_object_purgeable_functions(functions);
293
294 brwInitFragProgFuncs( functions );
295 brw_init_common_queryobj_functions(functions);
296 if (devinfo->gen >= 8 || devinfo->is_haswell)
297 hsw_init_queryobj_functions(functions);
298 else if (devinfo->gen >= 6)
299 gen6_init_queryobj_functions(functions);
300 else
301 gen4_init_queryobj_functions(functions);
302 brw_init_compute_functions(functions);
303 brw_init_conditional_render_functions(functions);
304
305 functions->QueryInternalFormat = brw_query_internal_format;
306
307 functions->NewTransformFeedback = brw_new_transform_feedback;
308 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
309 if (can_do_mi_math_and_lrr(brw->screen)) {
310 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
311 functions->EndTransformFeedback = hsw_end_transform_feedback;
312 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
313 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
314 } else if (devinfo->gen >= 7) {
315 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
316 functions->EndTransformFeedback = gen7_end_transform_feedback;
317 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
318 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
319 functions->GetTransformFeedbackVertexCount =
320 brw_get_transform_feedback_vertex_count;
321 } else {
322 functions->BeginTransformFeedback = brw_begin_transform_feedback;
323 functions->EndTransformFeedback = brw_end_transform_feedback;
324 functions->PauseTransformFeedback = brw_pause_transform_feedback;
325 functions->ResumeTransformFeedback = brw_resume_transform_feedback;
326 functions->GetTransformFeedbackVertexCount =
327 brw_get_transform_feedback_vertex_count;
328 }
329
330 if (devinfo->gen >= 6)
331 functions->GetSamplePosition = gen6_get_sample_position;
332 }
333
334 static void
335 brw_initialize_context_constants(struct brw_context *brw)
336 {
337 const struct gen_device_info *devinfo = &brw->screen->devinfo;
338 struct gl_context *ctx = &brw->ctx;
339 const struct brw_compiler *compiler = brw->screen->compiler;
340
341 const bool stage_exists[MESA_SHADER_STAGES] = {
342 [MESA_SHADER_VERTEX] = true,
343 [MESA_SHADER_TESS_CTRL] = devinfo->gen >= 7,
344 [MESA_SHADER_TESS_EVAL] = devinfo->gen >= 7,
345 [MESA_SHADER_GEOMETRY] = devinfo->gen >= 6,
346 [MESA_SHADER_FRAGMENT] = true,
347 [MESA_SHADER_COMPUTE] =
348 ((ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE) &&
349 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
350 (ctx->API == API_OPENGLES2 &&
351 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
352 _mesa_extension_override_enables.ARB_compute_shader,
353 };
354
355 unsigned num_stages = 0;
356 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
357 if (stage_exists[i])
358 num_stages++;
359 }
360
361 unsigned max_samplers =
362 devinfo->gen >= 8 || devinfo->is_haswell ? BRW_MAX_TEX_UNIT : 16;
363
364 ctx->Const.MaxDualSourceDrawBuffers = 1;
365 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
366 ctx->Const.MaxCombinedShaderOutputResources =
367 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
368
369 /* The timestamp register we can read for glGetTimestamp() is
370 * sometimes only 32 bits, before scaling to nanoseconds (depending
371 * on kernel).
372 *
373 * Once scaled to nanoseconds the timestamp would roll over at a
374 * non-power-of-two, so an application couldn't use
375 * GL_QUERY_COUNTER_BITS to handle rollover correctly. Instead, we
376 * report 36 bits and truncate at that (rolling over 5 times as
377 * often as the HW counter), and when the 32-bit counter rolls
378 * over, it happens to also be at a rollover in the reported value
379 * from near (1<<36) to 0.
380 *
381 * The low 32 bits rolls over in ~343 seconds. Our 36-bit result
382 * rolls over every ~69 seconds.
383 */
384 ctx->Const.QueryCounterBits.Timestamp = 36;
385
386 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
387 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
388 if (devinfo->gen >= 7) {
389 ctx->Const.MaxRenderbufferSize = 16384;
390 ctx->Const.MaxTextureLevels = MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS);
391 ctx->Const.MaxCubeTextureLevels = 15; /* 16384 */
392 } else {
393 ctx->Const.MaxRenderbufferSize = 8192;
394 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
395 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
396 }
397 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
398 ctx->Const.MaxArrayTextureLayers = devinfo->gen >= 7 ? 2048 : 512;
399 ctx->Const.MaxTextureMbytes = 1536;
400 ctx->Const.MaxTextureRectSize = devinfo->gen >= 7 ? 16384 : 8192;
401 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
402 ctx->Const.MaxTextureLodBias = 15.0;
403 ctx->Const.StripTextureBorder = true;
404 if (devinfo->gen >= 7) {
405 ctx->Const.MaxProgramTextureGatherComponents = 4;
406 ctx->Const.MinProgramTextureGatherOffset = -32;
407 ctx->Const.MaxProgramTextureGatherOffset = 31;
408 } else if (devinfo->gen == 6) {
409 ctx->Const.MaxProgramTextureGatherComponents = 1;
410 ctx->Const.MinProgramTextureGatherOffset = -8;
411 ctx->Const.MaxProgramTextureGatherOffset = 7;
412 }
413
414 ctx->Const.MaxUniformBlockSize = 65536;
415
416 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
417 struct gl_program_constants *prog = &ctx->Const.Program[i];
418
419 if (!stage_exists[i])
420 continue;
421
422 prog->MaxTextureImageUnits = max_samplers;
423
424 prog->MaxUniformBlocks = BRW_MAX_UBO;
425 prog->MaxCombinedUniformComponents =
426 prog->MaxUniformComponents +
427 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
428
429 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
430 prog->MaxAtomicBuffers = BRW_MAX_ABO;
431 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
432 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
433 }
434
435 ctx->Const.MaxTextureUnits =
436 MIN2(ctx->Const.MaxTextureCoordUnits,
437 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
438
439 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
440 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
441 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
442 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
443 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
444 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
445 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
446
447
448 /* Hardware only supports a limited number of transform feedback buffers.
449 * So we need to override the Mesa default (which is based only on software
450 * limits).
451 */
452 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
453
454 /* On Gen6, in the worst case, we use up one binding table entry per
455 * transform feedback component (see comments above the definition of
456 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
457 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
458 * BRW_MAX_SOL_BINDINGS.
459 *
460 * In "separate components" mode, we need to divide this value by
461 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
462 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
463 */
464 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
465 ctx->Const.MaxTransformFeedbackSeparateComponents =
466 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
467
468 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
469 !can_do_mi_math_and_lrr(brw->screen);
470
471 int max_samples;
472 const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
473 const int clamp_max_samples =
474 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
475
476 if (clamp_max_samples < 0) {
477 max_samples = msaa_modes[0];
478 } else {
479 /* Select the largest supported MSAA mode that does not exceed
480 * clamp_max_samples.
481 */
482 max_samples = 0;
483 for (int i = 0; msaa_modes[i] != 0; ++i) {
484 if (msaa_modes[i] <= clamp_max_samples) {
485 max_samples = msaa_modes[i];
486 break;
487 }
488 }
489 }
490
491 ctx->Const.MaxSamples = max_samples;
492 ctx->Const.MaxColorTextureSamples = max_samples;
493 ctx->Const.MaxDepthTextureSamples = max_samples;
494 ctx->Const.MaxIntegerSamples = max_samples;
495 ctx->Const.MaxImageSamples = 0;
496
497 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
498 * to map indices of rectangular grid to sample numbers within a pixel.
499 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
500 * extension implementation. For more details see the comment above
501 * gen6_set_sample_maps() definition.
502 */
503 gen6_set_sample_maps(ctx);
504
505 ctx->Const.MinLineWidth = 1.0;
506 ctx->Const.MinLineWidthAA = 1.0;
507 if (devinfo->gen >= 6) {
508 ctx->Const.MaxLineWidth = 7.375;
509 ctx->Const.MaxLineWidthAA = 7.375;
510 ctx->Const.LineWidthGranularity = 0.125;
511 } else {
512 ctx->Const.MaxLineWidth = 7.0;
513 ctx->Const.MaxLineWidthAA = 7.0;
514 ctx->Const.LineWidthGranularity = 0.5;
515 }
516
517 /* For non-antialiased lines, we have to round the line width to the
518 * nearest whole number. Make sure that we don't advertise a line
519 * width that, when rounded, will be beyond the actual hardware
520 * maximum.
521 */
522 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
523
524 ctx->Const.MinPointSize = 1.0;
525 ctx->Const.MinPointSizeAA = 1.0;
526 ctx->Const.MaxPointSize = 255.0;
527 ctx->Const.MaxPointSizeAA = 255.0;
528 ctx->Const.PointSizeGranularity = 1.0;
529
530 if (devinfo->gen >= 5 || devinfo->is_g4x)
531 ctx->Const.MaxClipPlanes = 8;
532
533 ctx->Const.GLSLTessLevelsAsInputs = true;
534 ctx->Const.LowerTCSPatchVerticesIn = devinfo->gen >= 8;
535 ctx->Const.LowerTESPatchVerticesIn = true;
536 ctx->Const.PrimitiveRestartForPatches = true;
537
538 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
539 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
540 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
541 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
542 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
543 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
544 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
545 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
546 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
547 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
548 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
549 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
550 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
551 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
552
553 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
554 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
555 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
556 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
557 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
558 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
559 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
560 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
561 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
562 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
563 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
564
565 /* Fragment shaders use real, 32-bit twos-complement integers for all
566 * integer types.
567 */
568 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
569 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
570 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
571 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
572 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
573
574 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
575 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
576 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
577 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
578 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
579
580 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
581 * but we're not sure how it's actually done for vertex order,
582 * that affect provoking vertex decision. Always use last vertex
583 * convention for quad primitive which works as expected for now.
584 */
585 if (devinfo->gen >= 6)
586 ctx->Const.QuadsFollowProvokingVertexConvention = false;
587
588 ctx->Const.NativeIntegers = true;
589 ctx->Const.VertexID_is_zero_based = true;
590
591 /* Regarding the CMP instruction, the Ivybridge PRM says:
592 *
593 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
594 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
595 * 0xFFFFFFFF) is assigned to dst."
596 *
597 * but PRMs for earlier generations say
598 *
599 * "In dword format, one GRF may store up to 8 results. When the register
600 * is used later as a vector of Booleans, as only LSB at each channel
601 * contains meaning [sic] data, software should make sure all higher bits
602 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
603 *
604 * We select the representation of a true boolean uniform to be ~0, and fix
605 * the results of Gen <= 5 CMP instruction's with -(result & 1).
606 */
607 ctx->Const.UniformBooleanTrue = ~0;
608
609 /* From the gen4 PRM, volume 4 page 127:
610 *
611 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
612 * the base address of the first element of the surface, computed in
613 * software by adding the surface base address to the byte offset of
614 * the element in the buffer."
615 *
616 * However, unaligned accesses are slower, so enforce buffer alignment.
617 *
618 * In order to push UBO data, 3DSTATE_CONSTANT_XS imposes an additional
619 * restriction: the start of the buffer needs to be 32B aligned.
620 */
621 ctx->Const.UniformBufferOffsetAlignment = 32;
622
623 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
624 * that we can safely have the CPU and GPU writing the same SSBO on
625 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
626 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
627 * be updating disjoint regions of the buffer simultaneously and that will
628 * break if the regions overlap the same cacheline.
629 */
630 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
631 ctx->Const.TextureBufferOffsetAlignment = 16;
632 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
633
634 if (devinfo->gen >= 6) {
635 ctx->Const.MaxVarying = 32;
636 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
637 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents =
638 compiler->scalar_stage[MESA_SHADER_GEOMETRY] ? 128 : 64;
639 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
640 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
641 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
642 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
643 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
644 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
645 }
646
647 /* We want the GLSL compiler to emit code that uses condition codes */
648 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
649 ctx->Const.ShaderCompilerOptions[i] =
650 brw->screen->compiler->glsl_compiler_options[i];
651 }
652
653 if (devinfo->gen >= 7) {
654 ctx->Const.MaxViewportWidth = 32768;
655 ctx->Const.MaxViewportHeight = 32768;
656 }
657
658 /* ARB_viewport_array, OES_viewport_array */
659 if (devinfo->gen >= 6) {
660 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
661 ctx->Const.ViewportSubpixelBits = 0;
662
663 /* Cast to float before negating because MaxViewportWidth is unsigned.
664 */
665 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
666 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
667 }
668
669 /* ARB_gpu_shader5 */
670 if (devinfo->gen >= 7)
671 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
672
673 /* ARB_framebuffer_no_attachments */
674 ctx->Const.MaxFramebufferWidth = 16384;
675 ctx->Const.MaxFramebufferHeight = 16384;
676 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
677 ctx->Const.MaxFramebufferSamples = max_samples;
678
679 /* OES_primitive_bounding_box */
680 ctx->Const.NoPrimitiveBoundingBoxOutput = true;
681
682 /* TODO: We should be able to use STD430 packing by default on all hardware
683 * but some piglit tests [1] currently fail on SNB when this is enabled.
684 * The problem is the messages we're using for doing uniform pulls
685 * in the vec4 back-end on SNB is the OWORD block load instruction, which
686 * takes its offset in units of OWORDS (16 bytes). On IVB+, we use the
687 * sampler which doesn't have these restrictions.
688 *
689 * In the scalar back-end, we use the sampler for dynamic uniform loads and
690 * pull an entire cache line at a time for constant offset loads both of
691 * which support almost any alignment.
692 *
693 * [1] glsl-1.40/uniform_buffer/vs-float-array-variable-index.shader_test
694 */
695 if (devinfo->gen >= 7)
696 ctx->Const.UseSTD430AsDefaultPacking = true;
697 }
698
699 static void
700 brw_initialize_cs_context_constants(struct brw_context *brw)
701 {
702 struct gl_context *ctx = &brw->ctx;
703 const struct intel_screen *screen = brw->screen;
704 struct gen_device_info *devinfo = &brw->screen->devinfo;
705
706 /* FINISHME: Do this for all platforms that the kernel supports */
707 if (devinfo->is_cherryview &&
708 screen->subslice_total > 0 && screen->eu_total > 0) {
709 /* Logical CS threads = EUs per subslice * 7 threads per EU */
710 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
711
712 /* Fuse configurations may give more threads than expected, never less. */
713 if (max_cs_threads > devinfo->max_cs_threads)
714 devinfo->max_cs_threads = max_cs_threads;
715 }
716
717 /* Maximum number of scalar compute shader invocations that can be run in
718 * parallel in the same subslice assuming SIMD32 dispatch.
719 *
720 * We don't advertise more than 64 threads, because we are limited to 64 by
721 * our usage of thread_width_max in the gpgpu walker command. This only
722 * currently impacts Haswell, which otherwise might be able to advertise 70
723 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
724 * required the number of invocation needed for ARB_compute_shader.
725 */
726 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
727 const uint32_t max_invocations = 32 * max_threads;
728 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
729 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
730 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
731 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
732 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
733 }
734
735 /**
736 * Process driconf (drirc) options, setting appropriate context flags.
737 *
738 * intelInitExtensions still pokes at optionCache directly, in order to
739 * avoid advertising various extensions. No flags are set, so it makes
740 * sense to continue doing that there.
741 */
742 static void
743 brw_process_driconf_options(struct brw_context *brw)
744 {
745 const struct gen_device_info *devinfo = &brw->screen->devinfo;
746 struct gl_context *ctx = &brw->ctx;
747
748 driOptionCache *options = &brw->optionCache;
749 driParseConfigFiles(options, &brw->screen->optionCache,
750 brw->driContext->driScreenPriv->myNum, "i965");
751
752 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
753 switch (bo_reuse_mode) {
754 case DRI_CONF_BO_REUSE_DISABLED:
755 break;
756 case DRI_CONF_BO_REUSE_ALL:
757 brw_bufmgr_enable_reuse(brw->bufmgr);
758 break;
759 }
760
761 if (INTEL_DEBUG & DEBUG_NO_HIZ) {
762 brw->has_hiz = false;
763 /* On gen6, you can only do separate stencil with HIZ. */
764 if (devinfo->gen == 6)
765 brw->has_separate_stencil = false;
766 }
767
768 if (driQueryOptionb(options, "mesa_no_error"))
769 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_NO_ERROR_BIT_KHR;
770
771 if (driQueryOptionb(options, "always_flush_batch")) {
772 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
773 brw->always_flush_batch = true;
774 }
775
776 if (driQueryOptionb(options, "always_flush_cache")) {
777 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
778 brw->always_flush_cache = true;
779 }
780
781 if (driQueryOptionb(options, "disable_throttling")) {
782 fprintf(stderr, "disabling flush throttling\n");
783 brw->disable_throttling = true;
784 }
785
786 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
787
788 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
789 brw->screen->compiler->precise_trig = true;
790
791 ctx->Const.ForceGLSLExtensionsWarn =
792 driQueryOptionb(options, "force_glsl_extensions_warn");
793
794 ctx->Const.ForceGLSLVersion =
795 driQueryOptioni(options, "force_glsl_version");
796
797 ctx->Const.DisableGLSLLineContinuations =
798 driQueryOptionb(options, "disable_glsl_line_continuations");
799
800 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
801 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
802
803 ctx->Const.AllowGLSLBuiltinVariableRedeclaration =
804 driQueryOptionb(options, "allow_glsl_builtin_variable_redeclaration");
805
806 ctx->Const.AllowHigherCompatVersion =
807 driQueryOptionb(options, "allow_higher_compat_version");
808
809 ctx->Const.ForceGLSLAbsSqrt =
810 driQueryOptionb(options, "force_glsl_abs_sqrt");
811
812 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
813
814 brw->dual_color_blend_by_location =
815 driQueryOptionb(options, "dual_color_blend_by_location");
816 }
817
818 GLboolean
819 brwCreateContext(gl_api api,
820 const struct gl_config *mesaVis,
821 __DRIcontext *driContextPriv,
822 unsigned major_version,
823 unsigned minor_version,
824 uint32_t flags,
825 bool notify_reset,
826 unsigned *dri_ctx_error,
827 void *sharedContextPrivate)
828 {
829 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
830 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
831 const struct gen_device_info *devinfo = &screen->devinfo;
832 struct dd_function_table functions;
833
834 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
835 * provides us with context reset notifications.
836 */
837 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG |
838 __DRI_CTX_FLAG_FORWARD_COMPATIBLE |
839 __DRI_CTX_FLAG_NO_ERROR;
840
841 if (screen->has_context_reset_notification)
842 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
843
844 if (flags & ~allowed_flags) {
845 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
846 return false;
847 }
848
849 struct brw_context *brw = rzalloc(NULL, struct brw_context);
850 if (!brw) {
851 fprintf(stderr, "%s: failed to alloc context\n", __func__);
852 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
853 return false;
854 }
855
856 driContextPriv->driverPrivate = brw;
857 brw->driContext = driContextPriv;
858 brw->screen = screen;
859 brw->bufmgr = screen->bufmgr;
860
861 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
862 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
863
864 brw->has_swizzling = screen->hw_has_swizzling;
865
866 brw->isl_dev = screen->isl_dev;
867
868 brw->vs.base.stage = MESA_SHADER_VERTEX;
869 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
870 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
871 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
872 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
873 if (devinfo->gen >= 8) {
874 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
875 } else if (devinfo->gen >= 7) {
876 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
877 } else if (devinfo->gen >= 6) {
878 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
879 } else {
880 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
881 }
882
883 brw_init_driver_functions(brw, &functions);
884
885 if (notify_reset)
886 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
887
888 struct gl_context *ctx = &brw->ctx;
889
890 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
891 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
892 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
893 intelDestroyContext(driContextPriv);
894 return false;
895 }
896
897 driContextSetFlags(ctx, flags);
898
899 /* Initialize the software rasterizer and helper modules.
900 *
901 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
902 * software fallbacks (which we have to support on legacy GL to do weird
903 * glDrawPixels(), glBitmap(), and other functions).
904 */
905 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
906 _swrast_CreateContext(ctx);
907 }
908
909 _vbo_CreateContext(ctx);
910 if (ctx->swrast_context) {
911 _tnl_CreateContext(ctx);
912 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
913 _swsetup_CreateContext(ctx);
914
915 /* Configure swrast to match hardware characteristics: */
916 _swrast_allow_pixel_fog(ctx, false);
917 _swrast_allow_vertex_fog(ctx, true);
918 }
919
920 _mesa_meta_init(ctx);
921
922 brw_process_driconf_options(brw);
923
924 if (INTEL_DEBUG & DEBUG_PERF)
925 brw->perf_debug = true;
926
927 brw_initialize_cs_context_constants(brw);
928 brw_initialize_context_constants(brw);
929
930 ctx->Const.ResetStrategy = notify_reset
931 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
932
933 /* Reinitialize the context point state. It depends on ctx->Const values. */
934 _mesa_init_point(ctx);
935
936 intel_fbo_init(brw);
937
938 intel_batchbuffer_init(brw);
939
940 if (devinfo->gen >= 6) {
941 /* Create a new hardware context. Using a hardware context means that
942 * our GPU state will be saved/restored on context switch, allowing us
943 * to assume that the GPU is in the same state we left it in.
944 *
945 * This is required for transform feedback buffer offsets, query objects,
946 * and also allows us to reduce how much state we have to emit.
947 */
948 brw->hw_ctx = brw_create_hw_context(brw->bufmgr);
949
950 if (!brw->hw_ctx) {
951 fprintf(stderr, "Failed to create hardware context.\n");
952 intelDestroyContext(driContextPriv);
953 return false;
954 }
955 }
956
957 if (brw_init_pipe_control(brw, devinfo)) {
958 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
959 intelDestroyContext(driContextPriv);
960 return false;
961 }
962
963 brw_init_state(brw);
964
965 intelInitExtensions(ctx);
966
967 brw_init_surface_formats(brw);
968
969 brw_blorp_init(brw);
970
971 brw->urb.size = devinfo->urb.size;
972
973 if (devinfo->gen == 6)
974 brw->urb.gs_present = false;
975
976 brw->prim_restart.in_progress = false;
977 brw->prim_restart.enable_cut_index = false;
978 brw->gs.enabled = false;
979 brw->clip.viewport_count = 1;
980
981 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
982
983 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
984
985 ctx->VertexProgram._MaintainTnlProgram = true;
986 ctx->FragmentProgram._MaintainTexEnvProgram = true;
987
988 brw_draw_init( brw );
989
990 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
991 /* Turn on some extra GL_ARB_debug_output generation. */
992 brw->perf_debug = true;
993 }
994
995 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) {
996 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
997 ctx->Const.RobustAccess = GL_TRUE;
998 }
999
1000 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1001 brw_init_shader_time(brw);
1002
1003 _mesa_compute_version(ctx);
1004
1005 _mesa_initialize_dispatch_tables(ctx);
1006 _mesa_initialize_vbo_vtxfmt(ctx);
1007
1008 if (ctx->Extensions.INTEL_performance_query)
1009 brw_init_performance_queries(brw);
1010
1011 vbo_use_buffer_objects(ctx);
1012 vbo_always_unmap_buffers(ctx);
1013
1014 return true;
1015 }
1016
1017 void
1018 intelDestroyContext(__DRIcontext * driContextPriv)
1019 {
1020 struct brw_context *brw =
1021 (struct brw_context *) driContextPriv->driverPrivate;
1022 struct gl_context *ctx = &brw->ctx;
1023 const struct gen_device_info *devinfo = &brw->screen->devinfo;
1024
1025 _mesa_meta_free(&brw->ctx);
1026
1027 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1028 /* Force a report. */
1029 brw->shader_time.report_time = 0;
1030
1031 brw_collect_and_report_shader_time(brw);
1032 brw_destroy_shader_time(brw);
1033 }
1034
1035 if (devinfo->gen >= 6)
1036 blorp_finish(&brw->blorp);
1037
1038 brw_destroy_state(brw);
1039 brw_draw_destroy(brw);
1040
1041 brw_bo_unreference(brw->curbe.curbe_bo);
1042 if (brw->vs.base.scratch_bo)
1043 brw_bo_unreference(brw->vs.base.scratch_bo);
1044 if (brw->tcs.base.scratch_bo)
1045 brw_bo_unreference(brw->tcs.base.scratch_bo);
1046 if (brw->tes.base.scratch_bo)
1047 brw_bo_unreference(brw->tes.base.scratch_bo);
1048 if (brw->gs.base.scratch_bo)
1049 brw_bo_unreference(brw->gs.base.scratch_bo);
1050 if (brw->wm.base.scratch_bo)
1051 brw_bo_unreference(brw->wm.base.scratch_bo);
1052
1053 brw_destroy_hw_context(brw->bufmgr, brw->hw_ctx);
1054
1055 if (ctx->swrast_context) {
1056 _swsetup_DestroyContext(&brw->ctx);
1057 _tnl_DestroyContext(&brw->ctx);
1058 }
1059 _vbo_DestroyContext(&brw->ctx);
1060
1061 if (ctx->swrast_context)
1062 _swrast_DestroyContext(&brw->ctx);
1063
1064 brw_fini_pipe_control(brw);
1065 intel_batchbuffer_free(&brw->batch);
1066
1067 brw_bo_unreference(brw->throttle_batch[1]);
1068 brw_bo_unreference(brw->throttle_batch[0]);
1069 brw->throttle_batch[1] = NULL;
1070 brw->throttle_batch[0] = NULL;
1071
1072 driDestroyOptionCache(&brw->optionCache);
1073
1074 /* free the Mesa context */
1075 _mesa_free_context_data(&brw->ctx);
1076
1077 ralloc_free(brw);
1078 driContextPriv->driverPrivate = NULL;
1079 }
1080
1081 GLboolean
1082 intelUnbindContext(__DRIcontext * driContextPriv)
1083 {
1084 /* Unset current context and dispath table */
1085 _mesa_make_current(NULL, NULL, NULL);
1086
1087 return true;
1088 }
1089
1090 /**
1091 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1092 * on window system framebuffers.
1093 *
1094 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1095 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1096 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1097 * for a visual where you're guaranteed to be capable, but it turns out that
1098 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1099 * incapable ones, because there's no difference between the two in resources
1100 * used. Applications thus get built that accidentally rely on the default
1101 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1102 * great...
1103 *
1104 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1105 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1106 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1107 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1108 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1109 * and get no sRGB encode (assuming that both kinds of visual are available).
1110 * Thus our choice to support sRGB by default on our visuals for desktop would
1111 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1112 *
1113 * Unfortunately, renderbuffer setup happens before a context is created. So
1114 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1115 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1116 * yet), we go turn that back off before anyone finds out.
1117 */
1118 static void
1119 intel_gles3_srgb_workaround(struct brw_context *brw,
1120 struct gl_framebuffer *fb)
1121 {
1122 struct gl_context *ctx = &brw->ctx;
1123
1124 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1125 return;
1126
1127 /* Some day when we support the sRGB capable bit on visuals available for
1128 * GLES, we'll need to respect that and not disable things here.
1129 */
1130 fb->Visual.sRGBCapable = false;
1131 for (int i = 0; i < BUFFER_COUNT; i++) {
1132 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1133 if (rb)
1134 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1135 }
1136 }
1137
1138 GLboolean
1139 intelMakeCurrent(__DRIcontext * driContextPriv,
1140 __DRIdrawable * driDrawPriv,
1141 __DRIdrawable * driReadPriv)
1142 {
1143 struct brw_context *brw;
1144 GET_CURRENT_CONTEXT(curCtx);
1145
1146 if (driContextPriv)
1147 brw = (struct brw_context *) driContextPriv->driverPrivate;
1148 else
1149 brw = NULL;
1150
1151 /* According to the glXMakeCurrent() man page: "Pending commands to
1152 * the previous context, if any, are flushed before it is released."
1153 * But only flush if we're actually changing contexts.
1154 */
1155 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1156 _mesa_flush(curCtx);
1157 }
1158
1159 if (driContextPriv) {
1160 struct gl_context *ctx = &brw->ctx;
1161 struct gl_framebuffer *fb, *readFb;
1162
1163 if (driDrawPriv == NULL) {
1164 fb = _mesa_get_incomplete_framebuffer();
1165 } else {
1166 fb = driDrawPriv->driverPrivate;
1167 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1168 }
1169
1170 if (driReadPriv == NULL) {
1171 readFb = _mesa_get_incomplete_framebuffer();
1172 } else {
1173 readFb = driReadPriv->driverPrivate;
1174 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1175 }
1176
1177 /* The sRGB workaround changes the renderbuffer's format. We must change
1178 * the format before the renderbuffer's miptree get's allocated, otherwise
1179 * the formats of the renderbuffer and its miptree will differ.
1180 */
1181 intel_gles3_srgb_workaround(brw, fb);
1182 intel_gles3_srgb_workaround(brw, readFb);
1183
1184 /* If the context viewport hasn't been initialized, force a call out to
1185 * the loader to get buffers so we have a drawable size for the initial
1186 * viewport. */
1187 if (!brw->ctx.ViewportInitialized)
1188 intel_prepare_render(brw);
1189
1190 _mesa_make_current(ctx, fb, readFb);
1191 } else {
1192 _mesa_make_current(NULL, NULL, NULL);
1193 }
1194
1195 return true;
1196 }
1197
1198 void
1199 intel_resolve_for_dri2_flush(struct brw_context *brw,
1200 __DRIdrawable *drawable)
1201 {
1202 const struct gen_device_info *devinfo = &brw->screen->devinfo;
1203
1204 if (devinfo->gen < 6) {
1205 /* MSAA and fast color clear are not supported, so don't waste time
1206 * checking whether a resolve is needed.
1207 */
1208 return;
1209 }
1210
1211 struct gl_framebuffer *fb = drawable->driverPrivate;
1212 struct intel_renderbuffer *rb;
1213
1214 /* Usually, only the back buffer will need to be downsampled. However,
1215 * the front buffer will also need it if the user has rendered into it.
1216 */
1217 static const gl_buffer_index buffers[2] = {
1218 BUFFER_BACK_LEFT,
1219 BUFFER_FRONT_LEFT,
1220 };
1221
1222 for (int i = 0; i < 2; ++i) {
1223 rb = intel_get_renderbuffer(fb, buffers[i]);
1224 if (rb == NULL || rb->mt == NULL)
1225 continue;
1226 if (rb->mt->surf.samples == 1) {
1227 assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
1228 rb->layer_count == 1);
1229 intel_miptree_prepare_external(brw, rb->mt);
1230 } else {
1231 intel_renderbuffer_downsample(brw, rb);
1232 }
1233 }
1234 }
1235
1236 static unsigned
1237 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1238 {
1239 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1240 }
1241
1242 static void
1243 intel_query_dri2_buffers(struct brw_context *brw,
1244 __DRIdrawable *drawable,
1245 __DRIbuffer **buffers,
1246 int *count);
1247
1248 static void
1249 intel_process_dri2_buffer(struct brw_context *brw,
1250 __DRIdrawable *drawable,
1251 __DRIbuffer *buffer,
1252 struct intel_renderbuffer *rb,
1253 const char *buffer_name);
1254
1255 static void
1256 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1257
1258 static void
1259 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1260 {
1261 struct gl_framebuffer *fb = drawable->driverPrivate;
1262 struct intel_renderbuffer *rb;
1263 __DRIbuffer *buffers = NULL;
1264 int count;
1265 const char *region_name;
1266
1267 /* Set this up front, so that in case our buffers get invalidated
1268 * while we're getting new buffers, we don't clobber the stamp and
1269 * thus ignore the invalidate. */
1270 drawable->lastStamp = drawable->dri2.stamp;
1271
1272 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1273 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1274
1275 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1276
1277 if (buffers == NULL)
1278 return;
1279
1280 for (int i = 0; i < count; i++) {
1281 switch (buffers[i].attachment) {
1282 case __DRI_BUFFER_FRONT_LEFT:
1283 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1284 region_name = "dri2 front buffer";
1285 break;
1286
1287 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1288 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1289 region_name = "dri2 fake front buffer";
1290 break;
1291
1292 case __DRI_BUFFER_BACK_LEFT:
1293 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1294 region_name = "dri2 back buffer";
1295 break;
1296
1297 case __DRI_BUFFER_DEPTH:
1298 case __DRI_BUFFER_HIZ:
1299 case __DRI_BUFFER_DEPTH_STENCIL:
1300 case __DRI_BUFFER_STENCIL:
1301 case __DRI_BUFFER_ACCUM:
1302 default:
1303 fprintf(stderr,
1304 "unhandled buffer attach event, attachment type %d\n",
1305 buffers[i].attachment);
1306 return;
1307 }
1308
1309 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1310 }
1311
1312 }
1313
1314 void
1315 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1316 {
1317 struct brw_context *brw = context->driverPrivate;
1318 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1319
1320 /* Set this up front, so that in case our buffers get invalidated
1321 * while we're getting new buffers, we don't clobber the stamp and
1322 * thus ignore the invalidate. */
1323 drawable->lastStamp = drawable->dri2.stamp;
1324
1325 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1326 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1327
1328 if (dri_screen->image.loader)
1329 intel_update_image_buffers(brw, drawable);
1330 else
1331 intel_update_dri2_buffers(brw, drawable);
1332
1333 driUpdateFramebufferSize(&brw->ctx, drawable);
1334 }
1335
1336 /**
1337 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1338 * state is required.
1339 */
1340 void
1341 intel_prepare_render(struct brw_context *brw)
1342 {
1343 struct gl_context *ctx = &brw->ctx;
1344 __DRIcontext *driContext = brw->driContext;
1345 __DRIdrawable *drawable;
1346
1347 drawable = driContext->driDrawablePriv;
1348 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1349 if (drawable->lastStamp != drawable->dri2.stamp)
1350 intel_update_renderbuffers(driContext, drawable);
1351 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1352 }
1353
1354 drawable = driContext->driReadablePriv;
1355 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1356 if (drawable->lastStamp != drawable->dri2.stamp)
1357 intel_update_renderbuffers(driContext, drawable);
1358 driContext->dri2.read_stamp = drawable->dri2.stamp;
1359 }
1360
1361 /* If we're currently rendering to the front buffer, the rendering
1362 * that will happen next will probably dirty the front buffer. So
1363 * mark it as dirty here.
1364 */
1365 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1366 brw->front_buffer_dirty = true;
1367 }
1368
1369 /**
1370 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1371 *
1372 * To determine which DRI buffers to request, examine the renderbuffers
1373 * attached to the drawable's framebuffer. Then request the buffers with
1374 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1375 *
1376 * This is called from intel_update_renderbuffers().
1377 *
1378 * \param drawable Drawable whose buffers are queried.
1379 * \param buffers [out] List of buffers returned by DRI2 query.
1380 * \param buffer_count [out] Number of buffers returned.
1381 *
1382 * \see intel_update_renderbuffers()
1383 * \see DRI2GetBuffers()
1384 * \see DRI2GetBuffersWithFormat()
1385 */
1386 static void
1387 intel_query_dri2_buffers(struct brw_context *brw,
1388 __DRIdrawable *drawable,
1389 __DRIbuffer **buffers,
1390 int *buffer_count)
1391 {
1392 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1393 struct gl_framebuffer *fb = drawable->driverPrivate;
1394 int i = 0;
1395 unsigned attachments[8];
1396
1397 struct intel_renderbuffer *front_rb;
1398 struct intel_renderbuffer *back_rb;
1399
1400 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1401 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1402
1403 memset(attachments, 0, sizeof(attachments));
1404 if ((_mesa_is_front_buffer_drawing(fb) ||
1405 _mesa_is_front_buffer_reading(fb) ||
1406 !back_rb) && front_rb) {
1407 /* If a fake front buffer is in use, then querying for
1408 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1409 * the real front buffer to the fake front buffer. So before doing the
1410 * query, we need to make sure all the pending drawing has landed in the
1411 * real front buffer.
1412 */
1413 intel_batchbuffer_flush(brw);
1414 intel_flush_front(&brw->ctx);
1415
1416 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1417 attachments[i++] = intel_bits_per_pixel(front_rb);
1418 } else if (front_rb && brw->front_buffer_dirty) {
1419 /* We have pending front buffer rendering, but we aren't querying for a
1420 * front buffer. If the front buffer we have is a fake front buffer,
1421 * the X server is going to throw it away when it processes the query.
1422 * So before doing the query, make sure all the pending drawing has
1423 * landed in the real front buffer.
1424 */
1425 intel_batchbuffer_flush(brw);
1426 intel_flush_front(&brw->ctx);
1427 }
1428
1429 if (back_rb) {
1430 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1431 attachments[i++] = intel_bits_per_pixel(back_rb);
1432 }
1433
1434 assert(i <= ARRAY_SIZE(attachments));
1435
1436 *buffers =
1437 dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1438 &drawable->w,
1439 &drawable->h,
1440 attachments, i / 2,
1441 buffer_count,
1442 drawable->loaderPrivate);
1443 }
1444
1445 /**
1446 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1447 *
1448 * This is called from intel_update_renderbuffers().
1449 *
1450 * \par Note:
1451 * DRI buffers whose attachment point is DRI2BufferStencil or
1452 * DRI2BufferDepthStencil are handled as special cases.
1453 *
1454 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1455 * that is passed to brw_bo_gem_create_from_name().
1456 *
1457 * \see intel_update_renderbuffers()
1458 */
1459 static void
1460 intel_process_dri2_buffer(struct brw_context *brw,
1461 __DRIdrawable *drawable,
1462 __DRIbuffer *buffer,
1463 struct intel_renderbuffer *rb,
1464 const char *buffer_name)
1465 {
1466 struct gl_framebuffer *fb = drawable->driverPrivate;
1467 struct brw_bo *bo;
1468
1469 if (!rb)
1470 return;
1471
1472 unsigned num_samples = rb->Base.Base.NumSamples;
1473
1474 /* We try to avoid closing and reopening the same BO name, because the first
1475 * use of a mapping of the buffer involves a bunch of page faulting which is
1476 * moderately expensive.
1477 */
1478 struct intel_mipmap_tree *last_mt;
1479 if (num_samples == 0)
1480 last_mt = rb->mt;
1481 else
1482 last_mt = rb->singlesample_mt;
1483
1484 uint32_t old_name = 0;
1485 if (last_mt) {
1486 /* The bo already has a name because the miptree was created by a
1487 * previous call to intel_process_dri2_buffer(). If a bo already has a
1488 * name, then brw_bo_flink() is a low-cost getter. It does not
1489 * create a new name.
1490 */
1491 brw_bo_flink(last_mt->bo, &old_name);
1492 }
1493
1494 if (old_name == buffer->name)
1495 return;
1496
1497 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1498 fprintf(stderr,
1499 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1500 buffer->name, buffer->attachment,
1501 buffer->cpp, buffer->pitch);
1502 }
1503
1504 bo = brw_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1505 buffer->name);
1506 if (!bo) {
1507 fprintf(stderr,
1508 "Failed to open BO for returned DRI2 buffer "
1509 "(%dx%d, %s, named %d).\n"
1510 "This is likely a bug in the X Server that will lead to a "
1511 "crash soon.\n",
1512 drawable->w, drawable->h, buffer_name, buffer->name);
1513 return;
1514 }
1515
1516 struct intel_mipmap_tree *mt =
1517 intel_miptree_create_for_bo(brw,
1518 bo,
1519 intel_rb_format(rb),
1520 0,
1521 drawable->w,
1522 drawable->h,
1523 1,
1524 buffer->pitch,
1525 MIPTREE_CREATE_DEFAULT);
1526 if (!mt) {
1527 brw_bo_unreference(bo);
1528 return;
1529 }
1530
1531 /* We got this BO from X11. We cana't assume that we have coherent texture
1532 * access because X may suddenly decide to use it for scan-out which would
1533 * destroy coherency.
1534 */
1535 bo->cache_coherent = false;
1536
1537 if (!intel_update_winsys_renderbuffer_miptree(brw, rb, mt,
1538 drawable->w, drawable->h,
1539 buffer->pitch)) {
1540 brw_bo_unreference(bo);
1541 intel_miptree_release(&mt);
1542 return;
1543 }
1544
1545 if (_mesa_is_front_buffer_drawing(fb) &&
1546 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1547 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1548 rb->Base.Base.NumSamples > 1) {
1549 intel_renderbuffer_upsample(brw, rb);
1550 }
1551
1552 assert(rb->mt);
1553
1554 brw_bo_unreference(bo);
1555 }
1556
1557 /**
1558 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1559 *
1560 * To determine which DRI buffers to request, examine the renderbuffers
1561 * attached to the drawable's framebuffer. Then request the buffers from
1562 * the image loader
1563 *
1564 * This is called from intel_update_renderbuffers().
1565 *
1566 * \param drawable Drawable whose buffers are queried.
1567 * \param buffers [out] List of buffers returned by DRI2 query.
1568 * \param buffer_count [out] Number of buffers returned.
1569 *
1570 * \see intel_update_renderbuffers()
1571 */
1572
1573 static void
1574 intel_update_image_buffer(struct brw_context *intel,
1575 __DRIdrawable *drawable,
1576 struct intel_renderbuffer *rb,
1577 __DRIimage *buffer,
1578 enum __DRIimageBufferMask buffer_type)
1579 {
1580 struct gl_framebuffer *fb = drawable->driverPrivate;
1581
1582 if (!rb || !buffer->bo)
1583 return;
1584
1585 unsigned num_samples = rb->Base.Base.NumSamples;
1586
1587 /* Check and see if we're already bound to the right
1588 * buffer object
1589 */
1590 struct intel_mipmap_tree *last_mt;
1591 if (num_samples == 0)
1592 last_mt = rb->mt;
1593 else
1594 last_mt = rb->singlesample_mt;
1595
1596 if (last_mt && last_mt->bo == buffer->bo)
1597 return;
1598
1599 struct intel_mipmap_tree *mt =
1600 intel_miptree_create_for_dri_image(intel, buffer, GL_TEXTURE_2D,
1601 intel_rb_format(rb), true);
1602 if (!mt)
1603 return;
1604
1605 if (!intel_update_winsys_renderbuffer_miptree(intel, rb, mt,
1606 buffer->width, buffer->height,
1607 buffer->pitch)) {
1608 intel_miptree_release(&mt);
1609 return;
1610 }
1611
1612 if (_mesa_is_front_buffer_drawing(fb) &&
1613 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1614 rb->Base.Base.NumSamples > 1) {
1615 intel_renderbuffer_upsample(intel, rb);
1616 }
1617 }
1618
1619 static void
1620 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1621 {
1622 struct gl_framebuffer *fb = drawable->driverPrivate;
1623 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1624 struct intel_renderbuffer *front_rb;
1625 struct intel_renderbuffer *back_rb;
1626 struct __DRIimageList images;
1627 mesa_format format;
1628 uint32_t buffer_mask = 0;
1629 int ret;
1630
1631 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1632 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1633
1634 if (back_rb)
1635 format = intel_rb_format(back_rb);
1636 else if (front_rb)
1637 format = intel_rb_format(front_rb);
1638 else
1639 return;
1640
1641 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1642 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1643 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1644 }
1645
1646 if (back_rb)
1647 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1648
1649 ret = dri_screen->image.loader->getBuffers(drawable,
1650 driGLFormatToImageFormat(format),
1651 &drawable->dri2.stamp,
1652 drawable->loaderPrivate,
1653 buffer_mask,
1654 &images);
1655 if (!ret)
1656 return;
1657
1658 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1659 drawable->w = images.front->width;
1660 drawable->h = images.front->height;
1661 intel_update_image_buffer(brw,
1662 drawable,
1663 front_rb,
1664 images.front,
1665 __DRI_IMAGE_BUFFER_FRONT);
1666 }
1667
1668 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1669 drawable->w = images.back->width;
1670 drawable->h = images.back->height;
1671 intel_update_image_buffer(brw,
1672 drawable,
1673 back_rb,
1674 images.back,
1675 __DRI_IMAGE_BUFFER_BACK);
1676 }
1677 }