i965: Set context flags
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "main/imports.h"
34 #include "main/macros.h"
35 #include "main/simple_list.h"
36
37 #include "vbo/vbo_context.h"
38
39 #include "brw_context.h"
40 #include "brw_defines.h"
41 #include "brw_draw.h"
42 #include "brw_state.h"
43
44 #include "intel_fbo.h"
45 #include "intel_mipmap_tree.h"
46 #include "intel_regions.h"
47 #include "intel_span.h"
48 #include "intel_tex.h"
49 #include "intel_tex_obj.h"
50
51 #include "tnl/t_pipeline.h"
52 #include "glsl/ralloc.h"
53
54 /***************************************
55 * Mesa's Driver Functions
56 ***************************************/
57
58 static void brwInitDriverFunctions(struct intel_screen *screen,
59 struct dd_function_table *functions)
60 {
61 intelInitDriverFunctions( functions );
62
63 brwInitFragProgFuncs( functions );
64 brw_init_queryobj_functions(functions);
65
66 functions->BeginTransformFeedback = brw_begin_transform_feedback;
67
68 if (screen->gen >= 7)
69 functions->EndTransformFeedback = gen7_end_transform_feedback;
70 else
71 functions->EndTransformFeedback = brw_end_transform_feedback;
72 }
73
74 bool
75 brwCreateContext(int api,
76 const struct gl_config *mesaVis,
77 __DRIcontext *driContextPriv,
78 unsigned major_version,
79 unsigned minor_version,
80 uint32_t flags,
81 unsigned *error,
82 void *sharedContextPrivate)
83 {
84 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
85 struct intel_screen *screen = sPriv->driverPrivate;
86 struct dd_function_table functions;
87 unsigned i;
88
89 /* Filter against the requested API and version.
90 */
91 switch (api) {
92 case API_OPENGL: {
93 #ifdef TEXTURE_FLOAT_ENABLED
94 const unsigned max_version =
95 (screen->gen == 6 ||
96 (screen->gen == 7 && screen->kernel_has_gen7_sol_reset))
97 ? 30 : 21;
98 #else
99 const unsigned max_version = 21;
100 #endif
101 const unsigned req_version = major_version * 10 + minor_version;
102
103 if (req_version > max_version) {
104 *error = __DRI_CTX_ERROR_BAD_VERSION;
105 return false;
106 }
107 break;
108 }
109 case API_OPENGLES:
110 case API_OPENGLES2:
111 break;
112 default:
113 *error = __DRI_CTX_ERROR_BAD_API;
114 return false;
115 }
116
117 struct brw_context *brw = rzalloc(NULL, struct brw_context);
118 if (!brw) {
119 printf("%s: failed to alloc context\n", __FUNCTION__);
120 *error = __DRI_CTX_ERROR_NO_MEMORY;
121 return false;
122 }
123
124 brwInitDriverFunctions(screen, &functions);
125
126 struct intel_context *intel = &brw->intel;
127 struct gl_context *ctx = &intel->ctx;
128
129 if (!intelInitContext( intel, api, mesaVis, driContextPriv,
130 sharedContextPrivate, &functions )) {
131 printf("%s: failed to init intel context\n", __FUNCTION__);
132 FREE(brw);
133 *error = __DRI_CTX_ERROR_NO_MEMORY;
134 return false;
135 }
136
137 brwInitVtbl( brw );
138
139 brw_init_surface_formats(brw);
140
141 /* Initialize swrast, tnl driver tables: */
142 intelInitSpanFuncs(ctx);
143
144 TNLcontext *tnl = TNL_CONTEXT(ctx);
145 if (tnl)
146 tnl->Driver.RunPipeline = _tnl_run_pipeline;
147
148 ctx->Const.MaxDualSourceDrawBuffers = 1;
149 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
150 ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
151 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
152 ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
153 ctx->Const.MaxTextureImageUnits);
154 ctx->Const.MaxVertexTextureImageUnits = BRW_MAX_TEX_UNIT;
155 ctx->Const.MaxCombinedTextureImageUnits =
156 ctx->Const.MaxVertexTextureImageUnits +
157 ctx->Const.MaxTextureImageUnits;
158
159 ctx->Const.MaxTextureLevels = 14; /* 8192 */
160 if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
161 ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
162 ctx->Const.Max3DTextureLevels = 9;
163 ctx->Const.MaxCubeTextureLevels = 12;
164
165 if (intel->gen >= 7)
166 ctx->Const.MaxArrayTextureLayers = 2048;
167 else
168 ctx->Const.MaxArrayTextureLayers = 512;
169
170 ctx->Const.MaxTextureRectSize = (1<<12);
171
172 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
173
174 /* Hardware only supports a limited number of transform feedback buffers.
175 * So we need to override the Mesa default (which is based only on software
176 * limits).
177 */
178 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
179
180 /* On Gen6, in the worst case, we use up one binding table entry per
181 * transform feedback component (see comments above the definition of
182 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
183 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
184 * BRW_MAX_SOL_BINDINGS.
185 *
186 * In "separate components" mode, we need to divide this value by
187 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
188 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
189 */
190 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
191 ctx->Const.MaxTransformFeedbackSeparateComponents =
192 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
193
194 if (intel->gen == 6)
195 ctx->Const.MaxSamples = 4;
196 else if (intel->gen >= 7)
197 ctx->Const.MaxSamples = 8;
198
199 /* if conformance mode is set, swrast can handle any size AA point */
200 ctx->Const.MaxPointSizeAA = 255.0;
201
202 /* We want the GLSL compiler to emit code that uses condition codes */
203 for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
204 ctx->ShaderCompilerOptions[i].MaxIfDepth = intel->gen < 6 ? 16 : UINT_MAX;
205 ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
206 ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = true;
207 ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
208 ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
209 ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
210 ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
211
212 ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
213 (i == MESA_SHADER_FRAGMENT);
214 ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
215 (i == MESA_SHADER_FRAGMENT);
216 ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
217 }
218
219 ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
220 ctx->Const.VertexProgram.MaxAluInstructions = 0;
221 ctx->Const.VertexProgram.MaxTexInstructions = 0;
222 ctx->Const.VertexProgram.MaxTexIndirections = 0;
223 ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
224 ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
225 ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
226 ctx->Const.VertexProgram.MaxNativeAttribs = 16;
227 ctx->Const.VertexProgram.MaxNativeTemps = 256;
228 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
229 ctx->Const.VertexProgram.MaxNativeParameters = 1024;
230 ctx->Const.VertexProgram.MaxEnvParams =
231 MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
232 ctx->Const.VertexProgram.MaxEnvParams);
233
234 ctx->Const.FragmentProgram.MaxNativeInstructions = (16 * 1024);
235 ctx->Const.FragmentProgram.MaxNativeAluInstructions = (16 * 1024);
236 ctx->Const.FragmentProgram.MaxNativeTexInstructions = (16 * 1024);
237 ctx->Const.FragmentProgram.MaxNativeTexIndirections = (16 * 1024);
238 ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
239 ctx->Const.FragmentProgram.MaxNativeTemps = 256;
240 ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
241 ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
242 ctx->Const.FragmentProgram.MaxEnvParams =
243 MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
244 ctx->Const.FragmentProgram.MaxEnvParams);
245
246 /* Fragment shaders use real, 32-bit twos-complement integers for all
247 * integer types.
248 */
249 ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
250 ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
251 ctx->Const.FragmentProgram.LowInt.Precision = 0;
252 ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
253 = ctx->Const.FragmentProgram.LowInt;
254
255 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
256 but we're not sure how it's actually done for vertex order,
257 that affect provoking vertex decision. Always use last vertex
258 convention for quad primitive which works as expected for now. */
259 if (intel->gen >= 6)
260 ctx->Const.QuadsFollowProvokingVertexConvention = false;
261
262 ctx->Const.QueryCounterBits.Timestamp = 36;
263
264 if (intel->is_g4x || intel->gen >= 5) {
265 brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
266 brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
267 brw->has_surface_tile_offset = true;
268 if (intel->gen < 6)
269 brw->has_compr4 = true;
270 brw->has_aa_line_parameters = true;
271 brw->has_pln = true;
272 } else {
273 brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
274 brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
275 }
276
277 /* WM maximum threads is number of EUs times number of threads per EU. */
278 if (intel->gen >= 7) {
279 if (intel->gt == 1) {
280 brw->max_wm_threads = 48;
281 brw->max_vs_threads = 36;
282 brw->max_gs_threads = 36;
283 brw->urb.size = 128;
284 brw->urb.max_vs_entries = 512;
285 brw->urb.max_gs_entries = 192;
286 } else if (intel->gt == 2) {
287 brw->max_wm_threads = 172;
288 brw->max_vs_threads = 128;
289 brw->max_gs_threads = 128;
290 brw->urb.size = 256;
291 brw->urb.max_vs_entries = 704;
292 brw->urb.max_gs_entries = 320;
293 } else {
294 assert(!"Unknown gen7 device.");
295 }
296 } else if (intel->gen == 6) {
297 if (intel->gt == 2) {
298 brw->max_wm_threads = 80;
299 brw->max_vs_threads = 60;
300 brw->max_gs_threads = 60;
301 brw->urb.size = 64; /* volume 5c.5 section 5.1 */
302 brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
303 brw->urb.max_gs_entries = 256;
304 } else {
305 brw->max_wm_threads = 40;
306 brw->max_vs_threads = 24;
307 brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
308 brw->urb.size = 32; /* volume 5c.5 section 5.1 */
309 brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
310 brw->urb.max_gs_entries = 256;
311 }
312 brw->urb.gen6_gs_previously_active = false;
313 } else if (intel->gen == 5) {
314 brw->urb.size = 1024;
315 brw->max_vs_threads = 72;
316 brw->max_gs_threads = 32;
317 brw->max_wm_threads = 12 * 6;
318 } else if (intel->is_g4x) {
319 brw->urb.size = 384;
320 brw->max_vs_threads = 32;
321 brw->max_gs_threads = 2;
322 brw->max_wm_threads = 10 * 5;
323 } else if (intel->gen < 6) {
324 brw->urb.size = 256;
325 brw->max_vs_threads = 16;
326 brw->max_gs_threads = 2;
327 brw->max_wm_threads = 8 * 4;
328 brw->has_negative_rhw_bug = true;
329 }
330
331 if (intel->gen <= 7) {
332 brw->needs_unlit_centroid_workaround = true;
333 }
334
335 brw->prim_restart.in_progress = false;
336 brw->prim_restart.enable_cut_index = false;
337 intel->hw_ctx = drm_intel_gem_context_create(intel->bufmgr);
338
339 brw_init_state( brw );
340
341 brw->curbe.last_buf = calloc(1, 4096);
342 brw->curbe.next_buf = calloc(1, 4096);
343
344 brw->state.dirty.mesa = ~0;
345 brw->state.dirty.brw = ~0;
346
347 brw->emit_state_always = 0;
348
349 intel->batch.need_workaround_flush = true;
350
351 ctx->VertexProgram._MaintainTnlProgram = true;
352 ctx->FragmentProgram._MaintainTexEnvProgram = true;
353
354 brw_draw_init( brw );
355
356 brw->precompile = driQueryOptionb(&intel->optionCache, "shader_precompile");
357
358 ctx->Const.NativeIntegers = true;
359 ctx->Const.UniformBooleanTrue = 1;
360
361 ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(&intel->optionCache, "force_glsl_extensions_warn");
362
363 ctx->Const.ContextFlags = 0;
364 if ((flags & __DRI_CTX_FLAG_FORWARD_COMPATIBLE) != 0)
365 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_FORWARD_COMPATIBLE_BIT;
366
367 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0)
368 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_DEBUG_BIT;
369
370 return true;
371 }
372