src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/imports.h"
  34 #include "main/macros.h"
  35 #include "main/simple_list.h"
  36 #include "brw_context.h"
  37 #include "brw_defines.h"
  38 #include "brw_draw.h"
  39 #include "brw_state.h"
  40 #include "intel_span.h"
  41 #include "tnl/t_pipeline.h"
  42 #include "glsl/ralloc.h"
  43
  44 /***************************************
  45  * Mesa's Driver Functions
  46  ***************************************/
  47
  48 static void brwInitDriverFunctions( struct dd_function_table *functions )
  49 {
  50    intelInitDriverFunctions( functions );
  51
  52    brwInitFragProgFuncs( functions );
  53    brw_init_queryobj_functions(functions);
  54 }
  55
  56 bool
  57 brwCreateContext(int api,
  58                  const struct gl_config *mesaVis,
  59                  __DRIcontext *driContextPriv,
  60                  void *sharedContextPrivate)
  61 {
  62    struct dd_function_table functions;
  63    struct brw_context *brw = rzalloc(NULL, struct brw_context);
  64    struct intel_context *intel = &brw->intel;
  65    struct gl_context *ctx = &intel->ctx;
  66    unsigned i;
  67
  68    if (!brw) {
  69       printf("%s: failed to alloc context\n", __FUNCTION__);
  70       return false;
  71    }
  72
  73    brwInitDriverFunctions( &functions );
  74
  75    if (!intelInitContext( intel, api, mesaVis, driContextPriv,
  76                           sharedContextPrivate, &functions )) {
  77       printf("%s: failed to init intel context\n", __FUNCTION__);
  78       FREE(brw);
  79       return false;
  80    }
  81
  82    brwInitVtbl( brw );
  83
  84    /* Initialize swrast, tnl driver tables: */
  85    intelInitSpanFuncs(ctx);
  86
  87    TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
  88
  89    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
  90    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
  91    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
  92    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
  93                                      ctx->Const.MaxTextureImageUnits);
  94    ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */
  95    ctx->Const.MaxCombinedTextureImageUnits =
  96       ctx->Const.MaxVertexTextureImageUnits +
  97       ctx->Const.MaxTextureImageUnits;
  98
  99    ctx->Const.MaxTextureLevels = 14; /* 8192 */
 100    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 101            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 102    ctx->Const.Max3DTextureLevels = 9;
 103    ctx->Const.MaxCubeTextureLevels = 12;
 104    /* minimum maximum.  Users are likely to run into memory problems
 105     * even at this size, since 64 * 2048 * 2048 * 4 = 1GB and we can't
 106     * address that much.
 107     */
 108    ctx->Const.MaxArrayTextureLayers = 64;
 109    ctx->Const.MaxTextureRectSize = (1<<12);
 110
 111    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 112
 113    /* if conformance mode is set, swrast can handle any size AA point */
 114    ctx->Const.MaxPointSizeAA = 255.0;
 115
 116    /* We want the GLSL compiler to emit code that uses condition codes */
 117    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 118       ctx->ShaderCompilerOptions[i].MaxIfDepth = intel->gen < 6 ? 16 : UINT_MAX;
 119       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
 120       ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = true;
 121       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
 122       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
 123       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
 124       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
 125
 126       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 127          (i == MESA_SHADER_FRAGMENT);
 128       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 129          (i == MESA_SHADER_FRAGMENT);
 130       ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
 131    }
 132
 133    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 134    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 135    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 136    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 137    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 138    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 139    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 140    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 141    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 142    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 143    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 144    ctx->Const.VertexProgram.MaxEnvParams =
 145       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 146            ctx->Const.VertexProgram.MaxEnvParams);
 147
 148    ctx->Const.FragmentProgram.MaxNativeInstructions = (16 * 1024);
 149    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (16 * 1024);
 150    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (16 * 1024);
 151    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (16 * 1024);
 152    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 153    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 154    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 155    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 156    ctx->Const.FragmentProgram.MaxEnvParams =
 157       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 158            ctx->Const.FragmentProgram.MaxEnvParams);
 159
 160    /* Fragment shaders use real, 32-bit twos-complement integers for all
 161     * integer types.
 162     */
 163    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 164    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 165    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 166    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 167       = ctx->Const.FragmentProgram.LowInt;
 168
 169    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 170       but we're not sure how it's actually done for vertex order,
 171       that affect provoking vertex decision. Always use last vertex
 172       convention for quad primitive which works as expected for now. */
 173    if (intel->gen >= 6)
 174        ctx->Const.QuadsFollowProvokingVertexConvention = false;
 175
 176    if (intel->is_g4x || intel->gen >= 5) {
 177       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 178       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 179       brw->has_surface_tile_offset = true;
 180       if (intel->gen < 6)
 181           brw->has_compr4 = true;
 182       brw->has_aa_line_parameters = true;
 183       brw->has_pln = true;
 184   } else {
 185       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 186       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 187    }
 188
 189    /* WM maximum threads is number of EUs times number of threads per EU. */
 190    if (intel->gen >= 7) {
 191       if (intel->gt == 1) {
 192          brw->max_wm_threads = 86;
 193          brw->max_vs_threads = 36;
 194          brw->max_gs_threads = 36;
 195          brw->urb.size = 128;
 196          brw->urb.max_vs_entries = 512;
 197          brw->urb.max_gs_entries = 192;
 198       } else if (intel->gt == 2) {
 199          brw->max_wm_threads = 86;
 200          brw->max_vs_threads = 128;
 201          brw->max_gs_threads = 128;
 202          brw->urb.size = 256;
 203          brw->urb.max_vs_entries = 704;
 204          brw->urb.max_gs_entries = 320;
 205       } else {
 206          assert(!"Unknown gen7 device.");
 207       }
 208    } else if (intel->gen == 6) {
 209       if (intel->gt == 2) {
 210          /* This could possibly be 80, but is supposed to require
 211           * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
 212           * GPU reset to change.
 213           */
 214          brw->max_wm_threads = 40;
 215          brw->max_vs_threads = 60;
 216          brw->max_gs_threads = 60;
 217          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 218          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 219       } else {
 220          brw->max_wm_threads = 40;
 221          brw->max_vs_threads = 24;
 222          brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
 223          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 224          brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
 225       }
 226    } else if (intel->gen == 5) {
 227       brw->urb.size = 1024;
 228       brw->max_vs_threads = 72;
 229       brw->max_gs_threads = 32;
 230       brw->max_wm_threads = 12 * 6;
 231    } else if (intel->is_g4x) {
 232       brw->urb.size = 384;
 233       brw->max_vs_threads = 32;
 234       brw->max_gs_threads = 2;
 235       brw->max_wm_threads = 10 * 5;
 236    } else if (intel->gen < 6) {
 237       brw->urb.size = 256;
 238       brw->max_vs_threads = 16;
 239       brw->max_gs_threads = 2;
 240       brw->max_wm_threads = 8 * 4;
 241       brw->has_negative_rhw_bug = true;
 242    }
 243
 244    brw_init_state( brw );
 245
 246    brw->curbe.last_buf = calloc(1, 4096);
 247    brw->curbe.next_buf = calloc(1, 4096);
 248
 249    brw->state.dirty.mesa = ~0;
 250    brw->state.dirty.brw = ~0;
 251
 252    brw->emit_state_always = 0;
 253
 254    intel->batch.need_workaround_flush = true;
 255
 256    ctx->VertexProgram._MaintainTnlProgram = true;
 257    ctx->FragmentProgram._MaintainTexEnvProgram = true;
 258
 259    brw_draw_init( brw );
 260
 261    brw->new_vs_backend = (getenv("INTEL_OLD_VS") == NULL);
 262
 263    /* If we're using the new shader backend, we require integer uniforms
 264     * stored as actual integers.
 265     */
 266    if (brw->new_vs_backend) {
 267       ctx->Const.NativeIntegers = true;
 268       ctx->Const.UniformBooleanTrue = 1;
 269    }
 270
 271    return true;
 272 }
 273