2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **********************************************************************/
30 * Keith Whitwell <keithw@vmware.com>
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46 #include "main/stencil.h"
47 #include "main/state.h"
49 #include "vbo/vbo_context.h"
51 #include "drivers/common/driverfuncs.h"
52 #include "drivers/common/meta.h"
55 #include "brw_context.h"
56 #include "brw_defines.h"
57 #include "brw_blorp.h"
59 #include "brw_state.h"
61 #include "intel_batchbuffer.h"
62 #include "intel_buffer_objects.h"
63 #include "intel_buffers.h"
64 #include "intel_fbo.h"
65 #include "intel_mipmap_tree.h"
66 #include "intel_pixel.h"
67 #include "intel_image.h"
68 #include "intel_tex.h"
69 #include "intel_tex_obj.h"
71 #include "swrast_setup/swrast_setup.h"
73 #include "tnl/t_pipeline.h"
74 #include "util/ralloc.h"
75 #include "util/debug.h"
78 /***************************************
79 * Mesa's Driver Functions
80 ***************************************/
82 const char *const brw_vendor_string
= "Intel Open Source Technology Center";
85 get_bsw_model(const struct intel_screen
*screen
)
87 switch (screen
->eu_total
) {
98 brw_get_renderer_string(const struct intel_screen
*screen
)
101 static char buffer
[128];
104 switch (screen
->deviceID
) {
106 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
107 #include "pci_ids/i965_pci_ids.h"
109 chipset
= "Unknown Intel Chipset";
113 /* Braswell branding is funny, so we have to fix it up here */
114 if (screen
->deviceID
== 0x22B1) {
115 bsw
= strdup(chipset
);
116 char *needle
= strstr(bsw
, "XXX");
118 memcpy(needle
, get_bsw_model(screen
), 3);
123 (void) driGetRendererString(buffer
, chipset
, 0);
128 static const GLubyte
*
129 intel_get_string(struct gl_context
* ctx
, GLenum name
)
131 const struct brw_context
*const brw
= brw_context(ctx
);
135 return (GLubyte
*) brw_vendor_string
;
139 (GLubyte
*) brw_get_renderer_string(brw
->screen
);
147 intel_viewport(struct gl_context
*ctx
)
149 struct brw_context
*brw
= brw_context(ctx
);
150 __DRIcontext
*driContext
= brw
->driContext
;
152 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
153 if (driContext
->driDrawablePriv
)
154 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
155 if (driContext
->driReadablePriv
)
156 dri2InvalidateDrawable(driContext
->driReadablePriv
);
161 intel_update_framebuffer(struct gl_context
*ctx
,
162 struct gl_framebuffer
*fb
)
164 struct brw_context
*brw
= brw_context(ctx
);
166 /* Quantize the derived default number of samples
168 fb
->DefaultGeometry
._NumSamples
=
169 intel_quantize_num_samples(brw
->screen
,
170 fb
->DefaultGeometry
.NumSamples
);
174 intel_update_state(struct gl_context
* ctx
)
176 GLuint new_state
= ctx
->NewState
;
177 struct brw_context
*brw
= brw_context(ctx
);
179 if (ctx
->swrast_context
)
180 _swrast_InvalidateState(ctx
, new_state
);
182 brw
->NewGLState
|= new_state
;
184 if (new_state
& (_NEW_SCISSOR
| _NEW_BUFFERS
| _NEW_VIEWPORT
))
185 _mesa_update_draw_buffer_bounds(ctx
, ctx
->DrawBuffer
);
187 if (new_state
& (_NEW_STENCIL
| _NEW_BUFFERS
)) {
188 brw
->stencil_enabled
= _mesa_stencil_is_enabled(ctx
);
189 brw
->stencil_two_sided
= _mesa_stencil_is_two_sided(ctx
);
190 brw
->stencil_write_enabled
=
191 _mesa_stencil_is_write_enabled(ctx
, brw
->stencil_two_sided
);
194 if (new_state
& _NEW_POLYGON
)
195 brw
->polygon_front_bit
= _mesa_polygon_get_front_bit(ctx
);
197 if (new_state
& _NEW_BUFFERS
) {
198 intel_update_framebuffer(ctx
, ctx
->DrawBuffer
);
199 if (ctx
->DrawBuffer
!= ctx
->ReadBuffer
)
200 intel_update_framebuffer(ctx
, ctx
->ReadBuffer
);
204 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
207 intel_flush_front(struct gl_context
*ctx
)
209 struct brw_context
*brw
= brw_context(ctx
);
210 __DRIcontext
*driContext
= brw
->driContext
;
211 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
212 __DRIscreen
*const dri_screen
= brw
->screen
->driScrnPriv
;
214 if (brw
->front_buffer_dirty
&& _mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
215 if (flushFront(dri_screen
) && driDrawable
&&
216 driDrawable
->loaderPrivate
) {
218 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
220 * This potentially resolves both front and back buffer. It
221 * is unnecessary to resolve the back, but harms nothing except
222 * performance. And no one cares about front-buffer render
225 intel_resolve_for_dri2_flush(brw
, driDrawable
);
226 intel_batchbuffer_flush(brw
);
228 flushFront(dri_screen
)(driDrawable
, driDrawable
->loaderPrivate
);
230 /* We set the dirty bit in intel_prepare_render() if we're
231 * front buffer rendering once we get there.
233 brw
->front_buffer_dirty
= false;
239 intel_glFlush(struct gl_context
*ctx
)
241 struct brw_context
*brw
= brw_context(ctx
);
243 intel_batchbuffer_flush(brw
);
244 intel_flush_front(ctx
);
246 brw
->need_flush_throttle
= true;
250 intel_finish(struct gl_context
* ctx
)
252 struct brw_context
*brw
= brw_context(ctx
);
256 if (brw
->batch
.last_bo
)
257 brw_bo_wait_rendering(brw
->batch
.last_bo
);
261 brw_init_driver_functions(struct brw_context
*brw
,
262 struct dd_function_table
*functions
)
264 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
266 _mesa_init_driver_functions(functions
);
268 /* GLX uses DRI2 invalidate events to handle window resizing.
269 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
270 * which doesn't provide a mechanism for snooping the event queues.
272 * So EGL still relies on viewport hacks to handle window resizing.
273 * This should go away with DRI3000.
275 if (!brw
->driContext
->driScreenPriv
->dri2
.useInvalidate
)
276 functions
->Viewport
= intel_viewport
;
278 functions
->Flush
= intel_glFlush
;
279 functions
->Finish
= intel_finish
;
280 functions
->GetString
= intel_get_string
;
281 functions
->UpdateState
= intel_update_state
;
283 intelInitTextureFuncs(functions
);
284 intelInitTextureImageFuncs(functions
);
285 intelInitTextureCopyImageFuncs(functions
);
286 intelInitCopyImageFuncs(functions
);
287 intelInitClearFuncs(functions
);
288 intelInitBufferFuncs(functions
);
289 intelInitPixelFuncs(functions
);
290 intelInitBufferObjectFuncs(functions
);
291 brw_init_syncobj_functions(functions
);
292 brw_init_object_purgeable_functions(functions
);
294 brwInitFragProgFuncs( functions
);
295 brw_init_common_queryobj_functions(functions
);
296 if (devinfo
->gen
>= 8 || devinfo
->is_haswell
)
297 hsw_init_queryobj_functions(functions
);
298 else if (devinfo
->gen
>= 6)
299 gen6_init_queryobj_functions(functions
);
301 gen4_init_queryobj_functions(functions
);
302 brw_init_compute_functions(functions
);
303 brw_init_conditional_render_functions(functions
);
305 functions
->QueryInternalFormat
= brw_query_internal_format
;
307 functions
->NewTransformFeedback
= brw_new_transform_feedback
;
308 functions
->DeleteTransformFeedback
= brw_delete_transform_feedback
;
309 if (can_do_mi_math_and_lrr(brw
->screen
)) {
310 functions
->BeginTransformFeedback
= hsw_begin_transform_feedback
;
311 functions
->EndTransformFeedback
= hsw_end_transform_feedback
;
312 functions
->PauseTransformFeedback
= hsw_pause_transform_feedback
;
313 functions
->ResumeTransformFeedback
= hsw_resume_transform_feedback
;
314 } else if (devinfo
->gen
>= 7) {
315 functions
->BeginTransformFeedback
= gen7_begin_transform_feedback
;
316 functions
->EndTransformFeedback
= gen7_end_transform_feedback
;
317 functions
->PauseTransformFeedback
= gen7_pause_transform_feedback
;
318 functions
->ResumeTransformFeedback
= gen7_resume_transform_feedback
;
319 functions
->GetTransformFeedbackVertexCount
=
320 brw_get_transform_feedback_vertex_count
;
322 functions
->BeginTransformFeedback
= brw_begin_transform_feedback
;
323 functions
->EndTransformFeedback
= brw_end_transform_feedback
;
324 functions
->PauseTransformFeedback
= brw_pause_transform_feedback
;
325 functions
->ResumeTransformFeedback
= brw_resume_transform_feedback
;
326 functions
->GetTransformFeedbackVertexCount
=
327 brw_get_transform_feedback_vertex_count
;
330 if (devinfo
->gen
>= 6)
331 functions
->GetSamplePosition
= gen6_get_sample_position
;
333 /* GL_ARB_get_program_binary */
334 brw_program_binary_init(brw
->screen
->deviceID
);
335 functions
->GetProgramBinaryDriverSHA1
= brw_get_program_binary_driver_sha1
;
336 functions
->ProgramBinarySerializeDriverBlob
= brw_program_serialize_nir
;
337 functions
->ProgramBinaryDeserializeDriverBlob
=
338 brw_deserialize_program_binary
;
342 brw_initialize_context_constants(struct brw_context
*brw
)
344 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
345 struct gl_context
*ctx
= &brw
->ctx
;
346 const struct brw_compiler
*compiler
= brw
->screen
->compiler
;
348 const bool stage_exists
[MESA_SHADER_STAGES
] = {
349 [MESA_SHADER_VERTEX
] = true,
350 [MESA_SHADER_TESS_CTRL
] = devinfo
->gen
>= 7,
351 [MESA_SHADER_TESS_EVAL
] = devinfo
->gen
>= 7,
352 [MESA_SHADER_GEOMETRY
] = devinfo
->gen
>= 6,
353 [MESA_SHADER_FRAGMENT
] = true,
354 [MESA_SHADER_COMPUTE
] =
355 (_mesa_is_desktop_gl(ctx
) &&
356 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 1024) ||
357 (ctx
->API
== API_OPENGLES2
&&
358 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 128),
361 unsigned num_stages
= 0;
362 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
367 unsigned max_samplers
=
368 devinfo
->gen
>= 8 || devinfo
->is_haswell
? BRW_MAX_TEX_UNIT
: 16;
370 ctx
->Const
.MaxDualSourceDrawBuffers
= 1;
371 ctx
->Const
.MaxDrawBuffers
= BRW_MAX_DRAW_BUFFERS
;
372 ctx
->Const
.MaxCombinedShaderOutputResources
=
373 MAX_IMAGE_UNITS
+ BRW_MAX_DRAW_BUFFERS
;
375 /* The timestamp register we can read for glGetTimestamp() is
376 * sometimes only 32 bits, before scaling to nanoseconds (depending
379 * Once scaled to nanoseconds the timestamp would roll over at a
380 * non-power-of-two, so an application couldn't use
381 * GL_QUERY_COUNTER_BITS to handle rollover correctly. Instead, we
382 * report 36 bits and truncate at that (rolling over 5 times as
383 * often as the HW counter), and when the 32-bit counter rolls
384 * over, it happens to also be at a rollover in the reported value
385 * from near (1<<36) to 0.
387 * The low 32 bits rolls over in ~343 seconds. Our 36-bit result
388 * rolls over every ~69 seconds.
390 ctx
->Const
.QueryCounterBits
.Timestamp
= 36;
392 ctx
->Const
.MaxTextureCoordUnits
= 8; /* Mesa limit */
393 ctx
->Const
.MaxImageUnits
= MAX_IMAGE_UNITS
;
394 if (devinfo
->gen
>= 7) {
395 ctx
->Const
.MaxRenderbufferSize
= 16384;
396 ctx
->Const
.MaxTextureLevels
= MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS
);
397 ctx
->Const
.MaxCubeTextureLevels
= 15; /* 16384 */
399 ctx
->Const
.MaxRenderbufferSize
= 8192;
400 ctx
->Const
.MaxTextureLevels
= MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS
);
401 ctx
->Const
.MaxCubeTextureLevels
= 14; /* 8192 */
403 ctx
->Const
.Max3DTextureLevels
= 12; /* 2048 */
404 ctx
->Const
.MaxArrayTextureLayers
= devinfo
->gen
>= 7 ? 2048 : 512;
405 ctx
->Const
.MaxTextureMbytes
= 1536;
406 ctx
->Const
.MaxTextureRectSize
= devinfo
->gen
>= 7 ? 16384 : 8192;
407 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
408 ctx
->Const
.MaxTextureLodBias
= 15.0;
409 ctx
->Const
.StripTextureBorder
= true;
410 if (devinfo
->gen
>= 7) {
411 ctx
->Const
.MaxProgramTextureGatherComponents
= 4;
412 ctx
->Const
.MinProgramTextureGatherOffset
= -32;
413 ctx
->Const
.MaxProgramTextureGatherOffset
= 31;
414 } else if (devinfo
->gen
== 6) {
415 ctx
->Const
.MaxProgramTextureGatherComponents
= 1;
416 ctx
->Const
.MinProgramTextureGatherOffset
= -8;
417 ctx
->Const
.MaxProgramTextureGatherOffset
= 7;
420 ctx
->Const
.MaxUniformBlockSize
= 65536;
422 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
423 struct gl_program_constants
*prog
= &ctx
->Const
.Program
[i
];
425 if (!stage_exists
[i
])
428 prog
->MaxTextureImageUnits
= max_samplers
;
430 prog
->MaxUniformBlocks
= BRW_MAX_UBO
;
431 prog
->MaxCombinedUniformComponents
=
432 prog
->MaxUniformComponents
+
433 ctx
->Const
.MaxUniformBlockSize
/ 4 * prog
->MaxUniformBlocks
;
435 prog
->MaxAtomicCounters
= MAX_ATOMIC_COUNTERS
;
436 prog
->MaxAtomicBuffers
= BRW_MAX_ABO
;
437 prog
->MaxImageUniforms
= compiler
->scalar_stage
[i
] ? BRW_MAX_IMAGES
: 0;
438 prog
->MaxShaderStorageBlocks
= BRW_MAX_SSBO
;
441 ctx
->Const
.MaxTextureUnits
=
442 MIN2(ctx
->Const
.MaxTextureCoordUnits
,
443 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
);
445 ctx
->Const
.MaxUniformBufferBindings
= num_stages
* BRW_MAX_UBO
;
446 ctx
->Const
.MaxCombinedUniformBlocks
= num_stages
* BRW_MAX_UBO
;
447 ctx
->Const
.MaxCombinedAtomicBuffers
= num_stages
* BRW_MAX_ABO
;
448 ctx
->Const
.MaxCombinedShaderStorageBlocks
= num_stages
* BRW_MAX_SSBO
;
449 ctx
->Const
.MaxShaderStorageBufferBindings
= num_stages
* BRW_MAX_SSBO
;
450 ctx
->Const
.MaxCombinedTextureImageUnits
= num_stages
* max_samplers
;
451 ctx
->Const
.MaxCombinedImageUniforms
= num_stages
* BRW_MAX_IMAGES
;
454 /* Hardware only supports a limited number of transform feedback buffers.
455 * So we need to override the Mesa default (which is based only on software
458 ctx
->Const
.MaxTransformFeedbackBuffers
= BRW_MAX_SOL_BUFFERS
;
460 /* On Gen6, in the worst case, we use up one binding table entry per
461 * transform feedback component (see comments above the definition of
462 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
463 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
464 * BRW_MAX_SOL_BINDINGS.
466 * In "separate components" mode, we need to divide this value by
467 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
468 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
470 ctx
->Const
.MaxTransformFeedbackInterleavedComponents
= BRW_MAX_SOL_BINDINGS
;
471 ctx
->Const
.MaxTransformFeedbackSeparateComponents
=
472 BRW_MAX_SOL_BINDINGS
/ BRW_MAX_SOL_BUFFERS
;
474 ctx
->Const
.AlwaysUseGetTransformFeedbackVertexCount
=
475 !can_do_mi_math_and_lrr(brw
->screen
);
478 const int *msaa_modes
= intel_supported_msaa_modes(brw
->screen
);
479 const int clamp_max_samples
=
480 driQueryOptioni(&brw
->optionCache
, "clamp_max_samples");
482 if (clamp_max_samples
< 0) {
483 max_samples
= msaa_modes
[0];
485 /* Select the largest supported MSAA mode that does not exceed
489 for (int i
= 0; msaa_modes
[i
] != 0; ++i
) {
490 if (msaa_modes
[i
] <= clamp_max_samples
) {
491 max_samples
= msaa_modes
[i
];
497 ctx
->Const
.MaxSamples
= max_samples
;
498 ctx
->Const
.MaxColorTextureSamples
= max_samples
;
499 ctx
->Const
.MaxDepthTextureSamples
= max_samples
;
500 ctx
->Const
.MaxIntegerSamples
= max_samples
;
501 ctx
->Const
.MaxImageSamples
= 0;
503 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
504 * to map indices of rectangular grid to sample numbers within a pixel.
505 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
506 * extension implementation. For more details see the comment above
507 * gen6_set_sample_maps() definition.
509 gen6_set_sample_maps(ctx
);
511 ctx
->Const
.MinLineWidth
= 1.0;
512 ctx
->Const
.MinLineWidthAA
= 1.0;
513 if (devinfo
->gen
>= 6) {
514 ctx
->Const
.MaxLineWidth
= 7.375;
515 ctx
->Const
.MaxLineWidthAA
= 7.375;
516 ctx
->Const
.LineWidthGranularity
= 0.125;
518 ctx
->Const
.MaxLineWidth
= 7.0;
519 ctx
->Const
.MaxLineWidthAA
= 7.0;
520 ctx
->Const
.LineWidthGranularity
= 0.5;
523 /* For non-antialiased lines, we have to round the line width to the
524 * nearest whole number. Make sure that we don't advertise a line
525 * width that, when rounded, will be beyond the actual hardware
528 assert(roundf(ctx
->Const
.MaxLineWidth
) <= ctx
->Const
.MaxLineWidth
);
530 ctx
->Const
.MinPointSize
= 1.0;
531 ctx
->Const
.MinPointSizeAA
= 1.0;
532 ctx
->Const
.MaxPointSize
= 255.0;
533 ctx
->Const
.MaxPointSizeAA
= 255.0;
534 ctx
->Const
.PointSizeGranularity
= 1.0;
536 if (devinfo
->gen
>= 5 || devinfo
->is_g4x
)
537 ctx
->Const
.MaxClipPlanes
= 8;
539 ctx
->Const
.GLSLTessLevelsAsInputs
= true;
540 ctx
->Const
.PrimitiveRestartForPatches
= true;
542 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeInstructions
= 16 * 1024;
543 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxAluInstructions
= 0;
544 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexInstructions
= 0;
545 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexIndirections
= 0;
546 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAluInstructions
= 0;
547 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexInstructions
= 0;
548 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexIndirections
= 0;
549 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAttribs
= 16;
550 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTemps
= 256;
551 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAddressRegs
= 1;
552 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
= 1024;
553 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
=
554 MIN2(ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
,
555 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
);
557 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeInstructions
= 1024;
558 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAluInstructions
= 1024;
559 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexInstructions
= 1024;
560 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexIndirections
= 1024;
561 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAttribs
= 12;
562 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTemps
= 256;
563 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAddressRegs
= 0;
564 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
= 1024;
565 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
=
566 MIN2(ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
,
567 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
);
569 /* Fragment shaders use real, 32-bit twos-complement integers for all
572 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMin
= 31;
573 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMax
= 30;
574 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.Precision
= 0;
575 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
576 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
578 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMin
= 31;
579 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMax
= 30;
580 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.Precision
= 0;
581 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
582 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
584 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
585 * but we're not sure how it's actually done for vertex order,
586 * that affect provoking vertex decision. Always use last vertex
587 * convention for quad primitive which works as expected for now.
589 if (devinfo
->gen
>= 6)
590 ctx
->Const
.QuadsFollowProvokingVertexConvention
= false;
592 ctx
->Const
.NativeIntegers
= true;
593 ctx
->Const
.VertexID_is_zero_based
= true;
595 /* Regarding the CMP instruction, the Ivybridge PRM says:
597 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
598 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
599 * 0xFFFFFFFF) is assigned to dst."
601 * but PRMs for earlier generations say
603 * "In dword format, one GRF may store up to 8 results. When the register
604 * is used later as a vector of Booleans, as only LSB at each channel
605 * contains meaning [sic] data, software should make sure all higher bits
606 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
608 * We select the representation of a true boolean uniform to be ~0, and fix
609 * the results of Gen <= 5 CMP instruction's with -(result & 1).
611 ctx
->Const
.UniformBooleanTrue
= ~0;
613 /* From the gen4 PRM, volume 4 page 127:
615 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
616 * the base address of the first element of the surface, computed in
617 * software by adding the surface base address to the byte offset of
618 * the element in the buffer."
620 * However, unaligned accesses are slower, so enforce buffer alignment.
622 * In order to push UBO data, 3DSTATE_CONSTANT_XS imposes an additional
623 * restriction: the start of the buffer needs to be 32B aligned.
625 ctx
->Const
.UniformBufferOffsetAlignment
= 32;
627 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
628 * that we can safely have the CPU and GPU writing the same SSBO on
629 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
630 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
631 * be updating disjoint regions of the buffer simultaneously and that will
632 * break if the regions overlap the same cacheline.
634 ctx
->Const
.ShaderStorageBufferOffsetAlignment
= 64;
635 ctx
->Const
.TextureBufferOffsetAlignment
= 16;
636 ctx
->Const
.MaxTextureBufferSize
= 128 * 1024 * 1024;
638 if (devinfo
->gen
>= 6) {
639 ctx
->Const
.MaxVarying
= 32;
640 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxOutputComponents
= 128;
641 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxInputComponents
=
642 compiler
->scalar_stage
[MESA_SHADER_GEOMETRY
] ? 128 : 64;
643 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxOutputComponents
= 128;
644 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxInputComponents
= 128;
645 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxInputComponents
= 128;
646 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxOutputComponents
= 128;
647 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxInputComponents
= 128;
648 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxOutputComponents
= 128;
651 /* We want the GLSL compiler to emit code that uses condition codes */
652 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
653 ctx
->Const
.ShaderCompilerOptions
[i
] =
654 brw
->screen
->compiler
->glsl_compiler_options
[i
];
657 if (devinfo
->gen
>= 7) {
658 ctx
->Const
.MaxViewportWidth
= 32768;
659 ctx
->Const
.MaxViewportHeight
= 32768;
662 /* ARB_viewport_array, OES_viewport_array */
663 if (devinfo
->gen
>= 6) {
664 ctx
->Const
.MaxViewports
= GEN6_NUM_VIEWPORTS
;
665 ctx
->Const
.ViewportSubpixelBits
= 0;
667 /* Cast to float before negating because MaxViewportWidth is unsigned.
669 ctx
->Const
.ViewportBounds
.Min
= -(float)ctx
->Const
.MaxViewportWidth
;
670 ctx
->Const
.ViewportBounds
.Max
= ctx
->Const
.MaxViewportWidth
;
673 /* ARB_gpu_shader5 */
674 if (devinfo
->gen
>= 7)
675 ctx
->Const
.MaxVertexStreams
= MIN2(4, MAX_VERTEX_STREAMS
);
677 /* ARB_framebuffer_no_attachments */
678 ctx
->Const
.MaxFramebufferWidth
= 16384;
679 ctx
->Const
.MaxFramebufferHeight
= 16384;
680 ctx
->Const
.MaxFramebufferLayers
= ctx
->Const
.MaxArrayTextureLayers
;
681 ctx
->Const
.MaxFramebufferSamples
= max_samples
;
683 /* OES_primitive_bounding_box */
684 ctx
->Const
.NoPrimitiveBoundingBoxOutput
= true;
686 /* TODO: We should be able to use STD430 packing by default on all hardware
687 * but some piglit tests [1] currently fail on SNB when this is enabled.
688 * The problem is the messages we're using for doing uniform pulls
689 * in the vec4 back-end on SNB is the OWORD block load instruction, which
690 * takes its offset in units of OWORDS (16 bytes). On IVB+, we use the
691 * sampler which doesn't have these restrictions.
693 * In the scalar back-end, we use the sampler for dynamic uniform loads and
694 * pull an entire cache line at a time for constant offset loads both of
695 * which support almost any alignment.
697 * [1] glsl-1.40/uniform_buffer/vs-float-array-variable-index.shader_test
699 if (devinfo
->gen
>= 7)
700 ctx
->Const
.UseSTD430AsDefaultPacking
= true;
702 if (!(ctx
->Const
.ContextFlags
& GL_CONTEXT_FLAG_DEBUG_BIT
))
703 ctx
->Const
.AllowMappedBuffersDuringExecution
= true;
705 /* GL_ARB_get_program_binary */
706 ctx
->Const
.NumProgramBinaryFormats
= 1;
710 brw_initialize_cs_context_constants(struct brw_context
*brw
)
712 struct gl_context
*ctx
= &brw
->ctx
;
713 const struct intel_screen
*screen
= brw
->screen
;
714 struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
716 /* FINISHME: Do this for all platforms that the kernel supports */
717 if (devinfo
->is_cherryview
&&
718 screen
->subslice_total
> 0 && screen
->eu_total
> 0) {
719 /* Logical CS threads = EUs per subslice * 7 threads per EU */
720 uint32_t max_cs_threads
= screen
->eu_total
/ screen
->subslice_total
* 7;
722 /* Fuse configurations may give more threads than expected, never less. */
723 if (max_cs_threads
> devinfo
->max_cs_threads
)
724 devinfo
->max_cs_threads
= max_cs_threads
;
727 /* Maximum number of scalar compute shader invocations that can be run in
728 * parallel in the same subslice assuming SIMD32 dispatch.
730 * We don't advertise more than 64 threads, because we are limited to 64 by
731 * our usage of thread_width_max in the gpgpu walker command. This only
732 * currently impacts Haswell, which otherwise might be able to advertise 70
733 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
734 * required the number of invocation needed for ARB_compute_shader.
736 const unsigned max_threads
= MIN2(64, devinfo
->max_cs_threads
);
737 const uint32_t max_invocations
= 32 * max_threads
;
738 ctx
->Const
.MaxComputeWorkGroupSize
[0] = max_invocations
;
739 ctx
->Const
.MaxComputeWorkGroupSize
[1] = max_invocations
;
740 ctx
->Const
.MaxComputeWorkGroupSize
[2] = max_invocations
;
741 ctx
->Const
.MaxComputeWorkGroupInvocations
= max_invocations
;
742 ctx
->Const
.MaxComputeSharedMemorySize
= 64 * 1024;
746 * Process driconf (drirc) options, setting appropriate context flags.
748 * intelInitExtensions still pokes at optionCache directly, in order to
749 * avoid advertising various extensions. No flags are set, so it makes
750 * sense to continue doing that there.
753 brw_process_driconf_options(struct brw_context
*brw
)
755 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
756 struct gl_context
*ctx
= &brw
->ctx
;
758 driOptionCache
*options
= &brw
->optionCache
;
759 driParseConfigFiles(options
, &brw
->screen
->optionCache
,
760 brw
->driContext
->driScreenPriv
->myNum
, "i965");
762 int bo_reuse_mode
= driQueryOptioni(options
, "bo_reuse");
763 switch (bo_reuse_mode
) {
764 case DRI_CONF_BO_REUSE_DISABLED
:
766 case DRI_CONF_BO_REUSE_ALL
:
767 brw_bufmgr_enable_reuse(brw
->bufmgr
);
771 if (INTEL_DEBUG
& DEBUG_NO_HIZ
) {
772 brw
->has_hiz
= false;
773 /* On gen6, you can only do separate stencil with HIZ. */
774 if (devinfo
->gen
== 6)
775 brw
->has_separate_stencil
= false;
778 if (driQueryOptionb(options
, "mesa_no_error"))
779 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_NO_ERROR_BIT_KHR
;
781 if (driQueryOptionb(options
, "always_flush_batch")) {
782 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
783 brw
->always_flush_batch
= true;
786 if (driQueryOptionb(options
, "always_flush_cache")) {
787 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
788 brw
->always_flush_cache
= true;
791 if (driQueryOptionb(options
, "disable_throttling")) {
792 fprintf(stderr
, "disabling flush throttling\n");
793 brw
->disable_throttling
= true;
796 brw
->precompile
= driQueryOptionb(&brw
->optionCache
, "shader_precompile");
798 if (driQueryOptionb(&brw
->optionCache
, "precise_trig"))
799 brw
->screen
->compiler
->precise_trig
= true;
801 ctx
->Const
.ForceGLSLExtensionsWarn
=
802 driQueryOptionb(options
, "force_glsl_extensions_warn");
804 ctx
->Const
.ForceGLSLVersion
=
805 driQueryOptioni(options
, "force_glsl_version");
807 ctx
->Const
.DisableGLSLLineContinuations
=
808 driQueryOptionb(options
, "disable_glsl_line_continuations");
810 ctx
->Const
.AllowGLSLExtensionDirectiveMidShader
=
811 driQueryOptionb(options
, "allow_glsl_extension_directive_midshader");
813 ctx
->Const
.AllowGLSLBuiltinVariableRedeclaration
=
814 driQueryOptionb(options
, "allow_glsl_builtin_variable_redeclaration");
816 ctx
->Const
.AllowHigherCompatVersion
=
817 driQueryOptionb(options
, "allow_higher_compat_version");
819 ctx
->Const
.ForceGLSLAbsSqrt
=
820 driQueryOptionb(options
, "force_glsl_abs_sqrt");
822 ctx
->Const
.GLSLZeroInit
= driQueryOptionb(options
, "glsl_zero_init");
824 brw
->dual_color_blend_by_location
=
825 driQueryOptionb(options
, "dual_color_blend_by_location");
827 ctx
->Const
.AllowGLSLCrossStageInterpolationMismatch
=
828 driQueryOptionb(options
, "allow_glsl_cross_stage_interpolation_mismatch");
830 ctx
->Const
.dri_config_options_sha1
= ralloc_array(brw
, unsigned char, 20);
831 driComputeOptionsSha1(&brw
->screen
->optionCache
,
832 ctx
->Const
.dri_config_options_sha1
);
836 brwCreateContext(gl_api api
,
837 const struct gl_config
*mesaVis
,
838 __DRIcontext
*driContextPriv
,
839 const struct __DriverContextConfig
*ctx_config
,
840 unsigned *dri_ctx_error
,
841 void *sharedContextPrivate
)
843 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
844 struct intel_screen
*screen
= driContextPriv
->driScreenPriv
->driverPrivate
;
845 const struct gen_device_info
*devinfo
= &screen
->devinfo
;
846 struct dd_function_table functions
;
848 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
849 * provides us with context reset notifications.
851 uint32_t allowed_flags
= __DRI_CTX_FLAG_DEBUG
|
852 __DRI_CTX_FLAG_FORWARD_COMPATIBLE
|
853 __DRI_CTX_FLAG_NO_ERROR
;
855 if (screen
->has_context_reset_notification
)
856 allowed_flags
|= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
;
858 if (ctx_config
->flags
& ~allowed_flags
) {
859 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
863 if (ctx_config
->attribute_mask
&
864 ~(__DRIVER_CONTEXT_ATTRIB_RESET_STRATEGY
|
865 __DRIVER_CONTEXT_ATTRIB_PRIORITY
)) {
866 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE
;
871 ((ctx_config
->attribute_mask
& __DRIVER_CONTEXT_ATTRIB_RESET_STRATEGY
) &&
872 ctx_config
->reset_strategy
!= __DRI_CTX_RESET_NO_NOTIFICATION
);
874 struct brw_context
*brw
= rzalloc(NULL
, struct brw_context
);
876 fprintf(stderr
, "%s: failed to alloc context\n", __func__
);
877 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
881 driContextPriv
->driverPrivate
= brw
;
882 brw
->driContext
= driContextPriv
;
883 brw
->screen
= screen
;
884 brw
->bufmgr
= screen
->bufmgr
;
886 brw
->has_hiz
= devinfo
->has_hiz_and_separate_stencil
;
887 brw
->has_separate_stencil
= devinfo
->has_hiz_and_separate_stencil
;
889 brw
->has_swizzling
= screen
->hw_has_swizzling
;
891 brw
->isl_dev
= screen
->isl_dev
;
893 brw
->vs
.base
.stage
= MESA_SHADER_VERTEX
;
894 brw
->tcs
.base
.stage
= MESA_SHADER_TESS_CTRL
;
895 brw
->tes
.base
.stage
= MESA_SHADER_TESS_EVAL
;
896 brw
->gs
.base
.stage
= MESA_SHADER_GEOMETRY
;
897 brw
->wm
.base
.stage
= MESA_SHADER_FRAGMENT
;
898 brw
->cs
.base
.stage
= MESA_SHADER_COMPUTE
;
899 if (devinfo
->gen
>= 8) {
900 brw
->vtbl
.emit_depth_stencil_hiz
= gen8_emit_depth_stencil_hiz
;
901 } else if (devinfo
->gen
>= 7) {
902 brw
->vtbl
.emit_depth_stencil_hiz
= gen7_emit_depth_stencil_hiz
;
903 } else if (devinfo
->gen
>= 6) {
904 brw
->vtbl
.emit_depth_stencil_hiz
= gen6_emit_depth_stencil_hiz
;
906 brw
->vtbl
.emit_depth_stencil_hiz
= brw_emit_depth_stencil_hiz
;
909 brw_init_driver_functions(brw
, &functions
);
912 functions
.GetGraphicsResetStatus
= brw_get_graphics_reset_status
;
914 struct gl_context
*ctx
= &brw
->ctx
;
916 if (!_mesa_initialize_context(ctx
, api
, mesaVis
, shareCtx
, &functions
)) {
917 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
918 fprintf(stderr
, "%s: failed to init mesa context\n", __func__
);
919 intelDestroyContext(driContextPriv
);
923 driContextSetFlags(ctx
, ctx_config
->flags
);
925 /* Initialize the software rasterizer and helper modules.
927 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
928 * software fallbacks (which we have to support on legacy GL to do weird
929 * glDrawPixels(), glBitmap(), and other functions).
931 if (api
!= API_OPENGL_CORE
&& api
!= API_OPENGLES2
) {
932 _swrast_CreateContext(ctx
);
935 _vbo_CreateContext(ctx
);
936 if (ctx
->swrast_context
) {
937 _tnl_CreateContext(ctx
);
938 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= _tnl_run_pipeline
;
939 _swsetup_CreateContext(ctx
);
941 /* Configure swrast to match hardware characteristics: */
942 _swrast_allow_pixel_fog(ctx
, false);
943 _swrast_allow_vertex_fog(ctx
, true);
946 _mesa_meta_init(ctx
);
948 brw_process_driconf_options(brw
);
950 if (INTEL_DEBUG
& DEBUG_PERF
)
951 brw
->perf_debug
= true;
953 brw_initialize_cs_context_constants(brw
);
954 brw_initialize_context_constants(brw
);
956 ctx
->Const
.ResetStrategy
= notify_reset
957 ? GL_LOSE_CONTEXT_ON_RESET_ARB
: GL_NO_RESET_NOTIFICATION_ARB
;
959 /* Reinitialize the context point state. It depends on ctx->Const values. */
960 _mesa_init_point(ctx
);
964 intel_batchbuffer_init(brw
);
966 if (devinfo
->gen
>= 6) {
967 /* Create a new hardware context. Using a hardware context means that
968 * our GPU state will be saved/restored on context switch, allowing us
969 * to assume that the GPU is in the same state we left it in.
971 * This is required for transform feedback buffer offsets, query objects,
972 * and also allows us to reduce how much state we have to emit.
974 brw
->hw_ctx
= brw_create_hw_context(brw
->bufmgr
);
977 fprintf(stderr
, "Failed to create hardware context.\n");
978 intelDestroyContext(driContextPriv
);
982 int hw_priority
= BRW_CONTEXT_MEDIUM_PRIORITY
;
983 if (ctx_config
->attribute_mask
& __DRIVER_CONTEXT_ATTRIB_PRIORITY
) {
984 switch (ctx_config
->priority
) {
985 case __DRI_CTX_PRIORITY_LOW
:
986 hw_priority
= BRW_CONTEXT_LOW_PRIORITY
;
988 case __DRI_CTX_PRIORITY_HIGH
:
989 hw_priority
= BRW_CONTEXT_HIGH_PRIORITY
;
993 if (hw_priority
!= I915_CONTEXT_DEFAULT_PRIORITY
&&
994 brw_hw_context_set_priority(brw
->bufmgr
, brw
->hw_ctx
, hw_priority
)) {
996 "Failed to set priority [%d:%d] for hardware context.\n",
997 ctx_config
->priority
, hw_priority
);
998 intelDestroyContext(driContextPriv
);
1003 if (brw_init_pipe_control(brw
, devinfo
)) {
1004 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1005 intelDestroyContext(driContextPriv
);
1009 if (devinfo
->gen
== 10) {
1011 "WARNING: i965 does not fully support Gen10 yet.\n"
1012 "Instability or lower performance might occur.\n");
1016 brw_init_state(brw
);
1018 intelInitExtensions(ctx
);
1020 brw_init_surface_formats(brw
);
1022 brw_blorp_init(brw
);
1024 brw
->urb
.size
= devinfo
->urb
.size
;
1026 if (devinfo
->gen
== 6)
1027 brw
->urb
.gs_present
= false;
1029 brw
->prim_restart
.in_progress
= false;
1030 brw
->prim_restart
.enable_cut_index
= false;
1031 brw
->gs
.enabled
= false;
1032 brw
->clip
.viewport_count
= 1;
1034 brw
->predicate
.state
= BRW_PREDICATE_STATE_RENDER
;
1036 brw
->max_gtt_map_object_size
= screen
->max_gtt_map_object_size
;
1038 ctx
->VertexProgram
._MaintainTnlProgram
= true;
1039 ctx
->FragmentProgram
._MaintainTexEnvProgram
= true;
1041 brw_draw_init( brw
);
1043 if ((ctx_config
->flags
& __DRI_CTX_FLAG_DEBUG
) != 0) {
1044 /* Turn on some extra GL_ARB_debug_output generation. */
1045 brw
->perf_debug
= true;
1048 if ((ctx_config
->flags
& __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
) != 0) {
1049 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB
;
1050 ctx
->Const
.RobustAccess
= GL_TRUE
;
1053 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
1054 brw_init_shader_time(brw
);
1056 _mesa_override_extensions(ctx
);
1057 _mesa_compute_version(ctx
);
1059 _mesa_initialize_dispatch_tables(ctx
);
1060 _mesa_initialize_vbo_vtxfmt(ctx
);
1062 if (ctx
->Extensions
.INTEL_performance_query
)
1063 brw_init_performance_queries(brw
);
1065 vbo_use_buffer_objects(ctx
);
1066 vbo_always_unmap_buffers(ctx
);
1068 brw_disk_cache_init(brw
);
1074 intelDestroyContext(__DRIcontext
* driContextPriv
)
1076 struct brw_context
*brw
=
1077 (struct brw_context
*) driContextPriv
->driverPrivate
;
1078 struct gl_context
*ctx
= &brw
->ctx
;
1079 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
1081 _mesa_meta_free(&brw
->ctx
);
1083 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
1084 /* Force a report. */
1085 brw
->shader_time
.report_time
= 0;
1087 brw_collect_and_report_shader_time(brw
);
1088 brw_destroy_shader_time(brw
);
1091 if (devinfo
->gen
>= 6)
1092 blorp_finish(&brw
->blorp
);
1094 brw_destroy_state(brw
);
1095 brw_draw_destroy(brw
);
1097 brw_bo_unreference(brw
->curbe
.curbe_bo
);
1099 brw_bo_unreference(brw
->vs
.base
.scratch_bo
);
1100 brw_bo_unreference(brw
->tcs
.base
.scratch_bo
);
1101 brw_bo_unreference(brw
->tes
.base
.scratch_bo
);
1102 brw_bo_unreference(brw
->gs
.base
.scratch_bo
);
1103 brw_bo_unreference(brw
->wm
.base
.scratch_bo
);
1105 brw_bo_unreference(brw
->vs
.base
.push_const_bo
);
1106 brw_bo_unreference(brw
->tcs
.base
.push_const_bo
);
1107 brw_bo_unreference(brw
->tes
.base
.push_const_bo
);
1108 brw_bo_unreference(brw
->gs
.base
.push_const_bo
);
1109 brw_bo_unreference(brw
->wm
.base
.push_const_bo
);
1111 brw_destroy_hw_context(brw
->bufmgr
, brw
->hw_ctx
);
1113 if (ctx
->swrast_context
) {
1114 _swsetup_DestroyContext(&brw
->ctx
);
1115 _tnl_DestroyContext(&brw
->ctx
);
1117 _vbo_DestroyContext(&brw
->ctx
);
1119 if (ctx
->swrast_context
)
1120 _swrast_DestroyContext(&brw
->ctx
);
1122 brw_fini_pipe_control(brw
);
1123 intel_batchbuffer_free(&brw
->batch
);
1125 brw_bo_unreference(brw
->throttle_batch
[1]);
1126 brw_bo_unreference(brw
->throttle_batch
[0]);
1127 brw
->throttle_batch
[1] = NULL
;
1128 brw
->throttle_batch
[0] = NULL
;
1130 driDestroyOptionCache(&brw
->optionCache
);
1132 /* free the Mesa context */
1133 _mesa_free_context_data(&brw
->ctx
);
1136 driContextPriv
->driverPrivate
= NULL
;
1140 intelUnbindContext(__DRIcontext
* driContextPriv
)
1142 /* Unset current context and dispath table */
1143 _mesa_make_current(NULL
, NULL
, NULL
);
1149 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1150 * on window system framebuffers.
1152 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1153 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1154 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1155 * for a visual where you're guaranteed to be capable, but it turns out that
1156 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1157 * incapable ones, because there's no difference between the two in resources
1158 * used. Applications thus get built that accidentally rely on the default
1159 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1162 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1163 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1164 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1165 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1166 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1167 * and get no sRGB encode (assuming that both kinds of visual are available).
1168 * Thus our choice to support sRGB by default on our visuals for desktop would
1169 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1171 * Unfortunately, renderbuffer setup happens before a context is created. So
1172 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1173 * context (without an sRGB visual), we go turn that back off before anyone
1177 intel_gles3_srgb_workaround(struct brw_context
*brw
,
1178 struct gl_framebuffer
*fb
)
1180 struct gl_context
*ctx
= &brw
->ctx
;
1182 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
1185 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
1186 struct gl_renderbuffer
*rb
= fb
->Attachment
[i
].Renderbuffer
;
1188 /* Check if sRGB was specifically asked for. */
1189 struct intel_renderbuffer
*irb
= intel_get_renderbuffer(fb
, i
);
1190 if (irb
&& irb
->need_srgb
)
1194 rb
->Format
= _mesa_get_srgb_format_linear(rb
->Format
);
1196 /* Disable sRGB from framebuffers that are not compatible. */
1197 fb
->Visual
.sRGBCapable
= false;
1201 intelMakeCurrent(__DRIcontext
* driContextPriv
,
1202 __DRIdrawable
* driDrawPriv
,
1203 __DRIdrawable
* driReadPriv
)
1205 struct brw_context
*brw
;
1208 brw
= (struct brw_context
*) driContextPriv
->driverPrivate
;
1212 if (driContextPriv
) {
1213 struct gl_context
*ctx
= &brw
->ctx
;
1214 struct gl_framebuffer
*fb
, *readFb
;
1216 if (driDrawPriv
== NULL
) {
1217 fb
= _mesa_get_incomplete_framebuffer();
1219 fb
= driDrawPriv
->driverPrivate
;
1220 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1223 if (driReadPriv
== NULL
) {
1224 readFb
= _mesa_get_incomplete_framebuffer();
1226 readFb
= driReadPriv
->driverPrivate
;
1227 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1230 /* The sRGB workaround changes the renderbuffer's format. We must change
1231 * the format before the renderbuffer's miptree get's allocated, otherwise
1232 * the formats of the renderbuffer and its miptree will differ.
1234 intel_gles3_srgb_workaround(brw
, fb
);
1235 intel_gles3_srgb_workaround(brw
, readFb
);
1237 /* If the context viewport hasn't been initialized, force a call out to
1238 * the loader to get buffers so we have a drawable size for the initial
1240 if (!brw
->ctx
.ViewportInitialized
)
1241 intel_prepare_render(brw
);
1243 _mesa_make_current(ctx
, fb
, readFb
);
1245 _mesa_make_current(NULL
, NULL
, NULL
);
1252 intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1253 __DRIdrawable
*drawable
)
1255 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
1257 if (devinfo
->gen
< 6) {
1258 /* MSAA and fast color clear are not supported, so don't waste time
1259 * checking whether a resolve is needed.
1264 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1265 struct intel_renderbuffer
*rb
;
1267 /* Usually, only the back buffer will need to be downsampled. However,
1268 * the front buffer will also need it if the user has rendered into it.
1270 static const gl_buffer_index buffers
[2] = {
1275 for (int i
= 0; i
< 2; ++i
) {
1276 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
1277 if (rb
== NULL
|| rb
->mt
== NULL
)
1279 if (rb
->mt
->surf
.samples
== 1) {
1280 assert(rb
->mt_layer
== 0 && rb
->mt_level
== 0 &&
1281 rb
->layer_count
== 1);
1282 intel_miptree_prepare_external(brw
, rb
->mt
);
1284 intel_renderbuffer_downsample(brw
, rb
);
1290 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
1292 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
1296 intel_query_dri2_buffers(struct brw_context
*brw
,
1297 __DRIdrawable
*drawable
,
1298 __DRIbuffer
**buffers
,
1302 intel_process_dri2_buffer(struct brw_context
*brw
,
1303 __DRIdrawable
*drawable
,
1304 __DRIbuffer
*buffer
,
1305 struct intel_renderbuffer
*rb
,
1306 const char *buffer_name
);
1309 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
);
1312 intel_update_dri2_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1314 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1315 struct intel_renderbuffer
*rb
;
1316 __DRIbuffer
*buffers
= NULL
;
1318 const char *region_name
;
1320 /* Set this up front, so that in case our buffers get invalidated
1321 * while we're getting new buffers, we don't clobber the stamp and
1322 * thus ignore the invalidate. */
1323 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1325 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1326 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1328 intel_query_dri2_buffers(brw
, drawable
, &buffers
, &count
);
1330 if (buffers
== NULL
)
1333 for (int i
= 0; i
< count
; i
++) {
1334 switch (buffers
[i
].attachment
) {
1335 case __DRI_BUFFER_FRONT_LEFT
:
1336 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1337 region_name
= "dri2 front buffer";
1340 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
1341 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1342 region_name
= "dri2 fake front buffer";
1345 case __DRI_BUFFER_BACK_LEFT
:
1346 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1347 region_name
= "dri2 back buffer";
1350 case __DRI_BUFFER_DEPTH
:
1351 case __DRI_BUFFER_HIZ
:
1352 case __DRI_BUFFER_DEPTH_STENCIL
:
1353 case __DRI_BUFFER_STENCIL
:
1354 case __DRI_BUFFER_ACCUM
:
1357 "unhandled buffer attach event, attachment type %d\n",
1358 buffers
[i
].attachment
);
1362 intel_process_dri2_buffer(brw
, drawable
, &buffers
[i
], rb
, region_name
);
1368 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
1370 struct brw_context
*brw
= context
->driverPrivate
;
1371 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1373 /* Set this up front, so that in case our buffers get invalidated
1374 * while we're getting new buffers, we don't clobber the stamp and
1375 * thus ignore the invalidate. */
1376 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1378 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1379 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1381 if (dri_screen
->image
.loader
)
1382 intel_update_image_buffers(brw
, drawable
);
1384 intel_update_dri2_buffers(brw
, drawable
);
1386 driUpdateFramebufferSize(&brw
->ctx
, drawable
);
1390 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1391 * state is required.
1394 intel_prepare_render(struct brw_context
*brw
)
1396 struct gl_context
*ctx
= &brw
->ctx
;
1397 __DRIcontext
*driContext
= brw
->driContext
;
1398 __DRIdrawable
*drawable
;
1400 drawable
= driContext
->driDrawablePriv
;
1401 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
1402 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1403 intel_update_renderbuffers(driContext
, drawable
);
1404 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
1407 drawable
= driContext
->driReadablePriv
;
1408 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
1409 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1410 intel_update_renderbuffers(driContext
, drawable
);
1411 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
1414 /* If we're currently rendering to the front buffer, the rendering
1415 * that will happen next will probably dirty the front buffer. So
1416 * mark it as dirty here.
1418 if (_mesa_is_front_buffer_drawing(ctx
->DrawBuffer
))
1419 brw
->front_buffer_dirty
= true;
1423 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1425 * To determine which DRI buffers to request, examine the renderbuffers
1426 * attached to the drawable's framebuffer. Then request the buffers with
1427 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1429 * This is called from intel_update_renderbuffers().
1431 * \param drawable Drawable whose buffers are queried.
1432 * \param buffers [out] List of buffers returned by DRI2 query.
1433 * \param buffer_count [out] Number of buffers returned.
1435 * \see intel_update_renderbuffers()
1436 * \see DRI2GetBuffers()
1437 * \see DRI2GetBuffersWithFormat()
1440 intel_query_dri2_buffers(struct brw_context
*brw
,
1441 __DRIdrawable
*drawable
,
1442 __DRIbuffer
**buffers
,
1445 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1446 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1448 unsigned attachments
[8];
1450 struct intel_renderbuffer
*front_rb
;
1451 struct intel_renderbuffer
*back_rb
;
1453 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1454 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1456 memset(attachments
, 0, sizeof(attachments
));
1457 if ((_mesa_is_front_buffer_drawing(fb
) ||
1458 _mesa_is_front_buffer_reading(fb
) ||
1459 !back_rb
) && front_rb
) {
1460 /* If a fake front buffer is in use, then querying for
1461 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1462 * the real front buffer to the fake front buffer. So before doing the
1463 * query, we need to make sure all the pending drawing has landed in the
1464 * real front buffer.
1466 intel_batchbuffer_flush(brw
);
1467 intel_flush_front(&brw
->ctx
);
1469 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1470 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1471 } else if (front_rb
&& brw
->front_buffer_dirty
) {
1472 /* We have pending front buffer rendering, but we aren't querying for a
1473 * front buffer. If the front buffer we have is a fake front buffer,
1474 * the X server is going to throw it away when it processes the query.
1475 * So before doing the query, make sure all the pending drawing has
1476 * landed in the real front buffer.
1478 intel_batchbuffer_flush(brw
);
1479 intel_flush_front(&brw
->ctx
);
1483 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1484 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1487 assert(i
<= ARRAY_SIZE(attachments
));
1490 dri_screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1495 drawable
->loaderPrivate
);
1499 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1501 * This is called from intel_update_renderbuffers().
1504 * DRI buffers whose attachment point is DRI2BufferStencil or
1505 * DRI2BufferDepthStencil are handled as special cases.
1507 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1508 * that is passed to brw_bo_gem_create_from_name().
1510 * \see intel_update_renderbuffers()
1513 intel_process_dri2_buffer(struct brw_context
*brw
,
1514 __DRIdrawable
*drawable
,
1515 __DRIbuffer
*buffer
,
1516 struct intel_renderbuffer
*rb
,
1517 const char *buffer_name
)
1519 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1525 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1527 /* We try to avoid closing and reopening the same BO name, because the first
1528 * use of a mapping of the buffer involves a bunch of page faulting which is
1529 * moderately expensive.
1531 struct intel_mipmap_tree
*last_mt
;
1532 if (num_samples
== 0)
1535 last_mt
= rb
->singlesample_mt
;
1537 uint32_t old_name
= 0;
1539 /* The bo already has a name because the miptree was created by a
1540 * previous call to intel_process_dri2_buffer(). If a bo already has a
1541 * name, then brw_bo_flink() is a low-cost getter. It does not
1542 * create a new name.
1544 brw_bo_flink(last_mt
->bo
, &old_name
);
1547 if (old_name
== buffer
->name
)
1550 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1552 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1553 buffer
->name
, buffer
->attachment
,
1554 buffer
->cpp
, buffer
->pitch
);
1557 bo
= brw_bo_gem_create_from_name(brw
->bufmgr
, buffer_name
,
1561 "Failed to open BO for returned DRI2 buffer "
1562 "(%dx%d, %s, named %d).\n"
1563 "This is likely a bug in the X Server that will lead to a "
1565 drawable
->w
, drawable
->h
, buffer_name
, buffer
->name
);
1569 uint32_t tiling
, swizzle
;
1570 brw_bo_get_tiling(bo
, &tiling
, &swizzle
);
1572 struct intel_mipmap_tree
*mt
=
1573 intel_miptree_create_for_bo(brw
,
1575 intel_rb_format(rb
),
1581 isl_tiling_from_i915_tiling(tiling
),
1582 MIPTREE_CREATE_DEFAULT
);
1584 brw_bo_unreference(bo
);
1588 /* We got this BO from X11. We cana't assume that we have coherent texture
1589 * access because X may suddenly decide to use it for scan-out which would
1590 * destroy coherency.
1592 bo
->cache_coherent
= false;
1594 if (!intel_update_winsys_renderbuffer_miptree(brw
, rb
, mt
,
1595 drawable
->w
, drawable
->h
,
1597 brw_bo_unreference(bo
);
1598 intel_miptree_release(&mt
);
1602 if (_mesa_is_front_buffer_drawing(fb
) &&
1603 (buffer
->attachment
== __DRI_BUFFER_FRONT_LEFT
||
1604 buffer
->attachment
== __DRI_BUFFER_FAKE_FRONT_LEFT
) &&
1605 rb
->Base
.Base
.NumSamples
> 1) {
1606 intel_renderbuffer_upsample(brw
, rb
);
1611 brw_bo_unreference(bo
);
1615 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1617 * To determine which DRI buffers to request, examine the renderbuffers
1618 * attached to the drawable's framebuffer. Then request the buffers from
1621 * This is called from intel_update_renderbuffers().
1623 * \param drawable Drawable whose buffers are queried.
1624 * \param buffers [out] List of buffers returned by DRI2 query.
1625 * \param buffer_count [out] Number of buffers returned.
1627 * \see intel_update_renderbuffers()
1631 intel_update_image_buffer(struct brw_context
*intel
,
1632 __DRIdrawable
*drawable
,
1633 struct intel_renderbuffer
*rb
,
1635 enum __DRIimageBufferMask buffer_type
)
1637 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1639 if (!rb
|| !buffer
->bo
)
1642 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1644 /* Check and see if we're already bound to the right
1647 struct intel_mipmap_tree
*last_mt
;
1648 if (num_samples
== 0)
1651 last_mt
= rb
->singlesample_mt
;
1653 if (last_mt
&& last_mt
->bo
== buffer
->bo
)
1656 struct intel_mipmap_tree
*mt
=
1657 intel_miptree_create_for_dri_image(intel
, buffer
, GL_TEXTURE_2D
,
1658 intel_rb_format(rb
), true);
1662 if (!intel_update_winsys_renderbuffer_miptree(intel
, rb
, mt
,
1663 buffer
->width
, buffer
->height
,
1665 intel_miptree_release(&mt
);
1669 if (_mesa_is_front_buffer_drawing(fb
) &&
1670 buffer_type
== __DRI_IMAGE_BUFFER_FRONT
&&
1671 rb
->Base
.Base
.NumSamples
> 1) {
1672 intel_renderbuffer_upsample(intel
, rb
);
1677 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1679 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1680 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1681 struct intel_renderbuffer
*front_rb
;
1682 struct intel_renderbuffer
*back_rb
;
1683 struct __DRIimageList images
;
1685 uint32_t buffer_mask
= 0;
1688 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1689 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1692 format
= intel_rb_format(back_rb
);
1694 format
= intel_rb_format(front_rb
);
1698 if (front_rb
&& (_mesa_is_front_buffer_drawing(fb
) ||
1699 _mesa_is_front_buffer_reading(fb
) || !back_rb
)) {
1700 buffer_mask
|= __DRI_IMAGE_BUFFER_FRONT
;
1704 buffer_mask
|= __DRI_IMAGE_BUFFER_BACK
;
1706 ret
= dri_screen
->image
.loader
->getBuffers(drawable
,
1707 driGLFormatToImageFormat(format
),
1708 &drawable
->dri2
.stamp
,
1709 drawable
->loaderPrivate
,
1715 if (images
.image_mask
& __DRI_IMAGE_BUFFER_FRONT
) {
1716 drawable
->w
= images
.front
->width
;
1717 drawable
->h
= images
.front
->height
;
1718 intel_update_image_buffer(brw
,
1722 __DRI_IMAGE_BUFFER_FRONT
);
1725 if (images
.image_mask
& __DRI_IMAGE_BUFFER_BACK
) {
1726 drawable
->w
= images
.back
->width
;
1727 drawable
->h
= images
.back
->height
;
1728 intel_update_image_buffer(brw
,
1732 __DRI_IMAGE_BUFFER_BACK
);