src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/api_exec.h"
  34 #include "main/imports.h"
  35 #include "main/macros.h"
  36 #include "main/simple_list.h"
  37 #include "main/version.h"
  38 #include "main/vtxfmt.h"
  39
  40 #include "vbo/vbo_context.h"
  41
  42 #include "brw_context.h"
  43 #include "brw_defines.h"
  44 #include "brw_draw.h"
  45 #include "brw_state.h"
  46
  47 #include "intel_fbo.h"
  48 #include "intel_mipmap_tree.h"
  49 #include "intel_regions.h"
  50 #include "intel_span.h"
  51 #include "intel_tex.h"
  52 #include "intel_tex_obj.h"
  53
  54 #include "tnl/t_pipeline.h"
  55 #include "glsl/ralloc.h"
  56
  57 /***************************************
  58  * Mesa's Driver Functions
  59  ***************************************/
  60
  61 static size_t
  62 brw_query_samples_for_format(struct gl_context *ctx, GLenum internalFormat,
  63                              int samples[16])
  64 {
  65    struct intel_context *intel = intel_context(ctx);
  66
  67    switch (intel->gen) {
  68    case 7:
  69       samples[0] = 8;
  70       samples[1] = 4;
  71       return 2;
  72
  73    case 6:
  74       samples[0] = 4;
  75       return 1;
  76
  77    default:
  78       samples[0] = 1;
  79       return 1;
  80    }
  81 }
  82
  83 static void brwInitDriverFunctions(struct intel_screen *screen,
  84                                    struct dd_function_table *functions)
  85 {
  86    intelInitDriverFunctions( functions );
  87
  88    brwInitFragProgFuncs( functions );
  89    brw_init_queryobj_functions(functions);
  90
  91    functions->QuerySamplesForFormat = brw_query_samples_for_format;
  92    functions->BeginTransformFeedback = brw_begin_transform_feedback;
  93
  94    if (screen->gen >= 7)
  95       functions->EndTransformFeedback = gen7_end_transform_feedback;
  96    else
  97       functions->EndTransformFeedback = brw_end_transform_feedback;
  98
  99    if (screen->gen >= 6)
 100       functions->GetSamplePosition = gen6_get_sample_position;
 101 }
 102
 103 bool
 104 brwCreateContext(int api,
 105                  const struct gl_config *mesaVis,
 106                  __DRIcontext *driContextPriv,
 107                  unsigned major_version,
 108                  unsigned minor_version,
 109                  uint32_t flags,
 110                  unsigned *error,
 111                  void *sharedContextPrivate)
 112 {
 113    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 114    struct intel_screen *screen = sPriv->driverPrivate;
 115    struct dd_function_table functions;
 116    unsigned i;
 117
 118    struct brw_context *brw = rzalloc(NULL, struct brw_context);
 119    if (!brw) {
 120       printf("%s: failed to alloc context\n", __FUNCTION__);
 121       *error = __DRI_CTX_ERROR_NO_MEMORY;
 122       return false;
 123    }
 124
 125    /* brwInitVtbl needs to know the chipset generation so that it can set the
 126     * right pointers.
 127     */
 128    brw->intel.gen = screen->gen;
 129
 130    brwInitVtbl( brw );
 131
 132    brwInitDriverFunctions(screen, &functions);
 133
 134    struct intel_context *intel = &brw->intel;
 135    struct gl_context *ctx = &intel->ctx;
 136
 137    if (!intelInitContext( intel, api, major_version, minor_version,
 138                           mesaVis, driContextPriv,
 139                           sharedContextPrivate, &functions,
 140                           error)) {
 141       printf("%s: failed to init intel context\n", __FUNCTION__);
 142       ralloc_free(brw);
 143       return false;
 144    }
 145
 146    brw_init_surface_formats(brw);
 147
 148    /* Initialize swrast, tnl driver tables: */
 149    intelInitSpanFuncs(ctx);
 150
 151    TNLcontext *tnl = TNL_CONTEXT(ctx);
 152    if (tnl)
 153       tnl->Driver.RunPipeline = _tnl_run_pipeline;
 154
 155    ctx->Const.MaxDualSourceDrawBuffers = 1;
 156    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
 157    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
 158    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
 159    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
 160                                      ctx->Const.MaxTextureImageUnits);
 161    ctx->Const.MaxVertexTextureImageUnits = BRW_MAX_TEX_UNIT;
 162    ctx->Const.MaxCombinedTextureImageUnits =
 163       ctx->Const.MaxVertexTextureImageUnits +
 164       ctx->Const.MaxTextureImageUnits;
 165
 166    ctx->Const.MaxTextureLevels = 14; /* 8192 */
 167    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 168            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 169    ctx->Const.Max3DTextureLevels = 9;
 170    ctx->Const.MaxCubeTextureLevels = 12;
 171
 172    if (intel->gen >= 7)
 173       ctx->Const.MaxArrayTextureLayers = 2048;
 174    else
 175       ctx->Const.MaxArrayTextureLayers = 512;
 176
 177    ctx->Const.MaxTextureRectSize = (1<<12);
 178
 179    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 180
 181    /* Hardware only supports a limited number of transform feedback buffers.
 182     * So we need to override the Mesa default (which is based only on software
 183     * limits).
 184     */
 185    ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
 186
 187    /* On Gen6, in the worst case, we use up one binding table entry per
 188     * transform feedback component (see comments above the definition of
 189     * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
 190     * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
 191     * BRW_MAX_SOL_BINDINGS.
 192     *
 193     * In "separate components" mode, we need to divide this value by
 194     * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
 195     * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
 196     */
 197    ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
 198    ctx->Const.MaxTransformFeedbackSeparateComponents =
 199       BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
 200
 201    if (intel->gen == 6) {
 202       ctx->Const.MaxSamples = 4;
 203       ctx->Const.MaxColorTextureSamples = 4;
 204       ctx->Const.MaxDepthTextureSamples = 1;
 205       ctx->Const.MaxIntegerSamples = 4;
 206    }
 207    else if (intel->gen >= 7) {
 208       ctx->Const.MaxSamples = 8;
 209       ctx->Const.MaxColorTextureSamples = 8;
 210       ctx->Const.MaxDepthTextureSamples = 1;
 211       ctx->Const.MaxIntegerSamples = 8;
 212    }
 213
 214    /* if conformance mode is set, swrast can handle any size AA point */
 215    ctx->Const.MaxPointSizeAA = 255.0;
 216
 217    /* We want the GLSL compiler to emit code that uses condition codes */
 218    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 219       ctx->ShaderCompilerOptions[i].MaxIfDepth = intel->gen < 6 ? 16 : UINT_MAX;
 220       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
 221       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
 222       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
 223       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
 224       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
 225
 226       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 227          (i == MESA_SHADER_FRAGMENT);
 228       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 229          (i == MESA_SHADER_FRAGMENT);
 230       ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
 231    }
 232
 233    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 234    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 235    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 236    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 237    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 238    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 239    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 240    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 241    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 242    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 243    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 244    ctx->Const.VertexProgram.MaxEnvParams =
 245       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 246            ctx->Const.VertexProgram.MaxEnvParams);
 247
 248    ctx->Const.FragmentProgram.MaxNativeInstructions = (1 * 1024);
 249    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (1 * 1024);
 250    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (1 * 1024);
 251    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (1 * 1024);
 252    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 253    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 254    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 255    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 256    ctx->Const.FragmentProgram.MaxEnvParams =
 257       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 258            ctx->Const.FragmentProgram.MaxEnvParams);
 259
 260    /* Fragment shaders use real, 32-bit twos-complement integers for all
 261     * integer types.
 262     */
 263    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 264    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 265    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 266    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 267       = ctx->Const.FragmentProgram.LowInt;
 268
 269    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 270       but we're not sure how it's actually done for vertex order,
 271       that affect provoking vertex decision. Always use last vertex
 272       convention for quad primitive which works as expected for now. */
 273    if (intel->gen >= 6)
 274        ctx->Const.QuadsFollowProvokingVertexConvention = false;
 275
 276    ctx->Const.QueryCounterBits.Timestamp = 36;
 277
 278    if (intel->is_g4x || intel->gen >= 5) {
 279       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 280       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 281       brw->has_surface_tile_offset = true;
 282       if (intel->gen < 6)
 283           brw->has_compr4 = true;
 284       brw->has_aa_line_parameters = true;
 285       brw->has_pln = true;
 286   } else {
 287       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 288       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 289    }
 290
 291    /* WM maximum threads is number of EUs times number of threads per EU. */
 292    assert(intel->gen <= 7);
 293
 294    if (intel->is_haswell) {
 295       if (intel->gt == 1) {
 296          brw->max_wm_threads = 102;
 297          brw->max_vs_threads = 70;
 298          brw->urb.size = 128;
 299          brw->urb.max_vs_entries = 640;
 300          brw->urb.max_gs_entries = 256;
 301       } else if (intel->gt == 2) {
 302          brw->max_wm_threads = 204;
 303          brw->max_vs_threads = 280;
 304          brw->urb.size = 256;
 305          brw->urb.max_vs_entries = 1664;
 306          brw->urb.max_gs_entries = 640;
 307       }
 308    } else if (intel->gen == 7) {
 309       if (intel->gt == 1) {
 310          brw->max_wm_threads = 48;
 311          brw->max_vs_threads = 36;
 312          brw->max_gs_threads = 36;
 313          brw->urb.size = 128;
 314          brw->urb.max_vs_entries = 512;
 315          brw->urb.max_gs_entries = 192;
 316       } else if (intel->gt == 2) {
 317          brw->max_wm_threads = 172;
 318          brw->max_vs_threads = 128;
 319          brw->max_gs_threads = 128;
 320          brw->urb.size = 256;
 321          brw->urb.max_vs_entries = 704;
 322          brw->urb.max_gs_entries = 320;
 323       } else {
 324          assert(!"Unknown gen7 device.");
 325       }
 326    } else if (intel->gen == 6) {
 327       if (intel->gt == 2) {
 328          brw->max_wm_threads = 80;
 329          brw->max_vs_threads = 60;
 330          brw->max_gs_threads = 60;
 331          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 332          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 333          brw->urb.max_gs_entries = 256;
 334       } else {
 335          brw->max_wm_threads = 40;
 336          brw->max_vs_threads = 24;
 337          brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
 338          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 339          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 340          brw->urb.max_gs_entries = 256;
 341       }
 342       brw->urb.gen6_gs_previously_active = false;
 343    } else if (intel->gen == 5) {
 344       brw->urb.size = 1024;
 345       brw->max_vs_threads = 72;
 346       brw->max_gs_threads = 32;
 347       brw->max_wm_threads = 12 * 6;
 348    } else if (intel->is_g4x) {
 349       brw->urb.size = 384;
 350       brw->max_vs_threads = 32;
 351       brw->max_gs_threads = 2;
 352       brw->max_wm_threads = 10 * 5;
 353    } else if (intel->gen < 6) {
 354       brw->urb.size = 256;
 355       brw->max_vs_threads = 16;
 356       brw->max_gs_threads = 2;
 357       brw->max_wm_threads = 8 * 4;
 358       brw->has_negative_rhw_bug = true;
 359    }
 360
 361    if (intel->gen <= 7) {
 362       brw->needs_unlit_centroid_workaround = true;
 363    }
 364
 365    brw->prim_restart.in_progress = false;
 366    brw->prim_restart.enable_cut_index = false;
 367    intel->hw_ctx = drm_intel_gem_context_create(intel->bufmgr);
 368
 369    brw_init_state( brw );
 370
 371    brw->curbe.last_buf = calloc(1, 4096);
 372    brw->curbe.next_buf = calloc(1, 4096);
 373
 374    brw->state.dirty.mesa = ~0;
 375    brw->state.dirty.brw = ~0;
 376
 377    brw->emit_state_always = 0;
 378
 379    intel->batch.need_workaround_flush = true;
 380
 381    ctx->VertexProgram._MaintainTnlProgram = true;
 382    ctx->FragmentProgram._MaintainTexEnvProgram = true;
 383
 384    brw_draw_init( brw );
 385
 386    brw->precompile = driQueryOptionb(&intel->optionCache, "shader_precompile");
 387
 388    ctx->Const.NativeIntegers = true;
 389    ctx->Const.UniformBooleanTrue = 1;
 390    ctx->Const.UniformBufferOffsetAlignment = 16;
 391
 392    ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(&intel->optionCache, "force_glsl_extensions_warn");
 393
 394    ctx->Const.DisableGLSLLineContinuations = driQueryOptionb(&intel->optionCache, "disable_glsl_line_continuations");
 395
 396    ctx->Const.ContextFlags = 0;
 397    if ((flags & __DRI_CTX_FLAG_FORWARD_COMPATIBLE) != 0)
 398       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_FORWARD_COMPATIBLE_BIT;
 399
 400    if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
 401       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_DEBUG_BIT;
 402
 403       /* Turn on some extra GL_ARB_debug_output generation. */
 404       intel->perf_debug = true;
 405    }
 406
 407    brw_fs_alloc_reg_sets(brw);
 408
 409    if (INTEL_DEBUG & DEBUG_SHADER_TIME)
 410       brw_init_shader_time(brw);
 411
 412    _mesa_compute_version(ctx);
 413
 414    _mesa_initialize_dispatch_tables(ctx);
 415    _mesa_initialize_vbo_vtxfmt(ctx);
 416
 417    return true;
 418 }
 419