2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **********************************************************************/
30 * Keith Whitwell <keithw@vmware.com>
34 #include "main/api_exec.h"
35 #include "main/context.h"
36 #include "main/fbobject.h"
37 #include "main/extensions.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
40 #include "main/points.h"
41 #include "main/version.h"
42 #include "main/vtxfmt.h"
43 #include "main/texobj.h"
44 #include "main/framebuffer.h"
46 #include "vbo/vbo_context.h"
48 #include "drivers/common/driverfuncs.h"
49 #include "drivers/common/meta.h"
52 #include "brw_context.h"
53 #include "brw_defines.h"
54 #include "brw_blorp.h"
55 #include "brw_compiler.h"
57 #include "brw_state.h"
59 #include "intel_batchbuffer.h"
60 #include "intel_buffer_objects.h"
61 #include "intel_buffers.h"
62 #include "intel_fbo.h"
63 #include "intel_mipmap_tree.h"
64 #include "intel_pixel.h"
65 #include "intel_image.h"
66 #include "intel_tex.h"
67 #include "intel_tex_obj.h"
69 #include "swrast_setup/swrast_setup.h"
71 #include "tnl/t_pipeline.h"
72 #include "util/ralloc.h"
73 #include "util/debug.h"
76 /***************************************
77 * Mesa's Driver Functions
78 ***************************************/
80 const char *const brw_vendor_string
= "Intel Open Source Technology Center";
83 get_bsw_model(const struct intel_screen
*intelScreen
)
85 switch (intelScreen
->eu_total
) {
96 brw_get_renderer_string(const struct intel_screen
*intelScreen
)
99 static char buffer
[128];
102 switch (intelScreen
->deviceID
) {
104 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
105 #include "pci_ids/i965_pci_ids.h"
107 chipset
= "Unknown Intel Chipset";
111 /* Braswell branding is funny, so we have to fix it up here */
112 if (intelScreen
->deviceID
== 0x22B1) {
113 bsw
= strdup(chipset
);
114 char *needle
= strstr(bsw
, "XXX");
116 memcpy(needle
, get_bsw_model(intelScreen
), 3);
121 (void) driGetRendererString(buffer
, chipset
, 0);
126 static const GLubyte
*
127 intel_get_string(struct gl_context
* ctx
, GLenum name
)
129 const struct brw_context
*const brw
= brw_context(ctx
);
133 return (GLubyte
*) brw_vendor_string
;
137 (GLubyte
*) brw_get_renderer_string(brw
->intelScreen
);
145 intel_viewport(struct gl_context
*ctx
)
147 struct brw_context
*brw
= brw_context(ctx
);
148 __DRIcontext
*driContext
= brw
->driContext
;
150 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
151 if (driContext
->driDrawablePriv
)
152 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
153 if (driContext
->driReadablePriv
)
154 dri2InvalidateDrawable(driContext
->driReadablePriv
);
159 intel_update_framebuffer(struct gl_context
*ctx
,
160 struct gl_framebuffer
*fb
)
162 struct brw_context
*brw
= brw_context(ctx
);
164 /* Quantize the derived default number of samples
166 fb
->DefaultGeometry
._NumSamples
=
167 intel_quantize_num_samples(brw
->intelScreen
,
168 fb
->DefaultGeometry
.NumSamples
);
171 /* On Gen9 color buffers may be compressed by the hardware (lossless
172 * compression). There are, however, format restrictions and care needs to be
173 * taken that the sampler engine is capable for re-interpreting a buffer with
174 * format different the buffer was originally written with.
176 * For example, SRGB formats are not compressible and the sampler engine isn't
177 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
178 * color buffer needs to be resolved so that the sampling surface can be
179 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
183 intel_texture_view_requires_resolve(struct brw_context
*brw
,
184 struct intel_texture_object
*intel_tex
)
187 !intel_miptree_is_lossless_compressed(brw
, intel_tex
->mt
))
190 const uint32_t brw_format
= brw_format_for_mesa_format(intel_tex
->_Format
);
192 if (isl_format_supports_lossless_compression(brw
->intelScreen
->devinfo
,
196 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
197 _mesa_get_format_name(intel_tex
->_Format
),
198 _mesa_get_format_name(intel_tex
->mt
->format
));
204 intel_update_state(struct gl_context
* ctx
, GLuint new_state
)
206 struct brw_context
*brw
= brw_context(ctx
);
207 struct intel_texture_object
*tex_obj
;
208 struct intel_renderbuffer
*depth_irb
;
210 if (ctx
->swrast_context
)
211 _swrast_InvalidateState(ctx
, new_state
);
212 _vbo_InvalidateState(ctx
, new_state
);
214 brw
->NewGLState
|= new_state
;
216 _mesa_unlock_context_textures(ctx
);
218 /* Resolve the depth buffer's HiZ buffer. */
219 depth_irb
= intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_DEPTH
);
221 intel_renderbuffer_resolve_hiz(brw
, depth_irb
);
223 /* Resolve depth buffer and render cache of each enabled texture. */
224 int maxEnabledUnit
= ctx
->Texture
._MaxEnabledTexImageUnit
;
225 for (int i
= 0; i
<= maxEnabledUnit
; i
++) {
226 if (!ctx
->Texture
.Unit
[i
]._Current
)
228 tex_obj
= intel_texture_object(ctx
->Texture
.Unit
[i
]._Current
);
229 if (!tex_obj
|| !tex_obj
->mt
)
231 intel_miptree_all_slices_resolve_depth(brw
, tex_obj
->mt
);
232 /* Sampling engine understands lossless compression and resolving
233 * those surfaces should be skipped for performance reasons.
235 const int flags
= intel_texture_view_requires_resolve(brw
, tex_obj
) ?
236 0 : INTEL_MIPTREE_IGNORE_CCS_E
;
237 intel_miptree_resolve_color(brw
, tex_obj
->mt
, flags
);
238 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
240 if (tex_obj
->base
.StencilSampling
||
241 tex_obj
->mt
->format
== MESA_FORMAT_S_UINT8
) {
242 intel_update_r8stencil(brw
, tex_obj
->mt
);
246 /* Resolve color for each active shader image. */
247 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
248 const struct gl_linked_shader
*shader
=
249 ctx
->_Shader
->CurrentProgram
[i
] ?
250 ctx
->_Shader
->CurrentProgram
[i
]->_LinkedShaders
[i
] : NULL
;
252 if (unlikely(shader
&& shader
->NumImages
)) {
253 for (unsigned j
= 0; j
< shader
->NumImages
; j
++) {
254 struct gl_image_unit
*u
= &ctx
->ImageUnits
[shader
->ImageUnits
[j
]];
255 tex_obj
= intel_texture_object(u
->TexObj
);
257 if (tex_obj
&& tex_obj
->mt
) {
258 /* Access to images is implemented using indirect messages
259 * against data port. Normal render target write understands
260 * lossless compression but unfortunately the typed/untyped
261 * read/write interface doesn't. Therefore the compressed
262 * surfaces need to be resolved prior to accessing them.
264 intel_miptree_resolve_color(brw
, tex_obj
->mt
, 0);
265 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
271 /* Resolve color buffers for non-coherent framebufer fetch. */
272 if (!ctx
->Extensions
.MESA_shader_framebuffer_fetch
&&
273 ctx
->FragmentProgram
._Current
&&
274 ctx
->FragmentProgram
._Current
->Base
.OutputsRead
) {
275 const struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
277 for (unsigned i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
278 const struct intel_renderbuffer
*irb
=
279 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
282 intel_miptree_resolve_color(brw
, irb
->mt
,
283 INTEL_MIPTREE_IGNORE_CCS_E
))
284 brw_render_cache_set_check_flush(brw
, irb
->mt
->bo
);
288 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
289 * single-sampled color renderbuffers because the CCS buffer isn't
290 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
291 * enabled because otherwise the surface state will be programmed with the
292 * linear equivalent format anyway.
294 if (brw
->gen
>= 9 && ctx
->Color
.sRGBEnabled
) {
295 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
296 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
297 struct gl_renderbuffer
*rb
= fb
->_ColorDrawBuffers
[i
];
302 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
303 struct intel_mipmap_tree
*mt
= irb
->mt
;
306 mt
->num_samples
> 1 ||
307 _mesa_get_srgb_format_linear(mt
->format
) == mt
->format
)
310 /* Lossless compression is not supported for SRGB formats, it
311 * should be impossible to get here with such surfaces.
313 assert(!intel_miptree_is_lossless_compressed(brw
, mt
));
314 intel_miptree_resolve_color(brw
, mt
, 0);
315 brw_render_cache_set_check_flush(brw
, mt
->bo
);
319 _mesa_lock_context_textures(ctx
);
321 if (new_state
& _NEW_BUFFERS
) {
322 intel_update_framebuffer(ctx
, ctx
->DrawBuffer
);
323 if (ctx
->DrawBuffer
!= ctx
->ReadBuffer
)
324 intel_update_framebuffer(ctx
, ctx
->ReadBuffer
);
328 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
331 intel_flush_front(struct gl_context
*ctx
)
333 struct brw_context
*brw
= brw_context(ctx
);
334 __DRIcontext
*driContext
= brw
->driContext
;
335 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
336 __DRIscreen
*const screen
= brw
->intelScreen
->driScrnPriv
;
338 if (brw
->front_buffer_dirty
&& _mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
339 if (flushFront(screen
) && driDrawable
&&
340 driDrawable
->loaderPrivate
) {
342 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
344 * This potentially resolves both front and back buffer. It
345 * is unnecessary to resolve the back, but harms nothing except
346 * performance. And no one cares about front-buffer render
349 intel_resolve_for_dri2_flush(brw
, driDrawable
);
350 intel_batchbuffer_flush(brw
);
352 flushFront(screen
)(driDrawable
, driDrawable
->loaderPrivate
);
354 /* We set the dirty bit in intel_prepare_render() if we're
355 * front buffer rendering once we get there.
357 brw
->front_buffer_dirty
= false;
363 intel_glFlush(struct gl_context
*ctx
)
365 struct brw_context
*brw
= brw_context(ctx
);
367 intel_batchbuffer_flush(brw
);
368 intel_flush_front(ctx
);
370 brw
->need_flush_throttle
= true;
374 intel_finish(struct gl_context
* ctx
)
376 struct brw_context
*brw
= brw_context(ctx
);
380 if (brw
->batch
.last_bo
)
381 drm_intel_bo_wait_rendering(brw
->batch
.last_bo
);
385 brw_init_driver_functions(struct brw_context
*brw
,
386 struct dd_function_table
*functions
)
388 _mesa_init_driver_functions(functions
);
390 /* GLX uses DRI2 invalidate events to handle window resizing.
391 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
392 * which doesn't provide a mechanism for snooping the event queues.
394 * So EGL still relies on viewport hacks to handle window resizing.
395 * This should go away with DRI3000.
397 if (!brw
->driContext
->driScreenPriv
->dri2
.useInvalidate
)
398 functions
->Viewport
= intel_viewport
;
400 functions
->Flush
= intel_glFlush
;
401 functions
->Finish
= intel_finish
;
402 functions
->GetString
= intel_get_string
;
403 functions
->UpdateState
= intel_update_state
;
405 intelInitTextureFuncs(functions
);
406 intelInitTextureImageFuncs(functions
);
407 intelInitTextureSubImageFuncs(functions
);
408 intelInitTextureCopyImageFuncs(functions
);
409 intelInitCopyImageFuncs(functions
);
410 intelInitClearFuncs(functions
);
411 intelInitBufferFuncs(functions
);
412 intelInitPixelFuncs(functions
);
413 intelInitBufferObjectFuncs(functions
);
414 intel_init_syncobj_functions(functions
);
415 brw_init_object_purgeable_functions(functions
);
417 brwInitFragProgFuncs( functions
);
418 brw_init_common_queryobj_functions(functions
);
419 if (brw
->gen
>= 8 || brw
->is_haswell
)
420 hsw_init_queryobj_functions(functions
);
421 else if (brw
->gen
>= 6)
422 gen6_init_queryobj_functions(functions
);
424 gen4_init_queryobj_functions(functions
);
425 brw_init_compute_functions(functions
);
427 brw_init_conditional_render_functions(functions
);
429 functions
->QueryInternalFormat
= brw_query_internal_format
;
431 functions
->NewTransformFeedback
= brw_new_transform_feedback
;
432 functions
->DeleteTransformFeedback
= brw_delete_transform_feedback
;
433 if (brw
->intelScreen
->has_mi_math_and_lrr
) {
434 functions
->BeginTransformFeedback
= hsw_begin_transform_feedback
;
435 functions
->EndTransformFeedback
= hsw_end_transform_feedback
;
436 functions
->PauseTransformFeedback
= hsw_pause_transform_feedback
;
437 functions
->ResumeTransformFeedback
= hsw_resume_transform_feedback
;
438 } else if (brw
->gen
>= 7) {
439 functions
->BeginTransformFeedback
= gen7_begin_transform_feedback
;
440 functions
->EndTransformFeedback
= gen7_end_transform_feedback
;
441 functions
->PauseTransformFeedback
= gen7_pause_transform_feedback
;
442 functions
->ResumeTransformFeedback
= gen7_resume_transform_feedback
;
443 functions
->GetTransformFeedbackVertexCount
=
444 brw_get_transform_feedback_vertex_count
;
446 functions
->BeginTransformFeedback
= brw_begin_transform_feedback
;
447 functions
->EndTransformFeedback
= brw_end_transform_feedback
;
451 functions
->GetSamplePosition
= gen6_get_sample_position
;
455 brw_initialize_context_constants(struct brw_context
*brw
)
457 struct gl_context
*ctx
= &brw
->ctx
;
458 const struct brw_compiler
*compiler
= brw
->intelScreen
->compiler
;
460 const bool stage_exists
[MESA_SHADER_STAGES
] = {
461 [MESA_SHADER_VERTEX
] = true,
462 [MESA_SHADER_TESS_CTRL
] = brw
->gen
>= 7,
463 [MESA_SHADER_TESS_EVAL
] = brw
->gen
>= 7,
464 [MESA_SHADER_GEOMETRY
] = brw
->gen
>= 6,
465 [MESA_SHADER_FRAGMENT
] = true,
466 [MESA_SHADER_COMPUTE
] =
467 (ctx
->API
== API_OPENGL_CORE
&&
468 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 1024) ||
469 (ctx
->API
== API_OPENGLES2
&&
470 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 128) ||
471 _mesa_extension_override_enables
.ARB_compute_shader
,
474 unsigned num_stages
= 0;
475 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
480 unsigned max_samplers
=
481 brw
->gen
>= 8 || brw
->is_haswell
? BRW_MAX_TEX_UNIT
: 16;
483 ctx
->Const
.MaxDualSourceDrawBuffers
= 1;
484 ctx
->Const
.MaxDrawBuffers
= BRW_MAX_DRAW_BUFFERS
;
485 ctx
->Const
.MaxCombinedShaderOutputResources
=
486 MAX_IMAGE_UNITS
+ BRW_MAX_DRAW_BUFFERS
;
488 ctx
->Const
.QueryCounterBits
.Timestamp
= 36;
490 ctx
->Const
.MaxTextureCoordUnits
= 8; /* Mesa limit */
491 ctx
->Const
.MaxImageUnits
= MAX_IMAGE_UNITS
;
492 ctx
->Const
.MaxRenderbufferSize
= 8192;
493 ctx
->Const
.MaxTextureLevels
= MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS
);
495 /* On Sandy Bridge and prior, the "Render Target View Extent" field of
496 * RENDER_SURFACE_STATE is only 9 bits so the largest 3-D texture we can do
497 * a layered render into has a depth of 512. On Iron Lake and earlier, we
498 * don't support layered rendering and we use manual offsetting to render
499 * into the different layers so this doesn't matter. On Sandy Bridge,
500 * however, we do support layered rendering so this is a problem.
502 ctx
->Const
.Max3DTextureLevels
= brw
->gen
== 6 ? 10 /* 512 */ : 12; /* 2048 */
504 ctx
->Const
.MaxCubeTextureLevels
= 14; /* 8192 */
505 ctx
->Const
.MaxArrayTextureLayers
= brw
->gen
>= 7 ? 2048 : 512;
506 ctx
->Const
.MaxTextureMbytes
= 1536;
507 ctx
->Const
.MaxTextureRectSize
= 1 << 12;
508 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
509 ctx
->Const
.StripTextureBorder
= true;
511 ctx
->Const
.MaxProgramTextureGatherComponents
= 4;
512 else if (brw
->gen
== 6)
513 ctx
->Const
.MaxProgramTextureGatherComponents
= 1;
515 ctx
->Const
.MaxUniformBlockSize
= 65536;
517 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
518 struct gl_program_constants
*prog
= &ctx
->Const
.Program
[i
];
520 if (!stage_exists
[i
])
523 prog
->MaxTextureImageUnits
= max_samplers
;
525 prog
->MaxUniformBlocks
= BRW_MAX_UBO
;
526 prog
->MaxCombinedUniformComponents
=
527 prog
->MaxUniformComponents
+
528 ctx
->Const
.MaxUniformBlockSize
/ 4 * prog
->MaxUniformBlocks
;
530 prog
->MaxAtomicCounters
= MAX_ATOMIC_COUNTERS
;
531 prog
->MaxAtomicBuffers
= BRW_MAX_ABO
;
532 prog
->MaxImageUniforms
= compiler
->scalar_stage
[i
] ? BRW_MAX_IMAGES
: 0;
533 prog
->MaxShaderStorageBlocks
= BRW_MAX_SSBO
;
536 ctx
->Const
.MaxTextureUnits
=
537 MIN2(ctx
->Const
.MaxTextureCoordUnits
,
538 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
);
540 ctx
->Const
.MaxUniformBufferBindings
= num_stages
* BRW_MAX_UBO
;
541 ctx
->Const
.MaxCombinedUniformBlocks
= num_stages
* BRW_MAX_UBO
;
542 ctx
->Const
.MaxCombinedAtomicBuffers
= num_stages
* BRW_MAX_ABO
;
543 ctx
->Const
.MaxCombinedShaderStorageBlocks
= num_stages
* BRW_MAX_SSBO
;
544 ctx
->Const
.MaxShaderStorageBufferBindings
= num_stages
* BRW_MAX_SSBO
;
545 ctx
->Const
.MaxCombinedTextureImageUnits
= num_stages
* max_samplers
;
546 ctx
->Const
.MaxCombinedImageUniforms
= num_stages
* BRW_MAX_IMAGES
;
549 /* Hardware only supports a limited number of transform feedback buffers.
550 * So we need to override the Mesa default (which is based only on software
553 ctx
->Const
.MaxTransformFeedbackBuffers
= BRW_MAX_SOL_BUFFERS
;
555 /* On Gen6, in the worst case, we use up one binding table entry per
556 * transform feedback component (see comments above the definition of
557 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
558 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
559 * BRW_MAX_SOL_BINDINGS.
561 * In "separate components" mode, we need to divide this value by
562 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
563 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
565 ctx
->Const
.MaxTransformFeedbackInterleavedComponents
= BRW_MAX_SOL_BINDINGS
;
566 ctx
->Const
.MaxTransformFeedbackSeparateComponents
=
567 BRW_MAX_SOL_BINDINGS
/ BRW_MAX_SOL_BUFFERS
;
569 ctx
->Const
.AlwaysUseGetTransformFeedbackVertexCount
=
570 !brw
->intelScreen
->has_mi_math_and_lrr
;
573 const int *msaa_modes
= intel_supported_msaa_modes(brw
->intelScreen
);
574 const int clamp_max_samples
=
575 driQueryOptioni(&brw
->optionCache
, "clamp_max_samples");
577 if (clamp_max_samples
< 0) {
578 max_samples
= msaa_modes
[0];
580 /* Select the largest supported MSAA mode that does not exceed
584 for (int i
= 0; msaa_modes
[i
] != 0; ++i
) {
585 if (msaa_modes
[i
] <= clamp_max_samples
) {
586 max_samples
= msaa_modes
[i
];
592 ctx
->Const
.MaxSamples
= max_samples
;
593 ctx
->Const
.MaxColorTextureSamples
= max_samples
;
594 ctx
->Const
.MaxDepthTextureSamples
= max_samples
;
595 ctx
->Const
.MaxIntegerSamples
= max_samples
;
596 ctx
->Const
.MaxImageSamples
= 0;
598 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
599 * to map indices of rectangular grid to sample numbers within a pixel.
600 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
601 * extension implementation. For more details see the comment above
602 * gen6_set_sample_maps() definition.
604 gen6_set_sample_maps(ctx
);
606 ctx
->Const
.MinLineWidth
= 1.0;
607 ctx
->Const
.MinLineWidthAA
= 1.0;
609 ctx
->Const
.MaxLineWidth
= 7.375;
610 ctx
->Const
.MaxLineWidthAA
= 7.375;
611 ctx
->Const
.LineWidthGranularity
= 0.125;
613 ctx
->Const
.MaxLineWidth
= 7.0;
614 ctx
->Const
.MaxLineWidthAA
= 7.0;
615 ctx
->Const
.LineWidthGranularity
= 0.5;
618 /* For non-antialiased lines, we have to round the line width to the
619 * nearest whole number. Make sure that we don't advertise a line
620 * width that, when rounded, will be beyond the actual hardware
623 assert(roundf(ctx
->Const
.MaxLineWidth
) <= ctx
->Const
.MaxLineWidth
);
625 ctx
->Const
.MinPointSize
= 1.0;
626 ctx
->Const
.MinPointSizeAA
= 1.0;
627 ctx
->Const
.MaxPointSize
= 255.0;
628 ctx
->Const
.MaxPointSizeAA
= 255.0;
629 ctx
->Const
.PointSizeGranularity
= 1.0;
631 if (brw
->gen
>= 5 || brw
->is_g4x
)
632 ctx
->Const
.MaxClipPlanes
= 8;
634 ctx
->Const
.LowerTessLevel
= true;
635 ctx
->Const
.LowerTCSPatchVerticesIn
= brw
->gen
>= 8;
636 ctx
->Const
.LowerTESPatchVerticesIn
= true;
637 ctx
->Const
.PrimitiveRestartForPatches
= true;
639 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeInstructions
= 16 * 1024;
640 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxAluInstructions
= 0;
641 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexInstructions
= 0;
642 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexIndirections
= 0;
643 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAluInstructions
= 0;
644 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexInstructions
= 0;
645 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexIndirections
= 0;
646 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAttribs
= 16;
647 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTemps
= 256;
648 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAddressRegs
= 1;
649 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
= 1024;
650 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
=
651 MIN2(ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
,
652 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
);
654 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeInstructions
= 1024;
655 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAluInstructions
= 1024;
656 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexInstructions
= 1024;
657 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexIndirections
= 1024;
658 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAttribs
= 12;
659 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTemps
= 256;
660 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAddressRegs
= 0;
661 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
= 1024;
662 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
=
663 MIN2(ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
,
664 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
);
666 /* Fragment shaders use real, 32-bit twos-complement integers for all
669 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMin
= 31;
670 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMax
= 30;
671 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.Precision
= 0;
672 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
673 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
675 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMin
= 31;
676 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMax
= 30;
677 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.Precision
= 0;
678 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
679 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
681 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
682 * but we're not sure how it's actually done for vertex order,
683 * that affect provoking vertex decision. Always use last vertex
684 * convention for quad primitive which works as expected for now.
687 ctx
->Const
.QuadsFollowProvokingVertexConvention
= false;
689 ctx
->Const
.NativeIntegers
= true;
690 ctx
->Const
.VertexID_is_zero_based
= true;
692 /* Regarding the CMP instruction, the Ivybridge PRM says:
694 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
695 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
696 * 0xFFFFFFFF) is assigned to dst."
698 * but PRMs for earlier generations say
700 * "In dword format, one GRF may store up to 8 results. When the register
701 * is used later as a vector of Booleans, as only LSB at each channel
702 * contains meaning [sic] data, software should make sure all higher bits
703 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
705 * We select the representation of a true boolean uniform to be ~0, and fix
706 * the results of Gen <= 5 CMP instruction's with -(result & 1).
708 ctx
->Const
.UniformBooleanTrue
= ~0;
710 /* From the gen4 PRM, volume 4 page 127:
712 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
713 * the base address of the first element of the surface, computed in
714 * software by adding the surface base address to the byte offset of
715 * the element in the buffer."
717 * However, unaligned accesses are slower, so enforce buffer alignment.
719 ctx
->Const
.UniformBufferOffsetAlignment
= 16;
721 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
722 * that we can safely have the CPU and GPU writing the same SSBO on
723 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
724 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
725 * be updating disjoint regions of the buffer simultaneously and that will
726 * break if the regions overlap the same cacheline.
728 ctx
->Const
.ShaderStorageBufferOffsetAlignment
= 64;
729 ctx
->Const
.TextureBufferOffsetAlignment
= 16;
730 ctx
->Const
.MaxTextureBufferSize
= 128 * 1024 * 1024;
733 ctx
->Const
.MaxVarying
= 32;
734 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxOutputComponents
= 128;
735 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxInputComponents
= 64;
736 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxOutputComponents
= 128;
737 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxInputComponents
= 128;
738 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxInputComponents
= 128;
739 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxOutputComponents
= 128;
740 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxInputComponents
= 128;
741 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxOutputComponents
= 128;
744 /* We want the GLSL compiler to emit code that uses condition codes */
745 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
746 ctx
->Const
.ShaderCompilerOptions
[i
] =
747 brw
->intelScreen
->compiler
->glsl_compiler_options
[i
];
751 ctx
->Const
.MaxViewportWidth
= 32768;
752 ctx
->Const
.MaxViewportHeight
= 32768;
755 /* ARB_viewport_array */
756 if (brw
->gen
>= 6 && ctx
->API
== API_OPENGL_CORE
) {
757 ctx
->Const
.MaxViewports
= GEN6_NUM_VIEWPORTS
;
758 ctx
->Const
.ViewportSubpixelBits
= 0;
760 /* Cast to float before negating because MaxViewportWidth is unsigned.
762 ctx
->Const
.ViewportBounds
.Min
= -(float)ctx
->Const
.MaxViewportWidth
;
763 ctx
->Const
.ViewportBounds
.Max
= ctx
->Const
.MaxViewportWidth
;
766 /* ARB_gpu_shader5 */
768 ctx
->Const
.MaxVertexStreams
= MIN2(4, MAX_VERTEX_STREAMS
);
770 /* ARB_framebuffer_no_attachments */
771 ctx
->Const
.MaxFramebufferWidth
= 16384;
772 ctx
->Const
.MaxFramebufferHeight
= 16384;
773 ctx
->Const
.MaxFramebufferLayers
= ctx
->Const
.MaxArrayTextureLayers
;
774 ctx
->Const
.MaxFramebufferSamples
= max_samples
;
776 /* OES_primitive_bounding_box */
777 ctx
->Const
.NoPrimitiveBoundingBoxOutput
= true;
781 brw_initialize_cs_context_constants(struct brw_context
*brw
)
783 struct gl_context
*ctx
= &brw
->ctx
;
784 const struct intel_screen
*screen
= brw
->intelScreen
;
785 const struct brw_device_info
*devinfo
= screen
->devinfo
;
787 /* FINISHME: Do this for all platforms that the kernel supports */
788 if (brw
->is_cherryview
&&
789 screen
->subslice_total
> 0 && screen
->eu_total
> 0) {
790 /* Logical CS threads = EUs per subslice * 7 threads per EU */
791 brw
->max_cs_threads
= screen
->eu_total
/ screen
->subslice_total
* 7;
793 /* Fuse configurations may give more threads than expected, never less. */
794 if (brw
->max_cs_threads
< devinfo
->max_cs_threads
)
795 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
797 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
800 /* Maximum number of scalar compute shader invocations that can be run in
801 * parallel in the same subslice assuming SIMD32 dispatch.
803 * We don't advertise more than 64 threads, because we are limited to 64 by
804 * our usage of thread_width_max in the gpgpu walker command. This only
805 * currently impacts Haswell, which otherwise might be able to advertise 70
806 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
807 * required the number of invocation needed for ARB_compute_shader.
809 const unsigned max_threads
= MIN2(64, brw
->max_cs_threads
);
810 const uint32_t max_invocations
= 32 * max_threads
;
811 ctx
->Const
.MaxComputeWorkGroupSize
[0] = max_invocations
;
812 ctx
->Const
.MaxComputeWorkGroupSize
[1] = max_invocations
;
813 ctx
->Const
.MaxComputeWorkGroupSize
[2] = max_invocations
;
814 ctx
->Const
.MaxComputeWorkGroupInvocations
= max_invocations
;
815 ctx
->Const
.MaxComputeSharedMemorySize
= 64 * 1024;
819 * Process driconf (drirc) options, setting appropriate context flags.
821 * intelInitExtensions still pokes at optionCache directly, in order to
822 * avoid advertising various extensions. No flags are set, so it makes
823 * sense to continue doing that there.
826 brw_process_driconf_options(struct brw_context
*brw
)
828 struct gl_context
*ctx
= &brw
->ctx
;
830 driOptionCache
*options
= &brw
->optionCache
;
831 driParseConfigFiles(options
, &brw
->intelScreen
->optionCache
,
832 brw
->driContext
->driScreenPriv
->myNum
, "i965");
834 int bo_reuse_mode
= driQueryOptioni(options
, "bo_reuse");
835 switch (bo_reuse_mode
) {
836 case DRI_CONF_BO_REUSE_DISABLED
:
838 case DRI_CONF_BO_REUSE_ALL
:
839 intel_bufmgr_gem_enable_reuse(brw
->bufmgr
);
843 if (!driQueryOptionb(options
, "hiz")) {
844 brw
->has_hiz
= false;
845 /* On gen6, you can only do separate stencil with HIZ. */
847 brw
->has_separate_stencil
= false;
850 if (driQueryOptionb(options
, "always_flush_batch")) {
851 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
852 brw
->always_flush_batch
= true;
855 if (driQueryOptionb(options
, "always_flush_cache")) {
856 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
857 brw
->always_flush_cache
= true;
860 if (driQueryOptionb(options
, "disable_throttling")) {
861 fprintf(stderr
, "disabling flush throttling\n");
862 brw
->disable_throttling
= true;
865 brw
->precompile
= driQueryOptionb(&brw
->optionCache
, "shader_precompile");
867 if (driQueryOptionb(&brw
->optionCache
, "precise_trig"))
868 brw
->intelScreen
->compiler
->precise_trig
= true;
870 ctx
->Const
.ForceGLSLExtensionsWarn
=
871 driQueryOptionb(options
, "force_glsl_extensions_warn");
873 ctx
->Const
.DisableGLSLLineContinuations
=
874 driQueryOptionb(options
, "disable_glsl_line_continuations");
876 ctx
->Const
.AllowGLSLExtensionDirectiveMidShader
=
877 driQueryOptionb(options
, "allow_glsl_extension_directive_midshader");
879 ctx
->Const
.GLSLZeroInit
= driQueryOptionb(options
, "glsl_zero_init");
881 brw
->dual_color_blend_by_location
=
882 driQueryOptionb(options
, "dual_color_blend_by_location");
886 brwCreateContext(gl_api api
,
887 const struct gl_config
*mesaVis
,
888 __DRIcontext
*driContextPriv
,
889 unsigned major_version
,
890 unsigned minor_version
,
893 unsigned *dri_ctx_error
,
894 void *sharedContextPrivate
)
896 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
897 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
898 struct intel_screen
*screen
= sPriv
->driverPrivate
;
899 const struct brw_device_info
*devinfo
= screen
->devinfo
;
900 struct dd_function_table functions
;
902 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
903 * provides us with context reset notifications.
905 uint32_t allowed_flags
= __DRI_CTX_FLAG_DEBUG
906 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
;
908 if (screen
->has_context_reset_notification
)
909 allowed_flags
|= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
;
911 if (flags
& ~allowed_flags
) {
912 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
916 struct brw_context
*brw
= rzalloc(NULL
, struct brw_context
);
918 fprintf(stderr
, "%s: failed to alloc context\n", __func__
);
919 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
923 driContextPriv
->driverPrivate
= brw
;
924 brw
->driContext
= driContextPriv
;
925 brw
->intelScreen
= screen
;
926 brw
->bufmgr
= screen
->bufmgr
;
928 brw
->gen
= devinfo
->gen
;
929 brw
->gt
= devinfo
->gt
;
930 brw
->is_g4x
= devinfo
->is_g4x
;
931 brw
->is_baytrail
= devinfo
->is_baytrail
;
932 brw
->is_haswell
= devinfo
->is_haswell
;
933 brw
->is_cherryview
= devinfo
->is_cherryview
;
934 brw
->is_broxton
= devinfo
->is_broxton
;
935 brw
->has_llc
= devinfo
->has_llc
;
936 brw
->has_hiz
= devinfo
->has_hiz_and_separate_stencil
;
937 brw
->has_separate_stencil
= devinfo
->has_hiz_and_separate_stencil
;
938 brw
->has_pln
= devinfo
->has_pln
;
939 brw
->has_compr4
= devinfo
->has_compr4
;
940 brw
->has_surface_tile_offset
= devinfo
->has_surface_tile_offset
;
941 brw
->has_negative_rhw_bug
= devinfo
->has_negative_rhw_bug
;
942 brw
->needs_unlit_centroid_workaround
=
943 devinfo
->needs_unlit_centroid_workaround
;
945 brw
->must_use_separate_stencil
= devinfo
->must_use_separate_stencil
;
946 brw
->has_swizzling
= screen
->hw_has_swizzling
;
948 isl_device_init(&brw
->isl_dev
, devinfo
, screen
->hw_has_swizzling
);
950 brw
->vs
.base
.stage
= MESA_SHADER_VERTEX
;
951 brw
->tcs
.base
.stage
= MESA_SHADER_TESS_CTRL
;
952 brw
->tes
.base
.stage
= MESA_SHADER_TESS_EVAL
;
953 brw
->gs
.base
.stage
= MESA_SHADER_GEOMETRY
;
954 brw
->wm
.base
.stage
= MESA_SHADER_FRAGMENT
;
956 gen8_init_vtable_surface_functions(brw
);
957 brw
->vtbl
.emit_depth_stencil_hiz
= gen8_emit_depth_stencil_hiz
;
958 } else if (brw
->gen
>= 7) {
959 gen7_init_vtable_surface_functions(brw
);
960 brw
->vtbl
.emit_depth_stencil_hiz
= gen7_emit_depth_stencil_hiz
;
961 } else if (brw
->gen
>= 6) {
962 gen6_init_vtable_surface_functions(brw
);
963 brw
->vtbl
.emit_depth_stencil_hiz
= gen6_emit_depth_stencil_hiz
;
965 gen4_init_vtable_surface_functions(brw
);
966 brw
->vtbl
.emit_depth_stencil_hiz
= brw_emit_depth_stencil_hiz
;
969 brw_init_driver_functions(brw
, &functions
);
972 functions
.GetGraphicsResetStatus
= brw_get_graphics_reset_status
;
974 struct gl_context
*ctx
= &brw
->ctx
;
976 if (!_mesa_initialize_context(ctx
, api
, mesaVis
, shareCtx
, &functions
)) {
977 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
978 fprintf(stderr
, "%s: failed to init mesa context\n", __func__
);
979 intelDestroyContext(driContextPriv
);
983 driContextSetFlags(ctx
, flags
);
985 /* Initialize the software rasterizer and helper modules.
987 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
988 * software fallbacks (which we have to support on legacy GL to do weird
989 * glDrawPixels(), glBitmap(), and other functions).
991 if (api
!= API_OPENGL_CORE
&& api
!= API_OPENGLES2
) {
992 _swrast_CreateContext(ctx
);
995 _vbo_CreateContext(ctx
);
996 if (ctx
->swrast_context
) {
997 _tnl_CreateContext(ctx
);
998 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= _tnl_run_pipeline
;
999 _swsetup_CreateContext(ctx
);
1001 /* Configure swrast to match hardware characteristics: */
1002 _swrast_allow_pixel_fog(ctx
, false);
1003 _swrast_allow_vertex_fog(ctx
, true);
1006 _mesa_meta_init(ctx
);
1008 brw_process_driconf_options(brw
);
1010 if (INTEL_DEBUG
& DEBUG_PERF
)
1011 brw
->perf_debug
= true;
1013 brw_initialize_cs_context_constants(brw
);
1014 brw_initialize_context_constants(brw
);
1016 ctx
->Const
.ResetStrategy
= notify_reset
1017 ? GL_LOSE_CONTEXT_ON_RESET_ARB
: GL_NO_RESET_NOTIFICATION_ARB
;
1019 /* Reinitialize the context point state. It depends on ctx->Const values. */
1020 _mesa_init_point(ctx
);
1022 intel_fbo_init(brw
);
1024 intel_batchbuffer_init(brw
);
1026 if (brw
->gen
>= 6) {
1027 /* Create a new hardware context. Using a hardware context means that
1028 * our GPU state will be saved/restored on context switch, allowing us
1029 * to assume that the GPU is in the same state we left it in.
1031 * This is required for transform feedback buffer offsets, query objects,
1032 * and also allows us to reduce how much state we have to emit.
1034 brw
->hw_ctx
= drm_intel_gem_context_create(brw
->bufmgr
);
1037 fprintf(stderr
, "Gen6+ requires Kernel 3.6 or later.\n");
1038 intelDestroyContext(driContextPriv
);
1043 if (brw_init_pipe_control(brw
, devinfo
)) {
1044 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1045 intelDestroyContext(driContextPriv
);
1049 brw_init_state(brw
);
1051 intelInitExtensions(ctx
);
1053 brw_init_surface_formats(brw
);
1056 brw_blorp_init(brw
);
1058 brw
->max_vs_threads
= devinfo
->max_vs_threads
;
1059 brw
->max_hs_threads
= devinfo
->max_hs_threads
;
1060 brw
->max_ds_threads
= devinfo
->max_ds_threads
;
1061 brw
->max_gs_threads
= devinfo
->max_gs_threads
;
1062 brw
->max_wm_threads
= devinfo
->max_wm_threads
;
1063 brw
->urb
.size
= devinfo
->urb
.size
;
1064 brw
->urb
.min_vs_entries
= devinfo
->urb
.min_vs_entries
;
1065 brw
->urb
.max_vs_entries
= devinfo
->urb
.max_vs_entries
;
1066 brw
->urb
.max_hs_entries
= devinfo
->urb
.max_hs_entries
;
1067 brw
->urb
.max_ds_entries
= devinfo
->urb
.max_ds_entries
;
1068 brw
->urb
.max_gs_entries
= devinfo
->urb
.max_gs_entries
;
1071 brw
->urb
.gs_present
= false;
1073 brw
->prim_restart
.in_progress
= false;
1074 brw
->prim_restart
.enable_cut_index
= false;
1075 brw
->gs
.enabled
= false;
1076 brw
->sf
.viewport_transform_enable
= true;
1078 brw
->predicate
.state
= BRW_PREDICATE_STATE_RENDER
;
1080 brw
->max_gtt_map_object_size
= screen
->max_gtt_map_object_size
;
1082 brw
->use_resource_streamer
= screen
->has_resource_streamer
&&
1083 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1084 env_var_as_boolean("INTEL_USE_GATHER", false));
1086 ctx
->VertexProgram
._MaintainTnlProgram
= true;
1087 ctx
->FragmentProgram
._MaintainTexEnvProgram
= true;
1089 brw_draw_init( brw
);
1091 if ((flags
& __DRI_CTX_FLAG_DEBUG
) != 0) {
1092 /* Turn on some extra GL_ARB_debug_output generation. */
1093 brw
->perf_debug
= true;
1096 if ((flags
& __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
) != 0)
1097 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB
;
1099 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
1100 brw_init_shader_time(brw
);
1102 _mesa_compute_version(ctx
);
1104 _mesa_initialize_dispatch_tables(ctx
);
1105 _mesa_initialize_vbo_vtxfmt(ctx
);
1107 if (ctx
->Extensions
.AMD_performance_monitor
) {
1108 brw_init_performance_monitors(brw
);
1111 vbo_use_buffer_objects(ctx
);
1112 vbo_always_unmap_buffers(ctx
);
1118 intelDestroyContext(__DRIcontext
* driContextPriv
)
1120 struct brw_context
*brw
=
1121 (struct brw_context
*) driContextPriv
->driverPrivate
;
1122 struct gl_context
*ctx
= &brw
->ctx
;
1124 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1125 if (INTEL_DEBUG
& DEBUG_AUB
) {
1126 intel_batchbuffer_flush(brw
);
1127 aub_dump_bmp(&brw
->ctx
);
1130 _mesa_meta_free(&brw
->ctx
);
1132 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
1133 /* Force a report. */
1134 brw
->shader_time
.report_time
= 0;
1136 brw_collect_and_report_shader_time(brw
);
1137 brw_destroy_shader_time(brw
);
1141 blorp_finish(&brw
->blorp
);
1143 brw_destroy_state(brw
);
1144 brw_draw_destroy(brw
);
1146 drm_intel_bo_unreference(brw
->curbe
.curbe_bo
);
1147 if (brw
->vs
.base
.scratch_bo
)
1148 drm_intel_bo_unreference(brw
->vs
.base
.scratch_bo
);
1149 if (brw
->tcs
.base
.scratch_bo
)
1150 drm_intel_bo_unreference(brw
->tcs
.base
.scratch_bo
);
1151 if (brw
->tes
.base
.scratch_bo
)
1152 drm_intel_bo_unreference(brw
->tes
.base
.scratch_bo
);
1153 if (brw
->gs
.base
.scratch_bo
)
1154 drm_intel_bo_unreference(brw
->gs
.base
.scratch_bo
);
1155 if (brw
->wm
.base
.scratch_bo
)
1156 drm_intel_bo_unreference(brw
->wm
.base
.scratch_bo
);
1158 gen7_reset_hw_bt_pool_offsets(brw
);
1159 drm_intel_bo_unreference(brw
->hw_bt_pool
.bo
);
1160 brw
->hw_bt_pool
.bo
= NULL
;
1162 drm_intel_gem_context_destroy(brw
->hw_ctx
);
1164 if (ctx
->swrast_context
) {
1165 _swsetup_DestroyContext(&brw
->ctx
);
1166 _tnl_DestroyContext(&brw
->ctx
);
1168 _vbo_DestroyContext(&brw
->ctx
);
1170 if (ctx
->swrast_context
)
1171 _swrast_DestroyContext(&brw
->ctx
);
1173 brw_fini_pipe_control(brw
);
1174 intel_batchbuffer_free(brw
);
1176 drm_intel_bo_unreference(brw
->throttle_batch
[1]);
1177 drm_intel_bo_unreference(brw
->throttle_batch
[0]);
1178 brw
->throttle_batch
[1] = NULL
;
1179 brw
->throttle_batch
[0] = NULL
;
1181 driDestroyOptionCache(&brw
->optionCache
);
1183 /* free the Mesa context */
1184 _mesa_free_context_data(&brw
->ctx
);
1187 driContextPriv
->driverPrivate
= NULL
;
1191 intelUnbindContext(__DRIcontext
* driContextPriv
)
1193 /* Unset current context and dispath table */
1194 _mesa_make_current(NULL
, NULL
, NULL
);
1200 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1201 * on window system framebuffers.
1203 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1204 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1205 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1206 * for a visual where you're guaranteed to be capable, but it turns out that
1207 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1208 * incapable ones, because there's no difference between the two in resources
1209 * used. Applications thus get built that accidentally rely on the default
1210 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1213 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1214 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1215 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1216 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1217 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1218 * and get no sRGB encode (assuming that both kinds of visual are available).
1219 * Thus our choice to support sRGB by default on our visuals for desktop would
1220 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1222 * Unfortunately, renderbuffer setup happens before a context is created. So
1223 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1224 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1225 * yet), we go turn that back off before anyone finds out.
1228 intel_gles3_srgb_workaround(struct brw_context
*brw
,
1229 struct gl_framebuffer
*fb
)
1231 struct gl_context
*ctx
= &brw
->ctx
;
1233 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
1236 /* Some day when we support the sRGB capable bit on visuals available for
1237 * GLES, we'll need to respect that and not disable things here.
1239 fb
->Visual
.sRGBCapable
= false;
1240 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
1241 struct gl_renderbuffer
*rb
= fb
->Attachment
[i
].Renderbuffer
;
1243 rb
->Format
= _mesa_get_srgb_format_linear(rb
->Format
);
1248 intelMakeCurrent(__DRIcontext
* driContextPriv
,
1249 __DRIdrawable
* driDrawPriv
,
1250 __DRIdrawable
* driReadPriv
)
1252 struct brw_context
*brw
;
1253 GET_CURRENT_CONTEXT(curCtx
);
1256 brw
= (struct brw_context
*) driContextPriv
->driverPrivate
;
1260 /* According to the glXMakeCurrent() man page: "Pending commands to
1261 * the previous context, if any, are flushed before it is released."
1262 * But only flush if we're actually changing contexts.
1264 if (brw_context(curCtx
) && brw_context(curCtx
) != brw
) {
1265 _mesa_flush(curCtx
);
1268 if (driContextPriv
) {
1269 struct gl_context
*ctx
= &brw
->ctx
;
1270 struct gl_framebuffer
*fb
, *readFb
;
1272 if (driDrawPriv
== NULL
) {
1273 fb
= _mesa_get_incomplete_framebuffer();
1275 fb
= driDrawPriv
->driverPrivate
;
1276 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1279 if (driReadPriv
== NULL
) {
1280 readFb
= _mesa_get_incomplete_framebuffer();
1282 readFb
= driReadPriv
->driverPrivate
;
1283 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1286 /* The sRGB workaround changes the renderbuffer's format. We must change
1287 * the format before the renderbuffer's miptree get's allocated, otherwise
1288 * the formats of the renderbuffer and its miptree will differ.
1290 intel_gles3_srgb_workaround(brw
, fb
);
1291 intel_gles3_srgb_workaround(brw
, readFb
);
1293 /* If the context viewport hasn't been initialized, force a call out to
1294 * the loader to get buffers so we have a drawable size for the initial
1296 if (!brw
->ctx
.ViewportInitialized
)
1297 intel_prepare_render(brw
);
1299 _mesa_make_current(ctx
, fb
, readFb
);
1301 _mesa_make_current(NULL
, NULL
, NULL
);
1308 intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1309 __DRIdrawable
*drawable
)
1312 /* MSAA and fast color clear are not supported, so don't waste time
1313 * checking whether a resolve is needed.
1318 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1319 struct intel_renderbuffer
*rb
;
1321 /* Usually, only the back buffer will need to be downsampled. However,
1322 * the front buffer will also need it if the user has rendered into it.
1324 static const gl_buffer_index buffers
[2] = {
1329 for (int i
= 0; i
< 2; ++i
) {
1330 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
1331 if (rb
== NULL
|| rb
->mt
== NULL
)
1333 if (rb
->mt
->num_samples
<= 1)
1334 intel_miptree_resolve_color(brw
, rb
->mt
, 0);
1336 intel_renderbuffer_downsample(brw
, rb
);
1341 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
1343 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
1347 intel_query_dri2_buffers(struct brw_context
*brw
,
1348 __DRIdrawable
*drawable
,
1349 __DRIbuffer
**buffers
,
1353 intel_process_dri2_buffer(struct brw_context
*brw
,
1354 __DRIdrawable
*drawable
,
1355 __DRIbuffer
*buffer
,
1356 struct intel_renderbuffer
*rb
,
1357 const char *buffer_name
);
1360 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
);
1363 intel_update_dri2_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1365 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1366 struct intel_renderbuffer
*rb
;
1367 __DRIbuffer
*buffers
= NULL
;
1369 const char *region_name
;
1371 /* Set this up front, so that in case our buffers get invalidated
1372 * while we're getting new buffers, we don't clobber the stamp and
1373 * thus ignore the invalidate. */
1374 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1376 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1377 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1379 intel_query_dri2_buffers(brw
, drawable
, &buffers
, &count
);
1381 if (buffers
== NULL
)
1384 for (i
= 0; i
< count
; i
++) {
1385 switch (buffers
[i
].attachment
) {
1386 case __DRI_BUFFER_FRONT_LEFT
:
1387 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1388 region_name
= "dri2 front buffer";
1391 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
1392 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1393 region_name
= "dri2 fake front buffer";
1396 case __DRI_BUFFER_BACK_LEFT
:
1397 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1398 region_name
= "dri2 back buffer";
1401 case __DRI_BUFFER_DEPTH
:
1402 case __DRI_BUFFER_HIZ
:
1403 case __DRI_BUFFER_DEPTH_STENCIL
:
1404 case __DRI_BUFFER_STENCIL
:
1405 case __DRI_BUFFER_ACCUM
:
1408 "unhandled buffer attach event, attachment type %d\n",
1409 buffers
[i
].attachment
);
1413 intel_process_dri2_buffer(brw
, drawable
, &buffers
[i
], rb
, region_name
);
1419 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
1421 struct brw_context
*brw
= context
->driverPrivate
;
1422 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1424 /* Set this up front, so that in case our buffers get invalidated
1425 * while we're getting new buffers, we don't clobber the stamp and
1426 * thus ignore the invalidate. */
1427 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1429 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1430 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1432 if (screen
->image
.loader
)
1433 intel_update_image_buffers(brw
, drawable
);
1435 intel_update_dri2_buffers(brw
, drawable
);
1437 driUpdateFramebufferSize(&brw
->ctx
, drawable
);
1441 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1442 * state is required.
1445 intel_prepare_render(struct brw_context
*brw
)
1447 struct gl_context
*ctx
= &brw
->ctx
;
1448 __DRIcontext
*driContext
= brw
->driContext
;
1449 __DRIdrawable
*drawable
;
1451 drawable
= driContext
->driDrawablePriv
;
1452 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
1453 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1454 intel_update_renderbuffers(driContext
, drawable
);
1455 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
1458 drawable
= driContext
->driReadablePriv
;
1459 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
1460 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1461 intel_update_renderbuffers(driContext
, drawable
);
1462 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
1465 /* If we're currently rendering to the front buffer, the rendering
1466 * that will happen next will probably dirty the front buffer. So
1467 * mark it as dirty here.
1469 if (_mesa_is_front_buffer_drawing(ctx
->DrawBuffer
))
1470 brw
->front_buffer_dirty
= true;
1474 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1476 * To determine which DRI buffers to request, examine the renderbuffers
1477 * attached to the drawable's framebuffer. Then request the buffers with
1478 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1480 * This is called from intel_update_renderbuffers().
1482 * \param drawable Drawable whose buffers are queried.
1483 * \param buffers [out] List of buffers returned by DRI2 query.
1484 * \param buffer_count [out] Number of buffers returned.
1486 * \see intel_update_renderbuffers()
1487 * \see DRI2GetBuffers()
1488 * \see DRI2GetBuffersWithFormat()
1491 intel_query_dri2_buffers(struct brw_context
*brw
,
1492 __DRIdrawable
*drawable
,
1493 __DRIbuffer
**buffers
,
1496 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1497 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1499 unsigned attachments
[8];
1501 struct intel_renderbuffer
*front_rb
;
1502 struct intel_renderbuffer
*back_rb
;
1504 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1505 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1507 memset(attachments
, 0, sizeof(attachments
));
1508 if ((_mesa_is_front_buffer_drawing(fb
) ||
1509 _mesa_is_front_buffer_reading(fb
) ||
1510 !back_rb
) && front_rb
) {
1511 /* If a fake front buffer is in use, then querying for
1512 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1513 * the real front buffer to the fake front buffer. So before doing the
1514 * query, we need to make sure all the pending drawing has landed in the
1515 * real front buffer.
1517 intel_batchbuffer_flush(brw
);
1518 intel_flush_front(&brw
->ctx
);
1520 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1521 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1522 } else if (front_rb
&& brw
->front_buffer_dirty
) {
1523 /* We have pending front buffer rendering, but we aren't querying for a
1524 * front buffer. If the front buffer we have is a fake front buffer,
1525 * the X server is going to throw it away when it processes the query.
1526 * So before doing the query, make sure all the pending drawing has
1527 * landed in the real front buffer.
1529 intel_batchbuffer_flush(brw
);
1530 intel_flush_front(&brw
->ctx
);
1534 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1535 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1538 assert(i
<= ARRAY_SIZE(attachments
));
1540 *buffers
= screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1545 drawable
->loaderPrivate
);
1549 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1551 * This is called from intel_update_renderbuffers().
1554 * DRI buffers whose attachment point is DRI2BufferStencil or
1555 * DRI2BufferDepthStencil are handled as special cases.
1557 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1558 * that is passed to drm_intel_bo_gem_create_from_name().
1560 * \see intel_update_renderbuffers()
1563 intel_process_dri2_buffer(struct brw_context
*brw
,
1564 __DRIdrawable
*drawable
,
1565 __DRIbuffer
*buffer
,
1566 struct intel_renderbuffer
*rb
,
1567 const char *buffer_name
)
1569 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1575 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1577 /* We try to avoid closing and reopening the same BO name, because the first
1578 * use of a mapping of the buffer involves a bunch of page faulting which is
1579 * moderately expensive.
1581 struct intel_mipmap_tree
*last_mt
;
1582 if (num_samples
== 0)
1585 last_mt
= rb
->singlesample_mt
;
1587 uint32_t old_name
= 0;
1589 /* The bo already has a name because the miptree was created by a
1590 * previous call to intel_process_dri2_buffer(). If a bo already has a
1591 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1592 * create a new name.
1594 drm_intel_bo_flink(last_mt
->bo
, &old_name
);
1597 if (old_name
== buffer
->name
)
1600 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1602 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1603 buffer
->name
, buffer
->attachment
,
1604 buffer
->cpp
, buffer
->pitch
);
1607 bo
= drm_intel_bo_gem_create_from_name(brw
->bufmgr
, buffer_name
,
1611 "Failed to open BO for returned DRI2 buffer "
1612 "(%dx%d, %s, named %d).\n"
1613 "This is likely a bug in the X Server that will lead to a "
1615 drawable
->w
, drawable
->h
, buffer_name
, buffer
->name
);
1619 intel_update_winsys_renderbuffer_miptree(brw
, rb
, bo
,
1620 drawable
->w
, drawable
->h
,
1623 if (_mesa_is_front_buffer_drawing(fb
) &&
1624 (buffer
->attachment
== __DRI_BUFFER_FRONT_LEFT
||
1625 buffer
->attachment
== __DRI_BUFFER_FAKE_FRONT_LEFT
) &&
1626 rb
->Base
.Base
.NumSamples
> 1) {
1627 intel_renderbuffer_upsample(brw
, rb
);
1632 drm_intel_bo_unreference(bo
);
1636 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1638 * To determine which DRI buffers to request, examine the renderbuffers
1639 * attached to the drawable's framebuffer. Then request the buffers from
1642 * This is called from intel_update_renderbuffers().
1644 * \param drawable Drawable whose buffers are queried.
1645 * \param buffers [out] List of buffers returned by DRI2 query.
1646 * \param buffer_count [out] Number of buffers returned.
1648 * \see intel_update_renderbuffers()
1652 intel_update_image_buffer(struct brw_context
*intel
,
1653 __DRIdrawable
*drawable
,
1654 struct intel_renderbuffer
*rb
,
1656 enum __DRIimageBufferMask buffer_type
)
1658 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1660 if (!rb
|| !buffer
->bo
)
1663 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1665 /* Check and see if we're already bound to the right
1668 struct intel_mipmap_tree
*last_mt
;
1669 if (num_samples
== 0)
1672 last_mt
= rb
->singlesample_mt
;
1674 if (last_mt
&& last_mt
->bo
== buffer
->bo
)
1677 intel_update_winsys_renderbuffer_miptree(intel
, rb
, buffer
->bo
,
1678 buffer
->width
, buffer
->height
,
1681 if (_mesa_is_front_buffer_drawing(fb
) &&
1682 buffer_type
== __DRI_IMAGE_BUFFER_FRONT
&&
1683 rb
->Base
.Base
.NumSamples
> 1) {
1684 intel_renderbuffer_upsample(intel
, rb
);
1689 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1691 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1692 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1693 struct intel_renderbuffer
*front_rb
;
1694 struct intel_renderbuffer
*back_rb
;
1695 struct __DRIimageList images
;
1696 unsigned int format
;
1697 uint32_t buffer_mask
= 0;
1700 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1701 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1704 format
= intel_rb_format(back_rb
);
1706 format
= intel_rb_format(front_rb
);
1710 if (front_rb
&& (_mesa_is_front_buffer_drawing(fb
) ||
1711 _mesa_is_front_buffer_reading(fb
) || !back_rb
)) {
1712 buffer_mask
|= __DRI_IMAGE_BUFFER_FRONT
;
1716 buffer_mask
|= __DRI_IMAGE_BUFFER_BACK
;
1718 ret
= screen
->image
.loader
->getBuffers(drawable
,
1719 driGLFormatToImageFormat(format
),
1720 &drawable
->dri2
.stamp
,
1721 drawable
->loaderPrivate
,
1727 if (images
.image_mask
& __DRI_IMAGE_BUFFER_FRONT
) {
1728 drawable
->w
= images
.front
->width
;
1729 drawable
->h
= images
.front
->height
;
1730 intel_update_image_buffer(brw
,
1734 __DRI_IMAGE_BUFFER_FRONT
);
1736 if (images
.image_mask
& __DRI_IMAGE_BUFFER_BACK
) {
1737 drawable
->w
= images
.back
->width
;
1738 drawable
->h
= images
.back
->height
;
1739 intel_update_image_buffer(brw
,
1743 __DRI_IMAGE_BUFFER_BACK
);