2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **********************************************************************/
30 * Keith Whitwell <keithw@vmware.com>
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
47 #include "vbo/vbo_context.h"
49 #include "drivers/common/driverfuncs.h"
50 #include "drivers/common/meta.h"
53 #include "brw_context.h"
54 #include "brw_defines.h"
55 #include "brw_blorp.h"
56 #include "brw_compiler.h"
58 #include "brw_state.h"
60 #include "intel_batchbuffer.h"
61 #include "intel_buffer_objects.h"
62 #include "intel_buffers.h"
63 #include "intel_fbo.h"
64 #include "intel_mipmap_tree.h"
65 #include "intel_pixel.h"
66 #include "intel_image.h"
67 #include "intel_tex.h"
68 #include "intel_tex_obj.h"
70 #include "swrast_setup/swrast_setup.h"
72 #include "tnl/t_pipeline.h"
73 #include "util/ralloc.h"
74 #include "util/debug.h"
77 /***************************************
78 * Mesa's Driver Functions
79 ***************************************/
81 const char *const brw_vendor_string
= "Intel Open Source Technology Center";
84 get_bsw_model(const struct intel_screen
*screen
)
86 switch (screen
->eu_total
) {
97 brw_get_renderer_string(const struct intel_screen
*screen
)
100 static char buffer
[128];
103 switch (screen
->deviceID
) {
105 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
106 #include "pci_ids/i965_pci_ids.h"
108 chipset
= "Unknown Intel Chipset";
112 /* Braswell branding is funny, so we have to fix it up here */
113 if (screen
->deviceID
== 0x22B1) {
114 bsw
= strdup(chipset
);
115 char *needle
= strstr(bsw
, "XXX");
117 memcpy(needle
, get_bsw_model(screen
), 3);
122 (void) driGetRendererString(buffer
, chipset
, 0);
127 static const GLubyte
*
128 intel_get_string(struct gl_context
* ctx
, GLenum name
)
130 const struct brw_context
*const brw
= brw_context(ctx
);
134 return (GLubyte
*) brw_vendor_string
;
138 (GLubyte
*) brw_get_renderer_string(brw
->screen
);
146 intel_viewport(struct gl_context
*ctx
)
148 struct brw_context
*brw
= brw_context(ctx
);
149 __DRIcontext
*driContext
= brw
->driContext
;
151 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
152 if (driContext
->driDrawablePriv
)
153 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
154 if (driContext
->driReadablePriv
)
155 dri2InvalidateDrawable(driContext
->driReadablePriv
);
160 intel_update_framebuffer(struct gl_context
*ctx
,
161 struct gl_framebuffer
*fb
)
163 struct brw_context
*brw
= brw_context(ctx
);
165 /* Quantize the derived default number of samples
167 fb
->DefaultGeometry
._NumSamples
=
168 intel_quantize_num_samples(brw
->screen
,
169 fb
->DefaultGeometry
.NumSamples
);
173 intel_disable_rb_aux_buffer(struct brw_context
*brw
, const drm_intel_bo
*bo
)
175 const struct gl_framebuffer
*fb
= brw
->ctx
.DrawBuffer
;
178 for (unsigned i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
179 const struct intel_renderbuffer
*irb
=
180 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
182 if (irb
&& irb
->mt
->bo
== bo
) {
183 found
= brw
->draw_aux_buffer_disabled
[i
] = true;
190 /* On Gen9 color buffers may be compressed by the hardware (lossless
191 * compression). There are, however, format restrictions and care needs to be
192 * taken that the sampler engine is capable for re-interpreting a buffer with
193 * format different the buffer was originally written with.
195 * For example, SRGB formats are not compressible and the sampler engine isn't
196 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
197 * color buffer needs to be resolved so that the sampling surface can be
198 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
202 intel_texture_view_requires_resolve(struct brw_context
*brw
,
203 struct intel_texture_object
*intel_tex
)
206 !intel_miptree_is_lossless_compressed(brw
, intel_tex
->mt
))
209 const uint32_t brw_format
= brw_format_for_mesa_format(intel_tex
->_Format
);
211 if (isl_format_supports_ccs_e(&brw
->screen
->devinfo
, brw_format
))
214 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
215 _mesa_get_format_name(intel_tex
->_Format
),
216 _mesa_get_format_name(intel_tex
->mt
->format
));
218 if (intel_disable_rb_aux_buffer(brw
, intel_tex
->mt
->bo
))
219 perf_debug("Sampling renderbuffer with non-compressible format - "
220 "turning off compression");
226 intel_update_state(struct gl_context
* ctx
, GLuint new_state
)
228 struct brw_context
*brw
= brw_context(ctx
);
229 struct intel_texture_object
*tex_obj
;
230 struct intel_renderbuffer
*depth_irb
;
232 if (ctx
->swrast_context
)
233 _swrast_InvalidateState(ctx
, new_state
);
234 _vbo_InvalidateState(ctx
, new_state
);
236 brw
->NewGLState
|= new_state
;
238 _mesa_unlock_context_textures(ctx
);
240 /* Resolve the depth buffer's HiZ buffer. */
241 depth_irb
= intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_DEPTH
);
243 intel_renderbuffer_resolve_hiz(brw
, depth_irb
);
245 memset(brw
->draw_aux_buffer_disabled
, 0,
246 sizeof(brw
->draw_aux_buffer_disabled
));
248 /* Resolve depth buffer and render cache of each enabled texture. */
249 int maxEnabledUnit
= ctx
->Texture
._MaxEnabledTexImageUnit
;
250 for (int i
= 0; i
<= maxEnabledUnit
; i
++) {
251 if (!ctx
->Texture
.Unit
[i
]._Current
)
253 tex_obj
= intel_texture_object(ctx
->Texture
.Unit
[i
]._Current
);
254 if (!tex_obj
|| !tex_obj
->mt
)
256 if (intel_miptree_sample_with_hiz(brw
, tex_obj
->mt
))
257 intel_miptree_all_slices_resolve_hiz(brw
, tex_obj
->mt
);
259 intel_miptree_all_slices_resolve_depth(brw
, tex_obj
->mt
);
260 /* Sampling engine understands lossless compression and resolving
261 * those surfaces should be skipped for performance reasons.
263 const int flags
= intel_texture_view_requires_resolve(brw
, tex_obj
) ?
264 0 : INTEL_MIPTREE_IGNORE_CCS_E
;
265 intel_miptree_all_slices_resolve_color(brw
, tex_obj
->mt
, flags
);
266 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
268 if (tex_obj
->base
.StencilSampling
||
269 tex_obj
->mt
->format
== MESA_FORMAT_S_UINT8
) {
270 intel_update_r8stencil(brw
, tex_obj
->mt
);
274 /* Resolve color for each active shader image. */
275 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
276 const struct gl_program
*prog
= ctx
->_Shader
->CurrentProgram
[i
];
278 if (unlikely(prog
&& prog
->info
.num_images
)) {
279 for (unsigned j
= 0; j
< prog
->info
.num_images
; j
++) {
280 struct gl_image_unit
*u
=
281 &ctx
->ImageUnits
[prog
->sh
.ImageUnits
[j
]];
282 tex_obj
= intel_texture_object(u
->TexObj
);
284 if (tex_obj
&& tex_obj
->mt
) {
285 /* Access to images is implemented using indirect messages
286 * against data port. Normal render target write understands
287 * lossless compression but unfortunately the typed/untyped
288 * read/write interface doesn't. Therefore even lossless
289 * compressed surfaces need to be resolved prior to accessing
290 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
292 intel_miptree_all_slices_resolve_color(brw
, tex_obj
->mt
, 0);
294 if (intel_miptree_is_lossless_compressed(brw
, tex_obj
->mt
) &&
295 intel_disable_rb_aux_buffer(brw
, tex_obj
->mt
->bo
)) {
296 perf_debug("Using renderbuffer as shader image - turning "
297 "off lossless compression");
300 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
306 /* Resolve color buffers for non-coherent framebuffer fetch. */
307 if (!ctx
->Extensions
.MESA_shader_framebuffer_fetch
&&
308 ctx
->FragmentProgram
._Current
&&
309 ctx
->FragmentProgram
._Current
->info
.outputs_read
) {
310 const struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
312 for (unsigned i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
313 const struct intel_renderbuffer
*irb
=
314 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
317 intel_miptree_resolve_color(
318 brw
, irb
->mt
, irb
->mt_level
, irb
->mt_layer
, irb
->layer_count
,
319 INTEL_MIPTREE_IGNORE_CCS_E
))
320 brw_render_cache_set_check_flush(brw
, irb
->mt
->bo
);
324 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
325 * single-sampled color renderbuffers because the CCS buffer isn't
326 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
327 * enabled because otherwise the surface state will be programmed with the
328 * linear equivalent format anyway.
330 if (brw
->gen
>= 9 && ctx
->Color
.sRGBEnabled
) {
331 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
332 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
333 struct gl_renderbuffer
*rb
= fb
->_ColorDrawBuffers
[i
];
338 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
339 struct intel_mipmap_tree
*mt
= irb
->mt
;
342 mt
->num_samples
> 1 ||
343 _mesa_get_srgb_format_linear(mt
->format
) == mt
->format
)
346 /* Lossless compression is not supported for SRGB formats, it
347 * should be impossible to get here with such surfaces.
349 assert(!intel_miptree_is_lossless_compressed(brw
, mt
));
350 intel_miptree_all_slices_resolve_color(brw
, mt
, 0);
351 brw_render_cache_set_check_flush(brw
, mt
->bo
);
355 _mesa_lock_context_textures(ctx
);
357 if (new_state
& _NEW_BUFFERS
) {
358 intel_update_framebuffer(ctx
, ctx
->DrawBuffer
);
359 if (ctx
->DrawBuffer
!= ctx
->ReadBuffer
)
360 intel_update_framebuffer(ctx
, ctx
->ReadBuffer
);
364 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
367 intel_flush_front(struct gl_context
*ctx
)
369 struct brw_context
*brw
= brw_context(ctx
);
370 __DRIcontext
*driContext
= brw
->driContext
;
371 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
372 __DRIscreen
*const dri_screen
= brw
->screen
->driScrnPriv
;
374 if (brw
->front_buffer_dirty
&& _mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
375 if (flushFront(dri_screen
) && driDrawable
&&
376 driDrawable
->loaderPrivate
) {
378 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
380 * This potentially resolves both front and back buffer. It
381 * is unnecessary to resolve the back, but harms nothing except
382 * performance. And no one cares about front-buffer render
385 intel_resolve_for_dri2_flush(brw
, driDrawable
);
386 intel_batchbuffer_flush(brw
);
388 flushFront(dri_screen
)(driDrawable
, driDrawable
->loaderPrivate
);
390 /* We set the dirty bit in intel_prepare_render() if we're
391 * front buffer rendering once we get there.
393 brw
->front_buffer_dirty
= false;
399 intel_glFlush(struct gl_context
*ctx
)
401 struct brw_context
*brw
= brw_context(ctx
);
403 intel_batchbuffer_flush(brw
);
404 intel_flush_front(ctx
);
406 brw
->need_flush_throttle
= true;
410 intel_finish(struct gl_context
* ctx
)
412 struct brw_context
*brw
= brw_context(ctx
);
416 if (brw
->batch
.last_bo
)
417 drm_intel_bo_wait_rendering(brw
->batch
.last_bo
);
421 brw_init_driver_functions(struct brw_context
*brw
,
422 struct dd_function_table
*functions
)
424 _mesa_init_driver_functions(functions
);
426 /* GLX uses DRI2 invalidate events to handle window resizing.
427 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
428 * which doesn't provide a mechanism for snooping the event queues.
430 * So EGL still relies on viewport hacks to handle window resizing.
431 * This should go away with DRI3000.
433 if (!brw
->driContext
->driScreenPriv
->dri2
.useInvalidate
)
434 functions
->Viewport
= intel_viewport
;
436 functions
->Flush
= intel_glFlush
;
437 functions
->Finish
= intel_finish
;
438 functions
->GetString
= intel_get_string
;
439 functions
->UpdateState
= intel_update_state
;
441 intelInitTextureFuncs(functions
);
442 intelInitTextureImageFuncs(functions
);
443 intelInitTextureSubImageFuncs(functions
);
444 intelInitTextureCopyImageFuncs(functions
);
445 intelInitCopyImageFuncs(functions
);
446 intelInitClearFuncs(functions
);
447 intelInitBufferFuncs(functions
);
448 intelInitPixelFuncs(functions
);
449 intelInitBufferObjectFuncs(functions
);
450 brw_init_syncobj_functions(functions
);
451 brw_init_object_purgeable_functions(functions
);
453 brwInitFragProgFuncs( functions
);
454 brw_init_common_queryobj_functions(functions
);
455 if (brw
->gen
>= 8 || brw
->is_haswell
)
456 hsw_init_queryobj_functions(functions
);
457 else if (brw
->gen
>= 6)
458 gen6_init_queryobj_functions(functions
);
460 gen4_init_queryobj_functions(functions
);
461 brw_init_compute_functions(functions
);
463 brw_init_conditional_render_functions(functions
);
465 functions
->QueryInternalFormat
= brw_query_internal_format
;
467 functions
->NewTransformFeedback
= brw_new_transform_feedback
;
468 functions
->DeleteTransformFeedback
= brw_delete_transform_feedback
;
469 if (can_do_mi_math_and_lrr(brw
->screen
)) {
470 functions
->BeginTransformFeedback
= hsw_begin_transform_feedback
;
471 functions
->EndTransformFeedback
= hsw_end_transform_feedback
;
472 functions
->PauseTransformFeedback
= hsw_pause_transform_feedback
;
473 functions
->ResumeTransformFeedback
= hsw_resume_transform_feedback
;
474 } else if (brw
->gen
>= 7) {
475 functions
->BeginTransformFeedback
= gen7_begin_transform_feedback
;
476 functions
->EndTransformFeedback
= gen7_end_transform_feedback
;
477 functions
->PauseTransformFeedback
= gen7_pause_transform_feedback
;
478 functions
->ResumeTransformFeedback
= gen7_resume_transform_feedback
;
479 functions
->GetTransformFeedbackVertexCount
=
480 brw_get_transform_feedback_vertex_count
;
482 functions
->BeginTransformFeedback
= brw_begin_transform_feedback
;
483 functions
->EndTransformFeedback
= brw_end_transform_feedback
;
484 functions
->PauseTransformFeedback
= brw_pause_transform_feedback
;
485 functions
->ResumeTransformFeedback
= brw_resume_transform_feedback
;
486 functions
->GetTransformFeedbackVertexCount
=
487 brw_get_transform_feedback_vertex_count
;
491 functions
->GetSamplePosition
= gen6_get_sample_position
;
495 brw_initialize_context_constants(struct brw_context
*brw
)
497 struct gl_context
*ctx
= &brw
->ctx
;
498 const struct brw_compiler
*compiler
= brw
->screen
->compiler
;
500 const bool stage_exists
[MESA_SHADER_STAGES
] = {
501 [MESA_SHADER_VERTEX
] = true,
502 [MESA_SHADER_TESS_CTRL
] = brw
->gen
>= 7,
503 [MESA_SHADER_TESS_EVAL
] = brw
->gen
>= 7,
504 [MESA_SHADER_GEOMETRY
] = brw
->gen
>= 6,
505 [MESA_SHADER_FRAGMENT
] = true,
506 [MESA_SHADER_COMPUTE
] =
507 ((ctx
->API
== API_OPENGL_COMPAT
|| ctx
->API
== API_OPENGL_CORE
) &&
508 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 1024) ||
509 (ctx
->API
== API_OPENGLES2
&&
510 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 128) ||
511 _mesa_extension_override_enables
.ARB_compute_shader
,
514 unsigned num_stages
= 0;
515 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
520 unsigned max_samplers
=
521 brw
->gen
>= 8 || brw
->is_haswell
? BRW_MAX_TEX_UNIT
: 16;
523 ctx
->Const
.MaxDualSourceDrawBuffers
= 1;
524 ctx
->Const
.MaxDrawBuffers
= BRW_MAX_DRAW_BUFFERS
;
525 ctx
->Const
.MaxCombinedShaderOutputResources
=
526 MAX_IMAGE_UNITS
+ BRW_MAX_DRAW_BUFFERS
;
528 ctx
->Const
.QueryCounterBits
.Timestamp
= 36;
530 ctx
->Const
.MaxTextureCoordUnits
= 8; /* Mesa limit */
531 ctx
->Const
.MaxImageUnits
= MAX_IMAGE_UNITS
;
533 ctx
->Const
.MaxRenderbufferSize
= 16384;
534 ctx
->Const
.MaxTextureLevels
= MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS
);
535 ctx
->Const
.MaxCubeTextureLevels
= 15; /* 16384 */
537 ctx
->Const
.MaxRenderbufferSize
= 8192;
538 ctx
->Const
.MaxTextureLevels
= MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS
);
539 ctx
->Const
.MaxCubeTextureLevels
= 14; /* 8192 */
541 ctx
->Const
.Max3DTextureLevels
= 12; /* 2048 */
542 ctx
->Const
.MaxArrayTextureLayers
= brw
->gen
>= 7 ? 2048 : 512;
543 ctx
->Const
.MaxTextureMbytes
= 1536;
544 ctx
->Const
.MaxTextureRectSize
= 1 << 12;
545 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
546 ctx
->Const
.MaxTextureLodBias
= 15.0;
547 ctx
->Const
.StripTextureBorder
= true;
549 ctx
->Const
.MaxProgramTextureGatherComponents
= 4;
550 ctx
->Const
.MinProgramTextureGatherOffset
= -32;
551 ctx
->Const
.MaxProgramTextureGatherOffset
= 31;
552 } else if (brw
->gen
== 6) {
553 ctx
->Const
.MaxProgramTextureGatherComponents
= 1;
554 ctx
->Const
.MinProgramTextureGatherOffset
= -8;
555 ctx
->Const
.MaxProgramTextureGatherOffset
= 7;
558 ctx
->Const
.MaxUniformBlockSize
= 65536;
560 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
561 struct gl_program_constants
*prog
= &ctx
->Const
.Program
[i
];
563 if (!stage_exists
[i
])
566 prog
->MaxTextureImageUnits
= max_samplers
;
568 prog
->MaxUniformBlocks
= BRW_MAX_UBO
;
569 prog
->MaxCombinedUniformComponents
=
570 prog
->MaxUniformComponents
+
571 ctx
->Const
.MaxUniformBlockSize
/ 4 * prog
->MaxUniformBlocks
;
573 prog
->MaxAtomicCounters
= MAX_ATOMIC_COUNTERS
;
574 prog
->MaxAtomicBuffers
= BRW_MAX_ABO
;
575 prog
->MaxImageUniforms
= compiler
->scalar_stage
[i
] ? BRW_MAX_IMAGES
: 0;
576 prog
->MaxShaderStorageBlocks
= BRW_MAX_SSBO
;
579 ctx
->Const
.MaxTextureUnits
=
580 MIN2(ctx
->Const
.MaxTextureCoordUnits
,
581 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
);
583 ctx
->Const
.MaxUniformBufferBindings
= num_stages
* BRW_MAX_UBO
;
584 ctx
->Const
.MaxCombinedUniformBlocks
= num_stages
* BRW_MAX_UBO
;
585 ctx
->Const
.MaxCombinedAtomicBuffers
= num_stages
* BRW_MAX_ABO
;
586 ctx
->Const
.MaxCombinedShaderStorageBlocks
= num_stages
* BRW_MAX_SSBO
;
587 ctx
->Const
.MaxShaderStorageBufferBindings
= num_stages
* BRW_MAX_SSBO
;
588 ctx
->Const
.MaxCombinedTextureImageUnits
= num_stages
* max_samplers
;
589 ctx
->Const
.MaxCombinedImageUniforms
= num_stages
* BRW_MAX_IMAGES
;
592 /* Hardware only supports a limited number of transform feedback buffers.
593 * So we need to override the Mesa default (which is based only on software
596 ctx
->Const
.MaxTransformFeedbackBuffers
= BRW_MAX_SOL_BUFFERS
;
598 /* On Gen6, in the worst case, we use up one binding table entry per
599 * transform feedback component (see comments above the definition of
600 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
601 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
602 * BRW_MAX_SOL_BINDINGS.
604 * In "separate components" mode, we need to divide this value by
605 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
606 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
608 ctx
->Const
.MaxTransformFeedbackInterleavedComponents
= BRW_MAX_SOL_BINDINGS
;
609 ctx
->Const
.MaxTransformFeedbackSeparateComponents
=
610 BRW_MAX_SOL_BINDINGS
/ BRW_MAX_SOL_BUFFERS
;
612 ctx
->Const
.AlwaysUseGetTransformFeedbackVertexCount
=
613 !can_do_mi_math_and_lrr(brw
->screen
);
616 const int *msaa_modes
= intel_supported_msaa_modes(brw
->screen
);
617 const int clamp_max_samples
=
618 driQueryOptioni(&brw
->optionCache
, "clamp_max_samples");
620 if (clamp_max_samples
< 0) {
621 max_samples
= msaa_modes
[0];
623 /* Select the largest supported MSAA mode that does not exceed
627 for (int i
= 0; msaa_modes
[i
] != 0; ++i
) {
628 if (msaa_modes
[i
] <= clamp_max_samples
) {
629 max_samples
= msaa_modes
[i
];
635 ctx
->Const
.MaxSamples
= max_samples
;
636 ctx
->Const
.MaxColorTextureSamples
= max_samples
;
637 ctx
->Const
.MaxDepthTextureSamples
= max_samples
;
638 ctx
->Const
.MaxIntegerSamples
= max_samples
;
639 ctx
->Const
.MaxImageSamples
= 0;
641 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
642 * to map indices of rectangular grid to sample numbers within a pixel.
643 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
644 * extension implementation. For more details see the comment above
645 * gen6_set_sample_maps() definition.
647 gen6_set_sample_maps(ctx
);
649 ctx
->Const
.MinLineWidth
= 1.0;
650 ctx
->Const
.MinLineWidthAA
= 1.0;
652 ctx
->Const
.MaxLineWidth
= 7.375;
653 ctx
->Const
.MaxLineWidthAA
= 7.375;
654 ctx
->Const
.LineWidthGranularity
= 0.125;
656 ctx
->Const
.MaxLineWidth
= 7.0;
657 ctx
->Const
.MaxLineWidthAA
= 7.0;
658 ctx
->Const
.LineWidthGranularity
= 0.5;
661 /* For non-antialiased lines, we have to round the line width to the
662 * nearest whole number. Make sure that we don't advertise a line
663 * width that, when rounded, will be beyond the actual hardware
666 assert(roundf(ctx
->Const
.MaxLineWidth
) <= ctx
->Const
.MaxLineWidth
);
668 ctx
->Const
.MinPointSize
= 1.0;
669 ctx
->Const
.MinPointSizeAA
= 1.0;
670 ctx
->Const
.MaxPointSize
= 255.0;
671 ctx
->Const
.MaxPointSizeAA
= 255.0;
672 ctx
->Const
.PointSizeGranularity
= 1.0;
674 if (brw
->gen
>= 5 || brw
->is_g4x
)
675 ctx
->Const
.MaxClipPlanes
= 8;
677 ctx
->Const
.GLSLTessLevelsAsInputs
= true;
678 ctx
->Const
.LowerTCSPatchVerticesIn
= brw
->gen
>= 8;
679 ctx
->Const
.LowerTESPatchVerticesIn
= true;
680 ctx
->Const
.PrimitiveRestartForPatches
= true;
682 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeInstructions
= 16 * 1024;
683 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxAluInstructions
= 0;
684 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexInstructions
= 0;
685 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexIndirections
= 0;
686 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAluInstructions
= 0;
687 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexInstructions
= 0;
688 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexIndirections
= 0;
689 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAttribs
= 16;
690 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTemps
= 256;
691 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAddressRegs
= 1;
692 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
= 1024;
693 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
=
694 MIN2(ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
,
695 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
);
697 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeInstructions
= 1024;
698 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAluInstructions
= 1024;
699 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexInstructions
= 1024;
700 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexIndirections
= 1024;
701 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAttribs
= 12;
702 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTemps
= 256;
703 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAddressRegs
= 0;
704 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
= 1024;
705 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
=
706 MIN2(ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
,
707 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
);
709 /* Fragment shaders use real, 32-bit twos-complement integers for all
712 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMin
= 31;
713 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMax
= 30;
714 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.Precision
= 0;
715 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
716 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
718 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMin
= 31;
719 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMax
= 30;
720 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.Precision
= 0;
721 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
722 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
724 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
725 * but we're not sure how it's actually done for vertex order,
726 * that affect provoking vertex decision. Always use last vertex
727 * convention for quad primitive which works as expected for now.
730 ctx
->Const
.QuadsFollowProvokingVertexConvention
= false;
732 ctx
->Const
.NativeIntegers
= true;
733 ctx
->Const
.VertexID_is_zero_based
= true;
735 /* Regarding the CMP instruction, the Ivybridge PRM says:
737 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
738 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
739 * 0xFFFFFFFF) is assigned to dst."
741 * but PRMs for earlier generations say
743 * "In dword format, one GRF may store up to 8 results. When the register
744 * is used later as a vector of Booleans, as only LSB at each channel
745 * contains meaning [sic] data, software should make sure all higher bits
746 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
748 * We select the representation of a true boolean uniform to be ~0, and fix
749 * the results of Gen <= 5 CMP instruction's with -(result & 1).
751 ctx
->Const
.UniformBooleanTrue
= ~0;
753 /* From the gen4 PRM, volume 4 page 127:
755 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
756 * the base address of the first element of the surface, computed in
757 * software by adding the surface base address to the byte offset of
758 * the element in the buffer."
760 * However, unaligned accesses are slower, so enforce buffer alignment.
762 ctx
->Const
.UniformBufferOffsetAlignment
= 16;
764 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
765 * that we can safely have the CPU and GPU writing the same SSBO on
766 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
767 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
768 * be updating disjoint regions of the buffer simultaneously and that will
769 * break if the regions overlap the same cacheline.
771 ctx
->Const
.ShaderStorageBufferOffsetAlignment
= 64;
772 ctx
->Const
.TextureBufferOffsetAlignment
= 16;
773 ctx
->Const
.MaxTextureBufferSize
= 128 * 1024 * 1024;
776 ctx
->Const
.MaxVarying
= 32;
777 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxOutputComponents
= 128;
778 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxInputComponents
= 64;
779 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxOutputComponents
= 128;
780 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxInputComponents
= 128;
781 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxInputComponents
= 128;
782 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxOutputComponents
= 128;
783 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxInputComponents
= 128;
784 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxOutputComponents
= 128;
787 /* We want the GLSL compiler to emit code that uses condition codes */
788 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
789 ctx
->Const
.ShaderCompilerOptions
[i
] =
790 brw
->screen
->compiler
->glsl_compiler_options
[i
];
794 ctx
->Const
.MaxViewportWidth
= 32768;
795 ctx
->Const
.MaxViewportHeight
= 32768;
798 /* ARB_viewport_array, OES_viewport_array */
800 ctx
->Const
.MaxViewports
= GEN6_NUM_VIEWPORTS
;
801 ctx
->Const
.ViewportSubpixelBits
= 0;
803 /* Cast to float before negating because MaxViewportWidth is unsigned.
805 ctx
->Const
.ViewportBounds
.Min
= -(float)ctx
->Const
.MaxViewportWidth
;
806 ctx
->Const
.ViewportBounds
.Max
= ctx
->Const
.MaxViewportWidth
;
809 /* ARB_gpu_shader5 */
811 ctx
->Const
.MaxVertexStreams
= MIN2(4, MAX_VERTEX_STREAMS
);
813 /* ARB_framebuffer_no_attachments */
814 ctx
->Const
.MaxFramebufferWidth
= 16384;
815 ctx
->Const
.MaxFramebufferHeight
= 16384;
816 ctx
->Const
.MaxFramebufferLayers
= ctx
->Const
.MaxArrayTextureLayers
;
817 ctx
->Const
.MaxFramebufferSamples
= max_samples
;
819 /* OES_primitive_bounding_box */
820 ctx
->Const
.NoPrimitiveBoundingBoxOutput
= true;
824 brw_initialize_cs_context_constants(struct brw_context
*brw
)
826 struct gl_context
*ctx
= &brw
->ctx
;
827 const struct intel_screen
*screen
= brw
->screen
;
828 struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
830 /* FINISHME: Do this for all platforms that the kernel supports */
831 if (brw
->is_cherryview
&&
832 screen
->subslice_total
> 0 && screen
->eu_total
> 0) {
833 /* Logical CS threads = EUs per subslice * 7 threads per EU */
834 uint32_t max_cs_threads
= screen
->eu_total
/ screen
->subslice_total
* 7;
836 /* Fuse configurations may give more threads than expected, never less. */
837 if (max_cs_threads
> devinfo
->max_cs_threads
)
838 devinfo
->max_cs_threads
= max_cs_threads
;
841 /* Maximum number of scalar compute shader invocations that can be run in
842 * parallel in the same subslice assuming SIMD32 dispatch.
844 * We don't advertise more than 64 threads, because we are limited to 64 by
845 * our usage of thread_width_max in the gpgpu walker command. This only
846 * currently impacts Haswell, which otherwise might be able to advertise 70
847 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
848 * required the number of invocation needed for ARB_compute_shader.
850 const unsigned max_threads
= MIN2(64, devinfo
->max_cs_threads
);
851 const uint32_t max_invocations
= 32 * max_threads
;
852 ctx
->Const
.MaxComputeWorkGroupSize
[0] = max_invocations
;
853 ctx
->Const
.MaxComputeWorkGroupSize
[1] = max_invocations
;
854 ctx
->Const
.MaxComputeWorkGroupSize
[2] = max_invocations
;
855 ctx
->Const
.MaxComputeWorkGroupInvocations
= max_invocations
;
856 ctx
->Const
.MaxComputeSharedMemorySize
= 64 * 1024;
860 * Process driconf (drirc) options, setting appropriate context flags.
862 * intelInitExtensions still pokes at optionCache directly, in order to
863 * avoid advertising various extensions. No flags are set, so it makes
864 * sense to continue doing that there.
867 brw_process_driconf_options(struct brw_context
*brw
)
869 struct gl_context
*ctx
= &brw
->ctx
;
871 driOptionCache
*options
= &brw
->optionCache
;
872 driParseConfigFiles(options
, &brw
->screen
->optionCache
,
873 brw
->driContext
->driScreenPriv
->myNum
, "i965");
875 int bo_reuse_mode
= driQueryOptioni(options
, "bo_reuse");
876 switch (bo_reuse_mode
) {
877 case DRI_CONF_BO_REUSE_DISABLED
:
879 case DRI_CONF_BO_REUSE_ALL
:
880 intel_bufmgr_gem_enable_reuse(brw
->bufmgr
);
884 if (!driQueryOptionb(options
, "hiz")) {
885 brw
->has_hiz
= false;
886 /* On gen6, you can only do separate stencil with HIZ. */
888 brw
->has_separate_stencil
= false;
891 if (driQueryOptionb(options
, "always_flush_batch")) {
892 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
893 brw
->always_flush_batch
= true;
896 if (driQueryOptionb(options
, "always_flush_cache")) {
897 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
898 brw
->always_flush_cache
= true;
901 if (driQueryOptionb(options
, "disable_throttling")) {
902 fprintf(stderr
, "disabling flush throttling\n");
903 brw
->disable_throttling
= true;
906 brw
->precompile
= driQueryOptionb(&brw
->optionCache
, "shader_precompile");
908 if (driQueryOptionb(&brw
->optionCache
, "precise_trig"))
909 brw
->screen
->compiler
->precise_trig
= true;
911 ctx
->Const
.ForceGLSLExtensionsWarn
=
912 driQueryOptionb(options
, "force_glsl_extensions_warn");
914 ctx
->Const
.ForceGLSLVersion
=
915 driQueryOptioni(options
, "force_glsl_version");
917 ctx
->Const
.DisableGLSLLineContinuations
=
918 driQueryOptionb(options
, "disable_glsl_line_continuations");
920 ctx
->Const
.AllowGLSLExtensionDirectiveMidShader
=
921 driQueryOptionb(options
, "allow_glsl_extension_directive_midshader");
923 ctx
->Const
.AllowHigherCompatVersion
=
924 driQueryOptionb(options
, "allow_higher_compat_version");
926 ctx
->Const
.GLSLZeroInit
= driQueryOptionb(options
, "glsl_zero_init");
928 brw
->dual_color_blend_by_location
=
929 driQueryOptionb(options
, "dual_color_blend_by_location");
933 brwCreateContext(gl_api api
,
934 const struct gl_config
*mesaVis
,
935 __DRIcontext
*driContextPriv
,
936 unsigned major_version
,
937 unsigned minor_version
,
940 unsigned *dri_ctx_error
,
941 void *sharedContextPrivate
)
943 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
944 struct intel_screen
*screen
= driContextPriv
->driScreenPriv
->driverPrivate
;
945 const struct gen_device_info
*devinfo
= &screen
->devinfo
;
946 struct dd_function_table functions
;
948 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
949 * provides us with context reset notifications.
951 uint32_t allowed_flags
= __DRI_CTX_FLAG_DEBUG
952 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
;
954 if (screen
->has_context_reset_notification
)
955 allowed_flags
|= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
;
957 if (flags
& ~allowed_flags
) {
958 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
962 struct brw_context
*brw
= rzalloc(NULL
, struct brw_context
);
964 fprintf(stderr
, "%s: failed to alloc context\n", __func__
);
965 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
969 driContextPriv
->driverPrivate
= brw
;
970 brw
->driContext
= driContextPriv
;
971 brw
->screen
= screen
;
972 brw
->bufmgr
= screen
->bufmgr
;
974 brw
->gen
= devinfo
->gen
;
975 brw
->gt
= devinfo
->gt
;
976 brw
->is_g4x
= devinfo
->is_g4x
;
977 brw
->is_baytrail
= devinfo
->is_baytrail
;
978 brw
->is_haswell
= devinfo
->is_haswell
;
979 brw
->is_cherryview
= devinfo
->is_cherryview
;
980 brw
->is_broxton
= devinfo
->is_broxton
;
981 brw
->has_llc
= devinfo
->has_llc
;
982 brw
->has_hiz
= devinfo
->has_hiz_and_separate_stencil
;
983 brw
->has_separate_stencil
= devinfo
->has_hiz_and_separate_stencil
;
984 brw
->has_pln
= devinfo
->has_pln
;
985 brw
->has_compr4
= devinfo
->has_compr4
;
986 brw
->has_surface_tile_offset
= devinfo
->has_surface_tile_offset
;
987 brw
->has_negative_rhw_bug
= devinfo
->has_negative_rhw_bug
;
988 brw
->needs_unlit_centroid_workaround
=
989 devinfo
->needs_unlit_centroid_workaround
;
991 brw
->must_use_separate_stencil
= devinfo
->must_use_separate_stencil
;
992 brw
->has_swizzling
= screen
->hw_has_swizzling
;
994 isl_device_init(&brw
->isl_dev
, devinfo
, screen
->hw_has_swizzling
);
996 brw
->vs
.base
.stage
= MESA_SHADER_VERTEX
;
997 brw
->tcs
.base
.stage
= MESA_SHADER_TESS_CTRL
;
998 brw
->tes
.base
.stage
= MESA_SHADER_TESS_EVAL
;
999 brw
->gs
.base
.stage
= MESA_SHADER_GEOMETRY
;
1000 brw
->wm
.base
.stage
= MESA_SHADER_FRAGMENT
;
1001 if (brw
->gen
>= 8) {
1002 gen8_init_vtable_surface_functions(brw
);
1003 brw
->vtbl
.emit_depth_stencil_hiz
= gen8_emit_depth_stencil_hiz
;
1004 } else if (brw
->gen
>= 7) {
1005 gen7_init_vtable_surface_functions(brw
);
1006 brw
->vtbl
.emit_depth_stencil_hiz
= gen7_emit_depth_stencil_hiz
;
1007 } else if (brw
->gen
>= 6) {
1008 gen6_init_vtable_surface_functions(brw
);
1009 brw
->vtbl
.emit_depth_stencil_hiz
= gen6_emit_depth_stencil_hiz
;
1011 gen4_init_vtable_surface_functions(brw
);
1012 brw
->vtbl
.emit_depth_stencil_hiz
= brw_emit_depth_stencil_hiz
;
1015 brw_init_driver_functions(brw
, &functions
);
1018 functions
.GetGraphicsResetStatus
= brw_get_graphics_reset_status
;
1020 struct gl_context
*ctx
= &brw
->ctx
;
1022 if (!_mesa_initialize_context(ctx
, api
, mesaVis
, shareCtx
, &functions
)) {
1023 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1024 fprintf(stderr
, "%s: failed to init mesa context\n", __func__
);
1025 intelDestroyContext(driContextPriv
);
1029 driContextSetFlags(ctx
, flags
);
1031 /* Initialize the software rasterizer and helper modules.
1033 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1034 * software fallbacks (which we have to support on legacy GL to do weird
1035 * glDrawPixels(), glBitmap(), and other functions).
1037 if (api
!= API_OPENGL_CORE
&& api
!= API_OPENGLES2
) {
1038 _swrast_CreateContext(ctx
);
1041 _vbo_CreateContext(ctx
);
1042 if (ctx
->swrast_context
) {
1043 _tnl_CreateContext(ctx
);
1044 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= _tnl_run_pipeline
;
1045 _swsetup_CreateContext(ctx
);
1047 /* Configure swrast to match hardware characteristics: */
1048 _swrast_allow_pixel_fog(ctx
, false);
1049 _swrast_allow_vertex_fog(ctx
, true);
1052 _mesa_meta_init(ctx
);
1054 brw_process_driconf_options(brw
);
1056 if (INTEL_DEBUG
& DEBUG_PERF
)
1057 brw
->perf_debug
= true;
1059 brw_initialize_cs_context_constants(brw
);
1060 brw_initialize_context_constants(brw
);
1062 ctx
->Const
.ResetStrategy
= notify_reset
1063 ? GL_LOSE_CONTEXT_ON_RESET_ARB
: GL_NO_RESET_NOTIFICATION_ARB
;
1065 /* Reinitialize the context point state. It depends on ctx->Const values. */
1066 _mesa_init_point(ctx
);
1068 intel_fbo_init(brw
);
1070 intel_batchbuffer_init(&brw
->batch
, brw
->bufmgr
, brw
->has_llc
);
1072 if (brw
->gen
>= 6) {
1073 /* Create a new hardware context. Using a hardware context means that
1074 * our GPU state will be saved/restored on context switch, allowing us
1075 * to assume that the GPU is in the same state we left it in.
1077 * This is required for transform feedback buffer offsets, query objects,
1078 * and also allows us to reduce how much state we have to emit.
1080 brw
->hw_ctx
= drm_intel_gem_context_create(brw
->bufmgr
);
1083 fprintf(stderr
, "Gen6+ requires Kernel 3.6 or later.\n");
1084 intelDestroyContext(driContextPriv
);
1089 if (brw_init_pipe_control(brw
, devinfo
)) {
1090 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1091 intelDestroyContext(driContextPriv
);
1095 brw_init_state(brw
);
1097 intelInitExtensions(ctx
);
1099 brw_init_surface_formats(brw
);
1102 brw_blorp_init(brw
);
1104 brw
->urb
.size
= devinfo
->urb
.size
;
1107 brw
->urb
.gs_present
= false;
1109 brw
->prim_restart
.in_progress
= false;
1110 brw
->prim_restart
.enable_cut_index
= false;
1111 brw
->gs
.enabled
= false;
1112 brw
->sf
.viewport_transform_enable
= true;
1113 brw
->clip
.viewport_count
= 1;
1115 brw
->predicate
.state
= BRW_PREDICATE_STATE_RENDER
;
1117 brw
->max_gtt_map_object_size
= screen
->max_gtt_map_object_size
;
1119 brw
->use_resource_streamer
= screen
->has_resource_streamer
&&
1120 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1121 env_var_as_boolean("INTEL_USE_GATHER", false));
1123 ctx
->VertexProgram
._MaintainTnlProgram
= true;
1124 ctx
->FragmentProgram
._MaintainTexEnvProgram
= true;
1126 brw_draw_init( brw
);
1128 if ((flags
& __DRI_CTX_FLAG_DEBUG
) != 0) {
1129 /* Turn on some extra GL_ARB_debug_output generation. */
1130 brw
->perf_debug
= true;
1133 if ((flags
& __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
) != 0) {
1134 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB
;
1135 ctx
->Const
.RobustAccess
= GL_TRUE
;
1138 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
1139 brw_init_shader_time(brw
);
1141 _mesa_compute_version(ctx
);
1143 _mesa_initialize_dispatch_tables(ctx
);
1144 _mesa_initialize_vbo_vtxfmt(ctx
);
1146 vbo_use_buffer_objects(ctx
);
1147 vbo_always_unmap_buffers(ctx
);
1153 intelDestroyContext(__DRIcontext
* driContextPriv
)
1155 struct brw_context
*brw
=
1156 (struct brw_context
*) driContextPriv
->driverPrivate
;
1157 struct gl_context
*ctx
= &brw
->ctx
;
1159 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1160 if (INTEL_DEBUG
& DEBUG_AUB
) {
1161 intel_batchbuffer_flush(brw
);
1162 aub_dump_bmp(&brw
->ctx
);
1165 _mesa_meta_free(&brw
->ctx
);
1167 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
1168 /* Force a report. */
1169 brw
->shader_time
.report_time
= 0;
1171 brw_collect_and_report_shader_time(brw
);
1172 brw_destroy_shader_time(brw
);
1176 blorp_finish(&brw
->blorp
);
1178 brw_destroy_state(brw
);
1179 brw_draw_destroy(brw
);
1181 drm_intel_bo_unreference(brw
->curbe
.curbe_bo
);
1182 if (brw
->vs
.base
.scratch_bo
)
1183 drm_intel_bo_unreference(brw
->vs
.base
.scratch_bo
);
1184 if (brw
->tcs
.base
.scratch_bo
)
1185 drm_intel_bo_unreference(brw
->tcs
.base
.scratch_bo
);
1186 if (brw
->tes
.base
.scratch_bo
)
1187 drm_intel_bo_unreference(brw
->tes
.base
.scratch_bo
);
1188 if (brw
->gs
.base
.scratch_bo
)
1189 drm_intel_bo_unreference(brw
->gs
.base
.scratch_bo
);
1190 if (brw
->wm
.base
.scratch_bo
)
1191 drm_intel_bo_unreference(brw
->wm
.base
.scratch_bo
);
1193 gen7_reset_hw_bt_pool_offsets(brw
);
1194 drm_intel_bo_unreference(brw
->hw_bt_pool
.bo
);
1195 brw
->hw_bt_pool
.bo
= NULL
;
1197 drm_intel_gem_context_destroy(brw
->hw_ctx
);
1199 if (ctx
->swrast_context
) {
1200 _swsetup_DestroyContext(&brw
->ctx
);
1201 _tnl_DestroyContext(&brw
->ctx
);
1203 _vbo_DestroyContext(&brw
->ctx
);
1205 if (ctx
->swrast_context
)
1206 _swrast_DestroyContext(&brw
->ctx
);
1208 brw_fini_pipe_control(brw
);
1209 intel_batchbuffer_free(&brw
->batch
);
1211 drm_intel_bo_unreference(brw
->throttle_batch
[1]);
1212 drm_intel_bo_unreference(brw
->throttle_batch
[0]);
1213 brw
->throttle_batch
[1] = NULL
;
1214 brw
->throttle_batch
[0] = NULL
;
1216 driDestroyOptionCache(&brw
->optionCache
);
1218 /* free the Mesa context */
1219 _mesa_free_context_data(&brw
->ctx
);
1222 driContextPriv
->driverPrivate
= NULL
;
1226 intelUnbindContext(__DRIcontext
* driContextPriv
)
1228 /* Unset current context and dispath table */
1229 _mesa_make_current(NULL
, NULL
, NULL
);
1235 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1236 * on window system framebuffers.
1238 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1239 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1240 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1241 * for a visual where you're guaranteed to be capable, but it turns out that
1242 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1243 * incapable ones, because there's no difference between the two in resources
1244 * used. Applications thus get built that accidentally rely on the default
1245 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1248 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1249 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1250 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1251 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1252 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1253 * and get no sRGB encode (assuming that both kinds of visual are available).
1254 * Thus our choice to support sRGB by default on our visuals for desktop would
1255 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1257 * Unfortunately, renderbuffer setup happens before a context is created. So
1258 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1259 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1260 * yet), we go turn that back off before anyone finds out.
1263 intel_gles3_srgb_workaround(struct brw_context
*brw
,
1264 struct gl_framebuffer
*fb
)
1266 struct gl_context
*ctx
= &brw
->ctx
;
1268 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
1271 /* Some day when we support the sRGB capable bit on visuals available for
1272 * GLES, we'll need to respect that and not disable things here.
1274 fb
->Visual
.sRGBCapable
= false;
1275 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
1276 struct gl_renderbuffer
*rb
= fb
->Attachment
[i
].Renderbuffer
;
1278 rb
->Format
= _mesa_get_srgb_format_linear(rb
->Format
);
1283 intelMakeCurrent(__DRIcontext
* driContextPriv
,
1284 __DRIdrawable
* driDrawPriv
,
1285 __DRIdrawable
* driReadPriv
)
1287 struct brw_context
*brw
;
1288 GET_CURRENT_CONTEXT(curCtx
);
1291 brw
= (struct brw_context
*) driContextPriv
->driverPrivate
;
1295 /* According to the glXMakeCurrent() man page: "Pending commands to
1296 * the previous context, if any, are flushed before it is released."
1297 * But only flush if we're actually changing contexts.
1299 if (brw_context(curCtx
) && brw_context(curCtx
) != brw
) {
1300 _mesa_flush(curCtx
);
1303 if (driContextPriv
) {
1304 struct gl_context
*ctx
= &brw
->ctx
;
1305 struct gl_framebuffer
*fb
, *readFb
;
1307 if (driDrawPriv
== NULL
) {
1308 fb
= _mesa_get_incomplete_framebuffer();
1310 fb
= driDrawPriv
->driverPrivate
;
1311 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1314 if (driReadPriv
== NULL
) {
1315 readFb
= _mesa_get_incomplete_framebuffer();
1317 readFb
= driReadPriv
->driverPrivate
;
1318 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1321 /* The sRGB workaround changes the renderbuffer's format. We must change
1322 * the format before the renderbuffer's miptree get's allocated, otherwise
1323 * the formats of the renderbuffer and its miptree will differ.
1325 intel_gles3_srgb_workaround(brw
, fb
);
1326 intel_gles3_srgb_workaround(brw
, readFb
);
1328 /* If the context viewport hasn't been initialized, force a call out to
1329 * the loader to get buffers so we have a drawable size for the initial
1331 if (!brw
->ctx
.ViewportInitialized
)
1332 intel_prepare_render(brw
);
1334 _mesa_make_current(ctx
, fb
, readFb
);
1336 _mesa_make_current(NULL
, NULL
, NULL
);
1343 intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1344 __DRIdrawable
*drawable
)
1347 /* MSAA and fast color clear are not supported, so don't waste time
1348 * checking whether a resolve is needed.
1353 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1354 struct intel_renderbuffer
*rb
;
1356 /* Usually, only the back buffer will need to be downsampled. However,
1357 * the front buffer will also need it if the user has rendered into it.
1359 static const gl_buffer_index buffers
[2] = {
1364 for (int i
= 0; i
< 2; ++i
) {
1365 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
1366 if (rb
== NULL
|| rb
->mt
== NULL
)
1368 if (rb
->mt
->num_samples
<= 1) {
1369 assert(rb
->mt_layer
== 0 && rb
->mt_level
== 0 &&
1370 rb
->layer_count
== 1);
1371 intel_miptree_resolve_color(brw
, rb
->mt
, 0, 0, 1, 0);
1373 intel_renderbuffer_downsample(brw
, rb
);
1379 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
1381 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
1385 intel_query_dri2_buffers(struct brw_context
*brw
,
1386 __DRIdrawable
*drawable
,
1387 __DRIbuffer
**buffers
,
1391 intel_process_dri2_buffer(struct brw_context
*brw
,
1392 __DRIdrawable
*drawable
,
1393 __DRIbuffer
*buffer
,
1394 struct intel_renderbuffer
*rb
,
1395 const char *buffer_name
);
1398 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
);
1401 intel_update_dri2_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1403 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1404 struct intel_renderbuffer
*rb
;
1405 __DRIbuffer
*buffers
= NULL
;
1407 const char *region_name
;
1409 /* Set this up front, so that in case our buffers get invalidated
1410 * while we're getting new buffers, we don't clobber the stamp and
1411 * thus ignore the invalidate. */
1412 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1414 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1415 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1417 intel_query_dri2_buffers(brw
, drawable
, &buffers
, &count
);
1419 if (buffers
== NULL
)
1422 for (i
= 0; i
< count
; i
++) {
1423 switch (buffers
[i
].attachment
) {
1424 case __DRI_BUFFER_FRONT_LEFT
:
1425 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1426 region_name
= "dri2 front buffer";
1429 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
1430 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1431 region_name
= "dri2 fake front buffer";
1434 case __DRI_BUFFER_BACK_LEFT
:
1435 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1436 region_name
= "dri2 back buffer";
1439 case __DRI_BUFFER_DEPTH
:
1440 case __DRI_BUFFER_HIZ
:
1441 case __DRI_BUFFER_DEPTH_STENCIL
:
1442 case __DRI_BUFFER_STENCIL
:
1443 case __DRI_BUFFER_ACCUM
:
1446 "unhandled buffer attach event, attachment type %d\n",
1447 buffers
[i
].attachment
);
1451 intel_process_dri2_buffer(brw
, drawable
, &buffers
[i
], rb
, region_name
);
1457 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
1459 struct brw_context
*brw
= context
->driverPrivate
;
1460 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1462 /* Set this up front, so that in case our buffers get invalidated
1463 * while we're getting new buffers, we don't clobber the stamp and
1464 * thus ignore the invalidate. */
1465 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1467 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1468 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1470 if (dri_screen
->image
.loader
)
1471 intel_update_image_buffers(brw
, drawable
);
1473 intel_update_dri2_buffers(brw
, drawable
);
1475 driUpdateFramebufferSize(&brw
->ctx
, drawable
);
1479 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1480 * state is required.
1483 intel_prepare_render(struct brw_context
*brw
)
1485 struct gl_context
*ctx
= &brw
->ctx
;
1486 __DRIcontext
*driContext
= brw
->driContext
;
1487 __DRIdrawable
*drawable
;
1489 drawable
= driContext
->driDrawablePriv
;
1490 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
1491 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1492 intel_update_renderbuffers(driContext
, drawable
);
1493 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
1496 drawable
= driContext
->driReadablePriv
;
1497 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
1498 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1499 intel_update_renderbuffers(driContext
, drawable
);
1500 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
1503 /* If we're currently rendering to the front buffer, the rendering
1504 * that will happen next will probably dirty the front buffer. So
1505 * mark it as dirty here.
1507 if (_mesa_is_front_buffer_drawing(ctx
->DrawBuffer
))
1508 brw
->front_buffer_dirty
= true;
1512 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1514 * To determine which DRI buffers to request, examine the renderbuffers
1515 * attached to the drawable's framebuffer. Then request the buffers with
1516 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1518 * This is called from intel_update_renderbuffers().
1520 * \param drawable Drawable whose buffers are queried.
1521 * \param buffers [out] List of buffers returned by DRI2 query.
1522 * \param buffer_count [out] Number of buffers returned.
1524 * \see intel_update_renderbuffers()
1525 * \see DRI2GetBuffers()
1526 * \see DRI2GetBuffersWithFormat()
1529 intel_query_dri2_buffers(struct brw_context
*brw
,
1530 __DRIdrawable
*drawable
,
1531 __DRIbuffer
**buffers
,
1534 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1535 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1537 unsigned attachments
[8];
1539 struct intel_renderbuffer
*front_rb
;
1540 struct intel_renderbuffer
*back_rb
;
1542 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1543 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1545 memset(attachments
, 0, sizeof(attachments
));
1546 if ((_mesa_is_front_buffer_drawing(fb
) ||
1547 _mesa_is_front_buffer_reading(fb
) ||
1548 !back_rb
) && front_rb
) {
1549 /* If a fake front buffer is in use, then querying for
1550 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1551 * the real front buffer to the fake front buffer. So before doing the
1552 * query, we need to make sure all the pending drawing has landed in the
1553 * real front buffer.
1555 intel_batchbuffer_flush(brw
);
1556 intel_flush_front(&brw
->ctx
);
1558 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1559 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1560 } else if (front_rb
&& brw
->front_buffer_dirty
) {
1561 /* We have pending front buffer rendering, but we aren't querying for a
1562 * front buffer. If the front buffer we have is a fake front buffer,
1563 * the X server is going to throw it away when it processes the query.
1564 * So before doing the query, make sure all the pending drawing has
1565 * landed in the real front buffer.
1567 intel_batchbuffer_flush(brw
);
1568 intel_flush_front(&brw
->ctx
);
1572 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1573 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1576 assert(i
<= ARRAY_SIZE(attachments
));
1579 dri_screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1584 drawable
->loaderPrivate
);
1588 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1590 * This is called from intel_update_renderbuffers().
1593 * DRI buffers whose attachment point is DRI2BufferStencil or
1594 * DRI2BufferDepthStencil are handled as special cases.
1596 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1597 * that is passed to drm_intel_bo_gem_create_from_name().
1599 * \see intel_update_renderbuffers()
1602 intel_process_dri2_buffer(struct brw_context
*brw
,
1603 __DRIdrawable
*drawable
,
1604 __DRIbuffer
*buffer
,
1605 struct intel_renderbuffer
*rb
,
1606 const char *buffer_name
)
1608 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1614 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1616 /* We try to avoid closing and reopening the same BO name, because the first
1617 * use of a mapping of the buffer involves a bunch of page faulting which is
1618 * moderately expensive.
1620 struct intel_mipmap_tree
*last_mt
;
1621 if (num_samples
== 0)
1624 last_mt
= rb
->singlesample_mt
;
1626 uint32_t old_name
= 0;
1628 /* The bo already has a name because the miptree was created by a
1629 * previous call to intel_process_dri2_buffer(). If a bo already has a
1630 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1631 * create a new name.
1633 drm_intel_bo_flink(last_mt
->bo
, &old_name
);
1636 if (old_name
== buffer
->name
)
1639 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1641 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1642 buffer
->name
, buffer
->attachment
,
1643 buffer
->cpp
, buffer
->pitch
);
1646 bo
= drm_intel_bo_gem_create_from_name(brw
->bufmgr
, buffer_name
,
1650 "Failed to open BO for returned DRI2 buffer "
1651 "(%dx%d, %s, named %d).\n"
1652 "This is likely a bug in the X Server that will lead to a "
1654 drawable
->w
, drawable
->h
, buffer_name
, buffer
->name
);
1658 intel_update_winsys_renderbuffer_miptree(brw
, rb
, bo
,
1659 drawable
->w
, drawable
->h
,
1662 if (_mesa_is_front_buffer_drawing(fb
) &&
1663 (buffer
->attachment
== __DRI_BUFFER_FRONT_LEFT
||
1664 buffer
->attachment
== __DRI_BUFFER_FAKE_FRONT_LEFT
) &&
1665 rb
->Base
.Base
.NumSamples
> 1) {
1666 intel_renderbuffer_upsample(brw
, rb
);
1671 drm_intel_bo_unreference(bo
);
1675 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1677 * To determine which DRI buffers to request, examine the renderbuffers
1678 * attached to the drawable's framebuffer. Then request the buffers from
1681 * This is called from intel_update_renderbuffers().
1683 * \param drawable Drawable whose buffers are queried.
1684 * \param buffers [out] List of buffers returned by DRI2 query.
1685 * \param buffer_count [out] Number of buffers returned.
1687 * \see intel_update_renderbuffers()
1691 intel_update_image_buffer(struct brw_context
*intel
,
1692 __DRIdrawable
*drawable
,
1693 struct intel_renderbuffer
*rb
,
1695 enum __DRIimageBufferMask buffer_type
)
1697 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1699 if (!rb
|| !buffer
->bo
)
1702 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1704 /* Check and see if we're already bound to the right
1707 struct intel_mipmap_tree
*last_mt
;
1708 if (num_samples
== 0)
1711 last_mt
= rb
->singlesample_mt
;
1713 if (last_mt
&& last_mt
->bo
== buffer
->bo
)
1716 intel_update_winsys_renderbuffer_miptree(intel
, rb
, buffer
->bo
,
1717 buffer
->width
, buffer
->height
,
1720 if (_mesa_is_front_buffer_drawing(fb
) &&
1721 buffer_type
== __DRI_IMAGE_BUFFER_FRONT
&&
1722 rb
->Base
.Base
.NumSamples
> 1) {
1723 intel_renderbuffer_upsample(intel
, rb
);
1728 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1730 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1731 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1732 struct intel_renderbuffer
*front_rb
;
1733 struct intel_renderbuffer
*back_rb
;
1734 struct __DRIimageList images
;
1735 unsigned int format
;
1736 uint32_t buffer_mask
= 0;
1739 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1740 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1743 format
= intel_rb_format(back_rb
);
1745 format
= intel_rb_format(front_rb
);
1749 if (front_rb
&& (_mesa_is_front_buffer_drawing(fb
) ||
1750 _mesa_is_front_buffer_reading(fb
) || !back_rb
)) {
1751 buffer_mask
|= __DRI_IMAGE_BUFFER_FRONT
;
1755 buffer_mask
|= __DRI_IMAGE_BUFFER_BACK
;
1757 ret
= dri_screen
->image
.loader
->getBuffers(drawable
,
1758 driGLFormatToImageFormat(format
),
1759 &drawable
->dri2
.stamp
,
1760 drawable
->loaderPrivate
,
1766 if (images
.image_mask
& __DRI_IMAGE_BUFFER_FRONT
) {
1767 drawable
->w
= images
.front
->width
;
1768 drawable
->h
= images
.front
->height
;
1769 intel_update_image_buffer(brw
,
1773 __DRI_IMAGE_BUFFER_FRONT
);
1775 if (images
.image_mask
& __DRI_IMAGE_BUFFER_BACK
) {
1776 drawable
->w
= images
.back
->width
;
1777 drawable
->h
= images
.back
->height
;
1778 intel_update_image_buffer(brw
,
1782 __DRI_IMAGE_BUFFER_BACK
);