2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **********************************************************************/
30 * Keith Whitwell <keithw@vmware.com>
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46 #include "main/stencil.h"
47 #include "main/state.h"
51 #include "drivers/common/driverfuncs.h"
52 #include "drivers/common/meta.h"
55 #include "brw_context.h"
56 #include "brw_defines.h"
57 #include "brw_blorp.h"
59 #include "brw_state.h"
61 #include "intel_batchbuffer.h"
62 #include "intel_buffer_objects.h"
63 #include "intel_buffers.h"
64 #include "intel_fbo.h"
65 #include "intel_mipmap_tree.h"
66 #include "intel_pixel.h"
67 #include "intel_image.h"
68 #include "intel_tex.h"
69 #include "intel_tex_obj.h"
71 #include "swrast_setup/swrast_setup.h"
73 #include "tnl/t_pipeline.h"
74 #include "util/ralloc.h"
75 #include "util/debug.h"
76 #include "util/disk_cache.h"
79 /***************************************
80 * Mesa's Driver Functions
81 ***************************************/
83 const char *const brw_vendor_string
= "Intel Open Source Technology Center";
86 get_bsw_model(const struct intel_screen
*screen
)
88 switch (screen
->eu_total
) {
99 brw_get_renderer_string(const struct intel_screen
*screen
)
102 static char buffer
[128];
105 switch (screen
->deviceID
) {
107 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
108 #include "pci_ids/i965_pci_ids.h"
110 chipset
= "Unknown Intel Chipset";
114 /* Braswell branding is funny, so we have to fix it up here */
115 if (screen
->deviceID
== 0x22B1) {
116 bsw
= strdup(chipset
);
117 char *needle
= strstr(bsw
, "XXX");
119 memcpy(needle
, get_bsw_model(screen
), 3);
124 (void) driGetRendererString(buffer
, chipset
, 0);
129 static const GLubyte
*
130 intel_get_string(struct gl_context
* ctx
, GLenum name
)
132 const struct brw_context
*const brw
= brw_context(ctx
);
136 return (GLubyte
*) brw_vendor_string
;
140 (GLubyte
*) brw_get_renderer_string(brw
->screen
);
148 intel_viewport(struct gl_context
*ctx
)
150 struct brw_context
*brw
= brw_context(ctx
);
151 __DRIcontext
*driContext
= brw
->driContext
;
153 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
154 if (driContext
->driDrawablePriv
)
155 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
156 if (driContext
->driReadablePriv
)
157 dri2InvalidateDrawable(driContext
->driReadablePriv
);
162 intel_update_framebuffer(struct gl_context
*ctx
,
163 struct gl_framebuffer
*fb
)
165 struct brw_context
*brw
= brw_context(ctx
);
167 /* Quantize the derived default number of samples
169 fb
->DefaultGeometry
._NumSamples
=
170 intel_quantize_num_samples(brw
->screen
,
171 fb
->DefaultGeometry
.NumSamples
);
175 intel_update_state(struct gl_context
* ctx
)
177 GLuint new_state
= ctx
->NewState
;
178 struct brw_context
*brw
= brw_context(ctx
);
180 if (ctx
->swrast_context
)
181 _swrast_InvalidateState(ctx
, new_state
);
183 brw
->NewGLState
|= new_state
;
185 if (new_state
& (_NEW_SCISSOR
| _NEW_BUFFERS
| _NEW_VIEWPORT
))
186 _mesa_update_draw_buffer_bounds(ctx
, ctx
->DrawBuffer
);
188 if (new_state
& (_NEW_STENCIL
| _NEW_BUFFERS
)) {
189 brw
->stencil_enabled
= _mesa_stencil_is_enabled(ctx
);
190 brw
->stencil_two_sided
= _mesa_stencil_is_two_sided(ctx
);
191 brw
->stencil_write_enabled
=
192 _mesa_stencil_is_write_enabled(ctx
, brw
->stencil_two_sided
);
195 if (new_state
& _NEW_POLYGON
)
196 brw
->polygon_front_bit
= _mesa_polygon_get_front_bit(ctx
);
198 if (new_state
& _NEW_BUFFERS
) {
199 intel_update_framebuffer(ctx
, ctx
->DrawBuffer
);
200 if (ctx
->DrawBuffer
!= ctx
->ReadBuffer
)
201 intel_update_framebuffer(ctx
, ctx
->ReadBuffer
);
205 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
208 intel_flush_front(struct gl_context
*ctx
)
210 struct brw_context
*brw
= brw_context(ctx
);
211 __DRIcontext
*driContext
= brw
->driContext
;
212 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
213 __DRIscreen
*const dri_screen
= brw
->screen
->driScrnPriv
;
215 if (brw
->front_buffer_dirty
&& _mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
216 if (flushFront(dri_screen
) && driDrawable
&&
217 driDrawable
->loaderPrivate
) {
219 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
221 * This potentially resolves both front and back buffer. It
222 * is unnecessary to resolve the back, but harms nothing except
223 * performance. And no one cares about front-buffer render
226 intel_resolve_for_dri2_flush(brw
, driDrawable
);
227 intel_batchbuffer_flush(brw
);
229 flushFront(dri_screen
)(driDrawable
, driDrawable
->loaderPrivate
);
231 /* We set the dirty bit in intel_prepare_render() if we're
232 * front buffer rendering once we get there.
234 brw
->front_buffer_dirty
= false;
240 intel_glFlush(struct gl_context
*ctx
)
242 struct brw_context
*brw
= brw_context(ctx
);
244 intel_batchbuffer_flush(brw
);
245 intel_flush_front(ctx
);
247 brw
->need_flush_throttle
= true;
251 intel_finish(struct gl_context
* ctx
)
253 struct brw_context
*brw
= brw_context(ctx
);
257 if (brw
->batch
.last_bo
)
258 brw_bo_wait_rendering(brw
->batch
.last_bo
);
262 brw_init_driver_functions(struct brw_context
*brw
,
263 struct dd_function_table
*functions
)
265 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
267 _mesa_init_driver_functions(functions
);
269 /* GLX uses DRI2 invalidate events to handle window resizing.
270 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
271 * which doesn't provide a mechanism for snooping the event queues.
273 * So EGL still relies on viewport hacks to handle window resizing.
274 * This should go away with DRI3000.
276 if (!brw
->driContext
->driScreenPriv
->dri2
.useInvalidate
)
277 functions
->Viewport
= intel_viewport
;
279 functions
->Flush
= intel_glFlush
;
280 functions
->Finish
= intel_finish
;
281 functions
->GetString
= intel_get_string
;
282 functions
->UpdateState
= intel_update_state
;
284 intelInitTextureFuncs(functions
);
285 intelInitTextureImageFuncs(functions
);
286 intelInitTextureCopyImageFuncs(functions
);
287 intelInitCopyImageFuncs(functions
);
288 intelInitClearFuncs(functions
);
289 intelInitBufferFuncs(functions
);
290 intelInitPixelFuncs(functions
);
291 intelInitBufferObjectFuncs(functions
);
292 brw_init_syncobj_functions(functions
);
293 brw_init_object_purgeable_functions(functions
);
295 brwInitFragProgFuncs( functions
);
296 brw_init_common_queryobj_functions(functions
);
297 if (devinfo
->gen
>= 8 || devinfo
->is_haswell
)
298 hsw_init_queryobj_functions(functions
);
299 else if (devinfo
->gen
>= 6)
300 gen6_init_queryobj_functions(functions
);
302 gen4_init_queryobj_functions(functions
);
303 brw_init_compute_functions(functions
);
304 brw_init_conditional_render_functions(functions
);
306 functions
->GenerateMipmap
= brw_generate_mipmap
;
308 functions
->QueryInternalFormat
= brw_query_internal_format
;
310 functions
->NewTransformFeedback
= brw_new_transform_feedback
;
311 functions
->DeleteTransformFeedback
= brw_delete_transform_feedback
;
312 if (can_do_mi_math_and_lrr(brw
->screen
)) {
313 functions
->BeginTransformFeedback
= hsw_begin_transform_feedback
;
314 functions
->EndTransformFeedback
= hsw_end_transform_feedback
;
315 functions
->PauseTransformFeedback
= hsw_pause_transform_feedback
;
316 functions
->ResumeTransformFeedback
= hsw_resume_transform_feedback
;
317 } else if (devinfo
->gen
>= 7) {
318 functions
->BeginTransformFeedback
= gen7_begin_transform_feedback
;
319 functions
->EndTransformFeedback
= gen7_end_transform_feedback
;
320 functions
->PauseTransformFeedback
= gen7_pause_transform_feedback
;
321 functions
->ResumeTransformFeedback
= gen7_resume_transform_feedback
;
322 functions
->GetTransformFeedbackVertexCount
=
323 brw_get_transform_feedback_vertex_count
;
325 functions
->BeginTransformFeedback
= brw_begin_transform_feedback
;
326 functions
->EndTransformFeedback
= brw_end_transform_feedback
;
327 functions
->PauseTransformFeedback
= brw_pause_transform_feedback
;
328 functions
->ResumeTransformFeedback
= brw_resume_transform_feedback
;
329 functions
->GetTransformFeedbackVertexCount
=
330 brw_get_transform_feedback_vertex_count
;
333 if (devinfo
->gen
>= 6)
334 functions
->GetSamplePosition
= gen6_get_sample_position
;
336 /* GL_ARB_get_program_binary */
337 brw_program_binary_init(brw
->screen
->deviceID
);
338 functions
->GetProgramBinaryDriverSHA1
= brw_get_program_binary_driver_sha1
;
339 functions
->ProgramBinarySerializeDriverBlob
= brw_program_serialize_nir
;
340 functions
->ProgramBinaryDeserializeDriverBlob
=
341 brw_deserialize_program_binary
;
345 brw_initialize_context_constants(struct brw_context
*brw
)
347 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
348 struct gl_context
*ctx
= &brw
->ctx
;
349 const struct brw_compiler
*compiler
= brw
->screen
->compiler
;
351 const bool stage_exists
[MESA_SHADER_STAGES
] = {
352 [MESA_SHADER_VERTEX
] = true,
353 [MESA_SHADER_TESS_CTRL
] = devinfo
->gen
>= 7,
354 [MESA_SHADER_TESS_EVAL
] = devinfo
->gen
>= 7,
355 [MESA_SHADER_GEOMETRY
] = devinfo
->gen
>= 6,
356 [MESA_SHADER_FRAGMENT
] = true,
357 [MESA_SHADER_COMPUTE
] =
358 (_mesa_is_desktop_gl(ctx
) &&
359 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 1024) ||
360 (ctx
->API
== API_OPENGLES2
&&
361 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 128),
364 unsigned num_stages
= 0;
365 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
370 unsigned max_samplers
=
371 devinfo
->gen
>= 8 || devinfo
->is_haswell
? BRW_MAX_TEX_UNIT
: 16;
373 ctx
->Const
.MaxDualSourceDrawBuffers
= 1;
374 ctx
->Const
.MaxDrawBuffers
= BRW_MAX_DRAW_BUFFERS
;
375 ctx
->Const
.MaxCombinedShaderOutputResources
=
376 MAX_IMAGE_UNITS
+ BRW_MAX_DRAW_BUFFERS
;
378 /* The timestamp register we can read for glGetTimestamp() is
379 * sometimes only 32 bits, before scaling to nanoseconds (depending
382 * Once scaled to nanoseconds the timestamp would roll over at a
383 * non-power-of-two, so an application couldn't use
384 * GL_QUERY_COUNTER_BITS to handle rollover correctly. Instead, we
385 * report 36 bits and truncate at that (rolling over 5 times as
386 * often as the HW counter), and when the 32-bit counter rolls
387 * over, it happens to also be at a rollover in the reported value
388 * from near (1<<36) to 0.
390 * The low 32 bits rolls over in ~343 seconds. Our 36-bit result
391 * rolls over every ~69 seconds.
393 ctx
->Const
.QueryCounterBits
.Timestamp
= 36;
395 ctx
->Const
.MaxTextureCoordUnits
= 8; /* Mesa limit */
396 ctx
->Const
.MaxImageUnits
= MAX_IMAGE_UNITS
;
397 if (devinfo
->gen
>= 7) {
398 ctx
->Const
.MaxRenderbufferSize
= 16384;
399 ctx
->Const
.MaxTextureLevels
= MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS
);
400 ctx
->Const
.MaxCubeTextureLevels
= 15; /* 16384 */
402 ctx
->Const
.MaxRenderbufferSize
= 8192;
403 ctx
->Const
.MaxTextureLevels
= MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS
);
404 ctx
->Const
.MaxCubeTextureLevels
= 14; /* 8192 */
406 ctx
->Const
.Max3DTextureLevels
= 12; /* 2048 */
407 ctx
->Const
.MaxArrayTextureLayers
= devinfo
->gen
>= 7 ? 2048 : 512;
408 ctx
->Const
.MaxTextureMbytes
= 1536;
409 ctx
->Const
.MaxTextureRectSize
= devinfo
->gen
>= 7 ? 16384 : 8192;
410 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
411 ctx
->Const
.MaxTextureLodBias
= 15.0;
412 ctx
->Const
.StripTextureBorder
= true;
413 if (devinfo
->gen
>= 7) {
414 ctx
->Const
.MaxProgramTextureGatherComponents
= 4;
415 ctx
->Const
.MinProgramTextureGatherOffset
= -32;
416 ctx
->Const
.MaxProgramTextureGatherOffset
= 31;
417 } else if (devinfo
->gen
== 6) {
418 ctx
->Const
.MaxProgramTextureGatherComponents
= 1;
419 ctx
->Const
.MinProgramTextureGatherOffset
= -8;
420 ctx
->Const
.MaxProgramTextureGatherOffset
= 7;
423 ctx
->Const
.MaxUniformBlockSize
= 65536;
425 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
426 struct gl_program_constants
*prog
= &ctx
->Const
.Program
[i
];
428 if (!stage_exists
[i
])
431 prog
->MaxTextureImageUnits
= max_samplers
;
433 prog
->MaxUniformBlocks
= BRW_MAX_UBO
;
434 prog
->MaxCombinedUniformComponents
=
435 prog
->MaxUniformComponents
+
436 ctx
->Const
.MaxUniformBlockSize
/ 4 * prog
->MaxUniformBlocks
;
438 prog
->MaxAtomicCounters
= MAX_ATOMIC_COUNTERS
;
439 prog
->MaxAtomicBuffers
= BRW_MAX_ABO
;
440 prog
->MaxImageUniforms
= compiler
->scalar_stage
[i
] ? BRW_MAX_IMAGES
: 0;
441 prog
->MaxShaderStorageBlocks
= BRW_MAX_SSBO
;
444 ctx
->Const
.MaxTextureUnits
=
445 MIN2(ctx
->Const
.MaxTextureCoordUnits
,
446 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
);
448 ctx
->Const
.MaxUniformBufferBindings
= num_stages
* BRW_MAX_UBO
;
449 ctx
->Const
.MaxCombinedUniformBlocks
= num_stages
* BRW_MAX_UBO
;
450 ctx
->Const
.MaxCombinedAtomicBuffers
= num_stages
* BRW_MAX_ABO
;
451 ctx
->Const
.MaxCombinedShaderStorageBlocks
= num_stages
* BRW_MAX_SSBO
;
452 ctx
->Const
.MaxShaderStorageBufferBindings
= num_stages
* BRW_MAX_SSBO
;
453 ctx
->Const
.MaxCombinedTextureImageUnits
= num_stages
* max_samplers
;
454 ctx
->Const
.MaxCombinedImageUniforms
= num_stages
* BRW_MAX_IMAGES
;
457 /* Hardware only supports a limited number of transform feedback buffers.
458 * So we need to override the Mesa default (which is based only on software
461 ctx
->Const
.MaxTransformFeedbackBuffers
= BRW_MAX_SOL_BUFFERS
;
463 /* On Gen6, in the worst case, we use up one binding table entry per
464 * transform feedback component (see comments above the definition of
465 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
466 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
467 * BRW_MAX_SOL_BINDINGS.
469 * In "separate components" mode, we need to divide this value by
470 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
471 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
473 ctx
->Const
.MaxTransformFeedbackInterleavedComponents
= BRW_MAX_SOL_BINDINGS
;
474 ctx
->Const
.MaxTransformFeedbackSeparateComponents
=
475 BRW_MAX_SOL_BINDINGS
/ BRW_MAX_SOL_BUFFERS
;
477 ctx
->Const
.AlwaysUseGetTransformFeedbackVertexCount
=
478 !can_do_mi_math_and_lrr(brw
->screen
);
481 const int *msaa_modes
= intel_supported_msaa_modes(brw
->screen
);
482 const int clamp_max_samples
=
483 driQueryOptioni(&brw
->optionCache
, "clamp_max_samples");
485 if (clamp_max_samples
< 0) {
486 max_samples
= msaa_modes
[0];
488 /* Select the largest supported MSAA mode that does not exceed
492 for (int i
= 0; msaa_modes
[i
] != 0; ++i
) {
493 if (msaa_modes
[i
] <= clamp_max_samples
) {
494 max_samples
= msaa_modes
[i
];
500 ctx
->Const
.MaxSamples
= max_samples
;
501 ctx
->Const
.MaxColorTextureSamples
= max_samples
;
502 ctx
->Const
.MaxDepthTextureSamples
= max_samples
;
503 ctx
->Const
.MaxIntegerSamples
= max_samples
;
504 ctx
->Const
.MaxImageSamples
= 0;
506 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
507 * to map indices of rectangular grid to sample numbers within a pixel.
508 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
509 * extension implementation. For more details see the comment above
510 * gen6_set_sample_maps() definition.
512 gen6_set_sample_maps(ctx
);
514 ctx
->Const
.MinLineWidth
= 1.0;
515 ctx
->Const
.MinLineWidthAA
= 1.0;
516 if (devinfo
->gen
>= 6) {
517 ctx
->Const
.MaxLineWidth
= 7.375;
518 ctx
->Const
.MaxLineWidthAA
= 7.375;
519 ctx
->Const
.LineWidthGranularity
= 0.125;
521 ctx
->Const
.MaxLineWidth
= 7.0;
522 ctx
->Const
.MaxLineWidthAA
= 7.0;
523 ctx
->Const
.LineWidthGranularity
= 0.5;
526 /* For non-antialiased lines, we have to round the line width to the
527 * nearest whole number. Make sure that we don't advertise a line
528 * width that, when rounded, will be beyond the actual hardware
531 assert(roundf(ctx
->Const
.MaxLineWidth
) <= ctx
->Const
.MaxLineWidth
);
533 ctx
->Const
.MinPointSize
= 1.0;
534 ctx
->Const
.MinPointSizeAA
= 1.0;
535 ctx
->Const
.MaxPointSize
= 255.0;
536 ctx
->Const
.MaxPointSizeAA
= 255.0;
537 ctx
->Const
.PointSizeGranularity
= 1.0;
539 if (devinfo
->gen
>= 5 || devinfo
->is_g4x
)
540 ctx
->Const
.MaxClipPlanes
= 8;
542 ctx
->Const
.GLSLTessLevelsAsInputs
= true;
543 ctx
->Const
.PrimitiveRestartForPatches
= true;
545 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeInstructions
= 16 * 1024;
546 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxAluInstructions
= 0;
547 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexInstructions
= 0;
548 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexIndirections
= 0;
549 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAluInstructions
= 0;
550 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexInstructions
= 0;
551 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexIndirections
= 0;
552 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAttribs
= 16;
553 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTemps
= 256;
554 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAddressRegs
= 1;
555 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
= 1024;
556 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
=
557 MIN2(ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
,
558 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
);
560 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeInstructions
= 1024;
561 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAluInstructions
= 1024;
562 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexInstructions
= 1024;
563 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexIndirections
= 1024;
564 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAttribs
= 12;
565 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTemps
= 256;
566 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAddressRegs
= 0;
567 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
= 1024;
568 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
=
569 MIN2(ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
,
570 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
);
572 /* Fragment shaders use real, 32-bit twos-complement integers for all
575 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMin
= 31;
576 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMax
= 30;
577 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.Precision
= 0;
578 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
579 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
581 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMin
= 31;
582 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMax
= 30;
583 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.Precision
= 0;
584 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
585 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
587 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
588 * but we're not sure how it's actually done for vertex order,
589 * that affect provoking vertex decision. Always use last vertex
590 * convention for quad primitive which works as expected for now.
592 if (devinfo
->gen
>= 6)
593 ctx
->Const
.QuadsFollowProvokingVertexConvention
= false;
595 ctx
->Const
.NativeIntegers
= true;
596 ctx
->Const
.VertexID_is_zero_based
= true;
598 /* Regarding the CMP instruction, the Ivybridge PRM says:
600 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
601 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
602 * 0xFFFFFFFF) is assigned to dst."
604 * but PRMs for earlier generations say
606 * "In dword format, one GRF may store up to 8 results. When the register
607 * is used later as a vector of Booleans, as only LSB at each channel
608 * contains meaning [sic] data, software should make sure all higher bits
609 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
611 * We select the representation of a true boolean uniform to be ~0, and fix
612 * the results of Gen <= 5 CMP instruction's with -(result & 1).
614 ctx
->Const
.UniformBooleanTrue
= ~0;
616 /* From the gen4 PRM, volume 4 page 127:
618 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
619 * the base address of the first element of the surface, computed in
620 * software by adding the surface base address to the byte offset of
621 * the element in the buffer."
623 * However, unaligned accesses are slower, so enforce buffer alignment.
625 * In order to push UBO data, 3DSTATE_CONSTANT_XS imposes an additional
626 * restriction: the start of the buffer needs to be 32B aligned.
628 ctx
->Const
.UniformBufferOffsetAlignment
= 32;
630 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
631 * that we can safely have the CPU and GPU writing the same SSBO on
632 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
633 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
634 * be updating disjoint regions of the buffer simultaneously and that will
635 * break if the regions overlap the same cacheline.
637 ctx
->Const
.ShaderStorageBufferOffsetAlignment
= 64;
638 ctx
->Const
.TextureBufferOffsetAlignment
= 16;
639 ctx
->Const
.MaxTextureBufferSize
= 128 * 1024 * 1024;
641 if (devinfo
->gen
>= 6) {
642 ctx
->Const
.MaxVarying
= 32;
643 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxOutputComponents
= 128;
644 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxInputComponents
=
645 compiler
->scalar_stage
[MESA_SHADER_GEOMETRY
] ? 128 : 64;
646 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxOutputComponents
= 128;
647 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxInputComponents
= 128;
648 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxInputComponents
= 128;
649 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxOutputComponents
= 128;
650 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxInputComponents
= 128;
651 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxOutputComponents
= 128;
654 /* We want the GLSL compiler to emit code that uses condition codes */
655 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
656 ctx
->Const
.ShaderCompilerOptions
[i
] =
657 brw
->screen
->compiler
->glsl_compiler_options
[i
];
660 if (devinfo
->gen
>= 7) {
661 ctx
->Const
.MaxViewportWidth
= 32768;
662 ctx
->Const
.MaxViewportHeight
= 32768;
665 /* ARB_viewport_array, OES_viewport_array */
666 if (devinfo
->gen
>= 6) {
667 ctx
->Const
.MaxViewports
= GEN6_NUM_VIEWPORTS
;
668 ctx
->Const
.ViewportSubpixelBits
= 0;
670 /* Cast to float before negating because MaxViewportWidth is unsigned.
672 ctx
->Const
.ViewportBounds
.Min
= -(float)ctx
->Const
.MaxViewportWidth
;
673 ctx
->Const
.ViewportBounds
.Max
= ctx
->Const
.MaxViewportWidth
;
676 /* ARB_gpu_shader5 */
677 if (devinfo
->gen
>= 7)
678 ctx
->Const
.MaxVertexStreams
= MIN2(4, MAX_VERTEX_STREAMS
);
680 /* ARB_framebuffer_no_attachments */
681 ctx
->Const
.MaxFramebufferWidth
= 16384;
682 ctx
->Const
.MaxFramebufferHeight
= 16384;
683 ctx
->Const
.MaxFramebufferLayers
= ctx
->Const
.MaxArrayTextureLayers
;
684 ctx
->Const
.MaxFramebufferSamples
= max_samples
;
686 /* OES_primitive_bounding_box */
687 ctx
->Const
.NoPrimitiveBoundingBoxOutput
= true;
689 /* TODO: We should be able to use STD430 packing by default on all hardware
690 * but some piglit tests [1] currently fail on SNB when this is enabled.
691 * The problem is the messages we're using for doing uniform pulls
692 * in the vec4 back-end on SNB is the OWORD block load instruction, which
693 * takes its offset in units of OWORDS (16 bytes). On IVB+, we use the
694 * sampler which doesn't have these restrictions.
696 * In the scalar back-end, we use the sampler for dynamic uniform loads and
697 * pull an entire cache line at a time for constant offset loads both of
698 * which support almost any alignment.
700 * [1] glsl-1.40/uniform_buffer/vs-float-array-variable-index.shader_test
702 if (devinfo
->gen
>= 7)
703 ctx
->Const
.UseSTD430AsDefaultPacking
= true;
705 if (!(ctx
->Const
.ContextFlags
& GL_CONTEXT_FLAG_DEBUG_BIT
))
706 ctx
->Const
.AllowMappedBuffersDuringExecution
= true;
708 /* GL_ARB_get_program_binary */
709 ctx
->Const
.NumProgramBinaryFormats
= 1;
713 brw_initialize_cs_context_constants(struct brw_context
*brw
)
715 struct gl_context
*ctx
= &brw
->ctx
;
716 const struct intel_screen
*screen
= brw
->screen
;
717 struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
719 /* FINISHME: Do this for all platforms that the kernel supports */
720 if (devinfo
->is_cherryview
&&
721 screen
->subslice_total
> 0 && screen
->eu_total
> 0) {
722 /* Logical CS threads = EUs per subslice * 7 threads per EU */
723 uint32_t max_cs_threads
= screen
->eu_total
/ screen
->subslice_total
* 7;
725 /* Fuse configurations may give more threads than expected, never less. */
726 if (max_cs_threads
> devinfo
->max_cs_threads
)
727 devinfo
->max_cs_threads
= max_cs_threads
;
730 /* Maximum number of scalar compute shader invocations that can be run in
731 * parallel in the same subslice assuming SIMD32 dispatch.
733 * We don't advertise more than 64 threads, because we are limited to 64 by
734 * our usage of thread_width_max in the gpgpu walker command. This only
735 * currently impacts Haswell, which otherwise might be able to advertise 70
736 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
737 * required the number of invocation needed for ARB_compute_shader.
739 const unsigned max_threads
= MIN2(64, devinfo
->max_cs_threads
);
740 const uint32_t max_invocations
= 32 * max_threads
;
741 ctx
->Const
.MaxComputeWorkGroupSize
[0] = max_invocations
;
742 ctx
->Const
.MaxComputeWorkGroupSize
[1] = max_invocations
;
743 ctx
->Const
.MaxComputeWorkGroupSize
[2] = max_invocations
;
744 ctx
->Const
.MaxComputeWorkGroupInvocations
= max_invocations
;
745 ctx
->Const
.MaxComputeSharedMemorySize
= 64 * 1024;
749 * Process driconf (drirc) options, setting appropriate context flags.
751 * intelInitExtensions still pokes at optionCache directly, in order to
752 * avoid advertising various extensions. No flags are set, so it makes
753 * sense to continue doing that there.
756 brw_process_driconf_options(struct brw_context
*brw
)
758 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
759 struct gl_context
*ctx
= &brw
->ctx
;
761 driOptionCache
*options
= &brw
->optionCache
;
762 driParseConfigFiles(options
, &brw
->screen
->optionCache
,
763 brw
->driContext
->driScreenPriv
->myNum
, "i965");
765 int bo_reuse_mode
= driQueryOptioni(options
, "bo_reuse");
766 switch (bo_reuse_mode
) {
767 case DRI_CONF_BO_REUSE_DISABLED
:
769 case DRI_CONF_BO_REUSE_ALL
:
770 brw_bufmgr_enable_reuse(brw
->bufmgr
);
774 if (INTEL_DEBUG
& DEBUG_NO_HIZ
) {
775 brw
->has_hiz
= false;
776 /* On gen6, you can only do separate stencil with HIZ. */
777 if (devinfo
->gen
== 6)
778 brw
->has_separate_stencil
= false;
781 if (driQueryOptionb(options
, "mesa_no_error"))
782 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_NO_ERROR_BIT_KHR
;
784 if (driQueryOptionb(options
, "always_flush_batch")) {
785 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
786 brw
->always_flush_batch
= true;
789 if (driQueryOptionb(options
, "always_flush_cache")) {
790 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
791 brw
->always_flush_cache
= true;
794 if (driQueryOptionb(options
, "disable_throttling")) {
795 fprintf(stderr
, "disabling flush throttling\n");
796 brw
->disable_throttling
= true;
799 brw
->precompile
= driQueryOptionb(&brw
->optionCache
, "shader_precompile");
801 if (driQueryOptionb(&brw
->optionCache
, "precise_trig"))
802 brw
->screen
->compiler
->precise_trig
= true;
804 ctx
->Const
.ForceGLSLExtensionsWarn
=
805 driQueryOptionb(options
, "force_glsl_extensions_warn");
807 ctx
->Const
.ForceGLSLVersion
=
808 driQueryOptioni(options
, "force_glsl_version");
810 ctx
->Const
.DisableGLSLLineContinuations
=
811 driQueryOptionb(options
, "disable_glsl_line_continuations");
813 ctx
->Const
.AllowGLSLExtensionDirectiveMidShader
=
814 driQueryOptionb(options
, "allow_glsl_extension_directive_midshader");
816 ctx
->Const
.AllowGLSLBuiltinVariableRedeclaration
=
817 driQueryOptionb(options
, "allow_glsl_builtin_variable_redeclaration");
819 ctx
->Const
.AllowHigherCompatVersion
=
820 driQueryOptionb(options
, "allow_higher_compat_version");
822 ctx
->Const
.ForceGLSLAbsSqrt
=
823 driQueryOptionb(options
, "force_glsl_abs_sqrt");
825 ctx
->Const
.GLSLZeroInit
= driQueryOptionb(options
, "glsl_zero_init");
827 brw
->dual_color_blend_by_location
=
828 driQueryOptionb(options
, "dual_color_blend_by_location");
830 ctx
->Const
.AllowGLSLCrossStageInterpolationMismatch
=
831 driQueryOptionb(options
, "allow_glsl_cross_stage_interpolation_mismatch");
833 ctx
->Const
.dri_config_options_sha1
= ralloc_array(brw
, unsigned char, 20);
834 driComputeOptionsSha1(&brw
->screen
->optionCache
,
835 ctx
->Const
.dri_config_options_sha1
);
839 brwCreateContext(gl_api api
,
840 const struct gl_config
*mesaVis
,
841 __DRIcontext
*driContextPriv
,
842 const struct __DriverContextConfig
*ctx_config
,
843 unsigned *dri_ctx_error
,
844 void *sharedContextPrivate
)
846 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
847 struct intel_screen
*screen
= driContextPriv
->driScreenPriv
->driverPrivate
;
848 const struct gen_device_info
*devinfo
= &screen
->devinfo
;
849 struct dd_function_table functions
;
851 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
852 * provides us with context reset notifications.
854 uint32_t allowed_flags
= __DRI_CTX_FLAG_DEBUG
|
855 __DRI_CTX_FLAG_FORWARD_COMPATIBLE
|
856 __DRI_CTX_FLAG_NO_ERROR
;
858 if (screen
->has_context_reset_notification
)
859 allowed_flags
|= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
;
861 if (ctx_config
->flags
& ~allowed_flags
) {
862 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
866 if (ctx_config
->attribute_mask
&
867 ~(__DRIVER_CONTEXT_ATTRIB_RESET_STRATEGY
|
868 __DRIVER_CONTEXT_ATTRIB_PRIORITY
)) {
869 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE
;
874 ((ctx_config
->attribute_mask
& __DRIVER_CONTEXT_ATTRIB_RESET_STRATEGY
) &&
875 ctx_config
->reset_strategy
!= __DRI_CTX_RESET_NO_NOTIFICATION
);
877 struct brw_context
*brw
= rzalloc(NULL
, struct brw_context
);
879 fprintf(stderr
, "%s: failed to alloc context\n", __func__
);
880 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
884 driContextPriv
->driverPrivate
= brw
;
885 brw
->driContext
= driContextPriv
;
886 brw
->screen
= screen
;
887 brw
->bufmgr
= screen
->bufmgr
;
889 brw
->has_hiz
= devinfo
->has_hiz_and_separate_stencil
;
890 brw
->has_separate_stencil
= devinfo
->has_hiz_and_separate_stencil
;
892 brw
->has_swizzling
= screen
->hw_has_swizzling
;
894 brw
->isl_dev
= screen
->isl_dev
;
896 brw
->vs
.base
.stage
= MESA_SHADER_VERTEX
;
897 brw
->tcs
.base
.stage
= MESA_SHADER_TESS_CTRL
;
898 brw
->tes
.base
.stage
= MESA_SHADER_TESS_EVAL
;
899 brw
->gs
.base
.stage
= MESA_SHADER_GEOMETRY
;
900 brw
->wm
.base
.stage
= MESA_SHADER_FRAGMENT
;
901 brw
->cs
.base
.stage
= MESA_SHADER_COMPUTE
;
902 if (devinfo
->gen
>= 8) {
903 brw
->vtbl
.emit_depth_stencil_hiz
= gen8_emit_depth_stencil_hiz
;
904 } else if (devinfo
->gen
>= 7) {
905 brw
->vtbl
.emit_depth_stencil_hiz
= gen7_emit_depth_stencil_hiz
;
906 } else if (devinfo
->gen
>= 6) {
907 brw
->vtbl
.emit_depth_stencil_hiz
= gen6_emit_depth_stencil_hiz
;
909 brw
->vtbl
.emit_depth_stencil_hiz
= brw_emit_depth_stencil_hiz
;
912 brw_init_driver_functions(brw
, &functions
);
915 functions
.GetGraphicsResetStatus
= brw_get_graphics_reset_status
;
917 struct gl_context
*ctx
= &brw
->ctx
;
919 if (!_mesa_initialize_context(ctx
, api
, mesaVis
, shareCtx
, &functions
)) {
920 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
921 fprintf(stderr
, "%s: failed to init mesa context\n", __func__
);
922 intelDestroyContext(driContextPriv
);
926 driContextSetFlags(ctx
, ctx_config
->flags
);
928 /* Initialize the software rasterizer and helper modules.
930 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
931 * software fallbacks (which we have to support on legacy GL to do weird
932 * glDrawPixels(), glBitmap(), and other functions).
934 if (api
!= API_OPENGL_CORE
&& api
!= API_OPENGLES2
) {
935 _swrast_CreateContext(ctx
);
938 _vbo_CreateContext(ctx
);
939 if (ctx
->swrast_context
) {
940 _tnl_CreateContext(ctx
);
941 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= _tnl_run_pipeline
;
942 _swsetup_CreateContext(ctx
);
944 /* Configure swrast to match hardware characteristics: */
945 _swrast_allow_pixel_fog(ctx
, false);
946 _swrast_allow_vertex_fog(ctx
, true);
949 _mesa_meta_init(ctx
);
951 brw_process_driconf_options(brw
);
953 if (INTEL_DEBUG
& DEBUG_PERF
)
954 brw
->perf_debug
= true;
956 brw_initialize_cs_context_constants(brw
);
957 brw_initialize_context_constants(brw
);
959 ctx
->Const
.ResetStrategy
= notify_reset
960 ? GL_LOSE_CONTEXT_ON_RESET_ARB
: GL_NO_RESET_NOTIFICATION_ARB
;
962 /* Reinitialize the context point state. It depends on ctx->Const values. */
963 _mesa_init_point(ctx
);
967 intel_batchbuffer_init(brw
);
969 if (devinfo
->gen
>= 6) {
970 /* Create a new hardware context. Using a hardware context means that
971 * our GPU state will be saved/restored on context switch, allowing us
972 * to assume that the GPU is in the same state we left it in.
974 * This is required for transform feedback buffer offsets, query objects,
975 * and also allows us to reduce how much state we have to emit.
977 brw
->hw_ctx
= brw_create_hw_context(brw
->bufmgr
);
980 fprintf(stderr
, "Failed to create hardware context.\n");
981 intelDestroyContext(driContextPriv
);
985 int hw_priority
= BRW_CONTEXT_MEDIUM_PRIORITY
;
986 if (ctx_config
->attribute_mask
& __DRIVER_CONTEXT_ATTRIB_PRIORITY
) {
987 switch (ctx_config
->priority
) {
988 case __DRI_CTX_PRIORITY_LOW
:
989 hw_priority
= BRW_CONTEXT_LOW_PRIORITY
;
991 case __DRI_CTX_PRIORITY_HIGH
:
992 hw_priority
= BRW_CONTEXT_HIGH_PRIORITY
;
996 if (hw_priority
!= I915_CONTEXT_DEFAULT_PRIORITY
&&
997 brw_hw_context_set_priority(brw
->bufmgr
, brw
->hw_ctx
, hw_priority
)) {
999 "Failed to set priority [%d:%d] for hardware context.\n",
1000 ctx_config
->priority
, hw_priority
);
1001 intelDestroyContext(driContextPriv
);
1006 if (brw_init_pipe_control(brw
, devinfo
)) {
1007 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1008 intelDestroyContext(driContextPriv
);
1012 brw_init_state(brw
);
1014 intelInitExtensions(ctx
);
1016 brw_init_surface_formats(brw
);
1018 brw_blorp_init(brw
);
1020 brw
->urb
.size
= devinfo
->urb
.size
;
1022 if (devinfo
->gen
== 6)
1023 brw
->urb
.gs_present
= false;
1025 brw
->prim_restart
.in_progress
= false;
1026 brw
->prim_restart
.enable_cut_index
= false;
1027 brw
->gs
.enabled
= false;
1028 brw
->clip
.viewport_count
= 1;
1030 brw
->predicate
.state
= BRW_PREDICATE_STATE_RENDER
;
1032 brw
->max_gtt_map_object_size
= screen
->max_gtt_map_object_size
;
1034 ctx
->VertexProgram
._MaintainTnlProgram
= true;
1035 ctx
->FragmentProgram
._MaintainTexEnvProgram
= true;
1037 brw_draw_init( brw
);
1039 if ((ctx_config
->flags
& __DRI_CTX_FLAG_DEBUG
) != 0) {
1040 /* Turn on some extra GL_ARB_debug_output generation. */
1041 brw
->perf_debug
= true;
1044 if ((ctx_config
->flags
& __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
) != 0) {
1045 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB
;
1046 ctx
->Const
.RobustAccess
= GL_TRUE
;
1049 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
1050 brw_init_shader_time(brw
);
1052 _mesa_override_extensions(ctx
);
1053 _mesa_compute_version(ctx
);
1055 _mesa_initialize_dispatch_tables(ctx
);
1056 _mesa_initialize_vbo_vtxfmt(ctx
);
1058 if (ctx
->Extensions
.INTEL_performance_query
)
1059 brw_init_performance_queries(brw
);
1061 vbo_use_buffer_objects(ctx
);
1062 vbo_always_unmap_buffers(ctx
);
1064 brw
->ctx
.Cache
= brw
->screen
->disk_cache
;
1070 intelDestroyContext(__DRIcontext
* driContextPriv
)
1072 struct brw_context
*brw
=
1073 (struct brw_context
*) driContextPriv
->driverPrivate
;
1074 struct gl_context
*ctx
= &brw
->ctx
;
1075 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
1077 _mesa_meta_free(&brw
->ctx
);
1079 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
1080 /* Force a report. */
1081 brw
->shader_time
.report_time
= 0;
1083 brw_collect_and_report_shader_time(brw
);
1084 brw_destroy_shader_time(brw
);
1087 if (devinfo
->gen
>= 6)
1088 blorp_finish(&brw
->blorp
);
1090 brw_destroy_state(brw
);
1091 brw_draw_destroy(brw
);
1093 brw_bo_unreference(brw
->curbe
.curbe_bo
);
1095 brw_bo_unreference(brw
->vs
.base
.scratch_bo
);
1096 brw_bo_unreference(brw
->tcs
.base
.scratch_bo
);
1097 brw_bo_unreference(brw
->tes
.base
.scratch_bo
);
1098 brw_bo_unreference(brw
->gs
.base
.scratch_bo
);
1099 brw_bo_unreference(brw
->wm
.base
.scratch_bo
);
1101 brw_bo_unreference(brw
->vs
.base
.push_const_bo
);
1102 brw_bo_unreference(brw
->tcs
.base
.push_const_bo
);
1103 brw_bo_unreference(brw
->tes
.base
.push_const_bo
);
1104 brw_bo_unreference(brw
->gs
.base
.push_const_bo
);
1105 brw_bo_unreference(brw
->wm
.base
.push_const_bo
);
1107 brw_destroy_hw_context(brw
->bufmgr
, brw
->hw_ctx
);
1109 if (ctx
->swrast_context
) {
1110 _swsetup_DestroyContext(&brw
->ctx
);
1111 _tnl_DestroyContext(&brw
->ctx
);
1113 _vbo_DestroyContext(&brw
->ctx
);
1115 if (ctx
->swrast_context
)
1116 _swrast_DestroyContext(&brw
->ctx
);
1118 brw_fini_pipe_control(brw
);
1119 intel_batchbuffer_free(&brw
->batch
);
1121 brw_bo_unreference(brw
->throttle_batch
[1]);
1122 brw_bo_unreference(brw
->throttle_batch
[0]);
1123 brw
->throttle_batch
[1] = NULL
;
1124 brw
->throttle_batch
[0] = NULL
;
1126 driDestroyOptionCache(&brw
->optionCache
);
1128 /* free the Mesa context */
1129 _mesa_free_context_data(&brw
->ctx
);
1132 driContextPriv
->driverPrivate
= NULL
;
1136 intelUnbindContext(__DRIcontext
* driContextPriv
)
1138 /* Unset current context and dispath table */
1139 _mesa_make_current(NULL
, NULL
, NULL
);
1145 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1146 * on window system framebuffers.
1148 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1149 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1150 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1151 * for a visual where you're guaranteed to be capable, but it turns out that
1152 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1153 * incapable ones, because there's no difference between the two in resources
1154 * used. Applications thus get built that accidentally rely on the default
1155 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1158 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1159 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1160 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1161 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1162 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1163 * and get no sRGB encode (assuming that both kinds of visual are available).
1164 * Thus our choice to support sRGB by default on our visuals for desktop would
1165 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1167 * Unfortunately, renderbuffer setup happens before a context is created. So
1168 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1169 * context (without an sRGB visual), we go turn that back off before anyone
1173 intel_gles3_srgb_workaround(struct brw_context
*brw
,
1174 struct gl_framebuffer
*fb
)
1176 struct gl_context
*ctx
= &brw
->ctx
;
1178 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
1181 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
1182 struct gl_renderbuffer
*rb
= fb
->Attachment
[i
].Renderbuffer
;
1184 /* Check if sRGB was specifically asked for. */
1185 struct intel_renderbuffer
*irb
= intel_get_renderbuffer(fb
, i
);
1186 if (irb
&& irb
->need_srgb
)
1190 rb
->Format
= _mesa_get_srgb_format_linear(rb
->Format
);
1192 /* Disable sRGB from framebuffers that are not compatible. */
1193 fb
->Visual
.sRGBCapable
= false;
1197 intelMakeCurrent(__DRIcontext
* driContextPriv
,
1198 __DRIdrawable
* driDrawPriv
,
1199 __DRIdrawable
* driReadPriv
)
1201 struct brw_context
*brw
;
1204 brw
= (struct brw_context
*) driContextPriv
->driverPrivate
;
1208 if (driContextPriv
) {
1209 struct gl_context
*ctx
= &brw
->ctx
;
1210 struct gl_framebuffer
*fb
, *readFb
;
1212 if (driDrawPriv
== NULL
) {
1213 fb
= _mesa_get_incomplete_framebuffer();
1215 fb
= driDrawPriv
->driverPrivate
;
1216 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1219 if (driReadPriv
== NULL
) {
1220 readFb
= _mesa_get_incomplete_framebuffer();
1222 readFb
= driReadPriv
->driverPrivate
;
1223 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1226 /* The sRGB workaround changes the renderbuffer's format. We must change
1227 * the format before the renderbuffer's miptree get's allocated, otherwise
1228 * the formats of the renderbuffer and its miptree will differ.
1230 intel_gles3_srgb_workaround(brw
, fb
);
1231 intel_gles3_srgb_workaround(brw
, readFb
);
1233 /* If the context viewport hasn't been initialized, force a call out to
1234 * the loader to get buffers so we have a drawable size for the initial
1236 if (!brw
->ctx
.ViewportInitialized
)
1237 intel_prepare_render(brw
);
1239 _mesa_make_current(ctx
, fb
, readFb
);
1241 _mesa_make_current(NULL
, NULL
, NULL
);
1248 intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1249 __DRIdrawable
*drawable
)
1251 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
1253 if (devinfo
->gen
< 6) {
1254 /* MSAA and fast color clear are not supported, so don't waste time
1255 * checking whether a resolve is needed.
1260 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1261 struct intel_renderbuffer
*rb
;
1263 /* Usually, only the back buffer will need to be downsampled. However,
1264 * the front buffer will also need it if the user has rendered into it.
1266 static const gl_buffer_index buffers
[2] = {
1271 for (int i
= 0; i
< 2; ++i
) {
1272 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
1273 if (rb
== NULL
|| rb
->mt
== NULL
)
1275 if (rb
->mt
->surf
.samples
== 1) {
1276 assert(rb
->mt_layer
== 0 && rb
->mt_level
== 0 &&
1277 rb
->layer_count
== 1);
1278 intel_miptree_prepare_external(brw
, rb
->mt
);
1280 intel_renderbuffer_downsample(brw
, rb
);
1282 /* Call prepare_external on the single-sample miptree to do any
1283 * needed resolves prior to handing it off to the window system.
1284 * This is needed in the case that rb->singlesample_mt is Y-tiled
1285 * with CCS_E enabled but without I915_FORMAT_MOD_Y_TILED_CCS_E. In
1286 * this case, the MSAA resolve above will write compressed data into
1287 * rb->singlesample_mt.
1289 * TODO: Some day, if we decide to care about the tiny performance
1290 * hit we're taking by doing the MSAA resolve and then a CCS resolve,
1291 * we could detect this case and just allocate the single-sampled
1292 * miptree without aux. However, that would be a lot of plumbing and
1293 * this is a rather exotic case so it's not really worth it.
1295 intel_miptree_prepare_external(brw
, rb
->singlesample_mt
);
1301 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
1303 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
1307 intel_query_dri2_buffers(struct brw_context
*brw
,
1308 __DRIdrawable
*drawable
,
1309 __DRIbuffer
**buffers
,
1313 intel_process_dri2_buffer(struct brw_context
*brw
,
1314 __DRIdrawable
*drawable
,
1315 __DRIbuffer
*buffer
,
1316 struct intel_renderbuffer
*rb
,
1317 const char *buffer_name
);
1320 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
);
1323 intel_update_dri2_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1325 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1326 struct intel_renderbuffer
*rb
;
1327 __DRIbuffer
*buffers
= NULL
;
1329 const char *region_name
;
1331 /* Set this up front, so that in case our buffers get invalidated
1332 * while we're getting new buffers, we don't clobber the stamp and
1333 * thus ignore the invalidate. */
1334 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1336 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1337 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1339 intel_query_dri2_buffers(brw
, drawable
, &buffers
, &count
);
1341 if (buffers
== NULL
)
1344 for (int i
= 0; i
< count
; i
++) {
1345 switch (buffers
[i
].attachment
) {
1346 case __DRI_BUFFER_FRONT_LEFT
:
1347 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1348 region_name
= "dri2 front buffer";
1351 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
1352 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1353 region_name
= "dri2 fake front buffer";
1356 case __DRI_BUFFER_BACK_LEFT
:
1357 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1358 region_name
= "dri2 back buffer";
1361 case __DRI_BUFFER_DEPTH
:
1362 case __DRI_BUFFER_HIZ
:
1363 case __DRI_BUFFER_DEPTH_STENCIL
:
1364 case __DRI_BUFFER_STENCIL
:
1365 case __DRI_BUFFER_ACCUM
:
1368 "unhandled buffer attach event, attachment type %d\n",
1369 buffers
[i
].attachment
);
1373 intel_process_dri2_buffer(brw
, drawable
, &buffers
[i
], rb
, region_name
);
1379 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
1381 struct brw_context
*brw
= context
->driverPrivate
;
1382 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1384 /* Set this up front, so that in case our buffers get invalidated
1385 * while we're getting new buffers, we don't clobber the stamp and
1386 * thus ignore the invalidate. */
1387 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1389 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1390 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1392 if (dri_screen
->image
.loader
)
1393 intel_update_image_buffers(brw
, drawable
);
1395 intel_update_dri2_buffers(brw
, drawable
);
1397 driUpdateFramebufferSize(&brw
->ctx
, drawable
);
1401 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1402 * state is required.
1405 intel_prepare_render(struct brw_context
*brw
)
1407 struct gl_context
*ctx
= &brw
->ctx
;
1408 __DRIcontext
*driContext
= brw
->driContext
;
1409 __DRIdrawable
*drawable
;
1411 drawable
= driContext
->driDrawablePriv
;
1412 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
1413 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1414 intel_update_renderbuffers(driContext
, drawable
);
1415 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
1418 drawable
= driContext
->driReadablePriv
;
1419 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
1420 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1421 intel_update_renderbuffers(driContext
, drawable
);
1422 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
1425 /* If we're currently rendering to the front buffer, the rendering
1426 * that will happen next will probably dirty the front buffer. So
1427 * mark it as dirty here.
1429 if (_mesa_is_front_buffer_drawing(ctx
->DrawBuffer
))
1430 brw
->front_buffer_dirty
= true;
1434 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1436 * To determine which DRI buffers to request, examine the renderbuffers
1437 * attached to the drawable's framebuffer. Then request the buffers with
1438 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1440 * This is called from intel_update_renderbuffers().
1442 * \param drawable Drawable whose buffers are queried.
1443 * \param buffers [out] List of buffers returned by DRI2 query.
1444 * \param buffer_count [out] Number of buffers returned.
1446 * \see intel_update_renderbuffers()
1447 * \see DRI2GetBuffers()
1448 * \see DRI2GetBuffersWithFormat()
1451 intel_query_dri2_buffers(struct brw_context
*brw
,
1452 __DRIdrawable
*drawable
,
1453 __DRIbuffer
**buffers
,
1456 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1457 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1459 unsigned attachments
[8];
1461 struct intel_renderbuffer
*front_rb
;
1462 struct intel_renderbuffer
*back_rb
;
1464 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1465 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1467 memset(attachments
, 0, sizeof(attachments
));
1468 if ((_mesa_is_front_buffer_drawing(fb
) ||
1469 _mesa_is_front_buffer_reading(fb
) ||
1470 !back_rb
) && front_rb
) {
1471 /* If a fake front buffer is in use, then querying for
1472 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1473 * the real front buffer to the fake front buffer. So before doing the
1474 * query, we need to make sure all the pending drawing has landed in the
1475 * real front buffer.
1477 intel_batchbuffer_flush(brw
);
1478 intel_flush_front(&brw
->ctx
);
1480 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1481 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1482 } else if (front_rb
&& brw
->front_buffer_dirty
) {
1483 /* We have pending front buffer rendering, but we aren't querying for a
1484 * front buffer. If the front buffer we have is a fake front buffer,
1485 * the X server is going to throw it away when it processes the query.
1486 * So before doing the query, make sure all the pending drawing has
1487 * landed in the real front buffer.
1489 intel_batchbuffer_flush(brw
);
1490 intel_flush_front(&brw
->ctx
);
1494 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1495 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1498 assert(i
<= ARRAY_SIZE(attachments
));
1501 dri_screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1506 drawable
->loaderPrivate
);
1510 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1512 * This is called from intel_update_renderbuffers().
1515 * DRI buffers whose attachment point is DRI2BufferStencil or
1516 * DRI2BufferDepthStencil are handled as special cases.
1518 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1519 * that is passed to brw_bo_gem_create_from_name().
1521 * \see intel_update_renderbuffers()
1524 intel_process_dri2_buffer(struct brw_context
*brw
,
1525 __DRIdrawable
*drawable
,
1526 __DRIbuffer
*buffer
,
1527 struct intel_renderbuffer
*rb
,
1528 const char *buffer_name
)
1530 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1536 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1538 /* We try to avoid closing and reopening the same BO name, because the first
1539 * use of a mapping of the buffer involves a bunch of page faulting which is
1540 * moderately expensive.
1542 struct intel_mipmap_tree
*last_mt
;
1543 if (num_samples
== 0)
1546 last_mt
= rb
->singlesample_mt
;
1548 uint32_t old_name
= 0;
1550 /* The bo already has a name because the miptree was created by a
1551 * previous call to intel_process_dri2_buffer(). If a bo already has a
1552 * name, then brw_bo_flink() is a low-cost getter. It does not
1553 * create a new name.
1555 brw_bo_flink(last_mt
->bo
, &old_name
);
1558 if (old_name
== buffer
->name
)
1561 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1563 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1564 buffer
->name
, buffer
->attachment
,
1565 buffer
->cpp
, buffer
->pitch
);
1568 bo
= brw_bo_gem_create_from_name(brw
->bufmgr
, buffer_name
,
1572 "Failed to open BO for returned DRI2 buffer "
1573 "(%dx%d, %s, named %d).\n"
1574 "This is likely a bug in the X Server that will lead to a "
1576 drawable
->w
, drawable
->h
, buffer_name
, buffer
->name
);
1580 uint32_t tiling
, swizzle
;
1581 brw_bo_get_tiling(bo
, &tiling
, &swizzle
);
1583 struct intel_mipmap_tree
*mt
=
1584 intel_miptree_create_for_bo(brw
,
1586 intel_rb_format(rb
),
1592 isl_tiling_from_i915_tiling(tiling
),
1593 MIPTREE_CREATE_DEFAULT
);
1595 brw_bo_unreference(bo
);
1599 /* We got this BO from X11. We cana't assume that we have coherent texture
1600 * access because X may suddenly decide to use it for scan-out which would
1601 * destroy coherency.
1603 bo
->cache_coherent
= false;
1605 if (!intel_update_winsys_renderbuffer_miptree(brw
, rb
, mt
,
1606 drawable
->w
, drawable
->h
,
1608 brw_bo_unreference(bo
);
1609 intel_miptree_release(&mt
);
1613 if (_mesa_is_front_buffer_drawing(fb
) &&
1614 (buffer
->attachment
== __DRI_BUFFER_FRONT_LEFT
||
1615 buffer
->attachment
== __DRI_BUFFER_FAKE_FRONT_LEFT
) &&
1616 rb
->Base
.Base
.NumSamples
> 1) {
1617 intel_renderbuffer_upsample(brw
, rb
);
1622 brw_bo_unreference(bo
);
1626 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1628 * To determine which DRI buffers to request, examine the renderbuffers
1629 * attached to the drawable's framebuffer. Then request the buffers from
1632 * This is called from intel_update_renderbuffers().
1634 * \param drawable Drawable whose buffers are queried.
1635 * \param buffers [out] List of buffers returned by DRI2 query.
1636 * \param buffer_count [out] Number of buffers returned.
1638 * \see intel_update_renderbuffers()
1642 intel_update_image_buffer(struct brw_context
*intel
,
1643 __DRIdrawable
*drawable
,
1644 struct intel_renderbuffer
*rb
,
1646 enum __DRIimageBufferMask buffer_type
)
1648 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1650 if (!rb
|| !buffer
->bo
)
1653 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1655 /* Check and see if we're already bound to the right
1658 struct intel_mipmap_tree
*last_mt
;
1659 if (num_samples
== 0)
1662 last_mt
= rb
->singlesample_mt
;
1664 if (last_mt
&& last_mt
->bo
== buffer
->bo
)
1667 struct intel_mipmap_tree
*mt
=
1668 intel_miptree_create_for_dri_image(intel
, buffer
, GL_TEXTURE_2D
,
1669 intel_rb_format(rb
), true);
1673 if (!intel_update_winsys_renderbuffer_miptree(intel
, rb
, mt
,
1674 buffer
->width
, buffer
->height
,
1676 intel_miptree_release(&mt
);
1680 if (_mesa_is_front_buffer_drawing(fb
) &&
1681 buffer_type
== __DRI_IMAGE_BUFFER_FRONT
&&
1682 rb
->Base
.Base
.NumSamples
> 1) {
1683 intel_renderbuffer_upsample(intel
, rb
);
1688 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1690 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1691 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1692 struct intel_renderbuffer
*front_rb
;
1693 struct intel_renderbuffer
*back_rb
;
1694 struct __DRIimageList images
;
1696 uint32_t buffer_mask
= 0;
1699 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1700 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1703 format
= intel_rb_format(back_rb
);
1705 format
= intel_rb_format(front_rb
);
1709 if (front_rb
&& (_mesa_is_front_buffer_drawing(fb
) ||
1710 _mesa_is_front_buffer_reading(fb
) || !back_rb
)) {
1711 buffer_mask
|= __DRI_IMAGE_BUFFER_FRONT
;
1715 buffer_mask
|= __DRI_IMAGE_BUFFER_BACK
;
1717 ret
= dri_screen
->image
.loader
->getBuffers(drawable
,
1718 driGLFormatToImageFormat(format
),
1719 &drawable
->dri2
.stamp
,
1720 drawable
->loaderPrivate
,
1726 if (images
.image_mask
& __DRI_IMAGE_BUFFER_FRONT
) {
1727 drawable
->w
= images
.front
->width
;
1728 drawable
->h
= images
.front
->height
;
1729 intel_update_image_buffer(brw
,
1733 __DRI_IMAGE_BUFFER_FRONT
);
1736 if (images
.image_mask
& __DRI_IMAGE_BUFFER_BACK
) {
1737 drawable
->w
= images
.back
->width
;
1738 drawable
->h
= images
.back
->height
;
1739 intel_update_image_buffer(brw
,
1743 __DRI_IMAGE_BUFFER_BACK
);