src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/imports.h"
  34 #include "main/api_noop.h"
  35 #include "main/macros.h"
  36 #include "main/simple_list.h"
  37 #include "brw_context.h"
  38 #include "brw_defines.h"
  39 #include "brw_draw.h"
  40 #include "brw_state.h"
  41 #include "intel_span.h"
  42 #include "tnl/t_pipeline.h"
  43 #include "glsl/ralloc.h"
  44
  45 /***************************************
  46  * Mesa's Driver Functions
  47  ***************************************/
  48
  49 static void brwInitDriverFunctions( struct dd_function_table *functions )
  50 {
  51    intelInitDriverFunctions( functions );
  52
  53    brwInitFragProgFuncs( functions );
  54    brw_init_queryobj_functions(functions);
  55 }
  56
  57 bool
  58 brwCreateContext(int api,
  59                  const struct gl_config *mesaVis,
  60                  __DRIcontext *driContextPriv,
  61                  void *sharedContextPrivate)
  62 {
  63    struct dd_function_table functions;
  64    struct brw_context *brw = rzalloc(NULL, struct brw_context);
  65    struct intel_context *intel = &brw->intel;
  66    struct gl_context *ctx = &intel->ctx;
  67    unsigned i;
  68
  69    if (!brw) {
  70       printf("%s: failed to alloc context\n", __FUNCTION__);
  71       return false;
  72    }
  73
  74    brwInitVtbl( brw );
  75    brwInitDriverFunctions( &functions );
  76
  77    if (!intelInitContext( intel, api, mesaVis, driContextPriv,
  78                           sharedContextPrivate, &functions )) {
  79       printf("%s: failed to init intel context\n", __FUNCTION__);
  80       FREE(brw);
  81       return false;
  82    }
  83
  84    /* Initialize swrast, tnl driver tables: */
  85    intelInitSpanFuncs(ctx);
  86
  87    TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
  88
  89    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
  90    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
  91    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
  92    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
  93                                      ctx->Const.MaxTextureImageUnits);
  94    ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */
  95    ctx->Const.MaxCombinedTextureImageUnits =
  96       ctx->Const.MaxVertexTextureImageUnits +
  97       ctx->Const.MaxTextureImageUnits;
  98
  99    ctx->Const.MaxTextureLevels = 14; /* 8192 */
 100    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 101            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 102    ctx->Const.Max3DTextureLevels = 9;
 103    ctx->Const.MaxCubeTextureLevels = 12;
 104    /* minimum maximum.  Users are likely to run into memory problems
 105     * even at this size, since 64 * 2048 * 2048 * 4 = 1GB and we can't
 106     * address that much.
 107     */
 108    ctx->Const.MaxArrayTextureLayers = 64;
 109    ctx->Const.MaxTextureRectSize = (1<<12);
 110
 111    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 112
 113    /* if conformance mode is set, swrast can handle any size AA point */
 114    ctx->Const.MaxPointSizeAA = 255.0;
 115
 116    /* We want the GLSL compiler to emit code that uses condition codes */
 117    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 118       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
 119       ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = true;
 120       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
 121       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
 122       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
 123       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
 124
 125       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 126          (i == MESA_SHADER_FRAGMENT);
 127       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 128          (i == MESA_SHADER_FRAGMENT);
 129       ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
 130    }
 131
 132    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 133    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 134    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 135    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 136    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 137    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 138    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 139    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 140    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 141    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 142    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 143    ctx->Const.VertexProgram.MaxEnvParams =
 144       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 145            ctx->Const.VertexProgram.MaxEnvParams);
 146
 147    ctx->Const.FragmentProgram.MaxNativeInstructions = (16 * 1024);
 148    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (16 * 1024);
 149    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (16 * 1024);
 150    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (16 * 1024);
 151    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 152    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 153    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 154    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 155    ctx->Const.FragmentProgram.MaxEnvParams =
 156       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 157            ctx->Const.FragmentProgram.MaxEnvParams);
 158
 159    /* Fragment shaders use real, 32-bit twos-complement integers for all
 160     * integer types.
 161     */
 162    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 163    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 164    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 165    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 166       = ctx->Const.FragmentProgram.LowInt;
 167
 168    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 169       but we're not sure how it's actually done for vertex order,
 170       that affect provoking vertex decision. Always use last vertex
 171       convention for quad primitive which works as expected for now. */
 172    if (intel->gen >= 6)
 173        ctx->Const.QuadsFollowProvokingVertexConvention = false;
 174
 175    if (intel->is_g4x || intel->gen >= 5) {
 176       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 177       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 178       brw->has_surface_tile_offset = true;
 179       if (intel->gen < 6)
 180           brw->has_compr4 = true;
 181       brw->has_aa_line_parameters = true;
 182       brw->has_pln = true;
 183   } else {
 184       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 185       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 186    }
 187
 188    /* WM maximum threads is number of EUs times number of threads per EU. */
 189    if (intel->gen >= 7) {
 190       if (intel->gt == 1) {
 191          brw->wm_max_threads = 86;
 192          brw->vs_max_threads = 36;
 193          brw->urb.size = 128;
 194          brw->urb.max_vs_entries = 512;
 195          brw->urb.max_gs_entries = 192;
 196       } else if (intel->gt == 2) {
 197          brw->wm_max_threads = 86;
 198          brw->vs_max_threads = 128;
 199          brw->urb.size = 256;
 200          brw->urb.max_vs_entries = 704;
 201          brw->urb.max_gs_entries = 320;
 202       } else {
 203          assert(!"Unknown gen7 device.");
 204       }
 205    } else if (intel->gen == 6) {
 206       if (intel->gt == 2) {
 207          /* This could possibly be 80, but is supposed to require
 208           * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
 209           * GPU reset to change.
 210           */
 211          brw->wm_max_threads = 40;
 212          brw->vs_max_threads = 60;
 213          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 214          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 215       } else {
 216          brw->wm_max_threads = 40;
 217          brw->vs_max_threads = 24;
 218          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 219          brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
 220       }
 221    } else if (intel->gen == 5) {
 222       brw->urb.size = 1024;
 223       brw->vs_max_threads = 72;
 224       brw->wm_max_threads = 12 * 6;
 225    } else if (intel->is_g4x) {
 226       brw->urb.size = 384;
 227       brw->vs_max_threads = 32;
 228       brw->wm_max_threads = 10 * 5;
 229    } else if (intel->gen < 6) {
 230       brw->urb.size = 256;
 231       brw->vs_max_threads = 16;
 232       brw->wm_max_threads = 8 * 4;
 233       brw->has_negative_rhw_bug = true;
 234    }
 235
 236    if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) {
 237       brw->vs_max_threads = 1;
 238       brw->wm_max_threads = 1;
 239    }
 240
 241    brw_init_state( brw );
 242
 243    brw->curbe.last_buf = calloc(1, 4096);
 244    brw->curbe.next_buf = calloc(1, 4096);
 245
 246    brw->state.dirty.mesa = ~0;
 247    brw->state.dirty.brw = ~0;
 248
 249    brw->emit_state_always = 0;
 250
 251    intel->batch.need_workaround_flush = true;
 252
 253    ctx->VertexProgram._MaintainTnlProgram = true;
 254    ctx->FragmentProgram._MaintainTexEnvProgram = true;
 255
 256    brw_draw_init( brw );
 257
 258    brw->new_vs_backend = (getenv("INTEL_OLD_VS") == NULL);
 259
 260    /* If we're using the new shader backend, we require integer uniforms
 261     * stored as actual integers.
 262     */
 263    if (brw->new_vs_backend) {
 264       ctx->Const.NativeIntegers = true;
 265       ctx->Const.UniformBooleanTrue = 1;
 266    }
 267
 268    return true;
 269 }
 270