2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **********************************************************************/
30 * Keith Whitwell <keithw@vmware.com>
34 #include "main/api_exec.h"
35 #include "main/context.h"
36 #include "main/fbobject.h"
37 #include "main/extensions.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
40 #include "main/points.h"
41 #include "main/version.h"
42 #include "main/vtxfmt.h"
43 #include "main/texobj.h"
44 #include "main/framebuffer.h"
46 #include "vbo/vbo_context.h"
48 #include "drivers/common/driverfuncs.h"
49 #include "drivers/common/meta.h"
52 #include "brw_context.h"
53 #include "brw_defines.h"
54 #include "brw_compiler.h"
56 #include "brw_state.h"
58 #include "intel_batchbuffer.h"
59 #include "intel_buffer_objects.h"
60 #include "intel_buffers.h"
61 #include "intel_fbo.h"
62 #include "intel_mipmap_tree.h"
63 #include "intel_pixel.h"
64 #include "intel_image.h"
65 #include "intel_tex.h"
66 #include "intel_tex_obj.h"
68 #include "swrast_setup/swrast_setup.h"
70 #include "tnl/t_pipeline.h"
71 #include "util/ralloc.h"
72 #include "util/debug.h"
75 /***************************************
76 * Mesa's Driver Functions
77 ***************************************/
79 const char *const brw_vendor_string
= "Intel Open Source Technology Center";
82 get_bsw_model(const struct intel_screen
*intelScreen
)
84 switch (intelScreen
->eu_total
) {
95 brw_get_renderer_string(const struct intel_screen
*intelScreen
)
98 static char buffer
[128];
101 switch (intelScreen
->deviceID
) {
103 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
104 #include "pci_ids/i965_pci_ids.h"
106 chipset
= "Unknown Intel Chipset";
110 /* Braswell branding is funny, so we have to fix it up here */
111 if (intelScreen
->deviceID
== 0x22B1) {
112 bsw
= strdup(chipset
);
113 char *needle
= strstr(bsw
, "XXX");
115 memcpy(needle
, get_bsw_model(intelScreen
), 3);
120 (void) driGetRendererString(buffer
, chipset
, 0);
125 static const GLubyte
*
126 intel_get_string(struct gl_context
* ctx
, GLenum name
)
128 const struct brw_context
*const brw
= brw_context(ctx
);
132 return (GLubyte
*) brw_vendor_string
;
136 (GLubyte
*) brw_get_renderer_string(brw
->intelScreen
);
144 intel_viewport(struct gl_context
*ctx
)
146 struct brw_context
*brw
= brw_context(ctx
);
147 __DRIcontext
*driContext
= brw
->driContext
;
149 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
150 if (driContext
->driDrawablePriv
)
151 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
152 if (driContext
->driReadablePriv
)
153 dri2InvalidateDrawable(driContext
->driReadablePriv
);
158 intel_update_framebuffer(struct gl_context
*ctx
,
159 struct gl_framebuffer
*fb
)
161 struct brw_context
*brw
= brw_context(ctx
);
163 /* Quantize the derived default number of samples
165 fb
->DefaultGeometry
._NumSamples
=
166 intel_quantize_num_samples(brw
->intelScreen
,
167 fb
->DefaultGeometry
.NumSamples
);
170 /* On Gen9 color buffers may be compressed by the hardware (lossless
171 * compression). There are, however, format restrictions and care needs to be
172 * taken that the sampler engine is capable for re-interpreting a buffer with
173 * format different the buffer was originally written with.
175 * For example, SRGB formats are not compressible and the sampler engine isn't
176 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
177 * color buffer needs to be resolved so that the sampling surface can be
178 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
182 intel_texture_view_requires_resolve(struct brw_context
*brw
,
183 struct intel_texture_object
*intel_tex
)
186 !intel_miptree_is_lossless_compressed(brw
, intel_tex
->mt
))
189 const uint32_t brw_format
= brw_format_for_mesa_format(intel_tex
->_Format
);
191 if (isl_format_supports_lossless_compression(brw
->intelScreen
->devinfo
,
195 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
196 _mesa_get_format_name(intel_tex
->_Format
),
197 _mesa_get_format_name(intel_tex
->mt
->format
));
203 intel_update_state(struct gl_context
* ctx
, GLuint new_state
)
205 struct brw_context
*brw
= brw_context(ctx
);
206 struct intel_texture_object
*tex_obj
;
207 struct intel_renderbuffer
*depth_irb
;
209 if (ctx
->swrast_context
)
210 _swrast_InvalidateState(ctx
, new_state
);
211 _vbo_InvalidateState(ctx
, new_state
);
213 brw
->NewGLState
|= new_state
;
215 _mesa_unlock_context_textures(ctx
);
217 /* Resolve the depth buffer's HiZ buffer. */
218 depth_irb
= intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_DEPTH
);
220 intel_renderbuffer_resolve_hiz(brw
, depth_irb
);
222 /* Resolve depth buffer and render cache of each enabled texture. */
223 int maxEnabledUnit
= ctx
->Texture
._MaxEnabledTexImageUnit
;
224 for (int i
= 0; i
<= maxEnabledUnit
; i
++) {
225 if (!ctx
->Texture
.Unit
[i
]._Current
)
227 tex_obj
= intel_texture_object(ctx
->Texture
.Unit
[i
]._Current
);
228 if (!tex_obj
|| !tex_obj
->mt
)
230 intel_miptree_all_slices_resolve_depth(brw
, tex_obj
->mt
);
231 /* Sampling engine understands lossless compression and resolving
232 * those surfaces should be skipped for performance reasons.
234 const int flags
= intel_texture_view_requires_resolve(brw
, tex_obj
) ?
235 0 : INTEL_MIPTREE_IGNORE_CCS_E
;
236 intel_miptree_resolve_color(brw
, tex_obj
->mt
, flags
);
237 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
240 /* Resolve color for each active shader image. */
241 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
242 const struct gl_shader
*shader
= ctx
->_Shader
->CurrentProgram
[i
] ?
243 ctx
->_Shader
->CurrentProgram
[i
]->_LinkedShaders
[i
] : NULL
;
245 if (unlikely(shader
&& shader
->NumImages
)) {
246 for (unsigned j
= 0; j
< shader
->NumImages
; j
++) {
247 struct gl_image_unit
*u
= &ctx
->ImageUnits
[shader
->ImageUnits
[j
]];
248 tex_obj
= intel_texture_object(u
->TexObj
);
250 if (tex_obj
&& tex_obj
->mt
) {
251 /* Access to images is implemented using indirect messages
252 * against data port. Normal render target write understands
253 * lossless compression but unfortunately the typed/untyped
254 * read/write interface doesn't. Therefore the compressed
255 * surfaces need to be resolved prior to accessing them.
257 intel_miptree_resolve_color(brw
, tex_obj
->mt
, 0);
258 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
264 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
265 * single-sampled color renderbuffers because the CCS buffer isn't
266 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
267 * enabled because otherwise the surface state will be programmed with the
268 * linear equivalent format anyway.
270 if (brw
->gen
>= 9 && ctx
->Color
.sRGBEnabled
) {
271 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
272 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
273 struct gl_renderbuffer
*rb
= fb
->_ColorDrawBuffers
[i
];
278 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
279 struct intel_mipmap_tree
*mt
= irb
->mt
;
282 mt
->num_samples
> 1 ||
283 _mesa_get_srgb_format_linear(mt
->format
) == mt
->format
)
286 /* Lossless compression is not supported for SRGB formats, it
287 * should be impossible to get here with such surfaces.
289 assert(!intel_miptree_is_lossless_compressed(brw
, mt
));
290 intel_miptree_resolve_color(brw
, mt
, 0);
291 brw_render_cache_set_check_flush(brw
, mt
->bo
);
295 _mesa_lock_context_textures(ctx
);
297 if (new_state
& _NEW_BUFFERS
) {
298 intel_update_framebuffer(ctx
, ctx
->DrawBuffer
);
299 if (ctx
->DrawBuffer
!= ctx
->ReadBuffer
)
300 intel_update_framebuffer(ctx
, ctx
->ReadBuffer
);
304 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
307 intel_flush_front(struct gl_context
*ctx
)
309 struct brw_context
*brw
= brw_context(ctx
);
310 __DRIcontext
*driContext
= brw
->driContext
;
311 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
312 __DRIscreen
*const screen
= brw
->intelScreen
->driScrnPriv
;
314 if (brw
->front_buffer_dirty
&& _mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
315 if (flushFront(screen
) && driDrawable
&&
316 driDrawable
->loaderPrivate
) {
318 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
320 * This potentially resolves both front and back buffer. It
321 * is unnecessary to resolve the back, but harms nothing except
322 * performance. And no one cares about front-buffer render
325 intel_resolve_for_dri2_flush(brw
, driDrawable
);
326 intel_batchbuffer_flush(brw
);
328 flushFront(screen
)(driDrawable
, driDrawable
->loaderPrivate
);
330 /* We set the dirty bit in intel_prepare_render() if we're
331 * front buffer rendering once we get there.
333 brw
->front_buffer_dirty
= false;
339 intel_glFlush(struct gl_context
*ctx
)
341 struct brw_context
*brw
= brw_context(ctx
);
343 intel_batchbuffer_flush(brw
);
344 intel_flush_front(ctx
);
346 brw
->need_flush_throttle
= true;
350 intel_finish(struct gl_context
* ctx
)
352 struct brw_context
*brw
= brw_context(ctx
);
356 if (brw
->batch
.last_bo
)
357 drm_intel_bo_wait_rendering(brw
->batch
.last_bo
);
361 brw_init_driver_functions(struct brw_context
*brw
,
362 struct dd_function_table
*functions
)
364 _mesa_init_driver_functions(functions
);
366 /* GLX uses DRI2 invalidate events to handle window resizing.
367 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
368 * which doesn't provide a mechanism for snooping the event queues.
370 * So EGL still relies on viewport hacks to handle window resizing.
371 * This should go away with DRI3000.
373 if (!brw
->driContext
->driScreenPriv
->dri2
.useInvalidate
)
374 functions
->Viewport
= intel_viewport
;
376 functions
->Flush
= intel_glFlush
;
377 functions
->Finish
= intel_finish
;
378 functions
->GetString
= intel_get_string
;
379 functions
->UpdateState
= intel_update_state
;
381 intelInitTextureFuncs(functions
);
382 intelInitTextureImageFuncs(functions
);
383 intelInitTextureSubImageFuncs(functions
);
384 intelInitTextureCopyImageFuncs(functions
);
385 intelInitCopyImageFuncs(functions
);
386 intelInitClearFuncs(functions
);
387 intelInitBufferFuncs(functions
);
388 intelInitPixelFuncs(functions
);
389 intelInitBufferObjectFuncs(functions
);
390 intel_init_syncobj_functions(functions
);
391 brw_init_object_purgeable_functions(functions
);
393 brwInitFragProgFuncs( functions
);
394 brw_init_common_queryobj_functions(functions
);
395 if (brw
->gen
>= 8 || brw
->is_haswell
)
396 hsw_init_queryobj_functions(functions
);
397 else if (brw
->gen
>= 6)
398 gen6_init_queryobj_functions(functions
);
400 gen4_init_queryobj_functions(functions
);
401 brw_init_compute_functions(functions
);
403 brw_init_conditional_render_functions(functions
);
405 functions
->QueryInternalFormat
= brw_query_internal_format
;
407 functions
->NewTransformFeedback
= brw_new_transform_feedback
;
408 functions
->DeleteTransformFeedback
= brw_delete_transform_feedback
;
409 if (brw
->intelScreen
->has_mi_math_and_lrr
) {
410 functions
->BeginTransformFeedback
= hsw_begin_transform_feedback
;
411 functions
->EndTransformFeedback
= hsw_end_transform_feedback
;
412 functions
->PauseTransformFeedback
= hsw_pause_transform_feedback
;
413 functions
->ResumeTransformFeedback
= hsw_resume_transform_feedback
;
414 } else if (brw
->gen
>= 7) {
415 functions
->BeginTransformFeedback
= gen7_begin_transform_feedback
;
416 functions
->EndTransformFeedback
= gen7_end_transform_feedback
;
417 functions
->PauseTransformFeedback
= gen7_pause_transform_feedback
;
418 functions
->ResumeTransformFeedback
= gen7_resume_transform_feedback
;
419 functions
->GetTransformFeedbackVertexCount
=
420 brw_get_transform_feedback_vertex_count
;
422 functions
->BeginTransformFeedback
= brw_begin_transform_feedback
;
423 functions
->EndTransformFeedback
= brw_end_transform_feedback
;
427 functions
->GetSamplePosition
= gen6_get_sample_position
;
431 brw_initialize_context_constants(struct brw_context
*brw
)
433 struct gl_context
*ctx
= &brw
->ctx
;
434 const struct brw_compiler
*compiler
= brw
->intelScreen
->compiler
;
436 const bool stage_exists
[MESA_SHADER_STAGES
] = {
437 [MESA_SHADER_VERTEX
] = true,
438 [MESA_SHADER_TESS_CTRL
] = brw
->gen
>= 7,
439 [MESA_SHADER_TESS_EVAL
] = brw
->gen
>= 7,
440 [MESA_SHADER_GEOMETRY
] = brw
->gen
>= 6,
441 [MESA_SHADER_FRAGMENT
] = true,
442 [MESA_SHADER_COMPUTE
] =
443 (ctx
->API
== API_OPENGL_CORE
&&
444 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 1024) ||
445 (ctx
->API
== API_OPENGLES2
&&
446 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 128) ||
447 _mesa_extension_override_enables
.ARB_compute_shader
,
450 unsigned num_stages
= 0;
451 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
456 unsigned max_samplers
=
457 brw
->gen
>= 8 || brw
->is_haswell
? BRW_MAX_TEX_UNIT
: 16;
459 ctx
->Const
.MaxDualSourceDrawBuffers
= 1;
460 ctx
->Const
.MaxDrawBuffers
= BRW_MAX_DRAW_BUFFERS
;
461 ctx
->Const
.MaxCombinedShaderOutputResources
=
462 MAX_IMAGE_UNITS
+ BRW_MAX_DRAW_BUFFERS
;
464 ctx
->Const
.QueryCounterBits
.Timestamp
= 36;
466 ctx
->Const
.MaxTextureCoordUnits
= 8; /* Mesa limit */
467 ctx
->Const
.MaxImageUnits
= MAX_IMAGE_UNITS
;
468 ctx
->Const
.MaxRenderbufferSize
= 8192;
469 ctx
->Const
.MaxTextureLevels
= MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS
);
470 ctx
->Const
.Max3DTextureLevels
= 12; /* 2048 */
471 ctx
->Const
.MaxCubeTextureLevels
= 14; /* 8192 */
472 ctx
->Const
.MaxArrayTextureLayers
= brw
->gen
>= 7 ? 2048 : 512;
473 ctx
->Const
.MaxTextureMbytes
= 1536;
474 ctx
->Const
.MaxTextureRectSize
= 1 << 12;
475 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
476 ctx
->Const
.StripTextureBorder
= true;
478 ctx
->Const
.MaxProgramTextureGatherComponents
= 4;
479 else if (brw
->gen
== 6)
480 ctx
->Const
.MaxProgramTextureGatherComponents
= 1;
482 ctx
->Const
.MaxUniformBlockSize
= 65536;
484 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
485 struct gl_program_constants
*prog
= &ctx
->Const
.Program
[i
];
487 if (!stage_exists
[i
])
490 prog
->MaxTextureImageUnits
= max_samplers
;
492 prog
->MaxUniformBlocks
= BRW_MAX_UBO
;
493 prog
->MaxCombinedUniformComponents
=
494 prog
->MaxUniformComponents
+
495 ctx
->Const
.MaxUniformBlockSize
/ 4 * prog
->MaxUniformBlocks
;
497 prog
->MaxAtomicCounters
= MAX_ATOMIC_COUNTERS
;
498 prog
->MaxAtomicBuffers
= BRW_MAX_ABO
;
499 prog
->MaxImageUniforms
= compiler
->scalar_stage
[i
] ? BRW_MAX_IMAGES
: 0;
500 prog
->MaxShaderStorageBlocks
= BRW_MAX_SSBO
;
503 ctx
->Const
.MaxTextureUnits
=
504 MIN2(ctx
->Const
.MaxTextureCoordUnits
,
505 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
);
507 ctx
->Const
.MaxUniformBufferBindings
= num_stages
* BRW_MAX_UBO
;
508 ctx
->Const
.MaxCombinedUniformBlocks
= num_stages
* BRW_MAX_UBO
;
509 ctx
->Const
.MaxCombinedAtomicBuffers
= num_stages
* BRW_MAX_ABO
;
510 ctx
->Const
.MaxCombinedShaderStorageBlocks
= num_stages
* BRW_MAX_SSBO
;
511 ctx
->Const
.MaxShaderStorageBufferBindings
= num_stages
* BRW_MAX_SSBO
;
512 ctx
->Const
.MaxCombinedTextureImageUnits
= num_stages
* max_samplers
;
513 ctx
->Const
.MaxCombinedImageUniforms
= num_stages
* BRW_MAX_IMAGES
;
516 /* Hardware only supports a limited number of transform feedback buffers.
517 * So we need to override the Mesa default (which is based only on software
520 ctx
->Const
.MaxTransformFeedbackBuffers
= BRW_MAX_SOL_BUFFERS
;
522 /* On Gen6, in the worst case, we use up one binding table entry per
523 * transform feedback component (see comments above the definition of
524 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
525 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
526 * BRW_MAX_SOL_BINDINGS.
528 * In "separate components" mode, we need to divide this value by
529 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
530 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
532 ctx
->Const
.MaxTransformFeedbackInterleavedComponents
= BRW_MAX_SOL_BINDINGS
;
533 ctx
->Const
.MaxTransformFeedbackSeparateComponents
=
534 BRW_MAX_SOL_BINDINGS
/ BRW_MAX_SOL_BUFFERS
;
536 ctx
->Const
.AlwaysUseGetTransformFeedbackVertexCount
=
537 !brw
->intelScreen
->has_mi_math_and_lrr
;
540 const int *msaa_modes
= intel_supported_msaa_modes(brw
->intelScreen
);
541 const int clamp_max_samples
=
542 driQueryOptioni(&brw
->optionCache
, "clamp_max_samples");
544 if (clamp_max_samples
< 0) {
545 max_samples
= msaa_modes
[0];
547 /* Select the largest supported MSAA mode that does not exceed
551 for (int i
= 0; msaa_modes
[i
] != 0; ++i
) {
552 if (msaa_modes
[i
] <= clamp_max_samples
) {
553 max_samples
= msaa_modes
[i
];
559 ctx
->Const
.MaxSamples
= max_samples
;
560 ctx
->Const
.MaxColorTextureSamples
= max_samples
;
561 ctx
->Const
.MaxDepthTextureSamples
= max_samples
;
562 ctx
->Const
.MaxIntegerSamples
= max_samples
;
563 ctx
->Const
.MaxImageSamples
= 0;
565 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
566 * to map indices of rectangular grid to sample numbers within a pixel.
567 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
568 * extension implementation. For more details see the comment above
569 * gen6_set_sample_maps() definition.
571 gen6_set_sample_maps(ctx
);
573 ctx
->Const
.MinLineWidth
= 1.0;
574 ctx
->Const
.MinLineWidthAA
= 1.0;
576 ctx
->Const
.MaxLineWidth
= 7.375;
577 ctx
->Const
.MaxLineWidthAA
= 7.375;
578 ctx
->Const
.LineWidthGranularity
= 0.125;
580 ctx
->Const
.MaxLineWidth
= 7.0;
581 ctx
->Const
.MaxLineWidthAA
= 7.0;
582 ctx
->Const
.LineWidthGranularity
= 0.5;
585 /* For non-antialiased lines, we have to round the line width to the
586 * nearest whole number. Make sure that we don't advertise a line
587 * width that, when rounded, will be beyond the actual hardware
590 assert(roundf(ctx
->Const
.MaxLineWidth
) <= ctx
->Const
.MaxLineWidth
);
592 ctx
->Const
.MinPointSize
= 1.0;
593 ctx
->Const
.MinPointSizeAA
= 1.0;
594 ctx
->Const
.MaxPointSize
= 255.0;
595 ctx
->Const
.MaxPointSizeAA
= 255.0;
596 ctx
->Const
.PointSizeGranularity
= 1.0;
598 if (brw
->gen
>= 5 || brw
->is_g4x
)
599 ctx
->Const
.MaxClipPlanes
= 8;
601 ctx
->Const
.LowerTessLevel
= true;
602 ctx
->Const
.PrimitiveRestartForPatches
= true;
604 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeInstructions
= 16 * 1024;
605 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxAluInstructions
= 0;
606 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexInstructions
= 0;
607 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexIndirections
= 0;
608 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAluInstructions
= 0;
609 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexInstructions
= 0;
610 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexIndirections
= 0;
611 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAttribs
= 16;
612 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTemps
= 256;
613 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAddressRegs
= 1;
614 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
= 1024;
615 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
=
616 MIN2(ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
,
617 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
);
619 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeInstructions
= 1024;
620 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAluInstructions
= 1024;
621 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexInstructions
= 1024;
622 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexIndirections
= 1024;
623 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAttribs
= 12;
624 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTemps
= 256;
625 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAddressRegs
= 0;
626 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
= 1024;
627 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
=
628 MIN2(ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
,
629 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
);
631 /* Fragment shaders use real, 32-bit twos-complement integers for all
634 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMin
= 31;
635 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMax
= 30;
636 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.Precision
= 0;
637 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
638 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
640 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMin
= 31;
641 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMax
= 30;
642 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.Precision
= 0;
643 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
644 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
646 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
647 * but we're not sure how it's actually done for vertex order,
648 * that affect provoking vertex decision. Always use last vertex
649 * convention for quad primitive which works as expected for now.
652 ctx
->Const
.QuadsFollowProvokingVertexConvention
= false;
654 ctx
->Const
.NativeIntegers
= true;
655 ctx
->Const
.VertexID_is_zero_based
= true;
657 /* Regarding the CMP instruction, the Ivybridge PRM says:
659 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
660 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
661 * 0xFFFFFFFF) is assigned to dst."
663 * but PRMs for earlier generations say
665 * "In dword format, one GRF may store up to 8 results. When the register
666 * is used later as a vector of Booleans, as only LSB at each channel
667 * contains meaning [sic] data, software should make sure all higher bits
668 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
670 * We select the representation of a true boolean uniform to be ~0, and fix
671 * the results of Gen <= 5 CMP instruction's with -(result & 1).
673 ctx
->Const
.UniformBooleanTrue
= ~0;
675 /* From the gen4 PRM, volume 4 page 127:
677 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
678 * the base address of the first element of the surface, computed in
679 * software by adding the surface base address to the byte offset of
680 * the element in the buffer."
682 * However, unaligned accesses are slower, so enforce buffer alignment.
684 ctx
->Const
.UniformBufferOffsetAlignment
= 16;
686 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
687 * that we can safely have the CPU and GPU writing the same SSBO on
688 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
689 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
690 * be updating disjoint regions of the buffer simultaneously and that will
691 * break if the regions overlap the same cacheline.
693 ctx
->Const
.ShaderStorageBufferOffsetAlignment
= 64;
694 ctx
->Const
.TextureBufferOffsetAlignment
= 16;
695 ctx
->Const
.MaxTextureBufferSize
= 128 * 1024 * 1024;
698 ctx
->Const
.MaxVarying
= 32;
699 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxOutputComponents
= 128;
700 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxInputComponents
= 64;
701 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxOutputComponents
= 128;
702 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxInputComponents
= 128;
703 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxInputComponents
= 128;
704 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxOutputComponents
= 128;
705 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxInputComponents
= 128;
706 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxOutputComponents
= 128;
709 /* We want the GLSL compiler to emit code that uses condition codes */
710 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
711 ctx
->Const
.ShaderCompilerOptions
[i
] =
712 brw
->intelScreen
->compiler
->glsl_compiler_options
[i
];
716 ctx
->Const
.MaxViewportWidth
= 32768;
717 ctx
->Const
.MaxViewportHeight
= 32768;
720 /* ARB_viewport_array */
721 if (brw
->gen
>= 6 && ctx
->API
== API_OPENGL_CORE
) {
722 ctx
->Const
.MaxViewports
= GEN6_NUM_VIEWPORTS
;
723 ctx
->Const
.ViewportSubpixelBits
= 0;
725 /* Cast to float before negating because MaxViewportWidth is unsigned.
727 ctx
->Const
.ViewportBounds
.Min
= -(float)ctx
->Const
.MaxViewportWidth
;
728 ctx
->Const
.ViewportBounds
.Max
= ctx
->Const
.MaxViewportWidth
;
731 /* ARB_gpu_shader5 */
733 ctx
->Const
.MaxVertexStreams
= MIN2(4, MAX_VERTEX_STREAMS
);
735 /* ARB_framebuffer_no_attachments */
736 ctx
->Const
.MaxFramebufferWidth
= 16384;
737 ctx
->Const
.MaxFramebufferHeight
= 16384;
738 ctx
->Const
.MaxFramebufferLayers
= ctx
->Const
.MaxArrayTextureLayers
;
739 ctx
->Const
.MaxFramebufferSamples
= max_samples
;
743 brw_initialize_cs_context_constants(struct brw_context
*brw
, unsigned max_threads
)
745 struct gl_context
*ctx
= &brw
->ctx
;
746 /* Maximum number of scalar compute shader invocations that can be run in
747 * parallel in the same subslice assuming SIMD32 dispatch.
749 const uint32_t max_invocations
= 32 * max_threads
;
750 ctx
->Const
.MaxComputeWorkGroupSize
[0] = max_invocations
;
751 ctx
->Const
.MaxComputeWorkGroupSize
[1] = max_invocations
;
752 ctx
->Const
.MaxComputeWorkGroupSize
[2] = max_invocations
;
753 ctx
->Const
.MaxComputeWorkGroupInvocations
= max_invocations
;
754 ctx
->Const
.MaxComputeSharedMemorySize
= 64 * 1024;
758 * Process driconf (drirc) options, setting appropriate context flags.
760 * intelInitExtensions still pokes at optionCache directly, in order to
761 * avoid advertising various extensions. No flags are set, so it makes
762 * sense to continue doing that there.
765 brw_process_driconf_options(struct brw_context
*brw
)
767 struct gl_context
*ctx
= &brw
->ctx
;
769 driOptionCache
*options
= &brw
->optionCache
;
770 driParseConfigFiles(options
, &brw
->intelScreen
->optionCache
,
771 brw
->driContext
->driScreenPriv
->myNum
, "i965");
773 int bo_reuse_mode
= driQueryOptioni(options
, "bo_reuse");
774 switch (bo_reuse_mode
) {
775 case DRI_CONF_BO_REUSE_DISABLED
:
777 case DRI_CONF_BO_REUSE_ALL
:
778 intel_bufmgr_gem_enable_reuse(brw
->bufmgr
);
782 if (!driQueryOptionb(options
, "hiz")) {
783 brw
->has_hiz
= false;
784 /* On gen6, you can only do separate stencil with HIZ. */
786 brw
->has_separate_stencil
= false;
789 if (driQueryOptionb(options
, "always_flush_batch")) {
790 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
791 brw
->always_flush_batch
= true;
794 if (driQueryOptionb(options
, "always_flush_cache")) {
795 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
796 brw
->always_flush_cache
= true;
799 if (driQueryOptionb(options
, "disable_throttling")) {
800 fprintf(stderr
, "disabling flush throttling\n");
801 brw
->disable_throttling
= true;
804 brw
->precompile
= driQueryOptionb(&brw
->optionCache
, "shader_precompile");
806 ctx
->Const
.ForceGLSLExtensionsWarn
=
807 driQueryOptionb(options
, "force_glsl_extensions_warn");
809 ctx
->Const
.DisableGLSLLineContinuations
=
810 driQueryOptionb(options
, "disable_glsl_line_continuations");
812 ctx
->Const
.AllowGLSLExtensionDirectiveMidShader
=
813 driQueryOptionb(options
, "allow_glsl_extension_directive_midshader");
815 brw
->dual_color_blend_by_location
=
816 driQueryOptionb(options
, "dual_color_blend_by_location");
820 brwCreateContext(gl_api api
,
821 const struct gl_config
*mesaVis
,
822 __DRIcontext
*driContextPriv
,
823 unsigned major_version
,
824 unsigned minor_version
,
827 unsigned *dri_ctx_error
,
828 void *sharedContextPrivate
)
830 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
831 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
832 struct intel_screen
*screen
= sPriv
->driverPrivate
;
833 const struct brw_device_info
*devinfo
= screen
->devinfo
;
834 struct dd_function_table functions
;
836 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
837 * provides us with context reset notifications.
839 uint32_t allowed_flags
= __DRI_CTX_FLAG_DEBUG
840 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
;
842 if (screen
->has_context_reset_notification
)
843 allowed_flags
|= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
;
845 if (flags
& ~allowed_flags
) {
846 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
850 struct brw_context
*brw
= rzalloc(NULL
, struct brw_context
);
852 fprintf(stderr
, "%s: failed to alloc context\n", __func__
);
853 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
857 driContextPriv
->driverPrivate
= brw
;
858 brw
->driContext
= driContextPriv
;
859 brw
->intelScreen
= screen
;
860 brw
->bufmgr
= screen
->bufmgr
;
862 brw
->gen
= devinfo
->gen
;
863 brw
->gt
= devinfo
->gt
;
864 brw
->is_g4x
= devinfo
->is_g4x
;
865 brw
->is_baytrail
= devinfo
->is_baytrail
;
866 brw
->is_haswell
= devinfo
->is_haswell
;
867 brw
->is_cherryview
= devinfo
->is_cherryview
;
868 brw
->is_broxton
= devinfo
->is_broxton
;
869 brw
->has_llc
= devinfo
->has_llc
;
870 brw
->has_hiz
= devinfo
->has_hiz_and_separate_stencil
;
871 brw
->has_separate_stencil
= devinfo
->has_hiz_and_separate_stencil
;
872 brw
->has_pln
= devinfo
->has_pln
;
873 brw
->has_compr4
= devinfo
->has_compr4
;
874 brw
->has_surface_tile_offset
= devinfo
->has_surface_tile_offset
;
875 brw
->has_negative_rhw_bug
= devinfo
->has_negative_rhw_bug
;
876 brw
->needs_unlit_centroid_workaround
=
877 devinfo
->needs_unlit_centroid_workaround
;
879 brw
->must_use_separate_stencil
= devinfo
->must_use_separate_stencil
;
880 brw
->has_swizzling
= screen
->hw_has_swizzling
;
882 brw
->vs
.base
.stage
= MESA_SHADER_VERTEX
;
883 brw
->tcs
.base
.stage
= MESA_SHADER_TESS_CTRL
;
884 brw
->tes
.base
.stage
= MESA_SHADER_TESS_EVAL
;
885 brw
->gs
.base
.stage
= MESA_SHADER_GEOMETRY
;
886 brw
->wm
.base
.stage
= MESA_SHADER_FRAGMENT
;
888 gen8_init_vtable_surface_functions(brw
);
889 brw
->vtbl
.emit_depth_stencil_hiz
= gen8_emit_depth_stencil_hiz
;
890 } else if (brw
->gen
>= 7) {
891 gen7_init_vtable_surface_functions(brw
);
892 brw
->vtbl
.emit_depth_stencil_hiz
= gen7_emit_depth_stencil_hiz
;
893 } else if (brw
->gen
>= 6) {
894 gen6_init_vtable_surface_functions(brw
);
895 brw
->vtbl
.emit_depth_stencil_hiz
= gen6_emit_depth_stencil_hiz
;
897 gen4_init_vtable_surface_functions(brw
);
898 brw
->vtbl
.emit_depth_stencil_hiz
= brw_emit_depth_stencil_hiz
;
901 brw_init_driver_functions(brw
, &functions
);
904 functions
.GetGraphicsResetStatus
= brw_get_graphics_reset_status
;
906 struct gl_context
*ctx
= &brw
->ctx
;
908 if (!_mesa_initialize_context(ctx
, api
, mesaVis
, shareCtx
, &functions
)) {
909 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
910 fprintf(stderr
, "%s: failed to init mesa context\n", __func__
);
911 intelDestroyContext(driContextPriv
);
915 driContextSetFlags(ctx
, flags
);
917 /* Initialize the software rasterizer and helper modules.
919 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
920 * software fallbacks (which we have to support on legacy GL to do weird
921 * glDrawPixels(), glBitmap(), and other functions).
923 if (api
!= API_OPENGL_CORE
&& api
!= API_OPENGLES2
) {
924 _swrast_CreateContext(ctx
);
927 _vbo_CreateContext(ctx
);
928 if (ctx
->swrast_context
) {
929 _tnl_CreateContext(ctx
);
930 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= _tnl_run_pipeline
;
931 _swsetup_CreateContext(ctx
);
933 /* Configure swrast to match hardware characteristics: */
934 _swrast_allow_pixel_fog(ctx
, false);
935 _swrast_allow_vertex_fog(ctx
, true);
938 _mesa_meta_init(ctx
);
940 brw_process_driconf_options(brw
);
942 if (INTEL_DEBUG
& DEBUG_PERF
)
943 brw
->perf_debug
= true;
945 brw_initialize_cs_context_constants(brw
, devinfo
->max_cs_threads
);
946 brw_initialize_context_constants(brw
);
948 ctx
->Const
.ResetStrategy
= notify_reset
949 ? GL_LOSE_CONTEXT_ON_RESET_ARB
: GL_NO_RESET_NOTIFICATION_ARB
;
951 /* Reinitialize the context point state. It depends on ctx->Const values. */
952 _mesa_init_point(ctx
);
956 intel_batchbuffer_init(brw
);
959 /* Create a new hardware context. Using a hardware context means that
960 * our GPU state will be saved/restored on context switch, allowing us
961 * to assume that the GPU is in the same state we left it in.
963 * This is required for transform feedback buffer offsets, query objects,
964 * and also allows us to reduce how much state we have to emit.
966 brw
->hw_ctx
= drm_intel_gem_context_create(brw
->bufmgr
);
969 fprintf(stderr
, "Gen6+ requires Kernel 3.6 or later.\n");
970 intelDestroyContext(driContextPriv
);
975 if (brw_init_pipe_control(brw
, devinfo
)) {
976 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
977 intelDestroyContext(driContextPriv
);
983 intelInitExtensions(ctx
);
985 brw_init_surface_formats(brw
);
987 brw
->max_vs_threads
= devinfo
->max_vs_threads
;
988 brw
->max_hs_threads
= devinfo
->max_hs_threads
;
989 brw
->max_ds_threads
= devinfo
->max_ds_threads
;
990 brw
->max_gs_threads
= devinfo
->max_gs_threads
;
991 brw
->max_wm_threads
= devinfo
->max_wm_threads
;
992 /* FINISHME: Do this for all platforms that the kernel supports */
993 if (brw
->is_cherryview
&&
994 screen
->subslice_total
> 0 && screen
->eu_total
> 0) {
995 /* Logical CS threads = EUs per subslice * 7 threads per EU */
996 brw
->max_cs_threads
= screen
->eu_total
/ screen
->subslice_total
* 7;
998 /* Fuse configurations may give more threads than expected, never less. */
999 if (brw
->max_cs_threads
< devinfo
->max_cs_threads
)
1000 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
1002 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
1004 brw
->urb
.size
= devinfo
->urb
.size
;
1005 brw
->urb
.min_vs_entries
= devinfo
->urb
.min_vs_entries
;
1006 brw
->urb
.max_vs_entries
= devinfo
->urb
.max_vs_entries
;
1007 brw
->urb
.max_hs_entries
= devinfo
->urb
.max_hs_entries
;
1008 brw
->urb
.max_ds_entries
= devinfo
->urb
.max_ds_entries
;
1009 brw
->urb
.max_gs_entries
= devinfo
->urb
.max_gs_entries
;
1011 /* Estimate the size of the mappable aperture into the GTT. There's an
1012 * ioctl to get the whole GTT size, but not one to get the mappable subset.
1013 * It turns out it's basically always 256MB, though some ancient hardware
1016 uint32_t gtt_size
= 256 * 1024 * 1024;
1018 /* We don't want to map two objects such that a memcpy between them would
1019 * just fault one mapping in and then the other over and over forever. So
1020 * we would need to divide the GTT size by 2. Additionally, some GTT is
1021 * taken up by things like the framebuffer and the ringbuffer and such, so
1022 * be more conservative.
1024 brw
->max_gtt_map_object_size
= gtt_size
/ 4;
1027 brw
->urb
.gs_present
= false;
1029 brw
->prim_restart
.in_progress
= false;
1030 brw
->prim_restart
.enable_cut_index
= false;
1031 brw
->gs
.enabled
= false;
1032 brw
->sf
.viewport_transform_enable
= true;
1034 brw
->predicate
.state
= BRW_PREDICATE_STATE_RENDER
;
1036 brw
->use_resource_streamer
= screen
->has_resource_streamer
&&
1037 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1038 env_var_as_boolean("INTEL_USE_GATHER", false));
1040 ctx
->VertexProgram
._MaintainTnlProgram
= true;
1041 ctx
->FragmentProgram
._MaintainTexEnvProgram
= true;
1043 brw_draw_init( brw
);
1045 if ((flags
& __DRI_CTX_FLAG_DEBUG
) != 0) {
1046 /* Turn on some extra GL_ARB_debug_output generation. */
1047 brw
->perf_debug
= true;
1050 if ((flags
& __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
) != 0)
1051 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB
;
1053 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
1054 brw_init_shader_time(brw
);
1056 _mesa_compute_version(ctx
);
1058 _mesa_initialize_dispatch_tables(ctx
);
1059 _mesa_initialize_vbo_vtxfmt(ctx
);
1061 if (ctx
->Extensions
.AMD_performance_monitor
) {
1062 brw_init_performance_monitors(brw
);
1065 vbo_use_buffer_objects(ctx
);
1066 vbo_always_unmap_buffers(ctx
);
1072 intelDestroyContext(__DRIcontext
* driContextPriv
)
1074 struct brw_context
*brw
=
1075 (struct brw_context
*) driContextPriv
->driverPrivate
;
1076 struct gl_context
*ctx
= &brw
->ctx
;
1078 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1079 if (INTEL_DEBUG
& DEBUG_AUB
) {
1080 intel_batchbuffer_flush(brw
);
1081 aub_dump_bmp(&brw
->ctx
);
1084 _mesa_meta_free(&brw
->ctx
);
1086 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
1087 /* Force a report. */
1088 brw
->shader_time
.report_time
= 0;
1090 brw_collect_and_report_shader_time(brw
);
1091 brw_destroy_shader_time(brw
);
1094 brw_destroy_state(brw
);
1095 brw_draw_destroy(brw
);
1097 drm_intel_bo_unreference(brw
->curbe
.curbe_bo
);
1098 if (brw
->vs
.base
.scratch_bo
)
1099 drm_intel_bo_unreference(brw
->vs
.base
.scratch_bo
);
1100 if (brw
->gs
.base
.scratch_bo
)
1101 drm_intel_bo_unreference(brw
->gs
.base
.scratch_bo
);
1102 if (brw
->wm
.base
.scratch_bo
)
1103 drm_intel_bo_unreference(brw
->wm
.base
.scratch_bo
);
1105 gen7_reset_hw_bt_pool_offsets(brw
);
1106 drm_intel_bo_unreference(brw
->hw_bt_pool
.bo
);
1107 brw
->hw_bt_pool
.bo
= NULL
;
1109 drm_intel_gem_context_destroy(brw
->hw_ctx
);
1111 if (ctx
->swrast_context
) {
1112 _swsetup_DestroyContext(&brw
->ctx
);
1113 _tnl_DestroyContext(&brw
->ctx
);
1115 _vbo_DestroyContext(&brw
->ctx
);
1117 if (ctx
->swrast_context
)
1118 _swrast_DestroyContext(&brw
->ctx
);
1120 brw_fini_pipe_control(brw
);
1121 intel_batchbuffer_free(brw
);
1123 drm_intel_bo_unreference(brw
->throttle_batch
[1]);
1124 drm_intel_bo_unreference(brw
->throttle_batch
[0]);
1125 brw
->throttle_batch
[1] = NULL
;
1126 brw
->throttle_batch
[0] = NULL
;
1128 driDestroyOptionCache(&brw
->optionCache
);
1130 /* free the Mesa context */
1131 _mesa_free_context_data(&brw
->ctx
);
1134 driContextPriv
->driverPrivate
= NULL
;
1138 intelUnbindContext(__DRIcontext
* driContextPriv
)
1140 /* Unset current context and dispath table */
1141 _mesa_make_current(NULL
, NULL
, NULL
);
1147 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1148 * on window system framebuffers.
1150 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1151 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1152 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1153 * for a visual where you're guaranteed to be capable, but it turns out that
1154 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1155 * incapable ones, because there's no difference between the two in resources
1156 * used. Applications thus get built that accidentally rely on the default
1157 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1160 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1161 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1162 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1163 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1164 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1165 * and get no sRGB encode (assuming that both kinds of visual are available).
1166 * Thus our choice to support sRGB by default on our visuals for desktop would
1167 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1169 * Unfortunately, renderbuffer setup happens before a context is created. So
1170 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1171 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1172 * yet), we go turn that back off before anyone finds out.
1175 intel_gles3_srgb_workaround(struct brw_context
*brw
,
1176 struct gl_framebuffer
*fb
)
1178 struct gl_context
*ctx
= &brw
->ctx
;
1180 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
1183 /* Some day when we support the sRGB capable bit on visuals available for
1184 * GLES, we'll need to respect that and not disable things here.
1186 fb
->Visual
.sRGBCapable
= false;
1187 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
1188 struct gl_renderbuffer
*rb
= fb
->Attachment
[i
].Renderbuffer
;
1190 rb
->Format
= _mesa_get_srgb_format_linear(rb
->Format
);
1195 intelMakeCurrent(__DRIcontext
* driContextPriv
,
1196 __DRIdrawable
* driDrawPriv
,
1197 __DRIdrawable
* driReadPriv
)
1199 struct brw_context
*brw
;
1200 GET_CURRENT_CONTEXT(curCtx
);
1203 brw
= (struct brw_context
*) driContextPriv
->driverPrivate
;
1207 /* According to the glXMakeCurrent() man page: "Pending commands to
1208 * the previous context, if any, are flushed before it is released."
1209 * But only flush if we're actually changing contexts.
1211 if (brw_context(curCtx
) && brw_context(curCtx
) != brw
) {
1212 _mesa_flush(curCtx
);
1215 if (driContextPriv
) {
1216 struct gl_context
*ctx
= &brw
->ctx
;
1217 struct gl_framebuffer
*fb
, *readFb
;
1219 if (driDrawPriv
== NULL
) {
1220 fb
= _mesa_get_incomplete_framebuffer();
1222 fb
= driDrawPriv
->driverPrivate
;
1223 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1226 if (driReadPriv
== NULL
) {
1227 readFb
= _mesa_get_incomplete_framebuffer();
1229 readFb
= driReadPriv
->driverPrivate
;
1230 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1233 /* The sRGB workaround changes the renderbuffer's format. We must change
1234 * the format before the renderbuffer's miptree get's allocated, otherwise
1235 * the formats of the renderbuffer and its miptree will differ.
1237 intel_gles3_srgb_workaround(brw
, fb
);
1238 intel_gles3_srgb_workaround(brw
, readFb
);
1240 /* If the context viewport hasn't been initialized, force a call out to
1241 * the loader to get buffers so we have a drawable size for the initial
1243 if (!brw
->ctx
.ViewportInitialized
)
1244 intel_prepare_render(brw
);
1246 _mesa_make_current(ctx
, fb
, readFb
);
1248 _mesa_make_current(NULL
, NULL
, NULL
);
1255 intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1256 __DRIdrawable
*drawable
)
1259 /* MSAA and fast color clear are not supported, so don't waste time
1260 * checking whether a resolve is needed.
1265 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1266 struct intel_renderbuffer
*rb
;
1268 /* Usually, only the back buffer will need to be downsampled. However,
1269 * the front buffer will also need it if the user has rendered into it.
1271 static const gl_buffer_index buffers
[2] = {
1276 for (int i
= 0; i
< 2; ++i
) {
1277 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
1278 if (rb
== NULL
|| rb
->mt
== NULL
)
1280 if (rb
->mt
->num_samples
<= 1)
1281 intel_miptree_resolve_color(brw
, rb
->mt
, 0);
1283 intel_renderbuffer_downsample(brw
, rb
);
1288 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
1290 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
1294 intel_query_dri2_buffers(struct brw_context
*brw
,
1295 __DRIdrawable
*drawable
,
1296 __DRIbuffer
**buffers
,
1300 intel_process_dri2_buffer(struct brw_context
*brw
,
1301 __DRIdrawable
*drawable
,
1302 __DRIbuffer
*buffer
,
1303 struct intel_renderbuffer
*rb
,
1304 const char *buffer_name
);
1307 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
);
1310 intel_update_dri2_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1312 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1313 struct intel_renderbuffer
*rb
;
1314 __DRIbuffer
*buffers
= NULL
;
1316 const char *region_name
;
1318 /* Set this up front, so that in case our buffers get invalidated
1319 * while we're getting new buffers, we don't clobber the stamp and
1320 * thus ignore the invalidate. */
1321 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1323 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1324 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1326 intel_query_dri2_buffers(brw
, drawable
, &buffers
, &count
);
1328 if (buffers
== NULL
)
1331 for (i
= 0; i
< count
; i
++) {
1332 switch (buffers
[i
].attachment
) {
1333 case __DRI_BUFFER_FRONT_LEFT
:
1334 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1335 region_name
= "dri2 front buffer";
1338 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
1339 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1340 region_name
= "dri2 fake front buffer";
1343 case __DRI_BUFFER_BACK_LEFT
:
1344 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1345 region_name
= "dri2 back buffer";
1348 case __DRI_BUFFER_DEPTH
:
1349 case __DRI_BUFFER_HIZ
:
1350 case __DRI_BUFFER_DEPTH_STENCIL
:
1351 case __DRI_BUFFER_STENCIL
:
1352 case __DRI_BUFFER_ACCUM
:
1355 "unhandled buffer attach event, attachment type %d\n",
1356 buffers
[i
].attachment
);
1360 intel_process_dri2_buffer(brw
, drawable
, &buffers
[i
], rb
, region_name
);
1366 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
1368 struct brw_context
*brw
= context
->driverPrivate
;
1369 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1371 /* Set this up front, so that in case our buffers get invalidated
1372 * while we're getting new buffers, we don't clobber the stamp and
1373 * thus ignore the invalidate. */
1374 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1376 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1377 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1379 if (screen
->image
.loader
)
1380 intel_update_image_buffers(brw
, drawable
);
1382 intel_update_dri2_buffers(brw
, drawable
);
1384 driUpdateFramebufferSize(&brw
->ctx
, drawable
);
1388 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1389 * state is required.
1392 intel_prepare_render(struct brw_context
*brw
)
1394 struct gl_context
*ctx
= &brw
->ctx
;
1395 __DRIcontext
*driContext
= brw
->driContext
;
1396 __DRIdrawable
*drawable
;
1398 drawable
= driContext
->driDrawablePriv
;
1399 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
1400 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1401 intel_update_renderbuffers(driContext
, drawable
);
1402 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
1405 drawable
= driContext
->driReadablePriv
;
1406 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
1407 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1408 intel_update_renderbuffers(driContext
, drawable
);
1409 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
1412 /* If we're currently rendering to the front buffer, the rendering
1413 * that will happen next will probably dirty the front buffer. So
1414 * mark it as dirty here.
1416 if (_mesa_is_front_buffer_drawing(ctx
->DrawBuffer
))
1417 brw
->front_buffer_dirty
= true;
1421 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1423 * To determine which DRI buffers to request, examine the renderbuffers
1424 * attached to the drawable's framebuffer. Then request the buffers with
1425 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1427 * This is called from intel_update_renderbuffers().
1429 * \param drawable Drawable whose buffers are queried.
1430 * \param buffers [out] List of buffers returned by DRI2 query.
1431 * \param buffer_count [out] Number of buffers returned.
1433 * \see intel_update_renderbuffers()
1434 * \see DRI2GetBuffers()
1435 * \see DRI2GetBuffersWithFormat()
1438 intel_query_dri2_buffers(struct brw_context
*brw
,
1439 __DRIdrawable
*drawable
,
1440 __DRIbuffer
**buffers
,
1443 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1444 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1446 unsigned attachments
[8];
1448 struct intel_renderbuffer
*front_rb
;
1449 struct intel_renderbuffer
*back_rb
;
1451 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1452 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1454 memset(attachments
, 0, sizeof(attachments
));
1455 if ((_mesa_is_front_buffer_drawing(fb
) ||
1456 _mesa_is_front_buffer_reading(fb
) ||
1457 !back_rb
) && front_rb
) {
1458 /* If a fake front buffer is in use, then querying for
1459 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1460 * the real front buffer to the fake front buffer. So before doing the
1461 * query, we need to make sure all the pending drawing has landed in the
1462 * real front buffer.
1464 intel_batchbuffer_flush(brw
);
1465 intel_flush_front(&brw
->ctx
);
1467 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1468 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1469 } else if (front_rb
&& brw
->front_buffer_dirty
) {
1470 /* We have pending front buffer rendering, but we aren't querying for a
1471 * front buffer. If the front buffer we have is a fake front buffer,
1472 * the X server is going to throw it away when it processes the query.
1473 * So before doing the query, make sure all the pending drawing has
1474 * landed in the real front buffer.
1476 intel_batchbuffer_flush(brw
);
1477 intel_flush_front(&brw
->ctx
);
1481 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1482 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1485 assert(i
<= ARRAY_SIZE(attachments
));
1487 *buffers
= screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1492 drawable
->loaderPrivate
);
1496 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1498 * This is called from intel_update_renderbuffers().
1501 * DRI buffers whose attachment point is DRI2BufferStencil or
1502 * DRI2BufferDepthStencil are handled as special cases.
1504 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1505 * that is passed to drm_intel_bo_gem_create_from_name().
1507 * \see intel_update_renderbuffers()
1510 intel_process_dri2_buffer(struct brw_context
*brw
,
1511 __DRIdrawable
*drawable
,
1512 __DRIbuffer
*buffer
,
1513 struct intel_renderbuffer
*rb
,
1514 const char *buffer_name
)
1516 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1522 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1524 /* We try to avoid closing and reopening the same BO name, because the first
1525 * use of a mapping of the buffer involves a bunch of page faulting which is
1526 * moderately expensive.
1528 struct intel_mipmap_tree
*last_mt
;
1529 if (num_samples
== 0)
1532 last_mt
= rb
->singlesample_mt
;
1534 uint32_t old_name
= 0;
1536 /* The bo already has a name because the miptree was created by a
1537 * previous call to intel_process_dri2_buffer(). If a bo already has a
1538 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1539 * create a new name.
1541 drm_intel_bo_flink(last_mt
->bo
, &old_name
);
1544 if (old_name
== buffer
->name
)
1547 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1549 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1550 buffer
->name
, buffer
->attachment
,
1551 buffer
->cpp
, buffer
->pitch
);
1554 bo
= drm_intel_bo_gem_create_from_name(brw
->bufmgr
, buffer_name
,
1558 "Failed to open BO for returned DRI2 buffer "
1559 "(%dx%d, %s, named %d).\n"
1560 "This is likely a bug in the X Server that will lead to a "
1562 drawable
->w
, drawable
->h
, buffer_name
, buffer
->name
);
1566 intel_update_winsys_renderbuffer_miptree(brw
, rb
, bo
,
1567 drawable
->w
, drawable
->h
,
1570 if (_mesa_is_front_buffer_drawing(fb
) &&
1571 (buffer
->attachment
== __DRI_BUFFER_FRONT_LEFT
||
1572 buffer
->attachment
== __DRI_BUFFER_FAKE_FRONT_LEFT
) &&
1573 rb
->Base
.Base
.NumSamples
> 1) {
1574 intel_renderbuffer_upsample(brw
, rb
);
1579 drm_intel_bo_unreference(bo
);
1583 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1585 * To determine which DRI buffers to request, examine the renderbuffers
1586 * attached to the drawable's framebuffer. Then request the buffers from
1589 * This is called from intel_update_renderbuffers().
1591 * \param drawable Drawable whose buffers are queried.
1592 * \param buffers [out] List of buffers returned by DRI2 query.
1593 * \param buffer_count [out] Number of buffers returned.
1595 * \see intel_update_renderbuffers()
1599 intel_update_image_buffer(struct brw_context
*intel
,
1600 __DRIdrawable
*drawable
,
1601 struct intel_renderbuffer
*rb
,
1603 enum __DRIimageBufferMask buffer_type
)
1605 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1607 if (!rb
|| !buffer
->bo
)
1610 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1612 /* Check and see if we're already bound to the right
1615 struct intel_mipmap_tree
*last_mt
;
1616 if (num_samples
== 0)
1619 last_mt
= rb
->singlesample_mt
;
1621 if (last_mt
&& last_mt
->bo
== buffer
->bo
)
1624 intel_update_winsys_renderbuffer_miptree(intel
, rb
, buffer
->bo
,
1625 buffer
->width
, buffer
->height
,
1628 if (_mesa_is_front_buffer_drawing(fb
) &&
1629 buffer_type
== __DRI_IMAGE_BUFFER_FRONT
&&
1630 rb
->Base
.Base
.NumSamples
> 1) {
1631 intel_renderbuffer_upsample(intel
, rb
);
1636 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1638 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1639 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1640 struct intel_renderbuffer
*front_rb
;
1641 struct intel_renderbuffer
*back_rb
;
1642 struct __DRIimageList images
;
1643 unsigned int format
;
1644 uint32_t buffer_mask
= 0;
1646 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1647 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1650 format
= intel_rb_format(back_rb
);
1652 format
= intel_rb_format(front_rb
);
1656 if (front_rb
&& (_mesa_is_front_buffer_drawing(fb
) ||
1657 _mesa_is_front_buffer_reading(fb
) || !back_rb
)) {
1658 buffer_mask
|= __DRI_IMAGE_BUFFER_FRONT
;
1662 buffer_mask
|= __DRI_IMAGE_BUFFER_BACK
;
1664 (*screen
->image
.loader
->getBuffers
) (drawable
,
1665 driGLFormatToImageFormat(format
),
1666 &drawable
->dri2
.stamp
,
1667 drawable
->loaderPrivate
,
1671 if (images
.image_mask
& __DRI_IMAGE_BUFFER_FRONT
) {
1672 drawable
->w
= images
.front
->width
;
1673 drawable
->h
= images
.front
->height
;
1674 intel_update_image_buffer(brw
,
1678 __DRI_IMAGE_BUFFER_FRONT
);
1680 if (images
.image_mask
& __DRI_IMAGE_BUFFER_BACK
) {
1681 drawable
->w
= images
.back
->width
;
1682 drawable
->h
= images
.back
->height
;
1683 intel_update_image_buffer(brw
,
1687 __DRI_IMAGE_BUFFER_BACK
);