2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **********************************************************************/
30 * Keith Whitwell <keithw@vmware.com>
34 #include "main/api_exec.h"
35 #include "main/context.h"
36 #include "main/fbobject.h"
37 #include "main/extensions.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
40 #include "main/points.h"
41 #include "main/version.h"
42 #include "main/vtxfmt.h"
43 #include "main/texobj.h"
44 #include "main/framebuffer.h"
46 #include "vbo/vbo_context.h"
48 #include "drivers/common/driverfuncs.h"
49 #include "drivers/common/meta.h"
52 #include "brw_context.h"
53 #include "brw_defines.h"
54 #include "brw_compiler.h"
56 #include "brw_state.h"
58 #include "intel_batchbuffer.h"
59 #include "intel_buffer_objects.h"
60 #include "intel_buffers.h"
61 #include "intel_fbo.h"
62 #include "intel_mipmap_tree.h"
63 #include "intel_pixel.h"
64 #include "intel_image.h"
65 #include "intel_tex.h"
66 #include "intel_tex_obj.h"
68 #include "swrast_setup/swrast_setup.h"
70 #include "tnl/t_pipeline.h"
71 #include "util/ralloc.h"
72 #include "util/debug.h"
75 /***************************************
76 * Mesa's Driver Functions
77 ***************************************/
79 const char *const brw_vendor_string
= "Intel Open Source Technology Center";
82 get_bsw_model(const struct intel_screen
*intelScreen
)
84 switch (intelScreen
->eu_total
) {
95 brw_get_renderer_string(const struct intel_screen
*intelScreen
)
98 static char buffer
[128];
101 switch (intelScreen
->deviceID
) {
103 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
104 #include "pci_ids/i965_pci_ids.h"
106 chipset
= "Unknown Intel Chipset";
110 /* Braswell branding is funny, so we have to fix it up here */
111 if (intelScreen
->deviceID
== 0x22B1) {
112 bsw
= strdup(chipset
);
113 char *needle
= strstr(bsw
, "XXX");
115 memcpy(needle
, get_bsw_model(intelScreen
), 3);
120 (void) driGetRendererString(buffer
, chipset
, 0);
125 static const GLubyte
*
126 intel_get_string(struct gl_context
* ctx
, GLenum name
)
128 const struct brw_context
*const brw
= brw_context(ctx
);
132 return (GLubyte
*) brw_vendor_string
;
136 (GLubyte
*) brw_get_renderer_string(brw
->intelScreen
);
144 intel_viewport(struct gl_context
*ctx
)
146 struct brw_context
*brw
= brw_context(ctx
);
147 __DRIcontext
*driContext
= brw
->driContext
;
149 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
150 if (driContext
->driDrawablePriv
)
151 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
152 if (driContext
->driReadablePriv
)
153 dri2InvalidateDrawable(driContext
->driReadablePriv
);
158 intel_update_framebuffer(struct gl_context
*ctx
,
159 struct gl_framebuffer
*fb
)
161 struct brw_context
*brw
= brw_context(ctx
);
163 /* Quantize the derived default number of samples
165 fb
->DefaultGeometry
._NumSamples
=
166 intel_quantize_num_samples(brw
->intelScreen
,
167 fb
->DefaultGeometry
.NumSamples
);
170 /* On Gen9 color buffers may be compressed by the hardware (lossless
171 * compression). There are, however, format restrictions and care needs to be
172 * taken that the sampler engine is capable for re-interpreting a buffer with
173 * format different the buffer was originally written with.
175 * For example, SRGB formats are not compressible and the sampler engine isn't
176 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
177 * color buffer needs to be resolved so that the sampling surface can be
178 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
182 intel_texture_view_requires_resolve(struct brw_context
*brw
,
183 struct intel_texture_object
*intel_tex
)
186 !intel_miptree_is_lossless_compressed(brw
, intel_tex
->mt
))
189 const uint32_t brw_format
= brw_format_for_mesa_format(intel_tex
->_Format
);
191 if (isl_format_supports_lossless_compression(brw
->intelScreen
->devinfo
,
195 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
196 _mesa_get_format_name(intel_tex
->_Format
),
197 _mesa_get_format_name(intel_tex
->mt
->format
));
203 intel_update_state(struct gl_context
* ctx
, GLuint new_state
)
205 struct brw_context
*brw
= brw_context(ctx
);
206 struct intel_texture_object
*tex_obj
;
207 struct intel_renderbuffer
*depth_irb
;
209 if (ctx
->swrast_context
)
210 _swrast_InvalidateState(ctx
, new_state
);
211 _vbo_InvalidateState(ctx
, new_state
);
213 brw
->NewGLState
|= new_state
;
215 _mesa_unlock_context_textures(ctx
);
217 /* Resolve the depth buffer's HiZ buffer. */
218 depth_irb
= intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_DEPTH
);
220 intel_renderbuffer_resolve_hiz(brw
, depth_irb
);
222 /* Resolve depth buffer and render cache of each enabled texture. */
223 int maxEnabledUnit
= ctx
->Texture
._MaxEnabledTexImageUnit
;
224 for (int i
= 0; i
<= maxEnabledUnit
; i
++) {
225 if (!ctx
->Texture
.Unit
[i
]._Current
)
227 tex_obj
= intel_texture_object(ctx
->Texture
.Unit
[i
]._Current
);
228 if (!tex_obj
|| !tex_obj
->mt
)
230 intel_miptree_all_slices_resolve_depth(brw
, tex_obj
->mt
);
231 /* Sampling engine understands lossless compression and resolving
232 * those surfaces should be skipped for performance reasons.
234 const int flags
= intel_texture_view_requires_resolve(brw
, tex_obj
) ?
235 0 : INTEL_MIPTREE_IGNORE_CCS_E
;
236 intel_miptree_resolve_color(brw
, tex_obj
->mt
, flags
);
237 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
240 /* Resolve color for each active shader image. */
241 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
242 const struct gl_linked_shader
*shader
=
243 ctx
->_Shader
->CurrentProgram
[i
] ?
244 ctx
->_Shader
->CurrentProgram
[i
]->_LinkedShaders
[i
] : NULL
;
246 if (unlikely(shader
&& shader
->NumImages
)) {
247 for (unsigned j
= 0; j
< shader
->NumImages
; j
++) {
248 struct gl_image_unit
*u
= &ctx
->ImageUnits
[shader
->ImageUnits
[j
]];
249 tex_obj
= intel_texture_object(u
->TexObj
);
251 if (tex_obj
&& tex_obj
->mt
) {
252 /* Access to images is implemented using indirect messages
253 * against data port. Normal render target write understands
254 * lossless compression but unfortunately the typed/untyped
255 * read/write interface doesn't. Therefore the compressed
256 * surfaces need to be resolved prior to accessing them.
258 intel_miptree_resolve_color(brw
, tex_obj
->mt
, 0);
259 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
265 /* Resolve color buffers for non-coherent framebufer fetch. */
266 if (!ctx
->Extensions
.MESA_shader_framebuffer_fetch
&&
267 ctx
->FragmentProgram
._Current
&&
268 ctx
->FragmentProgram
._Current
->Base
.OutputsRead
) {
269 const struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
271 for (unsigned i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
272 const struct intel_renderbuffer
*irb
=
273 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
276 intel_miptree_resolve_color(brw
, irb
->mt
,
277 INTEL_MIPTREE_IGNORE_CCS_E
))
278 brw_render_cache_set_check_flush(brw
, irb
->mt
->bo
);
282 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
283 * single-sampled color renderbuffers because the CCS buffer isn't
284 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
285 * enabled because otherwise the surface state will be programmed with the
286 * linear equivalent format anyway.
288 if (brw
->gen
>= 9 && ctx
->Color
.sRGBEnabled
) {
289 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
290 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
291 struct gl_renderbuffer
*rb
= fb
->_ColorDrawBuffers
[i
];
296 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
297 struct intel_mipmap_tree
*mt
= irb
->mt
;
300 mt
->num_samples
> 1 ||
301 _mesa_get_srgb_format_linear(mt
->format
) == mt
->format
)
304 /* Lossless compression is not supported for SRGB formats, it
305 * should be impossible to get here with such surfaces.
307 assert(!intel_miptree_is_lossless_compressed(brw
, mt
));
308 intel_miptree_resolve_color(brw
, mt
, 0);
309 brw_render_cache_set_check_flush(brw
, mt
->bo
);
313 _mesa_lock_context_textures(ctx
);
315 if (new_state
& _NEW_BUFFERS
) {
316 intel_update_framebuffer(ctx
, ctx
->DrawBuffer
);
317 if (ctx
->DrawBuffer
!= ctx
->ReadBuffer
)
318 intel_update_framebuffer(ctx
, ctx
->ReadBuffer
);
322 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
325 intel_flush_front(struct gl_context
*ctx
)
327 struct brw_context
*brw
= brw_context(ctx
);
328 __DRIcontext
*driContext
= brw
->driContext
;
329 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
330 __DRIscreen
*const screen
= brw
->intelScreen
->driScrnPriv
;
332 if (brw
->front_buffer_dirty
&& _mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
333 if (flushFront(screen
) && driDrawable
&&
334 driDrawable
->loaderPrivate
) {
336 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
338 * This potentially resolves both front and back buffer. It
339 * is unnecessary to resolve the back, but harms nothing except
340 * performance. And no one cares about front-buffer render
343 intel_resolve_for_dri2_flush(brw
, driDrawable
);
344 intel_batchbuffer_flush(brw
);
346 flushFront(screen
)(driDrawable
, driDrawable
->loaderPrivate
);
348 /* We set the dirty bit in intel_prepare_render() if we're
349 * front buffer rendering once we get there.
351 brw
->front_buffer_dirty
= false;
357 intel_glFlush(struct gl_context
*ctx
)
359 struct brw_context
*brw
= brw_context(ctx
);
361 intel_batchbuffer_flush(brw
);
362 intel_flush_front(ctx
);
364 brw
->need_flush_throttle
= true;
368 intel_finish(struct gl_context
* ctx
)
370 struct brw_context
*brw
= brw_context(ctx
);
374 if (brw
->batch
.last_bo
)
375 drm_intel_bo_wait_rendering(brw
->batch
.last_bo
);
379 brw_init_driver_functions(struct brw_context
*brw
,
380 struct dd_function_table
*functions
)
382 _mesa_init_driver_functions(functions
);
384 /* GLX uses DRI2 invalidate events to handle window resizing.
385 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
386 * which doesn't provide a mechanism for snooping the event queues.
388 * So EGL still relies on viewport hacks to handle window resizing.
389 * This should go away with DRI3000.
391 if (!brw
->driContext
->driScreenPriv
->dri2
.useInvalidate
)
392 functions
->Viewport
= intel_viewport
;
394 functions
->Flush
= intel_glFlush
;
395 functions
->Finish
= intel_finish
;
396 functions
->GetString
= intel_get_string
;
397 functions
->UpdateState
= intel_update_state
;
399 intelInitTextureFuncs(functions
);
400 intelInitTextureImageFuncs(functions
);
401 intelInitTextureSubImageFuncs(functions
);
402 intelInitTextureCopyImageFuncs(functions
);
403 intelInitCopyImageFuncs(functions
);
404 intelInitClearFuncs(functions
);
405 intelInitBufferFuncs(functions
);
406 intelInitPixelFuncs(functions
);
407 intelInitBufferObjectFuncs(functions
);
408 intel_init_syncobj_functions(functions
);
409 brw_init_object_purgeable_functions(functions
);
411 brwInitFragProgFuncs( functions
);
412 brw_init_common_queryobj_functions(functions
);
413 if (brw
->gen
>= 8 || brw
->is_haswell
)
414 hsw_init_queryobj_functions(functions
);
415 else if (brw
->gen
>= 6)
416 gen6_init_queryobj_functions(functions
);
418 gen4_init_queryobj_functions(functions
);
419 brw_init_compute_functions(functions
);
421 brw_init_conditional_render_functions(functions
);
423 functions
->QueryInternalFormat
= brw_query_internal_format
;
425 functions
->NewTransformFeedback
= brw_new_transform_feedback
;
426 functions
->DeleteTransformFeedback
= brw_delete_transform_feedback
;
427 if (brw
->intelScreen
->has_mi_math_and_lrr
) {
428 functions
->BeginTransformFeedback
= hsw_begin_transform_feedback
;
429 functions
->EndTransformFeedback
= hsw_end_transform_feedback
;
430 functions
->PauseTransformFeedback
= hsw_pause_transform_feedback
;
431 functions
->ResumeTransformFeedback
= hsw_resume_transform_feedback
;
432 } else if (brw
->gen
>= 7) {
433 functions
->BeginTransformFeedback
= gen7_begin_transform_feedback
;
434 functions
->EndTransformFeedback
= gen7_end_transform_feedback
;
435 functions
->PauseTransformFeedback
= gen7_pause_transform_feedback
;
436 functions
->ResumeTransformFeedback
= gen7_resume_transform_feedback
;
437 functions
->GetTransformFeedbackVertexCount
=
438 brw_get_transform_feedback_vertex_count
;
440 functions
->BeginTransformFeedback
= brw_begin_transform_feedback
;
441 functions
->EndTransformFeedback
= brw_end_transform_feedback
;
445 functions
->GetSamplePosition
= gen6_get_sample_position
;
449 brw_initialize_context_constants(struct brw_context
*brw
)
451 struct gl_context
*ctx
= &brw
->ctx
;
452 const struct brw_compiler
*compiler
= brw
->intelScreen
->compiler
;
454 const bool stage_exists
[MESA_SHADER_STAGES
] = {
455 [MESA_SHADER_VERTEX
] = true,
456 [MESA_SHADER_TESS_CTRL
] = brw
->gen
>= 7,
457 [MESA_SHADER_TESS_EVAL
] = brw
->gen
>= 7,
458 [MESA_SHADER_GEOMETRY
] = brw
->gen
>= 6,
459 [MESA_SHADER_FRAGMENT
] = true,
460 [MESA_SHADER_COMPUTE
] =
461 (ctx
->API
== API_OPENGL_CORE
&&
462 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 1024) ||
463 (ctx
->API
== API_OPENGLES2
&&
464 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 128) ||
465 _mesa_extension_override_enables
.ARB_compute_shader
,
468 unsigned num_stages
= 0;
469 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
474 unsigned max_samplers
=
475 brw
->gen
>= 8 || brw
->is_haswell
? BRW_MAX_TEX_UNIT
: 16;
477 ctx
->Const
.MaxDualSourceDrawBuffers
= 1;
478 ctx
->Const
.MaxDrawBuffers
= BRW_MAX_DRAW_BUFFERS
;
479 ctx
->Const
.MaxCombinedShaderOutputResources
=
480 MAX_IMAGE_UNITS
+ BRW_MAX_DRAW_BUFFERS
;
482 ctx
->Const
.QueryCounterBits
.Timestamp
= 36;
484 ctx
->Const
.MaxTextureCoordUnits
= 8; /* Mesa limit */
485 ctx
->Const
.MaxImageUnits
= MAX_IMAGE_UNITS
;
486 ctx
->Const
.MaxRenderbufferSize
= 8192;
487 ctx
->Const
.MaxTextureLevels
= MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS
);
489 /* On Sandy Bridge and prior, the "Render Target View Extent" field of
490 * RENDER_SURFACE_STATE is only 9 bits so the largest 3-D texture we can do
491 * a layered render into has a depth of 512. On Iron Lake and earlier, we
492 * don't support layered rendering and we use manual offsetting to render
493 * into the different layers so this doesn't matter. On Sandy Bridge,
494 * however, we do support layered rendering so this is a problem.
496 ctx
->Const
.Max3DTextureLevels
= brw
->gen
== 6 ? 10 /* 512 */ : 12; /* 2048 */
498 ctx
->Const
.MaxCubeTextureLevels
= 14; /* 8192 */
499 ctx
->Const
.MaxArrayTextureLayers
= brw
->gen
>= 7 ? 2048 : 512;
500 ctx
->Const
.MaxTextureMbytes
= 1536;
501 ctx
->Const
.MaxTextureRectSize
= 1 << 12;
502 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
503 ctx
->Const
.StripTextureBorder
= true;
505 ctx
->Const
.MaxProgramTextureGatherComponents
= 4;
506 else if (brw
->gen
== 6)
507 ctx
->Const
.MaxProgramTextureGatherComponents
= 1;
509 ctx
->Const
.MaxUniformBlockSize
= 65536;
511 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
512 struct gl_program_constants
*prog
= &ctx
->Const
.Program
[i
];
514 if (!stage_exists
[i
])
517 prog
->MaxTextureImageUnits
= max_samplers
;
519 prog
->MaxUniformBlocks
= BRW_MAX_UBO
;
520 prog
->MaxCombinedUniformComponents
=
521 prog
->MaxUniformComponents
+
522 ctx
->Const
.MaxUniformBlockSize
/ 4 * prog
->MaxUniformBlocks
;
524 prog
->MaxAtomicCounters
= MAX_ATOMIC_COUNTERS
;
525 prog
->MaxAtomicBuffers
= BRW_MAX_ABO
;
526 prog
->MaxImageUniforms
= compiler
->scalar_stage
[i
] ? BRW_MAX_IMAGES
: 0;
527 prog
->MaxShaderStorageBlocks
= BRW_MAX_SSBO
;
530 ctx
->Const
.MaxTextureUnits
=
531 MIN2(ctx
->Const
.MaxTextureCoordUnits
,
532 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
);
534 ctx
->Const
.MaxUniformBufferBindings
= num_stages
* BRW_MAX_UBO
;
535 ctx
->Const
.MaxCombinedUniformBlocks
= num_stages
* BRW_MAX_UBO
;
536 ctx
->Const
.MaxCombinedAtomicBuffers
= num_stages
* BRW_MAX_ABO
;
537 ctx
->Const
.MaxCombinedShaderStorageBlocks
= num_stages
* BRW_MAX_SSBO
;
538 ctx
->Const
.MaxShaderStorageBufferBindings
= num_stages
* BRW_MAX_SSBO
;
539 ctx
->Const
.MaxCombinedTextureImageUnits
= num_stages
* max_samplers
;
540 ctx
->Const
.MaxCombinedImageUniforms
= num_stages
* BRW_MAX_IMAGES
;
543 /* Hardware only supports a limited number of transform feedback buffers.
544 * So we need to override the Mesa default (which is based only on software
547 ctx
->Const
.MaxTransformFeedbackBuffers
= BRW_MAX_SOL_BUFFERS
;
549 /* On Gen6, in the worst case, we use up one binding table entry per
550 * transform feedback component (see comments above the definition of
551 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
552 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
553 * BRW_MAX_SOL_BINDINGS.
555 * In "separate components" mode, we need to divide this value by
556 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
557 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
559 ctx
->Const
.MaxTransformFeedbackInterleavedComponents
= BRW_MAX_SOL_BINDINGS
;
560 ctx
->Const
.MaxTransformFeedbackSeparateComponents
=
561 BRW_MAX_SOL_BINDINGS
/ BRW_MAX_SOL_BUFFERS
;
563 ctx
->Const
.AlwaysUseGetTransformFeedbackVertexCount
=
564 !brw
->intelScreen
->has_mi_math_and_lrr
;
567 const int *msaa_modes
= intel_supported_msaa_modes(brw
->intelScreen
);
568 const int clamp_max_samples
=
569 driQueryOptioni(&brw
->optionCache
, "clamp_max_samples");
571 if (clamp_max_samples
< 0) {
572 max_samples
= msaa_modes
[0];
574 /* Select the largest supported MSAA mode that does not exceed
578 for (int i
= 0; msaa_modes
[i
] != 0; ++i
) {
579 if (msaa_modes
[i
] <= clamp_max_samples
) {
580 max_samples
= msaa_modes
[i
];
586 ctx
->Const
.MaxSamples
= max_samples
;
587 ctx
->Const
.MaxColorTextureSamples
= max_samples
;
588 ctx
->Const
.MaxDepthTextureSamples
= max_samples
;
589 ctx
->Const
.MaxIntegerSamples
= max_samples
;
590 ctx
->Const
.MaxImageSamples
= 0;
592 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
593 * to map indices of rectangular grid to sample numbers within a pixel.
594 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
595 * extension implementation. For more details see the comment above
596 * gen6_set_sample_maps() definition.
598 gen6_set_sample_maps(ctx
);
600 ctx
->Const
.MinLineWidth
= 1.0;
601 ctx
->Const
.MinLineWidthAA
= 1.0;
603 ctx
->Const
.MaxLineWidth
= 7.375;
604 ctx
->Const
.MaxLineWidthAA
= 7.375;
605 ctx
->Const
.LineWidthGranularity
= 0.125;
607 ctx
->Const
.MaxLineWidth
= 7.0;
608 ctx
->Const
.MaxLineWidthAA
= 7.0;
609 ctx
->Const
.LineWidthGranularity
= 0.5;
612 /* For non-antialiased lines, we have to round the line width to the
613 * nearest whole number. Make sure that we don't advertise a line
614 * width that, when rounded, will be beyond the actual hardware
617 assert(roundf(ctx
->Const
.MaxLineWidth
) <= ctx
->Const
.MaxLineWidth
);
619 ctx
->Const
.MinPointSize
= 1.0;
620 ctx
->Const
.MinPointSizeAA
= 1.0;
621 ctx
->Const
.MaxPointSize
= 255.0;
622 ctx
->Const
.MaxPointSizeAA
= 255.0;
623 ctx
->Const
.PointSizeGranularity
= 1.0;
625 if (brw
->gen
>= 5 || brw
->is_g4x
)
626 ctx
->Const
.MaxClipPlanes
= 8;
628 ctx
->Const
.LowerTessLevel
= true;
629 ctx
->Const
.LowerTCSPatchVerticesIn
= brw
->gen
>= 8;
630 ctx
->Const
.LowerTESPatchVerticesIn
= true;
631 ctx
->Const
.PrimitiveRestartForPatches
= true;
633 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeInstructions
= 16 * 1024;
634 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxAluInstructions
= 0;
635 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexInstructions
= 0;
636 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexIndirections
= 0;
637 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAluInstructions
= 0;
638 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexInstructions
= 0;
639 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexIndirections
= 0;
640 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAttribs
= 16;
641 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTemps
= 256;
642 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAddressRegs
= 1;
643 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
= 1024;
644 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
=
645 MIN2(ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
,
646 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
);
648 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeInstructions
= 1024;
649 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAluInstructions
= 1024;
650 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexInstructions
= 1024;
651 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexIndirections
= 1024;
652 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAttribs
= 12;
653 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTemps
= 256;
654 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAddressRegs
= 0;
655 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
= 1024;
656 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
=
657 MIN2(ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
,
658 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
);
660 /* Fragment shaders use real, 32-bit twos-complement integers for all
663 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMin
= 31;
664 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMax
= 30;
665 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.Precision
= 0;
666 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
667 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
669 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMin
= 31;
670 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMax
= 30;
671 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.Precision
= 0;
672 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
673 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
675 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
676 * but we're not sure how it's actually done for vertex order,
677 * that affect provoking vertex decision. Always use last vertex
678 * convention for quad primitive which works as expected for now.
681 ctx
->Const
.QuadsFollowProvokingVertexConvention
= false;
683 ctx
->Const
.NativeIntegers
= true;
684 ctx
->Const
.VertexID_is_zero_based
= true;
686 /* Regarding the CMP instruction, the Ivybridge PRM says:
688 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
689 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
690 * 0xFFFFFFFF) is assigned to dst."
692 * but PRMs for earlier generations say
694 * "In dword format, one GRF may store up to 8 results. When the register
695 * is used later as a vector of Booleans, as only LSB at each channel
696 * contains meaning [sic] data, software should make sure all higher bits
697 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
699 * We select the representation of a true boolean uniform to be ~0, and fix
700 * the results of Gen <= 5 CMP instruction's with -(result & 1).
702 ctx
->Const
.UniformBooleanTrue
= ~0;
704 /* From the gen4 PRM, volume 4 page 127:
706 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
707 * the base address of the first element of the surface, computed in
708 * software by adding the surface base address to the byte offset of
709 * the element in the buffer."
711 * However, unaligned accesses are slower, so enforce buffer alignment.
713 ctx
->Const
.UniformBufferOffsetAlignment
= 16;
715 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
716 * that we can safely have the CPU and GPU writing the same SSBO on
717 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
718 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
719 * be updating disjoint regions of the buffer simultaneously and that will
720 * break if the regions overlap the same cacheline.
722 ctx
->Const
.ShaderStorageBufferOffsetAlignment
= 64;
723 ctx
->Const
.TextureBufferOffsetAlignment
= 16;
724 ctx
->Const
.MaxTextureBufferSize
= 128 * 1024 * 1024;
727 ctx
->Const
.MaxVarying
= 32;
728 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxOutputComponents
= 128;
729 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxInputComponents
= 64;
730 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxOutputComponents
= 128;
731 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxInputComponents
= 128;
732 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxInputComponents
= 128;
733 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxOutputComponents
= 128;
734 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxInputComponents
= 128;
735 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxOutputComponents
= 128;
738 /* We want the GLSL compiler to emit code that uses condition codes */
739 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
740 ctx
->Const
.ShaderCompilerOptions
[i
] =
741 brw
->intelScreen
->compiler
->glsl_compiler_options
[i
];
745 ctx
->Const
.MaxViewportWidth
= 32768;
746 ctx
->Const
.MaxViewportHeight
= 32768;
749 /* ARB_viewport_array */
750 if (brw
->gen
>= 6 && ctx
->API
== API_OPENGL_CORE
) {
751 ctx
->Const
.MaxViewports
= GEN6_NUM_VIEWPORTS
;
752 ctx
->Const
.ViewportSubpixelBits
= 0;
754 /* Cast to float before negating because MaxViewportWidth is unsigned.
756 ctx
->Const
.ViewportBounds
.Min
= -(float)ctx
->Const
.MaxViewportWidth
;
757 ctx
->Const
.ViewportBounds
.Max
= ctx
->Const
.MaxViewportWidth
;
760 /* ARB_gpu_shader5 */
762 ctx
->Const
.MaxVertexStreams
= MIN2(4, MAX_VERTEX_STREAMS
);
764 /* ARB_framebuffer_no_attachments */
765 ctx
->Const
.MaxFramebufferWidth
= 16384;
766 ctx
->Const
.MaxFramebufferHeight
= 16384;
767 ctx
->Const
.MaxFramebufferLayers
= ctx
->Const
.MaxArrayTextureLayers
;
768 ctx
->Const
.MaxFramebufferSamples
= max_samples
;
772 brw_initialize_cs_context_constants(struct brw_context
*brw
)
774 struct gl_context
*ctx
= &brw
->ctx
;
775 const struct intel_screen
*screen
= brw
->intelScreen
;
776 const struct brw_device_info
*devinfo
= screen
->devinfo
;
778 /* FINISHME: Do this for all platforms that the kernel supports */
779 if (brw
->is_cherryview
&&
780 screen
->subslice_total
> 0 && screen
->eu_total
> 0) {
781 /* Logical CS threads = EUs per subslice * 7 threads per EU */
782 brw
->max_cs_threads
= screen
->eu_total
/ screen
->subslice_total
* 7;
784 /* Fuse configurations may give more threads than expected, never less. */
785 if (brw
->max_cs_threads
< devinfo
->max_cs_threads
)
786 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
788 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
791 /* Maximum number of scalar compute shader invocations that can be run in
792 * parallel in the same subslice assuming SIMD32 dispatch.
794 * We don't advertise more than 64 threads, because we are limited to 64 by
795 * our usage of thread_width_max in the gpgpu walker command. This only
796 * currently impacts Haswell, which otherwise might be able to advertise 70
797 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
798 * required the number of invocation needed for ARB_compute_shader.
800 const unsigned max_threads
= MIN2(64, brw
->max_cs_threads
);
801 const uint32_t max_invocations
= 32 * max_threads
;
802 ctx
->Const
.MaxComputeWorkGroupSize
[0] = max_invocations
;
803 ctx
->Const
.MaxComputeWorkGroupSize
[1] = max_invocations
;
804 ctx
->Const
.MaxComputeWorkGroupSize
[2] = max_invocations
;
805 ctx
->Const
.MaxComputeWorkGroupInvocations
= max_invocations
;
806 ctx
->Const
.MaxComputeSharedMemorySize
= 64 * 1024;
810 * Process driconf (drirc) options, setting appropriate context flags.
812 * intelInitExtensions still pokes at optionCache directly, in order to
813 * avoid advertising various extensions. No flags are set, so it makes
814 * sense to continue doing that there.
817 brw_process_driconf_options(struct brw_context
*brw
)
819 struct gl_context
*ctx
= &brw
->ctx
;
821 driOptionCache
*options
= &brw
->optionCache
;
822 driParseConfigFiles(options
, &brw
->intelScreen
->optionCache
,
823 brw
->driContext
->driScreenPriv
->myNum
, "i965");
825 int bo_reuse_mode
= driQueryOptioni(options
, "bo_reuse");
826 switch (bo_reuse_mode
) {
827 case DRI_CONF_BO_REUSE_DISABLED
:
829 case DRI_CONF_BO_REUSE_ALL
:
830 intel_bufmgr_gem_enable_reuse(brw
->bufmgr
);
834 if (!driQueryOptionb(options
, "hiz")) {
835 brw
->has_hiz
= false;
836 /* On gen6, you can only do separate stencil with HIZ. */
838 brw
->has_separate_stencil
= false;
841 if (driQueryOptionb(options
, "always_flush_batch")) {
842 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
843 brw
->always_flush_batch
= true;
846 if (driQueryOptionb(options
, "always_flush_cache")) {
847 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
848 brw
->always_flush_cache
= true;
851 if (driQueryOptionb(options
, "disable_throttling")) {
852 fprintf(stderr
, "disabling flush throttling\n");
853 brw
->disable_throttling
= true;
856 brw
->precompile
= driQueryOptionb(&brw
->optionCache
, "shader_precompile");
858 if (driQueryOptionb(&brw
->optionCache
, "precise_trig"))
859 brw
->intelScreen
->compiler
->precise_trig
= true;
861 ctx
->Const
.ForceGLSLExtensionsWarn
=
862 driQueryOptionb(options
, "force_glsl_extensions_warn");
864 ctx
->Const
.DisableGLSLLineContinuations
=
865 driQueryOptionb(options
, "disable_glsl_line_continuations");
867 ctx
->Const
.AllowGLSLExtensionDirectiveMidShader
=
868 driQueryOptionb(options
, "allow_glsl_extension_directive_midshader");
870 ctx
->Const
.GLSLZeroInit
= driQueryOptionb(options
, "glsl_zero_init");
872 brw
->dual_color_blend_by_location
=
873 driQueryOptionb(options
, "dual_color_blend_by_location");
877 brwCreateContext(gl_api api
,
878 const struct gl_config
*mesaVis
,
879 __DRIcontext
*driContextPriv
,
880 unsigned major_version
,
881 unsigned minor_version
,
884 unsigned *dri_ctx_error
,
885 void *sharedContextPrivate
)
887 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
888 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
889 struct intel_screen
*screen
= sPriv
->driverPrivate
;
890 const struct brw_device_info
*devinfo
= screen
->devinfo
;
891 struct dd_function_table functions
;
893 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
894 * provides us with context reset notifications.
896 uint32_t allowed_flags
= __DRI_CTX_FLAG_DEBUG
897 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
;
899 if (screen
->has_context_reset_notification
)
900 allowed_flags
|= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
;
902 if (flags
& ~allowed_flags
) {
903 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
907 struct brw_context
*brw
= rzalloc(NULL
, struct brw_context
);
909 fprintf(stderr
, "%s: failed to alloc context\n", __func__
);
910 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
914 driContextPriv
->driverPrivate
= brw
;
915 brw
->driContext
= driContextPriv
;
916 brw
->intelScreen
= screen
;
917 brw
->bufmgr
= screen
->bufmgr
;
919 brw
->gen
= devinfo
->gen
;
920 brw
->gt
= devinfo
->gt
;
921 brw
->is_g4x
= devinfo
->is_g4x
;
922 brw
->is_baytrail
= devinfo
->is_baytrail
;
923 brw
->is_haswell
= devinfo
->is_haswell
;
924 brw
->is_cherryview
= devinfo
->is_cherryview
;
925 brw
->is_broxton
= devinfo
->is_broxton
;
926 brw
->has_llc
= devinfo
->has_llc
;
927 brw
->has_hiz
= devinfo
->has_hiz_and_separate_stencil
;
928 brw
->has_separate_stencil
= devinfo
->has_hiz_and_separate_stencil
;
929 brw
->has_pln
= devinfo
->has_pln
;
930 brw
->has_compr4
= devinfo
->has_compr4
;
931 brw
->has_surface_tile_offset
= devinfo
->has_surface_tile_offset
;
932 brw
->has_negative_rhw_bug
= devinfo
->has_negative_rhw_bug
;
933 brw
->needs_unlit_centroid_workaround
=
934 devinfo
->needs_unlit_centroid_workaround
;
936 brw
->must_use_separate_stencil
= devinfo
->must_use_separate_stencil
;
937 brw
->has_swizzling
= screen
->hw_has_swizzling
;
939 isl_device_init(&brw
->isl_dev
, devinfo
, screen
->hw_has_swizzling
);
941 brw
->vs
.base
.stage
= MESA_SHADER_VERTEX
;
942 brw
->tcs
.base
.stage
= MESA_SHADER_TESS_CTRL
;
943 brw
->tes
.base
.stage
= MESA_SHADER_TESS_EVAL
;
944 brw
->gs
.base
.stage
= MESA_SHADER_GEOMETRY
;
945 brw
->wm
.base
.stage
= MESA_SHADER_FRAGMENT
;
947 gen8_init_vtable_surface_functions(brw
);
948 brw
->vtbl
.emit_depth_stencil_hiz
= gen8_emit_depth_stencil_hiz
;
949 } else if (brw
->gen
>= 7) {
950 gen7_init_vtable_surface_functions(brw
);
951 brw
->vtbl
.emit_depth_stencil_hiz
= gen7_emit_depth_stencil_hiz
;
952 } else if (brw
->gen
>= 6) {
953 gen6_init_vtable_surface_functions(brw
);
954 brw
->vtbl
.emit_depth_stencil_hiz
= gen6_emit_depth_stencil_hiz
;
956 gen4_init_vtable_surface_functions(brw
);
957 brw
->vtbl
.emit_depth_stencil_hiz
= brw_emit_depth_stencil_hiz
;
960 brw_init_driver_functions(brw
, &functions
);
963 functions
.GetGraphicsResetStatus
= brw_get_graphics_reset_status
;
965 struct gl_context
*ctx
= &brw
->ctx
;
967 if (!_mesa_initialize_context(ctx
, api
, mesaVis
, shareCtx
, &functions
)) {
968 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
969 fprintf(stderr
, "%s: failed to init mesa context\n", __func__
);
970 intelDestroyContext(driContextPriv
);
974 driContextSetFlags(ctx
, flags
);
976 /* Initialize the software rasterizer and helper modules.
978 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
979 * software fallbacks (which we have to support on legacy GL to do weird
980 * glDrawPixels(), glBitmap(), and other functions).
982 if (api
!= API_OPENGL_CORE
&& api
!= API_OPENGLES2
) {
983 _swrast_CreateContext(ctx
);
986 _vbo_CreateContext(ctx
);
987 if (ctx
->swrast_context
) {
988 _tnl_CreateContext(ctx
);
989 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= _tnl_run_pipeline
;
990 _swsetup_CreateContext(ctx
);
992 /* Configure swrast to match hardware characteristics: */
993 _swrast_allow_pixel_fog(ctx
, false);
994 _swrast_allow_vertex_fog(ctx
, true);
997 _mesa_meta_init(ctx
);
999 brw_process_driconf_options(brw
);
1001 if (INTEL_DEBUG
& DEBUG_PERF
)
1002 brw
->perf_debug
= true;
1004 brw_initialize_cs_context_constants(brw
);
1005 brw_initialize_context_constants(brw
);
1007 ctx
->Const
.ResetStrategy
= notify_reset
1008 ? GL_LOSE_CONTEXT_ON_RESET_ARB
: GL_NO_RESET_NOTIFICATION_ARB
;
1010 /* Reinitialize the context point state. It depends on ctx->Const values. */
1011 _mesa_init_point(ctx
);
1013 intel_fbo_init(brw
);
1015 intel_batchbuffer_init(brw
);
1017 if (brw
->gen
>= 6) {
1018 /* Create a new hardware context. Using a hardware context means that
1019 * our GPU state will be saved/restored on context switch, allowing us
1020 * to assume that the GPU is in the same state we left it in.
1022 * This is required for transform feedback buffer offsets, query objects,
1023 * and also allows us to reduce how much state we have to emit.
1025 brw
->hw_ctx
= drm_intel_gem_context_create(brw
->bufmgr
);
1028 fprintf(stderr
, "Gen6+ requires Kernel 3.6 or later.\n");
1029 intelDestroyContext(driContextPriv
);
1034 if (brw_init_pipe_control(brw
, devinfo
)) {
1035 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1036 intelDestroyContext(driContextPriv
);
1040 brw_init_state(brw
);
1042 intelInitExtensions(ctx
);
1044 brw_init_surface_formats(brw
);
1046 brw
->max_vs_threads
= devinfo
->max_vs_threads
;
1047 brw
->max_hs_threads
= devinfo
->max_hs_threads
;
1048 brw
->max_ds_threads
= devinfo
->max_ds_threads
;
1049 brw
->max_gs_threads
= devinfo
->max_gs_threads
;
1050 brw
->max_wm_threads
= devinfo
->max_wm_threads
;
1051 brw
->urb
.size
= devinfo
->urb
.size
;
1052 brw
->urb
.min_vs_entries
= devinfo
->urb
.min_vs_entries
;
1053 brw
->urb
.max_vs_entries
= devinfo
->urb
.max_vs_entries
;
1054 brw
->urb
.max_hs_entries
= devinfo
->urb
.max_hs_entries
;
1055 brw
->urb
.max_ds_entries
= devinfo
->urb
.max_ds_entries
;
1056 brw
->urb
.max_gs_entries
= devinfo
->urb
.max_gs_entries
;
1059 brw
->urb
.gs_present
= false;
1061 brw
->prim_restart
.in_progress
= false;
1062 brw
->prim_restart
.enable_cut_index
= false;
1063 brw
->gs
.enabled
= false;
1064 brw
->sf
.viewport_transform_enable
= true;
1066 brw
->predicate
.state
= BRW_PREDICATE_STATE_RENDER
;
1068 brw
->max_gtt_map_object_size
= screen
->max_gtt_map_object_size
;
1070 brw
->use_resource_streamer
= screen
->has_resource_streamer
&&
1071 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1072 env_var_as_boolean("INTEL_USE_GATHER", false));
1074 ctx
->VertexProgram
._MaintainTnlProgram
= true;
1075 ctx
->FragmentProgram
._MaintainTexEnvProgram
= true;
1077 brw_draw_init( brw
);
1079 if ((flags
& __DRI_CTX_FLAG_DEBUG
) != 0) {
1080 /* Turn on some extra GL_ARB_debug_output generation. */
1081 brw
->perf_debug
= true;
1084 if ((flags
& __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
) != 0)
1085 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB
;
1087 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
1088 brw_init_shader_time(brw
);
1090 _mesa_compute_version(ctx
);
1092 _mesa_initialize_dispatch_tables(ctx
);
1093 _mesa_initialize_vbo_vtxfmt(ctx
);
1095 if (ctx
->Extensions
.AMD_performance_monitor
) {
1096 brw_init_performance_monitors(brw
);
1099 vbo_use_buffer_objects(ctx
);
1100 vbo_always_unmap_buffers(ctx
);
1106 intelDestroyContext(__DRIcontext
* driContextPriv
)
1108 struct brw_context
*brw
=
1109 (struct brw_context
*) driContextPriv
->driverPrivate
;
1110 struct gl_context
*ctx
= &brw
->ctx
;
1112 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1113 if (INTEL_DEBUG
& DEBUG_AUB
) {
1114 intel_batchbuffer_flush(brw
);
1115 aub_dump_bmp(&brw
->ctx
);
1118 _mesa_meta_free(&brw
->ctx
);
1120 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
1121 /* Force a report. */
1122 brw
->shader_time
.report_time
= 0;
1124 brw_collect_and_report_shader_time(brw
);
1125 brw_destroy_shader_time(brw
);
1128 brw_destroy_state(brw
);
1129 brw_draw_destroy(brw
);
1131 drm_intel_bo_unreference(brw
->curbe
.curbe_bo
);
1132 if (brw
->vs
.base
.scratch_bo
)
1133 drm_intel_bo_unreference(brw
->vs
.base
.scratch_bo
);
1134 if (brw
->tcs
.base
.scratch_bo
)
1135 drm_intel_bo_unreference(brw
->tcs
.base
.scratch_bo
);
1136 if (brw
->tes
.base
.scratch_bo
)
1137 drm_intel_bo_unreference(brw
->tes
.base
.scratch_bo
);
1138 if (brw
->gs
.base
.scratch_bo
)
1139 drm_intel_bo_unreference(brw
->gs
.base
.scratch_bo
);
1140 if (brw
->wm
.base
.scratch_bo
)
1141 drm_intel_bo_unreference(brw
->wm
.base
.scratch_bo
);
1143 gen7_reset_hw_bt_pool_offsets(brw
);
1144 drm_intel_bo_unreference(brw
->hw_bt_pool
.bo
);
1145 brw
->hw_bt_pool
.bo
= NULL
;
1147 drm_intel_gem_context_destroy(brw
->hw_ctx
);
1149 if (ctx
->swrast_context
) {
1150 _swsetup_DestroyContext(&brw
->ctx
);
1151 _tnl_DestroyContext(&brw
->ctx
);
1153 _vbo_DestroyContext(&brw
->ctx
);
1155 if (ctx
->swrast_context
)
1156 _swrast_DestroyContext(&brw
->ctx
);
1158 brw_fini_pipe_control(brw
);
1159 intel_batchbuffer_free(brw
);
1161 drm_intel_bo_unreference(brw
->throttle_batch
[1]);
1162 drm_intel_bo_unreference(brw
->throttle_batch
[0]);
1163 brw
->throttle_batch
[1] = NULL
;
1164 brw
->throttle_batch
[0] = NULL
;
1166 driDestroyOptionCache(&brw
->optionCache
);
1168 /* free the Mesa context */
1169 _mesa_free_context_data(&brw
->ctx
);
1172 driContextPriv
->driverPrivate
= NULL
;
1176 intelUnbindContext(__DRIcontext
* driContextPriv
)
1178 /* Unset current context and dispath table */
1179 _mesa_make_current(NULL
, NULL
, NULL
);
1185 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1186 * on window system framebuffers.
1188 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1189 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1190 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1191 * for a visual where you're guaranteed to be capable, but it turns out that
1192 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1193 * incapable ones, because there's no difference between the two in resources
1194 * used. Applications thus get built that accidentally rely on the default
1195 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1198 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1199 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1200 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1201 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1202 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1203 * and get no sRGB encode (assuming that both kinds of visual are available).
1204 * Thus our choice to support sRGB by default on our visuals for desktop would
1205 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1207 * Unfortunately, renderbuffer setup happens before a context is created. So
1208 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1209 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1210 * yet), we go turn that back off before anyone finds out.
1213 intel_gles3_srgb_workaround(struct brw_context
*brw
,
1214 struct gl_framebuffer
*fb
)
1216 struct gl_context
*ctx
= &brw
->ctx
;
1218 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
1221 /* Some day when we support the sRGB capable bit on visuals available for
1222 * GLES, we'll need to respect that and not disable things here.
1224 fb
->Visual
.sRGBCapable
= false;
1225 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
1226 struct gl_renderbuffer
*rb
= fb
->Attachment
[i
].Renderbuffer
;
1228 rb
->Format
= _mesa_get_srgb_format_linear(rb
->Format
);
1233 intelMakeCurrent(__DRIcontext
* driContextPriv
,
1234 __DRIdrawable
* driDrawPriv
,
1235 __DRIdrawable
* driReadPriv
)
1237 struct brw_context
*brw
;
1238 GET_CURRENT_CONTEXT(curCtx
);
1241 brw
= (struct brw_context
*) driContextPriv
->driverPrivate
;
1245 /* According to the glXMakeCurrent() man page: "Pending commands to
1246 * the previous context, if any, are flushed before it is released."
1247 * But only flush if we're actually changing contexts.
1249 if (brw_context(curCtx
) && brw_context(curCtx
) != brw
) {
1250 _mesa_flush(curCtx
);
1253 if (driContextPriv
) {
1254 struct gl_context
*ctx
= &brw
->ctx
;
1255 struct gl_framebuffer
*fb
, *readFb
;
1257 if (driDrawPriv
== NULL
) {
1258 fb
= _mesa_get_incomplete_framebuffer();
1260 fb
= driDrawPriv
->driverPrivate
;
1261 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1264 if (driReadPriv
== NULL
) {
1265 readFb
= _mesa_get_incomplete_framebuffer();
1267 readFb
= driReadPriv
->driverPrivate
;
1268 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1271 /* The sRGB workaround changes the renderbuffer's format. We must change
1272 * the format before the renderbuffer's miptree get's allocated, otherwise
1273 * the formats of the renderbuffer and its miptree will differ.
1275 intel_gles3_srgb_workaround(brw
, fb
);
1276 intel_gles3_srgb_workaround(brw
, readFb
);
1278 /* If the context viewport hasn't been initialized, force a call out to
1279 * the loader to get buffers so we have a drawable size for the initial
1281 if (!brw
->ctx
.ViewportInitialized
)
1282 intel_prepare_render(brw
);
1284 _mesa_make_current(ctx
, fb
, readFb
);
1286 _mesa_make_current(NULL
, NULL
, NULL
);
1293 intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1294 __DRIdrawable
*drawable
)
1297 /* MSAA and fast color clear are not supported, so don't waste time
1298 * checking whether a resolve is needed.
1303 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1304 struct intel_renderbuffer
*rb
;
1306 /* Usually, only the back buffer will need to be downsampled. However,
1307 * the front buffer will also need it if the user has rendered into it.
1309 static const gl_buffer_index buffers
[2] = {
1314 for (int i
= 0; i
< 2; ++i
) {
1315 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
1316 if (rb
== NULL
|| rb
->mt
== NULL
)
1318 if (rb
->mt
->num_samples
<= 1)
1319 intel_miptree_resolve_color(brw
, rb
->mt
, 0);
1321 intel_renderbuffer_downsample(brw
, rb
);
1326 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
1328 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
1332 intel_query_dri2_buffers(struct brw_context
*brw
,
1333 __DRIdrawable
*drawable
,
1334 __DRIbuffer
**buffers
,
1338 intel_process_dri2_buffer(struct brw_context
*brw
,
1339 __DRIdrawable
*drawable
,
1340 __DRIbuffer
*buffer
,
1341 struct intel_renderbuffer
*rb
,
1342 const char *buffer_name
);
1345 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
);
1348 intel_update_dri2_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1350 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1351 struct intel_renderbuffer
*rb
;
1352 __DRIbuffer
*buffers
= NULL
;
1354 const char *region_name
;
1356 /* Set this up front, so that in case our buffers get invalidated
1357 * while we're getting new buffers, we don't clobber the stamp and
1358 * thus ignore the invalidate. */
1359 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1361 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1362 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1364 intel_query_dri2_buffers(brw
, drawable
, &buffers
, &count
);
1366 if (buffers
== NULL
)
1369 for (i
= 0; i
< count
; i
++) {
1370 switch (buffers
[i
].attachment
) {
1371 case __DRI_BUFFER_FRONT_LEFT
:
1372 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1373 region_name
= "dri2 front buffer";
1376 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
1377 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1378 region_name
= "dri2 fake front buffer";
1381 case __DRI_BUFFER_BACK_LEFT
:
1382 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1383 region_name
= "dri2 back buffer";
1386 case __DRI_BUFFER_DEPTH
:
1387 case __DRI_BUFFER_HIZ
:
1388 case __DRI_BUFFER_DEPTH_STENCIL
:
1389 case __DRI_BUFFER_STENCIL
:
1390 case __DRI_BUFFER_ACCUM
:
1393 "unhandled buffer attach event, attachment type %d\n",
1394 buffers
[i
].attachment
);
1398 intel_process_dri2_buffer(brw
, drawable
, &buffers
[i
], rb
, region_name
);
1404 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
1406 struct brw_context
*brw
= context
->driverPrivate
;
1407 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1409 /* Set this up front, so that in case our buffers get invalidated
1410 * while we're getting new buffers, we don't clobber the stamp and
1411 * thus ignore the invalidate. */
1412 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1414 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1415 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1417 if (screen
->image
.loader
)
1418 intel_update_image_buffers(brw
, drawable
);
1420 intel_update_dri2_buffers(brw
, drawable
);
1422 driUpdateFramebufferSize(&brw
->ctx
, drawable
);
1426 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1427 * state is required.
1430 intel_prepare_render(struct brw_context
*brw
)
1432 struct gl_context
*ctx
= &brw
->ctx
;
1433 __DRIcontext
*driContext
= brw
->driContext
;
1434 __DRIdrawable
*drawable
;
1436 drawable
= driContext
->driDrawablePriv
;
1437 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
1438 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1439 intel_update_renderbuffers(driContext
, drawable
);
1440 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
1443 drawable
= driContext
->driReadablePriv
;
1444 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
1445 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1446 intel_update_renderbuffers(driContext
, drawable
);
1447 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
1450 /* If we're currently rendering to the front buffer, the rendering
1451 * that will happen next will probably dirty the front buffer. So
1452 * mark it as dirty here.
1454 if (_mesa_is_front_buffer_drawing(ctx
->DrawBuffer
))
1455 brw
->front_buffer_dirty
= true;
1459 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1461 * To determine which DRI buffers to request, examine the renderbuffers
1462 * attached to the drawable's framebuffer. Then request the buffers with
1463 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1465 * This is called from intel_update_renderbuffers().
1467 * \param drawable Drawable whose buffers are queried.
1468 * \param buffers [out] List of buffers returned by DRI2 query.
1469 * \param buffer_count [out] Number of buffers returned.
1471 * \see intel_update_renderbuffers()
1472 * \see DRI2GetBuffers()
1473 * \see DRI2GetBuffersWithFormat()
1476 intel_query_dri2_buffers(struct brw_context
*brw
,
1477 __DRIdrawable
*drawable
,
1478 __DRIbuffer
**buffers
,
1481 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1482 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1484 unsigned attachments
[8];
1486 struct intel_renderbuffer
*front_rb
;
1487 struct intel_renderbuffer
*back_rb
;
1489 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1490 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1492 memset(attachments
, 0, sizeof(attachments
));
1493 if ((_mesa_is_front_buffer_drawing(fb
) ||
1494 _mesa_is_front_buffer_reading(fb
) ||
1495 !back_rb
) && front_rb
) {
1496 /* If a fake front buffer is in use, then querying for
1497 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1498 * the real front buffer to the fake front buffer. So before doing the
1499 * query, we need to make sure all the pending drawing has landed in the
1500 * real front buffer.
1502 intel_batchbuffer_flush(brw
);
1503 intel_flush_front(&brw
->ctx
);
1505 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1506 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1507 } else if (front_rb
&& brw
->front_buffer_dirty
) {
1508 /* We have pending front buffer rendering, but we aren't querying for a
1509 * front buffer. If the front buffer we have is a fake front buffer,
1510 * the X server is going to throw it away when it processes the query.
1511 * So before doing the query, make sure all the pending drawing has
1512 * landed in the real front buffer.
1514 intel_batchbuffer_flush(brw
);
1515 intel_flush_front(&brw
->ctx
);
1519 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1520 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1523 assert(i
<= ARRAY_SIZE(attachments
));
1525 *buffers
= screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1530 drawable
->loaderPrivate
);
1534 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1536 * This is called from intel_update_renderbuffers().
1539 * DRI buffers whose attachment point is DRI2BufferStencil or
1540 * DRI2BufferDepthStencil are handled as special cases.
1542 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1543 * that is passed to drm_intel_bo_gem_create_from_name().
1545 * \see intel_update_renderbuffers()
1548 intel_process_dri2_buffer(struct brw_context
*brw
,
1549 __DRIdrawable
*drawable
,
1550 __DRIbuffer
*buffer
,
1551 struct intel_renderbuffer
*rb
,
1552 const char *buffer_name
)
1554 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1560 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1562 /* We try to avoid closing and reopening the same BO name, because the first
1563 * use of a mapping of the buffer involves a bunch of page faulting which is
1564 * moderately expensive.
1566 struct intel_mipmap_tree
*last_mt
;
1567 if (num_samples
== 0)
1570 last_mt
= rb
->singlesample_mt
;
1572 uint32_t old_name
= 0;
1574 /* The bo already has a name because the miptree was created by a
1575 * previous call to intel_process_dri2_buffer(). If a bo already has a
1576 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1577 * create a new name.
1579 drm_intel_bo_flink(last_mt
->bo
, &old_name
);
1582 if (old_name
== buffer
->name
)
1585 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1587 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1588 buffer
->name
, buffer
->attachment
,
1589 buffer
->cpp
, buffer
->pitch
);
1592 bo
= drm_intel_bo_gem_create_from_name(brw
->bufmgr
, buffer_name
,
1596 "Failed to open BO for returned DRI2 buffer "
1597 "(%dx%d, %s, named %d).\n"
1598 "This is likely a bug in the X Server that will lead to a "
1600 drawable
->w
, drawable
->h
, buffer_name
, buffer
->name
);
1604 intel_update_winsys_renderbuffer_miptree(brw
, rb
, bo
,
1605 drawable
->w
, drawable
->h
,
1608 if (_mesa_is_front_buffer_drawing(fb
) &&
1609 (buffer
->attachment
== __DRI_BUFFER_FRONT_LEFT
||
1610 buffer
->attachment
== __DRI_BUFFER_FAKE_FRONT_LEFT
) &&
1611 rb
->Base
.Base
.NumSamples
> 1) {
1612 intel_renderbuffer_upsample(brw
, rb
);
1617 drm_intel_bo_unreference(bo
);
1621 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1623 * To determine which DRI buffers to request, examine the renderbuffers
1624 * attached to the drawable's framebuffer. Then request the buffers from
1627 * This is called from intel_update_renderbuffers().
1629 * \param drawable Drawable whose buffers are queried.
1630 * \param buffers [out] List of buffers returned by DRI2 query.
1631 * \param buffer_count [out] Number of buffers returned.
1633 * \see intel_update_renderbuffers()
1637 intel_update_image_buffer(struct brw_context
*intel
,
1638 __DRIdrawable
*drawable
,
1639 struct intel_renderbuffer
*rb
,
1641 enum __DRIimageBufferMask buffer_type
)
1643 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1645 if (!rb
|| !buffer
->bo
)
1648 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1650 /* Check and see if we're already bound to the right
1653 struct intel_mipmap_tree
*last_mt
;
1654 if (num_samples
== 0)
1657 last_mt
= rb
->singlesample_mt
;
1659 if (last_mt
&& last_mt
->bo
== buffer
->bo
)
1662 intel_update_winsys_renderbuffer_miptree(intel
, rb
, buffer
->bo
,
1663 buffer
->width
, buffer
->height
,
1666 if (_mesa_is_front_buffer_drawing(fb
) &&
1667 buffer_type
== __DRI_IMAGE_BUFFER_FRONT
&&
1668 rb
->Base
.Base
.NumSamples
> 1) {
1669 intel_renderbuffer_upsample(intel
, rb
);
1674 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1676 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1677 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1678 struct intel_renderbuffer
*front_rb
;
1679 struct intel_renderbuffer
*back_rb
;
1680 struct __DRIimageList images
;
1681 unsigned int format
;
1682 uint32_t buffer_mask
= 0;
1685 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1686 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1689 format
= intel_rb_format(back_rb
);
1691 format
= intel_rb_format(front_rb
);
1695 if (front_rb
&& (_mesa_is_front_buffer_drawing(fb
) ||
1696 _mesa_is_front_buffer_reading(fb
) || !back_rb
)) {
1697 buffer_mask
|= __DRI_IMAGE_BUFFER_FRONT
;
1701 buffer_mask
|= __DRI_IMAGE_BUFFER_BACK
;
1703 ret
= screen
->image
.loader
->getBuffers(drawable
,
1704 driGLFormatToImageFormat(format
),
1705 &drawable
->dri2
.stamp
,
1706 drawable
->loaderPrivate
,
1712 if (images
.image_mask
& __DRI_IMAGE_BUFFER_FRONT
) {
1713 drawable
->w
= images
.front
->width
;
1714 drawable
->h
= images
.front
->height
;
1715 intel_update_image_buffer(brw
,
1719 __DRI_IMAGE_BUFFER_FRONT
);
1721 if (images
.image_mask
& __DRI_IMAGE_BUFFER_BACK
) {
1722 drawable
->w
= images
.back
->width
;
1723 drawable
->h
= images
.back
->height
;
1724 intel_update_image_buffer(brw
,
1728 __DRI_IMAGE_BUFFER_BACK
);