driconf: add force_glsl_abs_sqrt option
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46
47 #include "vbo/vbo_context.h"
48
49 #include "drivers/common/driverfuncs.h"
50 #include "drivers/common/meta.h"
51 #include "utils.h"
52
53 #include "brw_context.h"
54 #include "brw_defines.h"
55 #include "brw_blorp.h"
56 #include "brw_draw.h"
57 #include "brw_state.h"
58
59 #include "intel_batchbuffer.h"
60 #include "intel_buffer_objects.h"
61 #include "intel_buffers.h"
62 #include "intel_fbo.h"
63 #include "intel_mipmap_tree.h"
64 #include "intel_pixel.h"
65 #include "intel_image.h"
66 #include "intel_tex.h"
67 #include "intel_tex_obj.h"
68
69 #include "swrast_setup/swrast_setup.h"
70 #include "tnl/tnl.h"
71 #include "tnl/t_pipeline.h"
72 #include "util/ralloc.h"
73 #include "util/debug.h"
74 #include "isl/isl.h"
75
76 /***************************************
77 * Mesa's Driver Functions
78 ***************************************/
79
80 const char *const brw_vendor_string = "Intel Open Source Technology Center";
81
82 static const char *
83 get_bsw_model(const struct intel_screen *screen)
84 {
85 switch (screen->eu_total) {
86 case 16:
87 return "405";
88 case 12:
89 return "400";
90 default:
91 return " ";
92 }
93 }
94
95 const char *
96 brw_get_renderer_string(const struct intel_screen *screen)
97 {
98 const char *chipset;
99 static char buffer[128];
100 char *bsw = NULL;
101
102 switch (screen->deviceID) {
103 #undef CHIPSET
104 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
105 #include "pci_ids/i965_pci_ids.h"
106 default:
107 chipset = "Unknown Intel Chipset";
108 break;
109 }
110
111 /* Braswell branding is funny, so we have to fix it up here */
112 if (screen->deviceID == 0x22B1) {
113 bsw = strdup(chipset);
114 char *needle = strstr(bsw, "XXX");
115 if (needle) {
116 memcpy(needle, get_bsw_model(screen), 3);
117 chipset = bsw;
118 }
119 }
120
121 (void) driGetRendererString(buffer, chipset, 0);
122 free(bsw);
123 return buffer;
124 }
125
126 static const GLubyte *
127 intel_get_string(struct gl_context * ctx, GLenum name)
128 {
129 const struct brw_context *const brw = brw_context(ctx);
130
131 switch (name) {
132 case GL_VENDOR:
133 return (GLubyte *) brw_vendor_string;
134
135 case GL_RENDERER:
136 return
137 (GLubyte *) brw_get_renderer_string(brw->screen);
138
139 default:
140 return NULL;
141 }
142 }
143
144 static void
145 intel_viewport(struct gl_context *ctx)
146 {
147 struct brw_context *brw = brw_context(ctx);
148 __DRIcontext *driContext = brw->driContext;
149
150 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
151 if (driContext->driDrawablePriv)
152 dri2InvalidateDrawable(driContext->driDrawablePriv);
153 if (driContext->driReadablePriv)
154 dri2InvalidateDrawable(driContext->driReadablePriv);
155 }
156 }
157
158 static void
159 intel_update_framebuffer(struct gl_context *ctx,
160 struct gl_framebuffer *fb)
161 {
162 struct brw_context *brw = brw_context(ctx);
163
164 /* Quantize the derived default number of samples
165 */
166 fb->DefaultGeometry._NumSamples =
167 intel_quantize_num_samples(brw->screen,
168 fb->DefaultGeometry.NumSamples);
169 }
170
171 static bool
172 intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo)
173 {
174 const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
175 bool found = false;
176
177 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
178 const struct intel_renderbuffer *irb =
179 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
180
181 if (irb && irb->mt->bo == bo) {
182 found = brw->draw_aux_buffer_disabled[i] = true;
183 }
184 }
185
186 return found;
187 }
188
189 /* On Gen9 color buffers may be compressed by the hardware (lossless
190 * compression). There are, however, format restrictions and care needs to be
191 * taken that the sampler engine is capable for re-interpreting a buffer with
192 * format different the buffer was originally written with.
193 *
194 * For example, SRGB formats are not compressible and the sampler engine isn't
195 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
196 * color buffer needs to be resolved so that the sampling surface can be
197 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
198 * set).
199 */
200 static bool
201 intel_texture_view_requires_resolve(struct brw_context *brw,
202 struct intel_texture_object *intel_tex)
203 {
204 if (brw->gen < 9 ||
205 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
206 return false;
207
208 const uint32_t brw_format = brw_isl_format_for_mesa_format(intel_tex->_Format);
209
210 if (isl_format_supports_ccs_e(&brw->screen->devinfo, brw_format))
211 return false;
212
213 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
214 _mesa_get_format_name(intel_tex->_Format),
215 _mesa_get_format_name(intel_tex->mt->format));
216
217 if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
218 perf_debug("Sampling renderbuffer with non-compressible format - "
219 "turning off compression");
220
221 return true;
222 }
223
224 static void
225 intel_update_state(struct gl_context * ctx, GLuint new_state)
226 {
227 struct brw_context *brw = brw_context(ctx);
228 struct intel_texture_object *tex_obj;
229 struct intel_renderbuffer *depth_irb;
230
231 if (ctx->swrast_context)
232 _swrast_InvalidateState(ctx, new_state);
233 _vbo_InvalidateState(ctx, new_state);
234
235 brw->NewGLState |= new_state;
236
237 _mesa_unlock_context_textures(ctx);
238
239 /* Resolve the depth buffer's HiZ buffer. */
240 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
241 if (depth_irb)
242 intel_renderbuffer_resolve_hiz(brw, depth_irb);
243
244 memset(brw->draw_aux_buffer_disabled, 0,
245 sizeof(brw->draw_aux_buffer_disabled));
246
247 /* Resolve depth buffer and render cache of each enabled texture. */
248 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
249 for (int i = 0; i <= maxEnabledUnit; i++) {
250 if (!ctx->Texture.Unit[i]._Current)
251 continue;
252 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
253 if (!tex_obj || !tex_obj->mt)
254 continue;
255 if (intel_miptree_sample_with_hiz(brw, tex_obj->mt))
256 intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt);
257 else
258 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
259 /* Sampling engine understands lossless compression and resolving
260 * those surfaces should be skipped for performance reasons.
261 */
262 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
263 0 : INTEL_MIPTREE_IGNORE_CCS_E;
264 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags);
265 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
266
267 if (tex_obj->base.StencilSampling ||
268 tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
269 intel_update_r8stencil(brw, tex_obj->mt);
270 }
271 }
272
273 /* Resolve color for each active shader image. */
274 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
275 const struct gl_program *prog = ctx->_Shader->CurrentProgram[i];
276
277 if (unlikely(prog && prog->info.num_images)) {
278 for (unsigned j = 0; j < prog->info.num_images; j++) {
279 struct gl_image_unit *u =
280 &ctx->ImageUnits[prog->sh.ImageUnits[j]];
281 tex_obj = intel_texture_object(u->TexObj);
282
283 if (tex_obj && tex_obj->mt) {
284 /* Access to images is implemented using indirect messages
285 * against data port. Normal render target write understands
286 * lossless compression but unfortunately the typed/untyped
287 * read/write interface doesn't. Therefore even lossless
288 * compressed surfaces need to be resolved prior to accessing
289 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
290 */
291 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0);
292
293 if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
294 intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
295 perf_debug("Using renderbuffer as shader image - turning "
296 "off lossless compression");
297 }
298
299 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
300 }
301 }
302 }
303 }
304
305 /* Resolve color buffers for non-coherent framebuffer fetch. */
306 if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
307 ctx->FragmentProgram._Current &&
308 ctx->FragmentProgram._Current->info.outputs_read) {
309 const struct gl_framebuffer *fb = ctx->DrawBuffer;
310
311 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
312 const struct intel_renderbuffer *irb =
313 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
314
315 if (irb &&
316 intel_miptree_resolve_color(
317 brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count,
318 INTEL_MIPTREE_IGNORE_CCS_E))
319 brw_render_cache_set_check_flush(brw, irb->mt->bo);
320 }
321 }
322
323 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
324 * single-sampled color renderbuffers because the CCS buffer isn't
325 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
326 * enabled because otherwise the surface state will be programmed with the
327 * linear equivalent format anyway.
328 */
329 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
330 struct gl_framebuffer *fb = ctx->DrawBuffer;
331 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
332 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
333
334 if (rb == NULL)
335 continue;
336
337 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
338 struct intel_mipmap_tree *mt = irb->mt;
339
340 if (mt == NULL ||
341 mt->num_samples > 1 ||
342 _mesa_get_srgb_format_linear(mt->format) == mt->format)
343 continue;
344
345 /* Lossless compression is not supported for SRGB formats, it
346 * should be impossible to get here with such surfaces.
347 */
348 assert(!intel_miptree_is_lossless_compressed(brw, mt));
349 intel_miptree_all_slices_resolve_color(brw, mt, 0);
350 brw_render_cache_set_check_flush(brw, mt->bo);
351 }
352 }
353
354 _mesa_lock_context_textures(ctx);
355
356 if (new_state & _NEW_BUFFERS) {
357 intel_update_framebuffer(ctx, ctx->DrawBuffer);
358 if (ctx->DrawBuffer != ctx->ReadBuffer)
359 intel_update_framebuffer(ctx, ctx->ReadBuffer);
360 }
361 }
362
363 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
364
365 static void
366 intel_flush_front(struct gl_context *ctx)
367 {
368 struct brw_context *brw = brw_context(ctx);
369 __DRIcontext *driContext = brw->driContext;
370 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
371 __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
372
373 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
374 if (flushFront(dri_screen) && driDrawable &&
375 driDrawable->loaderPrivate) {
376
377 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
378 *
379 * This potentially resolves both front and back buffer. It
380 * is unnecessary to resolve the back, but harms nothing except
381 * performance. And no one cares about front-buffer render
382 * performance.
383 */
384 intel_resolve_for_dri2_flush(brw, driDrawable);
385 intel_batchbuffer_flush(brw);
386
387 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
388
389 /* We set the dirty bit in intel_prepare_render() if we're
390 * front buffer rendering once we get there.
391 */
392 brw->front_buffer_dirty = false;
393 }
394 }
395 }
396
397 static void
398 intel_glFlush(struct gl_context *ctx)
399 {
400 struct brw_context *brw = brw_context(ctx);
401
402 intel_batchbuffer_flush(brw);
403 intel_flush_front(ctx);
404
405 brw->need_flush_throttle = true;
406 }
407
408 static void
409 intel_finish(struct gl_context * ctx)
410 {
411 struct brw_context *brw = brw_context(ctx);
412
413 intel_glFlush(ctx);
414
415 if (brw->batch.last_bo)
416 drm_intel_bo_wait_rendering(brw->batch.last_bo);
417 }
418
419 static void
420 brw_init_driver_functions(struct brw_context *brw,
421 struct dd_function_table *functions)
422 {
423 _mesa_init_driver_functions(functions);
424
425 /* GLX uses DRI2 invalidate events to handle window resizing.
426 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
427 * which doesn't provide a mechanism for snooping the event queues.
428 *
429 * So EGL still relies on viewport hacks to handle window resizing.
430 * This should go away with DRI3000.
431 */
432 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
433 functions->Viewport = intel_viewport;
434
435 functions->Flush = intel_glFlush;
436 functions->Finish = intel_finish;
437 functions->GetString = intel_get_string;
438 functions->UpdateState = intel_update_state;
439
440 intelInitTextureFuncs(functions);
441 intelInitTextureImageFuncs(functions);
442 intelInitTextureSubImageFuncs(functions);
443 intelInitTextureCopyImageFuncs(functions);
444 intelInitCopyImageFuncs(functions);
445 intelInitClearFuncs(functions);
446 intelInitBufferFuncs(functions);
447 intelInitPixelFuncs(functions);
448 intelInitBufferObjectFuncs(functions);
449 brw_init_syncobj_functions(functions);
450 brw_init_object_purgeable_functions(functions);
451
452 brwInitFragProgFuncs( functions );
453 brw_init_common_queryobj_functions(functions);
454 if (brw->gen >= 8 || brw->is_haswell)
455 hsw_init_queryobj_functions(functions);
456 else if (brw->gen >= 6)
457 gen6_init_queryobj_functions(functions);
458 else
459 gen4_init_queryobj_functions(functions);
460 brw_init_compute_functions(functions);
461 if (brw->gen >= 7)
462 brw_init_conditional_render_functions(functions);
463
464 functions->QueryInternalFormat = brw_query_internal_format;
465
466 functions->NewTransformFeedback = brw_new_transform_feedback;
467 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
468 if (can_do_mi_math_and_lrr(brw->screen)) {
469 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
470 functions->EndTransformFeedback = hsw_end_transform_feedback;
471 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
472 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
473 } else if (brw->gen >= 7) {
474 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
475 functions->EndTransformFeedback = gen7_end_transform_feedback;
476 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
477 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
478 functions->GetTransformFeedbackVertexCount =
479 brw_get_transform_feedback_vertex_count;
480 } else {
481 functions->BeginTransformFeedback = brw_begin_transform_feedback;
482 functions->EndTransformFeedback = brw_end_transform_feedback;
483 functions->PauseTransformFeedback = brw_pause_transform_feedback;
484 functions->ResumeTransformFeedback = brw_resume_transform_feedback;
485 functions->GetTransformFeedbackVertexCount =
486 brw_get_transform_feedback_vertex_count;
487 }
488
489 if (brw->gen >= 6)
490 functions->GetSamplePosition = gen6_get_sample_position;
491 }
492
493 static void
494 brw_initialize_context_constants(struct brw_context *brw)
495 {
496 struct gl_context *ctx = &brw->ctx;
497 const struct brw_compiler *compiler = brw->screen->compiler;
498
499 const bool stage_exists[MESA_SHADER_STAGES] = {
500 [MESA_SHADER_VERTEX] = true,
501 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
502 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
503 [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
504 [MESA_SHADER_FRAGMENT] = true,
505 [MESA_SHADER_COMPUTE] =
506 ((ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE) &&
507 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
508 (ctx->API == API_OPENGLES2 &&
509 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
510 _mesa_extension_override_enables.ARB_compute_shader,
511 };
512
513 unsigned num_stages = 0;
514 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
515 if (stage_exists[i])
516 num_stages++;
517 }
518
519 unsigned max_samplers =
520 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
521
522 ctx->Const.MaxDualSourceDrawBuffers = 1;
523 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
524 ctx->Const.MaxCombinedShaderOutputResources =
525 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
526
527 /* The timestamp register we can read for glGetTimestamp() is
528 * sometimes only 32 bits, before scaling to nanoseconds (depending
529 * on kernel).
530 *
531 * Once scaled to nanoseconds the timestamp would roll over at a
532 * non-power-of-two, so an application couldn't use
533 * GL_QUERY_COUNTER_BITS to handle rollover correctly. Instead, we
534 * report 36 bits and truncate at that (rolling over 5 times as
535 * often as the HW counter), and when the 32-bit counter rolls
536 * over, it happens to also be at a rollover in the reported value
537 * from near (1<<36) to 0.
538 *
539 * The low 32 bits rolls over in ~343 seconds. Our 36-bit result
540 * rolls over every ~69 seconds.
541 */
542 ctx->Const.QueryCounterBits.Timestamp = 36;
543
544 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
545 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
546 if (brw->gen >= 7) {
547 ctx->Const.MaxRenderbufferSize = 16384;
548 ctx->Const.MaxTextureLevels = MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS);
549 ctx->Const.MaxCubeTextureLevels = 15; /* 16384 */
550 } else {
551 ctx->Const.MaxRenderbufferSize = 8192;
552 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
553 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
554 }
555 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
556 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
557 ctx->Const.MaxTextureMbytes = 1536;
558 ctx->Const.MaxTextureRectSize = 1 << 12;
559 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
560 ctx->Const.MaxTextureLodBias = 15.0;
561 ctx->Const.StripTextureBorder = true;
562 if (brw->gen >= 7) {
563 ctx->Const.MaxProgramTextureGatherComponents = 4;
564 ctx->Const.MinProgramTextureGatherOffset = -32;
565 ctx->Const.MaxProgramTextureGatherOffset = 31;
566 } else if (brw->gen == 6) {
567 ctx->Const.MaxProgramTextureGatherComponents = 1;
568 ctx->Const.MinProgramTextureGatherOffset = -8;
569 ctx->Const.MaxProgramTextureGatherOffset = 7;
570 }
571
572 ctx->Const.MaxUniformBlockSize = 65536;
573
574 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
575 struct gl_program_constants *prog = &ctx->Const.Program[i];
576
577 if (!stage_exists[i])
578 continue;
579
580 prog->MaxTextureImageUnits = max_samplers;
581
582 prog->MaxUniformBlocks = BRW_MAX_UBO;
583 prog->MaxCombinedUniformComponents =
584 prog->MaxUniformComponents +
585 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
586
587 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
588 prog->MaxAtomicBuffers = BRW_MAX_ABO;
589 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
590 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
591 }
592
593 ctx->Const.MaxTextureUnits =
594 MIN2(ctx->Const.MaxTextureCoordUnits,
595 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
596
597 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
598 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
599 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
600 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
601 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
602 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
603 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
604
605
606 /* Hardware only supports a limited number of transform feedback buffers.
607 * So we need to override the Mesa default (which is based only on software
608 * limits).
609 */
610 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
611
612 /* On Gen6, in the worst case, we use up one binding table entry per
613 * transform feedback component (see comments above the definition of
614 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
615 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
616 * BRW_MAX_SOL_BINDINGS.
617 *
618 * In "separate components" mode, we need to divide this value by
619 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
620 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
621 */
622 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
623 ctx->Const.MaxTransformFeedbackSeparateComponents =
624 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
625
626 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
627 !can_do_mi_math_and_lrr(brw->screen);
628
629 int max_samples;
630 const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
631 const int clamp_max_samples =
632 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
633
634 if (clamp_max_samples < 0) {
635 max_samples = msaa_modes[0];
636 } else {
637 /* Select the largest supported MSAA mode that does not exceed
638 * clamp_max_samples.
639 */
640 max_samples = 0;
641 for (int i = 0; msaa_modes[i] != 0; ++i) {
642 if (msaa_modes[i] <= clamp_max_samples) {
643 max_samples = msaa_modes[i];
644 break;
645 }
646 }
647 }
648
649 ctx->Const.MaxSamples = max_samples;
650 ctx->Const.MaxColorTextureSamples = max_samples;
651 ctx->Const.MaxDepthTextureSamples = max_samples;
652 ctx->Const.MaxIntegerSamples = max_samples;
653 ctx->Const.MaxImageSamples = 0;
654
655 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
656 * to map indices of rectangular grid to sample numbers within a pixel.
657 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
658 * extension implementation. For more details see the comment above
659 * gen6_set_sample_maps() definition.
660 */
661 gen6_set_sample_maps(ctx);
662
663 ctx->Const.MinLineWidth = 1.0;
664 ctx->Const.MinLineWidthAA = 1.0;
665 if (brw->gen >= 6) {
666 ctx->Const.MaxLineWidth = 7.375;
667 ctx->Const.MaxLineWidthAA = 7.375;
668 ctx->Const.LineWidthGranularity = 0.125;
669 } else {
670 ctx->Const.MaxLineWidth = 7.0;
671 ctx->Const.MaxLineWidthAA = 7.0;
672 ctx->Const.LineWidthGranularity = 0.5;
673 }
674
675 /* For non-antialiased lines, we have to round the line width to the
676 * nearest whole number. Make sure that we don't advertise a line
677 * width that, when rounded, will be beyond the actual hardware
678 * maximum.
679 */
680 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
681
682 ctx->Const.MinPointSize = 1.0;
683 ctx->Const.MinPointSizeAA = 1.0;
684 ctx->Const.MaxPointSize = 255.0;
685 ctx->Const.MaxPointSizeAA = 255.0;
686 ctx->Const.PointSizeGranularity = 1.0;
687
688 if (brw->gen >= 5 || brw->is_g4x)
689 ctx->Const.MaxClipPlanes = 8;
690
691 ctx->Const.GLSLTessLevelsAsInputs = true;
692 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8;
693 ctx->Const.LowerTESPatchVerticesIn = true;
694 ctx->Const.PrimitiveRestartForPatches = true;
695
696 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
697 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
698 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
699 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
700 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
701 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
702 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
703 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
704 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
705 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
706 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
707 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
708 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
709 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
710
711 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
712 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
713 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
714 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
715 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
716 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
717 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
718 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
719 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
720 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
721 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
722
723 /* Fragment shaders use real, 32-bit twos-complement integers for all
724 * integer types.
725 */
726 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
727 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
728 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
729 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
730 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
731
732 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
733 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
734 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
735 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
736 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
737
738 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
739 * but we're not sure how it's actually done for vertex order,
740 * that affect provoking vertex decision. Always use last vertex
741 * convention for quad primitive which works as expected for now.
742 */
743 if (brw->gen >= 6)
744 ctx->Const.QuadsFollowProvokingVertexConvention = false;
745
746 ctx->Const.NativeIntegers = true;
747 ctx->Const.VertexID_is_zero_based = true;
748
749 /* Regarding the CMP instruction, the Ivybridge PRM says:
750 *
751 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
752 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
753 * 0xFFFFFFFF) is assigned to dst."
754 *
755 * but PRMs for earlier generations say
756 *
757 * "In dword format, one GRF may store up to 8 results. When the register
758 * is used later as a vector of Booleans, as only LSB at each channel
759 * contains meaning [sic] data, software should make sure all higher bits
760 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
761 *
762 * We select the representation of a true boolean uniform to be ~0, and fix
763 * the results of Gen <= 5 CMP instruction's with -(result & 1).
764 */
765 ctx->Const.UniformBooleanTrue = ~0;
766
767 /* From the gen4 PRM, volume 4 page 127:
768 *
769 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
770 * the base address of the first element of the surface, computed in
771 * software by adding the surface base address to the byte offset of
772 * the element in the buffer."
773 *
774 * However, unaligned accesses are slower, so enforce buffer alignment.
775 */
776 ctx->Const.UniformBufferOffsetAlignment = 16;
777
778 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
779 * that we can safely have the CPU and GPU writing the same SSBO on
780 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
781 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
782 * be updating disjoint regions of the buffer simultaneously and that will
783 * break if the regions overlap the same cacheline.
784 */
785 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
786 ctx->Const.TextureBufferOffsetAlignment = 16;
787 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
788
789 if (brw->gen >= 6) {
790 ctx->Const.MaxVarying = 32;
791 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
792 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
793 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
794 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
795 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
796 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
797 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
798 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
799 }
800
801 /* We want the GLSL compiler to emit code that uses condition codes */
802 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
803 ctx->Const.ShaderCompilerOptions[i] =
804 brw->screen->compiler->glsl_compiler_options[i];
805 }
806
807 if (brw->gen >= 7) {
808 ctx->Const.MaxViewportWidth = 32768;
809 ctx->Const.MaxViewportHeight = 32768;
810 }
811
812 /* ARB_viewport_array, OES_viewport_array */
813 if (brw->gen >= 6) {
814 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
815 ctx->Const.ViewportSubpixelBits = 0;
816
817 /* Cast to float before negating because MaxViewportWidth is unsigned.
818 */
819 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
820 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
821 }
822
823 /* ARB_gpu_shader5 */
824 if (brw->gen >= 7)
825 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
826
827 /* ARB_framebuffer_no_attachments */
828 ctx->Const.MaxFramebufferWidth = 16384;
829 ctx->Const.MaxFramebufferHeight = 16384;
830 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
831 ctx->Const.MaxFramebufferSamples = max_samples;
832
833 /* OES_primitive_bounding_box */
834 ctx->Const.NoPrimitiveBoundingBoxOutput = true;
835 }
836
837 static void
838 brw_initialize_cs_context_constants(struct brw_context *brw)
839 {
840 struct gl_context *ctx = &brw->ctx;
841 const struct intel_screen *screen = brw->screen;
842 struct gen_device_info *devinfo = &brw->screen->devinfo;
843
844 /* FINISHME: Do this for all platforms that the kernel supports */
845 if (brw->is_cherryview &&
846 screen->subslice_total > 0 && screen->eu_total > 0) {
847 /* Logical CS threads = EUs per subslice * 7 threads per EU */
848 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
849
850 /* Fuse configurations may give more threads than expected, never less. */
851 if (max_cs_threads > devinfo->max_cs_threads)
852 devinfo->max_cs_threads = max_cs_threads;
853 }
854
855 /* Maximum number of scalar compute shader invocations that can be run in
856 * parallel in the same subslice assuming SIMD32 dispatch.
857 *
858 * We don't advertise more than 64 threads, because we are limited to 64 by
859 * our usage of thread_width_max in the gpgpu walker command. This only
860 * currently impacts Haswell, which otherwise might be able to advertise 70
861 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
862 * required the number of invocation needed for ARB_compute_shader.
863 */
864 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
865 const uint32_t max_invocations = 32 * max_threads;
866 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
867 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
868 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
869 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
870 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
871 }
872
873 /**
874 * Process driconf (drirc) options, setting appropriate context flags.
875 *
876 * intelInitExtensions still pokes at optionCache directly, in order to
877 * avoid advertising various extensions. No flags are set, so it makes
878 * sense to continue doing that there.
879 */
880 static void
881 brw_process_driconf_options(struct brw_context *brw)
882 {
883 struct gl_context *ctx = &brw->ctx;
884
885 driOptionCache *options = &brw->optionCache;
886 driParseConfigFiles(options, &brw->screen->optionCache,
887 brw->driContext->driScreenPriv->myNum, "i965");
888
889 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
890 switch (bo_reuse_mode) {
891 case DRI_CONF_BO_REUSE_DISABLED:
892 break;
893 case DRI_CONF_BO_REUSE_ALL:
894 intel_bufmgr_gem_enable_reuse(brw->bufmgr);
895 break;
896 }
897
898 if (INTEL_DEBUG & DEBUG_NO_HIZ) {
899 brw->has_hiz = false;
900 /* On gen6, you can only do separate stencil with HIZ. */
901 if (brw->gen == 6)
902 brw->has_separate_stencil = false;
903 }
904
905 if (driQueryOptionb(options, "always_flush_batch")) {
906 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
907 brw->always_flush_batch = true;
908 }
909
910 if (driQueryOptionb(options, "always_flush_cache")) {
911 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
912 brw->always_flush_cache = true;
913 }
914
915 if (driQueryOptionb(options, "disable_throttling")) {
916 fprintf(stderr, "disabling flush throttling\n");
917 brw->disable_throttling = true;
918 }
919
920 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
921
922 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
923 brw->screen->compiler->precise_trig = true;
924
925 ctx->Const.ForceGLSLExtensionsWarn =
926 driQueryOptionb(options, "force_glsl_extensions_warn");
927
928 ctx->Const.ForceGLSLVersion =
929 driQueryOptioni(options, "force_glsl_version");
930
931 ctx->Const.DisableGLSLLineContinuations =
932 driQueryOptionb(options, "disable_glsl_line_continuations");
933
934 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
935 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
936
937 ctx->Const.AllowHigherCompatVersion =
938 driQueryOptionb(options, "allow_higher_compat_version");
939
940 ctx->Const.ForceGLSLAbsSqrt =
941 driQueryOptionb(options, "force_glsl_abs_sqrt");
942
943 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
944
945 brw->dual_color_blend_by_location =
946 driQueryOptionb(options, "dual_color_blend_by_location");
947 }
948
949 GLboolean
950 brwCreateContext(gl_api api,
951 const struct gl_config *mesaVis,
952 __DRIcontext *driContextPriv,
953 unsigned major_version,
954 unsigned minor_version,
955 uint32_t flags,
956 bool notify_reset,
957 unsigned *dri_ctx_error,
958 void *sharedContextPrivate)
959 {
960 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
961 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
962 const struct gen_device_info *devinfo = &screen->devinfo;
963 struct dd_function_table functions;
964
965 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
966 * provides us with context reset notifications.
967 */
968 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
969 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
970
971 if (screen->has_context_reset_notification)
972 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
973
974 if (flags & ~allowed_flags) {
975 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
976 return false;
977 }
978
979 struct brw_context *brw = rzalloc(NULL, struct brw_context);
980 if (!brw) {
981 fprintf(stderr, "%s: failed to alloc context\n", __func__);
982 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
983 return false;
984 }
985
986 driContextPriv->driverPrivate = brw;
987 brw->driContext = driContextPriv;
988 brw->screen = screen;
989 brw->bufmgr = screen->bufmgr;
990
991 brw->gen = devinfo->gen;
992 brw->gt = devinfo->gt;
993 brw->is_g4x = devinfo->is_g4x;
994 brw->is_baytrail = devinfo->is_baytrail;
995 brw->is_haswell = devinfo->is_haswell;
996 brw->is_cherryview = devinfo->is_cherryview;
997 brw->is_broxton = devinfo->is_broxton;
998 brw->has_llc = devinfo->has_llc;
999 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
1000 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
1001 brw->has_pln = devinfo->has_pln;
1002 brw->has_compr4 = devinfo->has_compr4;
1003 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
1004 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
1005 brw->needs_unlit_centroid_workaround =
1006 devinfo->needs_unlit_centroid_workaround;
1007
1008 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
1009 brw->has_swizzling = screen->hw_has_swizzling;
1010
1011 isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling);
1012
1013 brw->vs.base.stage = MESA_SHADER_VERTEX;
1014 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
1015 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
1016 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
1017 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
1018 if (brw->gen >= 8) {
1019 gen8_init_vtable_surface_functions(brw);
1020 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
1021 } else if (brw->gen >= 7) {
1022 gen7_init_vtable_surface_functions(brw);
1023 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
1024 } else if (brw->gen >= 6) {
1025 gen6_init_vtable_surface_functions(brw);
1026 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
1027 } else {
1028 gen4_init_vtable_surface_functions(brw);
1029 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
1030 }
1031
1032 brw_init_driver_functions(brw, &functions);
1033
1034 if (notify_reset)
1035 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
1036
1037 struct gl_context *ctx = &brw->ctx;
1038
1039 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
1040 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1041 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
1042 intelDestroyContext(driContextPriv);
1043 return false;
1044 }
1045
1046 driContextSetFlags(ctx, flags);
1047
1048 /* Initialize the software rasterizer and helper modules.
1049 *
1050 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1051 * software fallbacks (which we have to support on legacy GL to do weird
1052 * glDrawPixels(), glBitmap(), and other functions).
1053 */
1054 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
1055 _swrast_CreateContext(ctx);
1056 }
1057
1058 _vbo_CreateContext(ctx);
1059 if (ctx->swrast_context) {
1060 _tnl_CreateContext(ctx);
1061 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
1062 _swsetup_CreateContext(ctx);
1063
1064 /* Configure swrast to match hardware characteristics: */
1065 _swrast_allow_pixel_fog(ctx, false);
1066 _swrast_allow_vertex_fog(ctx, true);
1067 }
1068
1069 _mesa_meta_init(ctx);
1070
1071 brw_process_driconf_options(brw);
1072
1073 if (INTEL_DEBUG & DEBUG_PERF)
1074 brw->perf_debug = true;
1075
1076 brw_initialize_cs_context_constants(brw);
1077 brw_initialize_context_constants(brw);
1078
1079 ctx->Const.ResetStrategy = notify_reset
1080 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
1081
1082 /* Reinitialize the context point state. It depends on ctx->Const values. */
1083 _mesa_init_point(ctx);
1084
1085 intel_fbo_init(brw);
1086
1087 intel_batchbuffer_init(&brw->batch, brw->bufmgr, brw->has_llc);
1088
1089 if (brw->gen >= 6) {
1090 /* Create a new hardware context. Using a hardware context means that
1091 * our GPU state will be saved/restored on context switch, allowing us
1092 * to assume that the GPU is in the same state we left it in.
1093 *
1094 * This is required for transform feedback buffer offsets, query objects,
1095 * and also allows us to reduce how much state we have to emit.
1096 */
1097 brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr);
1098
1099 if (!brw->hw_ctx) {
1100 fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
1101 intelDestroyContext(driContextPriv);
1102 return false;
1103 }
1104 }
1105
1106 if (brw_init_pipe_control(brw, devinfo)) {
1107 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1108 intelDestroyContext(driContextPriv);
1109 return false;
1110 }
1111
1112 brw_init_state(brw);
1113
1114 intelInitExtensions(ctx);
1115
1116 brw_init_surface_formats(brw);
1117
1118 if (brw->gen >= 6)
1119 brw_blorp_init(brw);
1120
1121 brw->urb.size = devinfo->urb.size;
1122
1123 if (brw->gen == 6)
1124 brw->urb.gs_present = false;
1125
1126 brw->prim_restart.in_progress = false;
1127 brw->prim_restart.enable_cut_index = false;
1128 brw->gs.enabled = false;
1129 brw->sf.viewport_transform_enable = true;
1130 brw->clip.viewport_count = 1;
1131
1132 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1133
1134 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
1135
1136 ctx->VertexProgram._MaintainTnlProgram = true;
1137 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1138
1139 brw_draw_init( brw );
1140
1141 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1142 /* Turn on some extra GL_ARB_debug_output generation. */
1143 brw->perf_debug = true;
1144 }
1145
1146 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) {
1147 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1148 ctx->Const.RobustAccess = GL_TRUE;
1149 }
1150
1151 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1152 brw_init_shader_time(brw);
1153
1154 _mesa_compute_version(ctx);
1155
1156 _mesa_initialize_dispatch_tables(ctx);
1157 _mesa_initialize_vbo_vtxfmt(ctx);
1158
1159 if (ctx->Extensions.INTEL_performance_query)
1160 brw_init_performance_queries(brw);
1161
1162 vbo_use_buffer_objects(ctx);
1163 vbo_always_unmap_buffers(ctx);
1164
1165 return true;
1166 }
1167
1168 void
1169 intelDestroyContext(__DRIcontext * driContextPriv)
1170 {
1171 struct brw_context *brw =
1172 (struct brw_context *) driContextPriv->driverPrivate;
1173 struct gl_context *ctx = &brw->ctx;
1174
1175 _mesa_meta_free(&brw->ctx);
1176
1177 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1178 /* Force a report. */
1179 brw->shader_time.report_time = 0;
1180
1181 brw_collect_and_report_shader_time(brw);
1182 brw_destroy_shader_time(brw);
1183 }
1184
1185 if (brw->gen >= 6)
1186 blorp_finish(&brw->blorp);
1187
1188 brw_destroy_state(brw);
1189 brw_draw_destroy(brw);
1190
1191 drm_intel_bo_unreference(brw->curbe.curbe_bo);
1192 if (brw->vs.base.scratch_bo)
1193 drm_intel_bo_unreference(brw->vs.base.scratch_bo);
1194 if (brw->tcs.base.scratch_bo)
1195 drm_intel_bo_unreference(brw->tcs.base.scratch_bo);
1196 if (brw->tes.base.scratch_bo)
1197 drm_intel_bo_unreference(brw->tes.base.scratch_bo);
1198 if (brw->gs.base.scratch_bo)
1199 drm_intel_bo_unreference(brw->gs.base.scratch_bo);
1200 if (brw->wm.base.scratch_bo)
1201 drm_intel_bo_unreference(brw->wm.base.scratch_bo);
1202
1203 drm_intel_gem_context_destroy(brw->hw_ctx);
1204
1205 if (ctx->swrast_context) {
1206 _swsetup_DestroyContext(&brw->ctx);
1207 _tnl_DestroyContext(&brw->ctx);
1208 }
1209 _vbo_DestroyContext(&brw->ctx);
1210
1211 if (ctx->swrast_context)
1212 _swrast_DestroyContext(&brw->ctx);
1213
1214 brw_fini_pipe_control(brw);
1215 intel_batchbuffer_free(&brw->batch);
1216
1217 drm_intel_bo_unreference(brw->throttle_batch[1]);
1218 drm_intel_bo_unreference(brw->throttle_batch[0]);
1219 brw->throttle_batch[1] = NULL;
1220 brw->throttle_batch[0] = NULL;
1221
1222 driDestroyOptionCache(&brw->optionCache);
1223
1224 /* free the Mesa context */
1225 _mesa_free_context_data(&brw->ctx);
1226
1227 ralloc_free(brw);
1228 driContextPriv->driverPrivate = NULL;
1229 }
1230
1231 GLboolean
1232 intelUnbindContext(__DRIcontext * driContextPriv)
1233 {
1234 /* Unset current context and dispath table */
1235 _mesa_make_current(NULL, NULL, NULL);
1236
1237 return true;
1238 }
1239
1240 /**
1241 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1242 * on window system framebuffers.
1243 *
1244 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1245 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1246 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1247 * for a visual where you're guaranteed to be capable, but it turns out that
1248 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1249 * incapable ones, because there's no difference between the two in resources
1250 * used. Applications thus get built that accidentally rely on the default
1251 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1252 * great...
1253 *
1254 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1255 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1256 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1257 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1258 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1259 * and get no sRGB encode (assuming that both kinds of visual are available).
1260 * Thus our choice to support sRGB by default on our visuals for desktop would
1261 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1262 *
1263 * Unfortunately, renderbuffer setup happens before a context is created. So
1264 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1265 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1266 * yet), we go turn that back off before anyone finds out.
1267 */
1268 static void
1269 intel_gles3_srgb_workaround(struct brw_context *brw,
1270 struct gl_framebuffer *fb)
1271 {
1272 struct gl_context *ctx = &brw->ctx;
1273
1274 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1275 return;
1276
1277 /* Some day when we support the sRGB capable bit on visuals available for
1278 * GLES, we'll need to respect that and not disable things here.
1279 */
1280 fb->Visual.sRGBCapable = false;
1281 for (int i = 0; i < BUFFER_COUNT; i++) {
1282 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1283 if (rb)
1284 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1285 }
1286 }
1287
1288 GLboolean
1289 intelMakeCurrent(__DRIcontext * driContextPriv,
1290 __DRIdrawable * driDrawPriv,
1291 __DRIdrawable * driReadPriv)
1292 {
1293 struct brw_context *brw;
1294 GET_CURRENT_CONTEXT(curCtx);
1295
1296 if (driContextPriv)
1297 brw = (struct brw_context *) driContextPriv->driverPrivate;
1298 else
1299 brw = NULL;
1300
1301 /* According to the glXMakeCurrent() man page: "Pending commands to
1302 * the previous context, if any, are flushed before it is released."
1303 * But only flush if we're actually changing contexts.
1304 */
1305 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1306 _mesa_flush(curCtx);
1307 }
1308
1309 if (driContextPriv) {
1310 struct gl_context *ctx = &brw->ctx;
1311 struct gl_framebuffer *fb, *readFb;
1312
1313 if (driDrawPriv == NULL) {
1314 fb = _mesa_get_incomplete_framebuffer();
1315 } else {
1316 fb = driDrawPriv->driverPrivate;
1317 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1318 }
1319
1320 if (driReadPriv == NULL) {
1321 readFb = _mesa_get_incomplete_framebuffer();
1322 } else {
1323 readFb = driReadPriv->driverPrivate;
1324 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1325 }
1326
1327 /* The sRGB workaround changes the renderbuffer's format. We must change
1328 * the format before the renderbuffer's miptree get's allocated, otherwise
1329 * the formats of the renderbuffer and its miptree will differ.
1330 */
1331 intel_gles3_srgb_workaround(brw, fb);
1332 intel_gles3_srgb_workaround(brw, readFb);
1333
1334 /* If the context viewport hasn't been initialized, force a call out to
1335 * the loader to get buffers so we have a drawable size for the initial
1336 * viewport. */
1337 if (!brw->ctx.ViewportInitialized)
1338 intel_prepare_render(brw);
1339
1340 _mesa_make_current(ctx, fb, readFb);
1341 } else {
1342 _mesa_make_current(NULL, NULL, NULL);
1343 }
1344
1345 return true;
1346 }
1347
1348 void
1349 intel_resolve_for_dri2_flush(struct brw_context *brw,
1350 __DRIdrawable *drawable)
1351 {
1352 if (brw->gen < 6) {
1353 /* MSAA and fast color clear are not supported, so don't waste time
1354 * checking whether a resolve is needed.
1355 */
1356 return;
1357 }
1358
1359 struct gl_framebuffer *fb = drawable->driverPrivate;
1360 struct intel_renderbuffer *rb;
1361
1362 /* Usually, only the back buffer will need to be downsampled. However,
1363 * the front buffer will also need it if the user has rendered into it.
1364 */
1365 static const gl_buffer_index buffers[2] = {
1366 BUFFER_BACK_LEFT,
1367 BUFFER_FRONT_LEFT,
1368 };
1369
1370 for (int i = 0; i < 2; ++i) {
1371 rb = intel_get_renderbuffer(fb, buffers[i]);
1372 if (rb == NULL || rb->mt == NULL)
1373 continue;
1374 if (rb->mt->num_samples <= 1) {
1375 assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
1376 rb->layer_count == 1);
1377 intel_miptree_resolve_color(brw, rb->mt, 0, 0, 1, 0);
1378 } else {
1379 intel_renderbuffer_downsample(brw, rb);
1380 }
1381 }
1382 }
1383
1384 static unsigned
1385 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1386 {
1387 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1388 }
1389
1390 static void
1391 intel_query_dri2_buffers(struct brw_context *brw,
1392 __DRIdrawable *drawable,
1393 __DRIbuffer **buffers,
1394 int *count);
1395
1396 static void
1397 intel_process_dri2_buffer(struct brw_context *brw,
1398 __DRIdrawable *drawable,
1399 __DRIbuffer *buffer,
1400 struct intel_renderbuffer *rb,
1401 const char *buffer_name);
1402
1403 static void
1404 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1405
1406 static void
1407 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1408 {
1409 struct gl_framebuffer *fb = drawable->driverPrivate;
1410 struct intel_renderbuffer *rb;
1411 __DRIbuffer *buffers = NULL;
1412 int i, count;
1413 const char *region_name;
1414
1415 /* Set this up front, so that in case our buffers get invalidated
1416 * while we're getting new buffers, we don't clobber the stamp and
1417 * thus ignore the invalidate. */
1418 drawable->lastStamp = drawable->dri2.stamp;
1419
1420 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1421 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1422
1423 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1424
1425 if (buffers == NULL)
1426 return;
1427
1428 for (i = 0; i < count; i++) {
1429 switch (buffers[i].attachment) {
1430 case __DRI_BUFFER_FRONT_LEFT:
1431 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1432 region_name = "dri2 front buffer";
1433 break;
1434
1435 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1436 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1437 region_name = "dri2 fake front buffer";
1438 break;
1439
1440 case __DRI_BUFFER_BACK_LEFT:
1441 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1442 region_name = "dri2 back buffer";
1443 break;
1444
1445 case __DRI_BUFFER_DEPTH:
1446 case __DRI_BUFFER_HIZ:
1447 case __DRI_BUFFER_DEPTH_STENCIL:
1448 case __DRI_BUFFER_STENCIL:
1449 case __DRI_BUFFER_ACCUM:
1450 default:
1451 fprintf(stderr,
1452 "unhandled buffer attach event, attachment type %d\n",
1453 buffers[i].attachment);
1454 return;
1455 }
1456
1457 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1458 }
1459
1460 }
1461
1462 void
1463 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1464 {
1465 struct brw_context *brw = context->driverPrivate;
1466 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1467
1468 /* Set this up front, so that in case our buffers get invalidated
1469 * while we're getting new buffers, we don't clobber the stamp and
1470 * thus ignore the invalidate. */
1471 drawable->lastStamp = drawable->dri2.stamp;
1472
1473 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1474 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1475
1476 if (dri_screen->image.loader)
1477 intel_update_image_buffers(brw, drawable);
1478 else
1479 intel_update_dri2_buffers(brw, drawable);
1480
1481 driUpdateFramebufferSize(&brw->ctx, drawable);
1482 }
1483
1484 /**
1485 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1486 * state is required.
1487 */
1488 void
1489 intel_prepare_render(struct brw_context *brw)
1490 {
1491 struct gl_context *ctx = &brw->ctx;
1492 __DRIcontext *driContext = brw->driContext;
1493 __DRIdrawable *drawable;
1494
1495 drawable = driContext->driDrawablePriv;
1496 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1497 if (drawable->lastStamp != drawable->dri2.stamp)
1498 intel_update_renderbuffers(driContext, drawable);
1499 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1500 }
1501
1502 drawable = driContext->driReadablePriv;
1503 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1504 if (drawable->lastStamp != drawable->dri2.stamp)
1505 intel_update_renderbuffers(driContext, drawable);
1506 driContext->dri2.read_stamp = drawable->dri2.stamp;
1507 }
1508
1509 /* If we're currently rendering to the front buffer, the rendering
1510 * that will happen next will probably dirty the front buffer. So
1511 * mark it as dirty here.
1512 */
1513 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1514 brw->front_buffer_dirty = true;
1515 }
1516
1517 /**
1518 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1519 *
1520 * To determine which DRI buffers to request, examine the renderbuffers
1521 * attached to the drawable's framebuffer. Then request the buffers with
1522 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1523 *
1524 * This is called from intel_update_renderbuffers().
1525 *
1526 * \param drawable Drawable whose buffers are queried.
1527 * \param buffers [out] List of buffers returned by DRI2 query.
1528 * \param buffer_count [out] Number of buffers returned.
1529 *
1530 * \see intel_update_renderbuffers()
1531 * \see DRI2GetBuffers()
1532 * \see DRI2GetBuffersWithFormat()
1533 */
1534 static void
1535 intel_query_dri2_buffers(struct brw_context *brw,
1536 __DRIdrawable *drawable,
1537 __DRIbuffer **buffers,
1538 int *buffer_count)
1539 {
1540 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1541 struct gl_framebuffer *fb = drawable->driverPrivate;
1542 int i = 0;
1543 unsigned attachments[8];
1544
1545 struct intel_renderbuffer *front_rb;
1546 struct intel_renderbuffer *back_rb;
1547
1548 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1549 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1550
1551 memset(attachments, 0, sizeof(attachments));
1552 if ((_mesa_is_front_buffer_drawing(fb) ||
1553 _mesa_is_front_buffer_reading(fb) ||
1554 !back_rb) && front_rb) {
1555 /* If a fake front buffer is in use, then querying for
1556 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1557 * the real front buffer to the fake front buffer. So before doing the
1558 * query, we need to make sure all the pending drawing has landed in the
1559 * real front buffer.
1560 */
1561 intel_batchbuffer_flush(brw);
1562 intel_flush_front(&brw->ctx);
1563
1564 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1565 attachments[i++] = intel_bits_per_pixel(front_rb);
1566 } else if (front_rb && brw->front_buffer_dirty) {
1567 /* We have pending front buffer rendering, but we aren't querying for a
1568 * front buffer. If the front buffer we have is a fake front buffer,
1569 * the X server is going to throw it away when it processes the query.
1570 * So before doing the query, make sure all the pending drawing has
1571 * landed in the real front buffer.
1572 */
1573 intel_batchbuffer_flush(brw);
1574 intel_flush_front(&brw->ctx);
1575 }
1576
1577 if (back_rb) {
1578 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1579 attachments[i++] = intel_bits_per_pixel(back_rb);
1580 }
1581
1582 assert(i <= ARRAY_SIZE(attachments));
1583
1584 *buffers =
1585 dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1586 &drawable->w,
1587 &drawable->h,
1588 attachments, i / 2,
1589 buffer_count,
1590 drawable->loaderPrivate);
1591 }
1592
1593 /**
1594 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1595 *
1596 * This is called from intel_update_renderbuffers().
1597 *
1598 * \par Note:
1599 * DRI buffers whose attachment point is DRI2BufferStencil or
1600 * DRI2BufferDepthStencil are handled as special cases.
1601 *
1602 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1603 * that is passed to drm_intel_bo_gem_create_from_name().
1604 *
1605 * \see intel_update_renderbuffers()
1606 */
1607 static void
1608 intel_process_dri2_buffer(struct brw_context *brw,
1609 __DRIdrawable *drawable,
1610 __DRIbuffer *buffer,
1611 struct intel_renderbuffer *rb,
1612 const char *buffer_name)
1613 {
1614 struct gl_framebuffer *fb = drawable->driverPrivate;
1615 drm_intel_bo *bo;
1616
1617 if (!rb)
1618 return;
1619
1620 unsigned num_samples = rb->Base.Base.NumSamples;
1621
1622 /* We try to avoid closing and reopening the same BO name, because the first
1623 * use of a mapping of the buffer involves a bunch of page faulting which is
1624 * moderately expensive.
1625 */
1626 struct intel_mipmap_tree *last_mt;
1627 if (num_samples == 0)
1628 last_mt = rb->mt;
1629 else
1630 last_mt = rb->singlesample_mt;
1631
1632 uint32_t old_name = 0;
1633 if (last_mt) {
1634 /* The bo already has a name because the miptree was created by a
1635 * previous call to intel_process_dri2_buffer(). If a bo already has a
1636 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1637 * create a new name.
1638 */
1639 drm_intel_bo_flink(last_mt->bo, &old_name);
1640 }
1641
1642 if (old_name == buffer->name)
1643 return;
1644
1645 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1646 fprintf(stderr,
1647 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1648 buffer->name, buffer->attachment,
1649 buffer->cpp, buffer->pitch);
1650 }
1651
1652 bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1653 buffer->name);
1654 if (!bo) {
1655 fprintf(stderr,
1656 "Failed to open BO for returned DRI2 buffer "
1657 "(%dx%d, %s, named %d).\n"
1658 "This is likely a bug in the X Server that will lead to a "
1659 "crash soon.\n",
1660 drawable->w, drawable->h, buffer_name, buffer->name);
1661 return;
1662 }
1663
1664 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1665 drawable->w, drawable->h,
1666 buffer->pitch);
1667
1668 if (_mesa_is_front_buffer_drawing(fb) &&
1669 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1670 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1671 rb->Base.Base.NumSamples > 1) {
1672 intel_renderbuffer_upsample(brw, rb);
1673 }
1674
1675 assert(rb->mt);
1676
1677 drm_intel_bo_unreference(bo);
1678 }
1679
1680 /**
1681 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1682 *
1683 * To determine which DRI buffers to request, examine the renderbuffers
1684 * attached to the drawable's framebuffer. Then request the buffers from
1685 * the image loader
1686 *
1687 * This is called from intel_update_renderbuffers().
1688 *
1689 * \param drawable Drawable whose buffers are queried.
1690 * \param buffers [out] List of buffers returned by DRI2 query.
1691 * \param buffer_count [out] Number of buffers returned.
1692 *
1693 * \see intel_update_renderbuffers()
1694 */
1695
1696 static void
1697 intel_update_image_buffer(struct brw_context *intel,
1698 __DRIdrawable *drawable,
1699 struct intel_renderbuffer *rb,
1700 __DRIimage *buffer,
1701 enum __DRIimageBufferMask buffer_type)
1702 {
1703 struct gl_framebuffer *fb = drawable->driverPrivate;
1704
1705 if (!rb || !buffer->bo)
1706 return;
1707
1708 unsigned num_samples = rb->Base.Base.NumSamples;
1709
1710 /* Check and see if we're already bound to the right
1711 * buffer object
1712 */
1713 struct intel_mipmap_tree *last_mt;
1714 if (num_samples == 0)
1715 last_mt = rb->mt;
1716 else
1717 last_mt = rb->singlesample_mt;
1718
1719 if (last_mt && last_mt->bo == buffer->bo)
1720 return;
1721
1722 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1723 buffer->width, buffer->height,
1724 buffer->pitch);
1725
1726 if (_mesa_is_front_buffer_drawing(fb) &&
1727 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1728 rb->Base.Base.NumSamples > 1) {
1729 intel_renderbuffer_upsample(intel, rb);
1730 }
1731 }
1732
1733 static void
1734 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1735 {
1736 struct gl_framebuffer *fb = drawable->driverPrivate;
1737 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1738 struct intel_renderbuffer *front_rb;
1739 struct intel_renderbuffer *back_rb;
1740 struct __DRIimageList images;
1741 unsigned int format;
1742 uint32_t buffer_mask = 0;
1743 int ret;
1744
1745 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1746 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1747
1748 if (back_rb)
1749 format = intel_rb_format(back_rb);
1750 else if (front_rb)
1751 format = intel_rb_format(front_rb);
1752 else
1753 return;
1754
1755 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1756 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1757 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1758 }
1759
1760 if (back_rb)
1761 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1762
1763 ret = dri_screen->image.loader->getBuffers(drawable,
1764 driGLFormatToImageFormat(format),
1765 &drawable->dri2.stamp,
1766 drawable->loaderPrivate,
1767 buffer_mask,
1768 &images);
1769 if (!ret)
1770 return;
1771
1772 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1773 drawable->w = images.front->width;
1774 drawable->h = images.front->height;
1775 intel_update_image_buffer(brw,
1776 drawable,
1777 front_rb,
1778 images.front,
1779 __DRI_IMAGE_BUFFER_FRONT);
1780 }
1781 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1782 drawable->w = images.back->width;
1783 drawable->h = images.back->height;
1784 intel_update_image_buffer(brw,
1785 drawable,
1786 back_rb,
1787 images.back,
1788 __DRI_IMAGE_BUFFER_BACK);
1789 }
1790 }