i965: Don't leak scratch BOs for TCS/TES.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "main/api_exec.h"
35 #include "main/context.h"
36 #include "main/fbobject.h"
37 #include "main/extensions.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
40 #include "main/points.h"
41 #include "main/version.h"
42 #include "main/vtxfmt.h"
43 #include "main/texobj.h"
44 #include "main/framebuffer.h"
45
46 #include "vbo/vbo_context.h"
47
48 #include "drivers/common/driverfuncs.h"
49 #include "drivers/common/meta.h"
50 #include "utils.h"
51
52 #include "brw_context.h"
53 #include "brw_defines.h"
54 #include "brw_compiler.h"
55 #include "brw_draw.h"
56 #include "brw_state.h"
57
58 #include "intel_batchbuffer.h"
59 #include "intel_buffer_objects.h"
60 #include "intel_buffers.h"
61 #include "intel_fbo.h"
62 #include "intel_mipmap_tree.h"
63 #include "intel_pixel.h"
64 #include "intel_image.h"
65 #include "intel_tex.h"
66 #include "intel_tex_obj.h"
67
68 #include "swrast_setup/swrast_setup.h"
69 #include "tnl/tnl.h"
70 #include "tnl/t_pipeline.h"
71 #include "util/ralloc.h"
72 #include "util/debug.h"
73 #include "isl/isl.h"
74
75 /***************************************
76 * Mesa's Driver Functions
77 ***************************************/
78
79 const char *const brw_vendor_string = "Intel Open Source Technology Center";
80
81 static const char *
82 get_bsw_model(const struct intel_screen *intelScreen)
83 {
84 switch (intelScreen->eu_total) {
85 case 16:
86 return "405";
87 case 12:
88 return "400";
89 default:
90 return " ";
91 }
92 }
93
94 const char *
95 brw_get_renderer_string(const struct intel_screen *intelScreen)
96 {
97 const char *chipset;
98 static char buffer[128];
99 char *bsw = NULL;
100
101 switch (intelScreen->deviceID) {
102 #undef CHIPSET
103 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
104 #include "pci_ids/i965_pci_ids.h"
105 default:
106 chipset = "Unknown Intel Chipset";
107 break;
108 }
109
110 /* Braswell branding is funny, so we have to fix it up here */
111 if (intelScreen->deviceID == 0x22B1) {
112 bsw = strdup(chipset);
113 char *needle = strstr(bsw, "XXX");
114 if (needle) {
115 memcpy(needle, get_bsw_model(intelScreen), 3);
116 chipset = bsw;
117 }
118 }
119
120 (void) driGetRendererString(buffer, chipset, 0);
121 free(bsw);
122 return buffer;
123 }
124
125 static const GLubyte *
126 intel_get_string(struct gl_context * ctx, GLenum name)
127 {
128 const struct brw_context *const brw = brw_context(ctx);
129
130 switch (name) {
131 case GL_VENDOR:
132 return (GLubyte *) brw_vendor_string;
133
134 case GL_RENDERER:
135 return
136 (GLubyte *) brw_get_renderer_string(brw->intelScreen);
137
138 default:
139 return NULL;
140 }
141 }
142
143 static void
144 intel_viewport(struct gl_context *ctx)
145 {
146 struct brw_context *brw = brw_context(ctx);
147 __DRIcontext *driContext = brw->driContext;
148
149 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
150 if (driContext->driDrawablePriv)
151 dri2InvalidateDrawable(driContext->driDrawablePriv);
152 if (driContext->driReadablePriv)
153 dri2InvalidateDrawable(driContext->driReadablePriv);
154 }
155 }
156
157 static void
158 intel_update_framebuffer(struct gl_context *ctx,
159 struct gl_framebuffer *fb)
160 {
161 struct brw_context *brw = brw_context(ctx);
162
163 /* Quantize the derived default number of samples
164 */
165 fb->DefaultGeometry._NumSamples =
166 intel_quantize_num_samples(brw->intelScreen,
167 fb->DefaultGeometry.NumSamples);
168 }
169
170 /* On Gen9 color buffers may be compressed by the hardware (lossless
171 * compression). There are, however, format restrictions and care needs to be
172 * taken that the sampler engine is capable for re-interpreting a buffer with
173 * format different the buffer was originally written with.
174 *
175 * For example, SRGB formats are not compressible and the sampler engine isn't
176 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
177 * color buffer needs to be resolved so that the sampling surface can be
178 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
179 * set).
180 */
181 static bool
182 intel_texture_view_requires_resolve(struct brw_context *brw,
183 struct intel_texture_object *intel_tex)
184 {
185 if (brw->gen < 9 ||
186 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
187 return false;
188
189 const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format);
190
191 if (isl_format_supports_lossless_compression(brw->intelScreen->devinfo,
192 brw_format))
193 return false;
194
195 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
196 _mesa_get_format_name(intel_tex->_Format),
197 _mesa_get_format_name(intel_tex->mt->format));
198
199 return true;
200 }
201
202 static void
203 intel_update_state(struct gl_context * ctx, GLuint new_state)
204 {
205 struct brw_context *brw = brw_context(ctx);
206 struct intel_texture_object *tex_obj;
207 struct intel_renderbuffer *depth_irb;
208
209 if (ctx->swrast_context)
210 _swrast_InvalidateState(ctx, new_state);
211 _vbo_InvalidateState(ctx, new_state);
212
213 brw->NewGLState |= new_state;
214
215 _mesa_unlock_context_textures(ctx);
216
217 /* Resolve the depth buffer's HiZ buffer. */
218 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
219 if (depth_irb)
220 intel_renderbuffer_resolve_hiz(brw, depth_irb);
221
222 /* Resolve depth buffer and render cache of each enabled texture. */
223 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
224 for (int i = 0; i <= maxEnabledUnit; i++) {
225 if (!ctx->Texture.Unit[i]._Current)
226 continue;
227 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
228 if (!tex_obj || !tex_obj->mt)
229 continue;
230 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
231 /* Sampling engine understands lossless compression and resolving
232 * those surfaces should be skipped for performance reasons.
233 */
234 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
235 0 : INTEL_MIPTREE_IGNORE_CCS_E;
236 intel_miptree_resolve_color(brw, tex_obj->mt, flags);
237 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
238 }
239
240 /* Resolve color for each active shader image. */
241 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
242 const struct gl_shader *shader = ctx->_Shader->CurrentProgram[i] ?
243 ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL;
244
245 if (unlikely(shader && shader->NumImages)) {
246 for (unsigned j = 0; j < shader->NumImages; j++) {
247 struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]];
248 tex_obj = intel_texture_object(u->TexObj);
249
250 if (tex_obj && tex_obj->mt) {
251 /* Access to images is implemented using indirect messages
252 * against data port. Normal render target write understands
253 * lossless compression but unfortunately the typed/untyped
254 * read/write interface doesn't. Therefore the compressed
255 * surfaces need to be resolved prior to accessing them.
256 */
257 intel_miptree_resolve_color(brw, tex_obj->mt, 0);
258 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
259 }
260 }
261 }
262 }
263
264 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
265 * single-sampled color renderbuffers because the CCS buffer isn't
266 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
267 * enabled because otherwise the surface state will be programmed with the
268 * linear equivalent format anyway.
269 */
270 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
271 struct gl_framebuffer *fb = ctx->DrawBuffer;
272 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
273 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
274
275 if (rb == NULL)
276 continue;
277
278 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
279 struct intel_mipmap_tree *mt = irb->mt;
280
281 if (mt == NULL ||
282 mt->num_samples > 1 ||
283 _mesa_get_srgb_format_linear(mt->format) == mt->format)
284 continue;
285
286 /* Lossless compression is not supported for SRGB formats, it
287 * should be impossible to get here with such surfaces.
288 */
289 assert(!intel_miptree_is_lossless_compressed(brw, mt));
290 intel_miptree_resolve_color(brw, mt, 0);
291 brw_render_cache_set_check_flush(brw, mt->bo);
292 }
293 }
294
295 _mesa_lock_context_textures(ctx);
296
297 if (new_state & _NEW_BUFFERS) {
298 intel_update_framebuffer(ctx, ctx->DrawBuffer);
299 if (ctx->DrawBuffer != ctx->ReadBuffer)
300 intel_update_framebuffer(ctx, ctx->ReadBuffer);
301 }
302 }
303
304 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
305
306 static void
307 intel_flush_front(struct gl_context *ctx)
308 {
309 struct brw_context *brw = brw_context(ctx);
310 __DRIcontext *driContext = brw->driContext;
311 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
312 __DRIscreen *const screen = brw->intelScreen->driScrnPriv;
313
314 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
315 if (flushFront(screen) && driDrawable &&
316 driDrawable->loaderPrivate) {
317
318 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
319 *
320 * This potentially resolves both front and back buffer. It
321 * is unnecessary to resolve the back, but harms nothing except
322 * performance. And no one cares about front-buffer render
323 * performance.
324 */
325 intel_resolve_for_dri2_flush(brw, driDrawable);
326 intel_batchbuffer_flush(brw);
327
328 flushFront(screen)(driDrawable, driDrawable->loaderPrivate);
329
330 /* We set the dirty bit in intel_prepare_render() if we're
331 * front buffer rendering once we get there.
332 */
333 brw->front_buffer_dirty = false;
334 }
335 }
336 }
337
338 static void
339 intel_glFlush(struct gl_context *ctx)
340 {
341 struct brw_context *brw = brw_context(ctx);
342
343 intel_batchbuffer_flush(brw);
344 intel_flush_front(ctx);
345
346 brw->need_flush_throttle = true;
347 }
348
349 static void
350 intel_finish(struct gl_context * ctx)
351 {
352 struct brw_context *brw = brw_context(ctx);
353
354 intel_glFlush(ctx);
355
356 if (brw->batch.last_bo)
357 drm_intel_bo_wait_rendering(brw->batch.last_bo);
358 }
359
360 static void
361 brw_init_driver_functions(struct brw_context *brw,
362 struct dd_function_table *functions)
363 {
364 _mesa_init_driver_functions(functions);
365
366 /* GLX uses DRI2 invalidate events to handle window resizing.
367 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
368 * which doesn't provide a mechanism for snooping the event queues.
369 *
370 * So EGL still relies on viewport hacks to handle window resizing.
371 * This should go away with DRI3000.
372 */
373 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
374 functions->Viewport = intel_viewport;
375
376 functions->Flush = intel_glFlush;
377 functions->Finish = intel_finish;
378 functions->GetString = intel_get_string;
379 functions->UpdateState = intel_update_state;
380
381 intelInitTextureFuncs(functions);
382 intelInitTextureImageFuncs(functions);
383 intelInitTextureSubImageFuncs(functions);
384 intelInitTextureCopyImageFuncs(functions);
385 intelInitCopyImageFuncs(functions);
386 intelInitClearFuncs(functions);
387 intelInitBufferFuncs(functions);
388 intelInitPixelFuncs(functions);
389 intelInitBufferObjectFuncs(functions);
390 intel_init_syncobj_functions(functions);
391 brw_init_object_purgeable_functions(functions);
392
393 brwInitFragProgFuncs( functions );
394 brw_init_common_queryobj_functions(functions);
395 if (brw->gen >= 8 || brw->is_haswell)
396 hsw_init_queryobj_functions(functions);
397 else if (brw->gen >= 6)
398 gen6_init_queryobj_functions(functions);
399 else
400 gen4_init_queryobj_functions(functions);
401 brw_init_compute_functions(functions);
402 if (brw->gen >= 7)
403 brw_init_conditional_render_functions(functions);
404
405 functions->QueryInternalFormat = brw_query_internal_format;
406
407 functions->NewTransformFeedback = brw_new_transform_feedback;
408 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
409 if (brw->intelScreen->has_mi_math_and_lrr) {
410 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
411 functions->EndTransformFeedback = hsw_end_transform_feedback;
412 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
413 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
414 } else if (brw->gen >= 7) {
415 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
416 functions->EndTransformFeedback = gen7_end_transform_feedback;
417 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
418 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
419 functions->GetTransformFeedbackVertexCount =
420 brw_get_transform_feedback_vertex_count;
421 } else {
422 functions->BeginTransformFeedback = brw_begin_transform_feedback;
423 functions->EndTransformFeedback = brw_end_transform_feedback;
424 }
425
426 if (brw->gen >= 6)
427 functions->GetSamplePosition = gen6_get_sample_position;
428 }
429
430 static void
431 brw_initialize_context_constants(struct brw_context *brw)
432 {
433 struct gl_context *ctx = &brw->ctx;
434 const struct brw_compiler *compiler = brw->intelScreen->compiler;
435
436 const bool stage_exists[MESA_SHADER_STAGES] = {
437 [MESA_SHADER_VERTEX] = true,
438 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
439 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
440 [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
441 [MESA_SHADER_FRAGMENT] = true,
442 [MESA_SHADER_COMPUTE] =
443 (ctx->API == API_OPENGL_CORE &&
444 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
445 (ctx->API == API_OPENGLES2 &&
446 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
447 _mesa_extension_override_enables.ARB_compute_shader,
448 };
449
450 unsigned num_stages = 0;
451 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
452 if (stage_exists[i])
453 num_stages++;
454 }
455
456 unsigned max_samplers =
457 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
458
459 ctx->Const.MaxDualSourceDrawBuffers = 1;
460 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
461 ctx->Const.MaxCombinedShaderOutputResources =
462 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
463
464 ctx->Const.QueryCounterBits.Timestamp = 36;
465
466 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
467 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
468 ctx->Const.MaxRenderbufferSize = 8192;
469 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
470 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
471 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
472 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
473 ctx->Const.MaxTextureMbytes = 1536;
474 ctx->Const.MaxTextureRectSize = 1 << 12;
475 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
476 ctx->Const.StripTextureBorder = true;
477 if (brw->gen >= 7)
478 ctx->Const.MaxProgramTextureGatherComponents = 4;
479 else if (brw->gen == 6)
480 ctx->Const.MaxProgramTextureGatherComponents = 1;
481
482 ctx->Const.MaxUniformBlockSize = 65536;
483
484 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
485 struct gl_program_constants *prog = &ctx->Const.Program[i];
486
487 if (!stage_exists[i])
488 continue;
489
490 prog->MaxTextureImageUnits = max_samplers;
491
492 prog->MaxUniformBlocks = BRW_MAX_UBO;
493 prog->MaxCombinedUniformComponents =
494 prog->MaxUniformComponents +
495 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
496
497 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
498 prog->MaxAtomicBuffers = BRW_MAX_ABO;
499 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
500 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
501 }
502
503 ctx->Const.MaxTextureUnits =
504 MIN2(ctx->Const.MaxTextureCoordUnits,
505 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
506
507 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
508 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
509 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
510 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
511 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
512 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
513 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
514
515
516 /* Hardware only supports a limited number of transform feedback buffers.
517 * So we need to override the Mesa default (which is based only on software
518 * limits).
519 */
520 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
521
522 /* On Gen6, in the worst case, we use up one binding table entry per
523 * transform feedback component (see comments above the definition of
524 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
525 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
526 * BRW_MAX_SOL_BINDINGS.
527 *
528 * In "separate components" mode, we need to divide this value by
529 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
530 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
531 */
532 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
533 ctx->Const.MaxTransformFeedbackSeparateComponents =
534 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
535
536 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
537 !brw->intelScreen->has_mi_math_and_lrr;
538
539 int max_samples;
540 const int *msaa_modes = intel_supported_msaa_modes(brw->intelScreen);
541 const int clamp_max_samples =
542 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
543
544 if (clamp_max_samples < 0) {
545 max_samples = msaa_modes[0];
546 } else {
547 /* Select the largest supported MSAA mode that does not exceed
548 * clamp_max_samples.
549 */
550 max_samples = 0;
551 for (int i = 0; msaa_modes[i] != 0; ++i) {
552 if (msaa_modes[i] <= clamp_max_samples) {
553 max_samples = msaa_modes[i];
554 break;
555 }
556 }
557 }
558
559 ctx->Const.MaxSamples = max_samples;
560 ctx->Const.MaxColorTextureSamples = max_samples;
561 ctx->Const.MaxDepthTextureSamples = max_samples;
562 ctx->Const.MaxIntegerSamples = max_samples;
563 ctx->Const.MaxImageSamples = 0;
564
565 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
566 * to map indices of rectangular grid to sample numbers within a pixel.
567 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
568 * extension implementation. For more details see the comment above
569 * gen6_set_sample_maps() definition.
570 */
571 gen6_set_sample_maps(ctx);
572
573 ctx->Const.MinLineWidth = 1.0;
574 ctx->Const.MinLineWidthAA = 1.0;
575 if (brw->gen >= 6) {
576 ctx->Const.MaxLineWidth = 7.375;
577 ctx->Const.MaxLineWidthAA = 7.375;
578 ctx->Const.LineWidthGranularity = 0.125;
579 } else {
580 ctx->Const.MaxLineWidth = 7.0;
581 ctx->Const.MaxLineWidthAA = 7.0;
582 ctx->Const.LineWidthGranularity = 0.5;
583 }
584
585 /* For non-antialiased lines, we have to round the line width to the
586 * nearest whole number. Make sure that we don't advertise a line
587 * width that, when rounded, will be beyond the actual hardware
588 * maximum.
589 */
590 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
591
592 ctx->Const.MinPointSize = 1.0;
593 ctx->Const.MinPointSizeAA = 1.0;
594 ctx->Const.MaxPointSize = 255.0;
595 ctx->Const.MaxPointSizeAA = 255.0;
596 ctx->Const.PointSizeGranularity = 1.0;
597
598 if (brw->gen >= 5 || brw->is_g4x)
599 ctx->Const.MaxClipPlanes = 8;
600
601 ctx->Const.LowerTessLevel = true;
602 ctx->Const.PrimitiveRestartForPatches = true;
603
604 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
605 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
606 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
607 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
608 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
609 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
610 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
611 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
612 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
613 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
614 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
615 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
616 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
617 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
618
619 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
620 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
621 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
622 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
623 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
624 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
625 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
626 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
627 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
628 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
629 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
630
631 /* Fragment shaders use real, 32-bit twos-complement integers for all
632 * integer types.
633 */
634 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
635 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
636 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
637 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
638 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
639
640 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
641 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
642 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
643 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
644 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
645
646 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
647 * but we're not sure how it's actually done for vertex order,
648 * that affect provoking vertex decision. Always use last vertex
649 * convention for quad primitive which works as expected for now.
650 */
651 if (brw->gen >= 6)
652 ctx->Const.QuadsFollowProvokingVertexConvention = false;
653
654 ctx->Const.NativeIntegers = true;
655 ctx->Const.VertexID_is_zero_based = true;
656
657 /* Regarding the CMP instruction, the Ivybridge PRM says:
658 *
659 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
660 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
661 * 0xFFFFFFFF) is assigned to dst."
662 *
663 * but PRMs for earlier generations say
664 *
665 * "In dword format, one GRF may store up to 8 results. When the register
666 * is used later as a vector of Booleans, as only LSB at each channel
667 * contains meaning [sic] data, software should make sure all higher bits
668 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
669 *
670 * We select the representation of a true boolean uniform to be ~0, and fix
671 * the results of Gen <= 5 CMP instruction's with -(result & 1).
672 */
673 ctx->Const.UniformBooleanTrue = ~0;
674
675 /* From the gen4 PRM, volume 4 page 127:
676 *
677 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
678 * the base address of the first element of the surface, computed in
679 * software by adding the surface base address to the byte offset of
680 * the element in the buffer."
681 *
682 * However, unaligned accesses are slower, so enforce buffer alignment.
683 */
684 ctx->Const.UniformBufferOffsetAlignment = 16;
685
686 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
687 * that we can safely have the CPU and GPU writing the same SSBO on
688 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
689 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
690 * be updating disjoint regions of the buffer simultaneously and that will
691 * break if the regions overlap the same cacheline.
692 */
693 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
694 ctx->Const.TextureBufferOffsetAlignment = 16;
695 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
696
697 if (brw->gen >= 6) {
698 ctx->Const.MaxVarying = 32;
699 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
700 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
701 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
702 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
703 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
704 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
705 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
706 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
707 }
708
709 /* We want the GLSL compiler to emit code that uses condition codes */
710 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
711 ctx->Const.ShaderCompilerOptions[i] =
712 brw->intelScreen->compiler->glsl_compiler_options[i];
713 }
714
715 if (brw->gen >= 7) {
716 ctx->Const.MaxViewportWidth = 32768;
717 ctx->Const.MaxViewportHeight = 32768;
718 }
719
720 /* ARB_viewport_array */
721 if (brw->gen >= 6 && ctx->API == API_OPENGL_CORE) {
722 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
723 ctx->Const.ViewportSubpixelBits = 0;
724
725 /* Cast to float before negating because MaxViewportWidth is unsigned.
726 */
727 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
728 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
729 }
730
731 /* ARB_gpu_shader5 */
732 if (brw->gen >= 7)
733 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
734
735 /* ARB_framebuffer_no_attachments */
736 ctx->Const.MaxFramebufferWidth = 16384;
737 ctx->Const.MaxFramebufferHeight = 16384;
738 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
739 ctx->Const.MaxFramebufferSamples = max_samples;
740 }
741
742 static void
743 brw_initialize_cs_context_constants(struct brw_context *brw, unsigned max_threads)
744 {
745 struct gl_context *ctx = &brw->ctx;
746 /* Maximum number of scalar compute shader invocations that can be run in
747 * parallel in the same subslice assuming SIMD32 dispatch.
748 */
749 const uint32_t max_invocations = 32 * max_threads;
750 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
751 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
752 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
753 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
754 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
755 }
756
757 /**
758 * Process driconf (drirc) options, setting appropriate context flags.
759 *
760 * intelInitExtensions still pokes at optionCache directly, in order to
761 * avoid advertising various extensions. No flags are set, so it makes
762 * sense to continue doing that there.
763 */
764 static void
765 brw_process_driconf_options(struct brw_context *brw)
766 {
767 struct gl_context *ctx = &brw->ctx;
768
769 driOptionCache *options = &brw->optionCache;
770 driParseConfigFiles(options, &brw->intelScreen->optionCache,
771 brw->driContext->driScreenPriv->myNum, "i965");
772
773 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
774 switch (bo_reuse_mode) {
775 case DRI_CONF_BO_REUSE_DISABLED:
776 break;
777 case DRI_CONF_BO_REUSE_ALL:
778 intel_bufmgr_gem_enable_reuse(brw->bufmgr);
779 break;
780 }
781
782 if (!driQueryOptionb(options, "hiz")) {
783 brw->has_hiz = false;
784 /* On gen6, you can only do separate stencil with HIZ. */
785 if (brw->gen == 6)
786 brw->has_separate_stencil = false;
787 }
788
789 if (driQueryOptionb(options, "always_flush_batch")) {
790 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
791 brw->always_flush_batch = true;
792 }
793
794 if (driQueryOptionb(options, "always_flush_cache")) {
795 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
796 brw->always_flush_cache = true;
797 }
798
799 if (driQueryOptionb(options, "disable_throttling")) {
800 fprintf(stderr, "disabling flush throttling\n");
801 brw->disable_throttling = true;
802 }
803
804 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
805
806 brw->intelScreen->compiler->precise_trig =
807 driQueryOptionb(&brw->optionCache, "precise_trig");
808
809 ctx->Const.ForceGLSLExtensionsWarn =
810 driQueryOptionb(options, "force_glsl_extensions_warn");
811
812 ctx->Const.DisableGLSLLineContinuations =
813 driQueryOptionb(options, "disable_glsl_line_continuations");
814
815 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
816 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
817
818 brw->dual_color_blend_by_location =
819 driQueryOptionb(options, "dual_color_blend_by_location");
820 }
821
822 GLboolean
823 brwCreateContext(gl_api api,
824 const struct gl_config *mesaVis,
825 __DRIcontext *driContextPriv,
826 unsigned major_version,
827 unsigned minor_version,
828 uint32_t flags,
829 bool notify_reset,
830 unsigned *dri_ctx_error,
831 void *sharedContextPrivate)
832 {
833 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
834 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
835 struct intel_screen *screen = sPriv->driverPrivate;
836 const struct brw_device_info *devinfo = screen->devinfo;
837 struct dd_function_table functions;
838
839 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
840 * provides us with context reset notifications.
841 */
842 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
843 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
844
845 if (screen->has_context_reset_notification)
846 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
847
848 if (flags & ~allowed_flags) {
849 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
850 return false;
851 }
852
853 struct brw_context *brw = rzalloc(NULL, struct brw_context);
854 if (!brw) {
855 fprintf(stderr, "%s: failed to alloc context\n", __func__);
856 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
857 return false;
858 }
859
860 driContextPriv->driverPrivate = brw;
861 brw->driContext = driContextPriv;
862 brw->intelScreen = screen;
863 brw->bufmgr = screen->bufmgr;
864
865 brw->gen = devinfo->gen;
866 brw->gt = devinfo->gt;
867 brw->is_g4x = devinfo->is_g4x;
868 brw->is_baytrail = devinfo->is_baytrail;
869 brw->is_haswell = devinfo->is_haswell;
870 brw->is_cherryview = devinfo->is_cherryview;
871 brw->is_broxton = devinfo->is_broxton;
872 brw->has_llc = devinfo->has_llc;
873 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
874 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
875 brw->has_pln = devinfo->has_pln;
876 brw->has_compr4 = devinfo->has_compr4;
877 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
878 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
879 brw->needs_unlit_centroid_workaround =
880 devinfo->needs_unlit_centroid_workaround;
881
882 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
883 brw->has_swizzling = screen->hw_has_swizzling;
884
885 brw->vs.base.stage = MESA_SHADER_VERTEX;
886 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
887 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
888 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
889 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
890 if (brw->gen >= 8) {
891 gen8_init_vtable_surface_functions(brw);
892 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
893 } else if (brw->gen >= 7) {
894 gen7_init_vtable_surface_functions(brw);
895 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
896 } else if (brw->gen >= 6) {
897 gen6_init_vtable_surface_functions(brw);
898 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
899 } else {
900 gen4_init_vtable_surface_functions(brw);
901 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
902 }
903
904 brw_init_driver_functions(brw, &functions);
905
906 if (notify_reset)
907 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
908
909 struct gl_context *ctx = &brw->ctx;
910
911 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
912 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
913 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
914 intelDestroyContext(driContextPriv);
915 return false;
916 }
917
918 driContextSetFlags(ctx, flags);
919
920 /* Initialize the software rasterizer and helper modules.
921 *
922 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
923 * software fallbacks (which we have to support on legacy GL to do weird
924 * glDrawPixels(), glBitmap(), and other functions).
925 */
926 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
927 _swrast_CreateContext(ctx);
928 }
929
930 _vbo_CreateContext(ctx);
931 if (ctx->swrast_context) {
932 _tnl_CreateContext(ctx);
933 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
934 _swsetup_CreateContext(ctx);
935
936 /* Configure swrast to match hardware characteristics: */
937 _swrast_allow_pixel_fog(ctx, false);
938 _swrast_allow_vertex_fog(ctx, true);
939 }
940
941 _mesa_meta_init(ctx);
942
943 brw_process_driconf_options(brw);
944
945 if (INTEL_DEBUG & DEBUG_PERF)
946 brw->perf_debug = true;
947
948 brw_initialize_cs_context_constants(brw, devinfo->max_cs_threads);
949 brw_initialize_context_constants(brw);
950
951 ctx->Const.ResetStrategy = notify_reset
952 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
953
954 /* Reinitialize the context point state. It depends on ctx->Const values. */
955 _mesa_init_point(ctx);
956
957 intel_fbo_init(brw);
958
959 intel_batchbuffer_init(brw);
960
961 if (brw->gen >= 6) {
962 /* Create a new hardware context. Using a hardware context means that
963 * our GPU state will be saved/restored on context switch, allowing us
964 * to assume that the GPU is in the same state we left it in.
965 *
966 * This is required for transform feedback buffer offsets, query objects,
967 * and also allows us to reduce how much state we have to emit.
968 */
969 brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr);
970
971 if (!brw->hw_ctx) {
972 fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
973 intelDestroyContext(driContextPriv);
974 return false;
975 }
976 }
977
978 if (brw_init_pipe_control(brw, devinfo)) {
979 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
980 intelDestroyContext(driContextPriv);
981 return false;
982 }
983
984 brw_init_state(brw);
985
986 intelInitExtensions(ctx);
987
988 brw_init_surface_formats(brw);
989
990 brw->max_vs_threads = devinfo->max_vs_threads;
991 brw->max_hs_threads = devinfo->max_hs_threads;
992 brw->max_ds_threads = devinfo->max_ds_threads;
993 brw->max_gs_threads = devinfo->max_gs_threads;
994 brw->max_wm_threads = devinfo->max_wm_threads;
995 /* FINISHME: Do this for all platforms that the kernel supports */
996 if (brw->is_cherryview &&
997 screen->subslice_total > 0 && screen->eu_total > 0) {
998 /* Logical CS threads = EUs per subslice * 7 threads per EU */
999 brw->max_cs_threads = screen->eu_total / screen->subslice_total * 7;
1000
1001 /* Fuse configurations may give more threads than expected, never less. */
1002 if (brw->max_cs_threads < devinfo->max_cs_threads)
1003 brw->max_cs_threads = devinfo->max_cs_threads;
1004 } else {
1005 brw->max_cs_threads = devinfo->max_cs_threads;
1006 }
1007 brw->urb.size = devinfo->urb.size;
1008 brw->urb.min_vs_entries = devinfo->urb.min_vs_entries;
1009 brw->urb.max_vs_entries = devinfo->urb.max_vs_entries;
1010 brw->urb.max_hs_entries = devinfo->urb.max_hs_entries;
1011 brw->urb.max_ds_entries = devinfo->urb.max_ds_entries;
1012 brw->urb.max_gs_entries = devinfo->urb.max_gs_entries;
1013
1014 /* Estimate the size of the mappable aperture into the GTT. There's an
1015 * ioctl to get the whole GTT size, but not one to get the mappable subset.
1016 * It turns out it's basically always 256MB, though some ancient hardware
1017 * was smaller.
1018 */
1019 uint32_t gtt_size = 256 * 1024 * 1024;
1020
1021 /* We don't want to map two objects such that a memcpy between them would
1022 * just fault one mapping in and then the other over and over forever. So
1023 * we would need to divide the GTT size by 2. Additionally, some GTT is
1024 * taken up by things like the framebuffer and the ringbuffer and such, so
1025 * be more conservative.
1026 */
1027 brw->max_gtt_map_object_size = gtt_size / 4;
1028
1029 if (brw->gen == 6)
1030 brw->urb.gs_present = false;
1031
1032 brw->prim_restart.in_progress = false;
1033 brw->prim_restart.enable_cut_index = false;
1034 brw->gs.enabled = false;
1035 brw->sf.viewport_transform_enable = true;
1036
1037 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1038
1039 brw->use_resource_streamer = screen->has_resource_streamer &&
1040 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1041 env_var_as_boolean("INTEL_USE_GATHER", false));
1042
1043 ctx->VertexProgram._MaintainTnlProgram = true;
1044 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1045
1046 brw_draw_init( brw );
1047
1048 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1049 /* Turn on some extra GL_ARB_debug_output generation. */
1050 brw->perf_debug = true;
1051 }
1052
1053 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0)
1054 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1055
1056 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1057 brw_init_shader_time(brw);
1058
1059 _mesa_compute_version(ctx);
1060
1061 _mesa_initialize_dispatch_tables(ctx);
1062 _mesa_initialize_vbo_vtxfmt(ctx);
1063
1064 if (ctx->Extensions.AMD_performance_monitor) {
1065 brw_init_performance_monitors(brw);
1066 }
1067
1068 vbo_use_buffer_objects(ctx);
1069 vbo_always_unmap_buffers(ctx);
1070
1071 return true;
1072 }
1073
1074 void
1075 intelDestroyContext(__DRIcontext * driContextPriv)
1076 {
1077 struct brw_context *brw =
1078 (struct brw_context *) driContextPriv->driverPrivate;
1079 struct gl_context *ctx = &brw->ctx;
1080
1081 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1082 if (INTEL_DEBUG & DEBUG_AUB) {
1083 intel_batchbuffer_flush(brw);
1084 aub_dump_bmp(&brw->ctx);
1085 }
1086
1087 _mesa_meta_free(&brw->ctx);
1088
1089 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1090 /* Force a report. */
1091 brw->shader_time.report_time = 0;
1092
1093 brw_collect_and_report_shader_time(brw);
1094 brw_destroy_shader_time(brw);
1095 }
1096
1097 brw_destroy_state(brw);
1098 brw_draw_destroy(brw);
1099
1100 drm_intel_bo_unreference(brw->curbe.curbe_bo);
1101 if (brw->vs.base.scratch_bo)
1102 drm_intel_bo_unreference(brw->vs.base.scratch_bo);
1103 if (brw->tcs.base.scratch_bo)
1104 drm_intel_bo_unreference(brw->tcs.base.scratch_bo);
1105 if (brw->tes.base.scratch_bo)
1106 drm_intel_bo_unreference(brw->tes.base.scratch_bo);
1107 if (brw->gs.base.scratch_bo)
1108 drm_intel_bo_unreference(brw->gs.base.scratch_bo);
1109 if (brw->wm.base.scratch_bo)
1110 drm_intel_bo_unreference(brw->wm.base.scratch_bo);
1111
1112 gen7_reset_hw_bt_pool_offsets(brw);
1113 drm_intel_bo_unreference(brw->hw_bt_pool.bo);
1114 brw->hw_bt_pool.bo = NULL;
1115
1116 drm_intel_gem_context_destroy(brw->hw_ctx);
1117
1118 if (ctx->swrast_context) {
1119 _swsetup_DestroyContext(&brw->ctx);
1120 _tnl_DestroyContext(&brw->ctx);
1121 }
1122 _vbo_DestroyContext(&brw->ctx);
1123
1124 if (ctx->swrast_context)
1125 _swrast_DestroyContext(&brw->ctx);
1126
1127 brw_fini_pipe_control(brw);
1128 intel_batchbuffer_free(brw);
1129
1130 drm_intel_bo_unreference(brw->throttle_batch[1]);
1131 drm_intel_bo_unreference(brw->throttle_batch[0]);
1132 brw->throttle_batch[1] = NULL;
1133 brw->throttle_batch[0] = NULL;
1134
1135 driDestroyOptionCache(&brw->optionCache);
1136
1137 /* free the Mesa context */
1138 _mesa_free_context_data(&brw->ctx);
1139
1140 ralloc_free(brw);
1141 driContextPriv->driverPrivate = NULL;
1142 }
1143
1144 GLboolean
1145 intelUnbindContext(__DRIcontext * driContextPriv)
1146 {
1147 /* Unset current context and dispath table */
1148 _mesa_make_current(NULL, NULL, NULL);
1149
1150 return true;
1151 }
1152
1153 /**
1154 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1155 * on window system framebuffers.
1156 *
1157 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1158 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1159 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1160 * for a visual where you're guaranteed to be capable, but it turns out that
1161 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1162 * incapable ones, because there's no difference between the two in resources
1163 * used. Applications thus get built that accidentally rely on the default
1164 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1165 * great...
1166 *
1167 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1168 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1169 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1170 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1171 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1172 * and get no sRGB encode (assuming that both kinds of visual are available).
1173 * Thus our choice to support sRGB by default on our visuals for desktop would
1174 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1175 *
1176 * Unfortunately, renderbuffer setup happens before a context is created. So
1177 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1178 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1179 * yet), we go turn that back off before anyone finds out.
1180 */
1181 static void
1182 intel_gles3_srgb_workaround(struct brw_context *brw,
1183 struct gl_framebuffer *fb)
1184 {
1185 struct gl_context *ctx = &brw->ctx;
1186
1187 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1188 return;
1189
1190 /* Some day when we support the sRGB capable bit on visuals available for
1191 * GLES, we'll need to respect that and not disable things here.
1192 */
1193 fb->Visual.sRGBCapable = false;
1194 for (int i = 0; i < BUFFER_COUNT; i++) {
1195 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1196 if (rb)
1197 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1198 }
1199 }
1200
1201 GLboolean
1202 intelMakeCurrent(__DRIcontext * driContextPriv,
1203 __DRIdrawable * driDrawPriv,
1204 __DRIdrawable * driReadPriv)
1205 {
1206 struct brw_context *brw;
1207 GET_CURRENT_CONTEXT(curCtx);
1208
1209 if (driContextPriv)
1210 brw = (struct brw_context *) driContextPriv->driverPrivate;
1211 else
1212 brw = NULL;
1213
1214 /* According to the glXMakeCurrent() man page: "Pending commands to
1215 * the previous context, if any, are flushed before it is released."
1216 * But only flush if we're actually changing contexts.
1217 */
1218 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1219 _mesa_flush(curCtx);
1220 }
1221
1222 if (driContextPriv) {
1223 struct gl_context *ctx = &brw->ctx;
1224 struct gl_framebuffer *fb, *readFb;
1225
1226 if (driDrawPriv == NULL) {
1227 fb = _mesa_get_incomplete_framebuffer();
1228 } else {
1229 fb = driDrawPriv->driverPrivate;
1230 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1231 }
1232
1233 if (driReadPriv == NULL) {
1234 readFb = _mesa_get_incomplete_framebuffer();
1235 } else {
1236 readFb = driReadPriv->driverPrivate;
1237 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1238 }
1239
1240 /* The sRGB workaround changes the renderbuffer's format. We must change
1241 * the format before the renderbuffer's miptree get's allocated, otherwise
1242 * the formats of the renderbuffer and its miptree will differ.
1243 */
1244 intel_gles3_srgb_workaround(brw, fb);
1245 intel_gles3_srgb_workaround(brw, readFb);
1246
1247 /* If the context viewport hasn't been initialized, force a call out to
1248 * the loader to get buffers so we have a drawable size for the initial
1249 * viewport. */
1250 if (!brw->ctx.ViewportInitialized)
1251 intel_prepare_render(brw);
1252
1253 _mesa_make_current(ctx, fb, readFb);
1254 } else {
1255 _mesa_make_current(NULL, NULL, NULL);
1256 }
1257
1258 return true;
1259 }
1260
1261 void
1262 intel_resolve_for_dri2_flush(struct brw_context *brw,
1263 __DRIdrawable *drawable)
1264 {
1265 if (brw->gen < 6) {
1266 /* MSAA and fast color clear are not supported, so don't waste time
1267 * checking whether a resolve is needed.
1268 */
1269 return;
1270 }
1271
1272 struct gl_framebuffer *fb = drawable->driverPrivate;
1273 struct intel_renderbuffer *rb;
1274
1275 /* Usually, only the back buffer will need to be downsampled. However,
1276 * the front buffer will also need it if the user has rendered into it.
1277 */
1278 static const gl_buffer_index buffers[2] = {
1279 BUFFER_BACK_LEFT,
1280 BUFFER_FRONT_LEFT,
1281 };
1282
1283 for (int i = 0; i < 2; ++i) {
1284 rb = intel_get_renderbuffer(fb, buffers[i]);
1285 if (rb == NULL || rb->mt == NULL)
1286 continue;
1287 if (rb->mt->num_samples <= 1)
1288 intel_miptree_resolve_color(brw, rb->mt, 0);
1289 else
1290 intel_renderbuffer_downsample(brw, rb);
1291 }
1292 }
1293
1294 static unsigned
1295 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1296 {
1297 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1298 }
1299
1300 static void
1301 intel_query_dri2_buffers(struct brw_context *brw,
1302 __DRIdrawable *drawable,
1303 __DRIbuffer **buffers,
1304 int *count);
1305
1306 static void
1307 intel_process_dri2_buffer(struct brw_context *brw,
1308 __DRIdrawable *drawable,
1309 __DRIbuffer *buffer,
1310 struct intel_renderbuffer *rb,
1311 const char *buffer_name);
1312
1313 static void
1314 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1315
1316 static void
1317 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1318 {
1319 struct gl_framebuffer *fb = drawable->driverPrivate;
1320 struct intel_renderbuffer *rb;
1321 __DRIbuffer *buffers = NULL;
1322 int i, count;
1323 const char *region_name;
1324
1325 /* Set this up front, so that in case our buffers get invalidated
1326 * while we're getting new buffers, we don't clobber the stamp and
1327 * thus ignore the invalidate. */
1328 drawable->lastStamp = drawable->dri2.stamp;
1329
1330 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1331 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1332
1333 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1334
1335 if (buffers == NULL)
1336 return;
1337
1338 for (i = 0; i < count; i++) {
1339 switch (buffers[i].attachment) {
1340 case __DRI_BUFFER_FRONT_LEFT:
1341 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1342 region_name = "dri2 front buffer";
1343 break;
1344
1345 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1346 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1347 region_name = "dri2 fake front buffer";
1348 break;
1349
1350 case __DRI_BUFFER_BACK_LEFT:
1351 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1352 region_name = "dri2 back buffer";
1353 break;
1354
1355 case __DRI_BUFFER_DEPTH:
1356 case __DRI_BUFFER_HIZ:
1357 case __DRI_BUFFER_DEPTH_STENCIL:
1358 case __DRI_BUFFER_STENCIL:
1359 case __DRI_BUFFER_ACCUM:
1360 default:
1361 fprintf(stderr,
1362 "unhandled buffer attach event, attachment type %d\n",
1363 buffers[i].attachment);
1364 return;
1365 }
1366
1367 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1368 }
1369
1370 }
1371
1372 void
1373 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1374 {
1375 struct brw_context *brw = context->driverPrivate;
1376 __DRIscreen *screen = brw->intelScreen->driScrnPriv;
1377
1378 /* Set this up front, so that in case our buffers get invalidated
1379 * while we're getting new buffers, we don't clobber the stamp and
1380 * thus ignore the invalidate. */
1381 drawable->lastStamp = drawable->dri2.stamp;
1382
1383 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1384 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1385
1386 if (screen->image.loader)
1387 intel_update_image_buffers(brw, drawable);
1388 else
1389 intel_update_dri2_buffers(brw, drawable);
1390
1391 driUpdateFramebufferSize(&brw->ctx, drawable);
1392 }
1393
1394 /**
1395 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1396 * state is required.
1397 */
1398 void
1399 intel_prepare_render(struct brw_context *brw)
1400 {
1401 struct gl_context *ctx = &brw->ctx;
1402 __DRIcontext *driContext = brw->driContext;
1403 __DRIdrawable *drawable;
1404
1405 drawable = driContext->driDrawablePriv;
1406 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1407 if (drawable->lastStamp != drawable->dri2.stamp)
1408 intel_update_renderbuffers(driContext, drawable);
1409 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1410 }
1411
1412 drawable = driContext->driReadablePriv;
1413 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1414 if (drawable->lastStamp != drawable->dri2.stamp)
1415 intel_update_renderbuffers(driContext, drawable);
1416 driContext->dri2.read_stamp = drawable->dri2.stamp;
1417 }
1418
1419 /* If we're currently rendering to the front buffer, the rendering
1420 * that will happen next will probably dirty the front buffer. So
1421 * mark it as dirty here.
1422 */
1423 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1424 brw->front_buffer_dirty = true;
1425 }
1426
1427 /**
1428 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1429 *
1430 * To determine which DRI buffers to request, examine the renderbuffers
1431 * attached to the drawable's framebuffer. Then request the buffers with
1432 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1433 *
1434 * This is called from intel_update_renderbuffers().
1435 *
1436 * \param drawable Drawable whose buffers are queried.
1437 * \param buffers [out] List of buffers returned by DRI2 query.
1438 * \param buffer_count [out] Number of buffers returned.
1439 *
1440 * \see intel_update_renderbuffers()
1441 * \see DRI2GetBuffers()
1442 * \see DRI2GetBuffersWithFormat()
1443 */
1444 static void
1445 intel_query_dri2_buffers(struct brw_context *brw,
1446 __DRIdrawable *drawable,
1447 __DRIbuffer **buffers,
1448 int *buffer_count)
1449 {
1450 __DRIscreen *screen = brw->intelScreen->driScrnPriv;
1451 struct gl_framebuffer *fb = drawable->driverPrivate;
1452 int i = 0;
1453 unsigned attachments[8];
1454
1455 struct intel_renderbuffer *front_rb;
1456 struct intel_renderbuffer *back_rb;
1457
1458 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1459 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1460
1461 memset(attachments, 0, sizeof(attachments));
1462 if ((_mesa_is_front_buffer_drawing(fb) ||
1463 _mesa_is_front_buffer_reading(fb) ||
1464 !back_rb) && front_rb) {
1465 /* If a fake front buffer is in use, then querying for
1466 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1467 * the real front buffer to the fake front buffer. So before doing the
1468 * query, we need to make sure all the pending drawing has landed in the
1469 * real front buffer.
1470 */
1471 intel_batchbuffer_flush(brw);
1472 intel_flush_front(&brw->ctx);
1473
1474 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1475 attachments[i++] = intel_bits_per_pixel(front_rb);
1476 } else if (front_rb && brw->front_buffer_dirty) {
1477 /* We have pending front buffer rendering, but we aren't querying for a
1478 * front buffer. If the front buffer we have is a fake front buffer,
1479 * the X server is going to throw it away when it processes the query.
1480 * So before doing the query, make sure all the pending drawing has
1481 * landed in the real front buffer.
1482 */
1483 intel_batchbuffer_flush(brw);
1484 intel_flush_front(&brw->ctx);
1485 }
1486
1487 if (back_rb) {
1488 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1489 attachments[i++] = intel_bits_per_pixel(back_rb);
1490 }
1491
1492 assert(i <= ARRAY_SIZE(attachments));
1493
1494 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1495 &drawable->w,
1496 &drawable->h,
1497 attachments, i / 2,
1498 buffer_count,
1499 drawable->loaderPrivate);
1500 }
1501
1502 /**
1503 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1504 *
1505 * This is called from intel_update_renderbuffers().
1506 *
1507 * \par Note:
1508 * DRI buffers whose attachment point is DRI2BufferStencil or
1509 * DRI2BufferDepthStencil are handled as special cases.
1510 *
1511 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1512 * that is passed to drm_intel_bo_gem_create_from_name().
1513 *
1514 * \see intel_update_renderbuffers()
1515 */
1516 static void
1517 intel_process_dri2_buffer(struct brw_context *brw,
1518 __DRIdrawable *drawable,
1519 __DRIbuffer *buffer,
1520 struct intel_renderbuffer *rb,
1521 const char *buffer_name)
1522 {
1523 struct gl_framebuffer *fb = drawable->driverPrivate;
1524 drm_intel_bo *bo;
1525
1526 if (!rb)
1527 return;
1528
1529 unsigned num_samples = rb->Base.Base.NumSamples;
1530
1531 /* We try to avoid closing and reopening the same BO name, because the first
1532 * use of a mapping of the buffer involves a bunch of page faulting which is
1533 * moderately expensive.
1534 */
1535 struct intel_mipmap_tree *last_mt;
1536 if (num_samples == 0)
1537 last_mt = rb->mt;
1538 else
1539 last_mt = rb->singlesample_mt;
1540
1541 uint32_t old_name = 0;
1542 if (last_mt) {
1543 /* The bo already has a name because the miptree was created by a
1544 * previous call to intel_process_dri2_buffer(). If a bo already has a
1545 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1546 * create a new name.
1547 */
1548 drm_intel_bo_flink(last_mt->bo, &old_name);
1549 }
1550
1551 if (old_name == buffer->name)
1552 return;
1553
1554 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1555 fprintf(stderr,
1556 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1557 buffer->name, buffer->attachment,
1558 buffer->cpp, buffer->pitch);
1559 }
1560
1561 bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1562 buffer->name);
1563 if (!bo) {
1564 fprintf(stderr,
1565 "Failed to open BO for returned DRI2 buffer "
1566 "(%dx%d, %s, named %d).\n"
1567 "This is likely a bug in the X Server that will lead to a "
1568 "crash soon.\n",
1569 drawable->w, drawable->h, buffer_name, buffer->name);
1570 return;
1571 }
1572
1573 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1574 drawable->w, drawable->h,
1575 buffer->pitch);
1576
1577 if (_mesa_is_front_buffer_drawing(fb) &&
1578 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1579 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1580 rb->Base.Base.NumSamples > 1) {
1581 intel_renderbuffer_upsample(brw, rb);
1582 }
1583
1584 assert(rb->mt);
1585
1586 drm_intel_bo_unreference(bo);
1587 }
1588
1589 /**
1590 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1591 *
1592 * To determine which DRI buffers to request, examine the renderbuffers
1593 * attached to the drawable's framebuffer. Then request the buffers from
1594 * the image loader
1595 *
1596 * This is called from intel_update_renderbuffers().
1597 *
1598 * \param drawable Drawable whose buffers are queried.
1599 * \param buffers [out] List of buffers returned by DRI2 query.
1600 * \param buffer_count [out] Number of buffers returned.
1601 *
1602 * \see intel_update_renderbuffers()
1603 */
1604
1605 static void
1606 intel_update_image_buffer(struct brw_context *intel,
1607 __DRIdrawable *drawable,
1608 struct intel_renderbuffer *rb,
1609 __DRIimage *buffer,
1610 enum __DRIimageBufferMask buffer_type)
1611 {
1612 struct gl_framebuffer *fb = drawable->driverPrivate;
1613
1614 if (!rb || !buffer->bo)
1615 return;
1616
1617 unsigned num_samples = rb->Base.Base.NumSamples;
1618
1619 /* Check and see if we're already bound to the right
1620 * buffer object
1621 */
1622 struct intel_mipmap_tree *last_mt;
1623 if (num_samples == 0)
1624 last_mt = rb->mt;
1625 else
1626 last_mt = rb->singlesample_mt;
1627
1628 if (last_mt && last_mt->bo == buffer->bo)
1629 return;
1630
1631 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1632 buffer->width, buffer->height,
1633 buffer->pitch);
1634
1635 if (_mesa_is_front_buffer_drawing(fb) &&
1636 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1637 rb->Base.Base.NumSamples > 1) {
1638 intel_renderbuffer_upsample(intel, rb);
1639 }
1640 }
1641
1642 static void
1643 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1644 {
1645 struct gl_framebuffer *fb = drawable->driverPrivate;
1646 __DRIscreen *screen = brw->intelScreen->driScrnPriv;
1647 struct intel_renderbuffer *front_rb;
1648 struct intel_renderbuffer *back_rb;
1649 struct __DRIimageList images;
1650 unsigned int format;
1651 uint32_t buffer_mask = 0;
1652
1653 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1654 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1655
1656 if (back_rb)
1657 format = intel_rb_format(back_rb);
1658 else if (front_rb)
1659 format = intel_rb_format(front_rb);
1660 else
1661 return;
1662
1663 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1664 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1665 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1666 }
1667
1668 if (back_rb)
1669 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1670
1671 (*screen->image.loader->getBuffers) (drawable,
1672 driGLFormatToImageFormat(format),
1673 &drawable->dri2.stamp,
1674 drawable->loaderPrivate,
1675 buffer_mask,
1676 &images);
1677
1678 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1679 drawable->w = images.front->width;
1680 drawable->h = images.front->height;
1681 intel_update_image_buffer(brw,
1682 drawable,
1683 front_rb,
1684 images.front,
1685 __DRI_IMAGE_BUFFER_FRONT);
1686 }
1687 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1688 drawable->w = images.back->width;
1689 drawable->h = images.back->height;
1690 intel_update_image_buffer(brw,
1691 drawable,
1692 back_rb,
1693 images.back,
1694 __DRI_IMAGE_BUFFER_BACK);
1695 }
1696 }