i965: Finalize miptrees before prepare_texture
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46
47 #include "vbo/vbo_context.h"
48
49 #include "drivers/common/driverfuncs.h"
50 #include "drivers/common/meta.h"
51 #include "utils.h"
52
53 #include "brw_context.h"
54 #include "brw_defines.h"
55 #include "brw_blorp.h"
56 #include "brw_draw.h"
57 #include "brw_state.h"
58
59 #include "intel_batchbuffer.h"
60 #include "intel_buffer_objects.h"
61 #include "intel_buffers.h"
62 #include "intel_fbo.h"
63 #include "intel_mipmap_tree.h"
64 #include "intel_pixel.h"
65 #include "intel_image.h"
66 #include "intel_tex.h"
67 #include "intel_tex_obj.h"
68
69 #include "swrast_setup/swrast_setup.h"
70 #include "tnl/tnl.h"
71 #include "tnl/t_pipeline.h"
72 #include "util/ralloc.h"
73 #include "util/debug.h"
74 #include "isl/isl.h"
75
76 /***************************************
77 * Mesa's Driver Functions
78 ***************************************/
79
80 const char *const brw_vendor_string = "Intel Open Source Technology Center";
81
82 static const char *
83 get_bsw_model(const struct intel_screen *screen)
84 {
85 switch (screen->eu_total) {
86 case 16:
87 return "405";
88 case 12:
89 return "400";
90 default:
91 return " ";
92 }
93 }
94
95 const char *
96 brw_get_renderer_string(const struct intel_screen *screen)
97 {
98 const char *chipset;
99 static char buffer[128];
100 char *bsw = NULL;
101
102 switch (screen->deviceID) {
103 #undef CHIPSET
104 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
105 #include "pci_ids/i965_pci_ids.h"
106 default:
107 chipset = "Unknown Intel Chipset";
108 break;
109 }
110
111 /* Braswell branding is funny, so we have to fix it up here */
112 if (screen->deviceID == 0x22B1) {
113 bsw = strdup(chipset);
114 char *needle = strstr(bsw, "XXX");
115 if (needle) {
116 memcpy(needle, get_bsw_model(screen), 3);
117 chipset = bsw;
118 }
119 }
120
121 (void) driGetRendererString(buffer, chipset, 0);
122 free(bsw);
123 return buffer;
124 }
125
126 static const GLubyte *
127 intel_get_string(struct gl_context * ctx, GLenum name)
128 {
129 const struct brw_context *const brw = brw_context(ctx);
130
131 switch (name) {
132 case GL_VENDOR:
133 return (GLubyte *) brw_vendor_string;
134
135 case GL_RENDERER:
136 return
137 (GLubyte *) brw_get_renderer_string(brw->screen);
138
139 default:
140 return NULL;
141 }
142 }
143
144 static void
145 intel_viewport(struct gl_context *ctx)
146 {
147 struct brw_context *brw = brw_context(ctx);
148 __DRIcontext *driContext = brw->driContext;
149
150 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
151 if (driContext->driDrawablePriv)
152 dri2InvalidateDrawable(driContext->driDrawablePriv);
153 if (driContext->driReadablePriv)
154 dri2InvalidateDrawable(driContext->driReadablePriv);
155 }
156 }
157
158 static void
159 intel_update_framebuffer(struct gl_context *ctx,
160 struct gl_framebuffer *fb)
161 {
162 struct brw_context *brw = brw_context(ctx);
163
164 /* Quantize the derived default number of samples
165 */
166 fb->DefaultGeometry._NumSamples =
167 intel_quantize_num_samples(brw->screen,
168 fb->DefaultGeometry.NumSamples);
169 }
170
171 static bool
172 intel_disable_rb_aux_buffer(struct brw_context *brw, const struct brw_bo *bo)
173 {
174 const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
175 bool found = false;
176
177 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
178 const struct intel_renderbuffer *irb =
179 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
180
181 if (irb && irb->mt->bo == bo) {
182 found = brw->draw_aux_buffer_disabled[i] = true;
183 }
184 }
185
186 return found;
187 }
188
189 /* On Gen9 color buffers may be compressed by the hardware (lossless
190 * compression). There are, however, format restrictions and care needs to be
191 * taken that the sampler engine is capable for re-interpreting a buffer with
192 * format different the buffer was originally written with.
193 *
194 * For example, SRGB formats are not compressible and the sampler engine isn't
195 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
196 * color buffer needs to be resolved so that the sampling surface can be
197 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
198 * set).
199 */
200 static bool
201 intel_texture_view_requires_resolve(struct brw_context *brw,
202 struct intel_texture_object *intel_tex)
203 {
204 if (brw->gen < 9 ||
205 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
206 return false;
207
208 const enum isl_format isl_format =
209 brw_isl_format_for_mesa_format(intel_tex->_Format);
210
211 if (isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format))
212 return false;
213
214 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
215 _mesa_get_format_name(intel_tex->_Format),
216 _mesa_get_format_name(intel_tex->mt->format));
217
218 if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
219 perf_debug("Sampling renderbuffer with non-compressible format - "
220 "turning off compression");
221
222 return true;
223 }
224
225 static void
226 intel_update_state(struct gl_context * ctx, GLuint new_state)
227 {
228 struct brw_context *brw = brw_context(ctx);
229 struct intel_texture_object *tex_obj;
230 struct intel_renderbuffer *depth_irb;
231
232 if (ctx->swrast_context)
233 _swrast_InvalidateState(ctx, new_state);
234 _vbo_InvalidateState(ctx, new_state);
235
236 brw->NewGLState |= new_state;
237
238 _mesa_unlock_context_textures(ctx);
239
240 /* Resolve the depth buffer's HiZ buffer. */
241 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
242 if (depth_irb)
243 intel_renderbuffer_resolve_hiz(brw, depth_irb);
244
245 memset(brw->draw_aux_buffer_disabled, 0,
246 sizeof(brw->draw_aux_buffer_disabled));
247
248 /* Resolve depth buffer and render cache of each enabled texture. */
249 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
250 for (int i = 0; i <= maxEnabledUnit; i++) {
251 if (!ctx->Texture.Unit[i]._Current)
252 continue;
253 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
254 if (!tex_obj || !tex_obj->mt)
255 continue;
256
257 /* We need inte_texture_object::_Format to be valid */
258 intel_finalize_mipmap_tree(brw, i);
259
260 if (intel_miptree_sample_with_hiz(brw, tex_obj->mt))
261 intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt);
262 else
263 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
264 /* Sampling engine understands lossless compression and resolving
265 * those surfaces should be skipped for performance reasons.
266 */
267 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
268 0 : INTEL_MIPTREE_IGNORE_CCS_E;
269 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags);
270 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
271
272 if (tex_obj->base.StencilSampling ||
273 tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
274 intel_update_r8stencil(brw, tex_obj->mt);
275 }
276 }
277
278 /* Resolve color for each active shader image. */
279 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
280 const struct gl_program *prog = ctx->_Shader->CurrentProgram[i];
281
282 if (unlikely(prog && prog->info.num_images)) {
283 for (unsigned j = 0; j < prog->info.num_images; j++) {
284 struct gl_image_unit *u =
285 &ctx->ImageUnits[prog->sh.ImageUnits[j]];
286 tex_obj = intel_texture_object(u->TexObj);
287
288 if (tex_obj && tex_obj->mt) {
289 /* Access to images is implemented using indirect messages
290 * against data port. Normal render target write understands
291 * lossless compression but unfortunately the typed/untyped
292 * read/write interface doesn't. Therefore even lossless
293 * compressed surfaces need to be resolved prior to accessing
294 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
295 */
296 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0);
297
298 if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
299 intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
300 perf_debug("Using renderbuffer as shader image - turning "
301 "off lossless compression");
302 }
303
304 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
305 }
306 }
307 }
308 }
309
310 /* Resolve color buffers for non-coherent framebuffer fetch. */
311 if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
312 ctx->FragmentProgram._Current &&
313 ctx->FragmentProgram._Current->info.outputs_read) {
314 const struct gl_framebuffer *fb = ctx->DrawBuffer;
315
316 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
317 const struct intel_renderbuffer *irb =
318 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
319
320 if (irb &&
321 intel_miptree_resolve_color(
322 brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count,
323 INTEL_MIPTREE_IGNORE_CCS_E))
324 brw_render_cache_set_check_flush(brw, irb->mt->bo);
325 }
326 }
327
328 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
329 * single-sampled color renderbuffers because the CCS buffer isn't
330 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
331 * enabled because otherwise the surface state will be programmed with the
332 * linear equivalent format anyway.
333 */
334 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
335 struct gl_framebuffer *fb = ctx->DrawBuffer;
336 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
337 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
338
339 if (rb == NULL)
340 continue;
341
342 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
343 struct intel_mipmap_tree *mt = irb->mt;
344
345 if (mt == NULL ||
346 mt->num_samples > 1 ||
347 _mesa_get_srgb_format_linear(mt->format) == mt->format)
348 continue;
349
350 /* Lossless compression is not supported for SRGB formats, it
351 * should be impossible to get here with such surfaces.
352 */
353 assert(!intel_miptree_is_lossless_compressed(brw, mt));
354 intel_miptree_all_slices_resolve_color(brw, mt, 0);
355 brw_render_cache_set_check_flush(brw, mt->bo);
356 }
357 }
358
359 _mesa_lock_context_textures(ctx);
360
361 if (new_state & _NEW_BUFFERS) {
362 intel_update_framebuffer(ctx, ctx->DrawBuffer);
363 if (ctx->DrawBuffer != ctx->ReadBuffer)
364 intel_update_framebuffer(ctx, ctx->ReadBuffer);
365 }
366 }
367
368 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
369
370 static void
371 intel_flush_front(struct gl_context *ctx)
372 {
373 struct brw_context *brw = brw_context(ctx);
374 __DRIcontext *driContext = brw->driContext;
375 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
376 __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
377
378 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
379 if (flushFront(dri_screen) && driDrawable &&
380 driDrawable->loaderPrivate) {
381
382 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
383 *
384 * This potentially resolves both front and back buffer. It
385 * is unnecessary to resolve the back, but harms nothing except
386 * performance. And no one cares about front-buffer render
387 * performance.
388 */
389 intel_resolve_for_dri2_flush(brw, driDrawable);
390 intel_batchbuffer_flush(brw);
391
392 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
393
394 /* We set the dirty bit in intel_prepare_render() if we're
395 * front buffer rendering once we get there.
396 */
397 brw->front_buffer_dirty = false;
398 }
399 }
400 }
401
402 static void
403 intel_glFlush(struct gl_context *ctx)
404 {
405 struct brw_context *brw = brw_context(ctx);
406
407 intel_batchbuffer_flush(brw);
408 intel_flush_front(ctx);
409
410 brw->need_flush_throttle = true;
411 }
412
413 static void
414 intel_finish(struct gl_context * ctx)
415 {
416 struct brw_context *brw = brw_context(ctx);
417
418 intel_glFlush(ctx);
419
420 if (brw->batch.last_bo)
421 brw_bo_wait_rendering(brw, brw->batch.last_bo);
422 }
423
424 static void
425 brw_init_driver_functions(struct brw_context *brw,
426 struct dd_function_table *functions)
427 {
428 _mesa_init_driver_functions(functions);
429
430 /* GLX uses DRI2 invalidate events to handle window resizing.
431 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
432 * which doesn't provide a mechanism for snooping the event queues.
433 *
434 * So EGL still relies on viewport hacks to handle window resizing.
435 * This should go away with DRI3000.
436 */
437 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
438 functions->Viewport = intel_viewport;
439
440 functions->Flush = intel_glFlush;
441 functions->Finish = intel_finish;
442 functions->GetString = intel_get_string;
443 functions->UpdateState = intel_update_state;
444
445 intelInitTextureFuncs(functions);
446 intelInitTextureImageFuncs(functions);
447 intelInitTextureSubImageFuncs(functions);
448 intelInitTextureCopyImageFuncs(functions);
449 intelInitCopyImageFuncs(functions);
450 intelInitClearFuncs(functions);
451 intelInitBufferFuncs(functions);
452 intelInitPixelFuncs(functions);
453 intelInitBufferObjectFuncs(functions);
454 brw_init_syncobj_functions(functions);
455 brw_init_object_purgeable_functions(functions);
456
457 brwInitFragProgFuncs( functions );
458 brw_init_common_queryobj_functions(functions);
459 if (brw->gen >= 8 || brw->is_haswell)
460 hsw_init_queryobj_functions(functions);
461 else if (brw->gen >= 6)
462 gen6_init_queryobj_functions(functions);
463 else
464 gen4_init_queryobj_functions(functions);
465 brw_init_compute_functions(functions);
466 if (brw->gen >= 7)
467 brw_init_conditional_render_functions(functions);
468
469 functions->QueryInternalFormat = brw_query_internal_format;
470
471 functions->NewTransformFeedback = brw_new_transform_feedback;
472 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
473 if (can_do_mi_math_and_lrr(brw->screen)) {
474 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
475 functions->EndTransformFeedback = hsw_end_transform_feedback;
476 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
477 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
478 } else if (brw->gen >= 7) {
479 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
480 functions->EndTransformFeedback = gen7_end_transform_feedback;
481 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
482 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
483 functions->GetTransformFeedbackVertexCount =
484 brw_get_transform_feedback_vertex_count;
485 } else {
486 functions->BeginTransformFeedback = brw_begin_transform_feedback;
487 functions->EndTransformFeedback = brw_end_transform_feedback;
488 functions->PauseTransformFeedback = brw_pause_transform_feedback;
489 functions->ResumeTransformFeedback = brw_resume_transform_feedback;
490 functions->GetTransformFeedbackVertexCount =
491 brw_get_transform_feedback_vertex_count;
492 }
493
494 if (brw->gen >= 6)
495 functions->GetSamplePosition = gen6_get_sample_position;
496 }
497
498 static void
499 brw_initialize_context_constants(struct brw_context *brw)
500 {
501 struct gl_context *ctx = &brw->ctx;
502 const struct brw_compiler *compiler = brw->screen->compiler;
503
504 const bool stage_exists[MESA_SHADER_STAGES] = {
505 [MESA_SHADER_VERTEX] = true,
506 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
507 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
508 [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
509 [MESA_SHADER_FRAGMENT] = true,
510 [MESA_SHADER_COMPUTE] =
511 ((ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE) &&
512 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
513 (ctx->API == API_OPENGLES2 &&
514 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
515 _mesa_extension_override_enables.ARB_compute_shader,
516 };
517
518 unsigned num_stages = 0;
519 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
520 if (stage_exists[i])
521 num_stages++;
522 }
523
524 unsigned max_samplers =
525 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
526
527 ctx->Const.MaxDualSourceDrawBuffers = 1;
528 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
529 ctx->Const.MaxCombinedShaderOutputResources =
530 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
531
532 /* The timestamp register we can read for glGetTimestamp() is
533 * sometimes only 32 bits, before scaling to nanoseconds (depending
534 * on kernel).
535 *
536 * Once scaled to nanoseconds the timestamp would roll over at a
537 * non-power-of-two, so an application couldn't use
538 * GL_QUERY_COUNTER_BITS to handle rollover correctly. Instead, we
539 * report 36 bits and truncate at that (rolling over 5 times as
540 * often as the HW counter), and when the 32-bit counter rolls
541 * over, it happens to also be at a rollover in the reported value
542 * from near (1<<36) to 0.
543 *
544 * The low 32 bits rolls over in ~343 seconds. Our 36-bit result
545 * rolls over every ~69 seconds.
546 */
547 ctx->Const.QueryCounterBits.Timestamp = 36;
548
549 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
550 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
551 if (brw->gen >= 7) {
552 ctx->Const.MaxRenderbufferSize = 16384;
553 ctx->Const.MaxTextureLevels = MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS);
554 ctx->Const.MaxCubeTextureLevels = 15; /* 16384 */
555 } else {
556 ctx->Const.MaxRenderbufferSize = 8192;
557 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
558 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
559 }
560 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
561 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
562 ctx->Const.MaxTextureMbytes = 1536;
563 ctx->Const.MaxTextureRectSize = 1 << 12;
564 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
565 ctx->Const.MaxTextureLodBias = 15.0;
566 ctx->Const.StripTextureBorder = true;
567 if (brw->gen >= 7) {
568 ctx->Const.MaxProgramTextureGatherComponents = 4;
569 ctx->Const.MinProgramTextureGatherOffset = -32;
570 ctx->Const.MaxProgramTextureGatherOffset = 31;
571 } else if (brw->gen == 6) {
572 ctx->Const.MaxProgramTextureGatherComponents = 1;
573 ctx->Const.MinProgramTextureGatherOffset = -8;
574 ctx->Const.MaxProgramTextureGatherOffset = 7;
575 }
576
577 ctx->Const.MaxUniformBlockSize = 65536;
578
579 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
580 struct gl_program_constants *prog = &ctx->Const.Program[i];
581
582 if (!stage_exists[i])
583 continue;
584
585 prog->MaxTextureImageUnits = max_samplers;
586
587 prog->MaxUniformBlocks = BRW_MAX_UBO;
588 prog->MaxCombinedUniformComponents =
589 prog->MaxUniformComponents +
590 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
591
592 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
593 prog->MaxAtomicBuffers = BRW_MAX_ABO;
594 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
595 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
596 }
597
598 ctx->Const.MaxTextureUnits =
599 MIN2(ctx->Const.MaxTextureCoordUnits,
600 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
601
602 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
603 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
604 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
605 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
606 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
607 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
608 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
609
610
611 /* Hardware only supports a limited number of transform feedback buffers.
612 * So we need to override the Mesa default (which is based only on software
613 * limits).
614 */
615 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
616
617 /* On Gen6, in the worst case, we use up one binding table entry per
618 * transform feedback component (see comments above the definition of
619 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
620 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
621 * BRW_MAX_SOL_BINDINGS.
622 *
623 * In "separate components" mode, we need to divide this value by
624 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
625 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
626 */
627 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
628 ctx->Const.MaxTransformFeedbackSeparateComponents =
629 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
630
631 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
632 !can_do_mi_math_and_lrr(brw->screen);
633
634 int max_samples;
635 const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
636 const int clamp_max_samples =
637 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
638
639 if (clamp_max_samples < 0) {
640 max_samples = msaa_modes[0];
641 } else {
642 /* Select the largest supported MSAA mode that does not exceed
643 * clamp_max_samples.
644 */
645 max_samples = 0;
646 for (int i = 0; msaa_modes[i] != 0; ++i) {
647 if (msaa_modes[i] <= clamp_max_samples) {
648 max_samples = msaa_modes[i];
649 break;
650 }
651 }
652 }
653
654 ctx->Const.MaxSamples = max_samples;
655 ctx->Const.MaxColorTextureSamples = max_samples;
656 ctx->Const.MaxDepthTextureSamples = max_samples;
657 ctx->Const.MaxIntegerSamples = max_samples;
658 ctx->Const.MaxImageSamples = 0;
659
660 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
661 * to map indices of rectangular grid to sample numbers within a pixel.
662 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
663 * extension implementation. For more details see the comment above
664 * gen6_set_sample_maps() definition.
665 */
666 gen6_set_sample_maps(ctx);
667
668 ctx->Const.MinLineWidth = 1.0;
669 ctx->Const.MinLineWidthAA = 1.0;
670 if (brw->gen >= 6) {
671 ctx->Const.MaxLineWidth = 7.375;
672 ctx->Const.MaxLineWidthAA = 7.375;
673 ctx->Const.LineWidthGranularity = 0.125;
674 } else {
675 ctx->Const.MaxLineWidth = 7.0;
676 ctx->Const.MaxLineWidthAA = 7.0;
677 ctx->Const.LineWidthGranularity = 0.5;
678 }
679
680 /* For non-antialiased lines, we have to round the line width to the
681 * nearest whole number. Make sure that we don't advertise a line
682 * width that, when rounded, will be beyond the actual hardware
683 * maximum.
684 */
685 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
686
687 ctx->Const.MinPointSize = 1.0;
688 ctx->Const.MinPointSizeAA = 1.0;
689 ctx->Const.MaxPointSize = 255.0;
690 ctx->Const.MaxPointSizeAA = 255.0;
691 ctx->Const.PointSizeGranularity = 1.0;
692
693 if (brw->gen >= 5 || brw->is_g4x)
694 ctx->Const.MaxClipPlanes = 8;
695
696 ctx->Const.GLSLTessLevelsAsInputs = true;
697 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8;
698 ctx->Const.LowerTESPatchVerticesIn = true;
699 ctx->Const.PrimitiveRestartForPatches = true;
700
701 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
702 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
703 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
704 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
705 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
706 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
707 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
708 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
709 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
710 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
711 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
712 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
713 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
714 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
715
716 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
717 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
718 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
719 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
720 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
721 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
722 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
723 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
724 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
725 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
726 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
727
728 /* Fragment shaders use real, 32-bit twos-complement integers for all
729 * integer types.
730 */
731 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
732 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
733 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
734 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
735 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
736
737 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
738 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
739 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
740 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
741 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
742
743 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
744 * but we're not sure how it's actually done for vertex order,
745 * that affect provoking vertex decision. Always use last vertex
746 * convention for quad primitive which works as expected for now.
747 */
748 if (brw->gen >= 6)
749 ctx->Const.QuadsFollowProvokingVertexConvention = false;
750
751 ctx->Const.NativeIntegers = true;
752 ctx->Const.VertexID_is_zero_based = true;
753
754 /* Regarding the CMP instruction, the Ivybridge PRM says:
755 *
756 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
757 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
758 * 0xFFFFFFFF) is assigned to dst."
759 *
760 * but PRMs for earlier generations say
761 *
762 * "In dword format, one GRF may store up to 8 results. When the register
763 * is used later as a vector of Booleans, as only LSB at each channel
764 * contains meaning [sic] data, software should make sure all higher bits
765 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
766 *
767 * We select the representation of a true boolean uniform to be ~0, and fix
768 * the results of Gen <= 5 CMP instruction's with -(result & 1).
769 */
770 ctx->Const.UniformBooleanTrue = ~0;
771
772 /* From the gen4 PRM, volume 4 page 127:
773 *
774 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
775 * the base address of the first element of the surface, computed in
776 * software by adding the surface base address to the byte offset of
777 * the element in the buffer."
778 *
779 * However, unaligned accesses are slower, so enforce buffer alignment.
780 */
781 ctx->Const.UniformBufferOffsetAlignment = 16;
782
783 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
784 * that we can safely have the CPU and GPU writing the same SSBO on
785 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
786 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
787 * be updating disjoint regions of the buffer simultaneously and that will
788 * break if the regions overlap the same cacheline.
789 */
790 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
791 ctx->Const.TextureBufferOffsetAlignment = 16;
792 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
793
794 if (brw->gen >= 6) {
795 ctx->Const.MaxVarying = 32;
796 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
797 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
798 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
799 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
800 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
801 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
802 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
803 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
804 }
805
806 /* We want the GLSL compiler to emit code that uses condition codes */
807 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
808 ctx->Const.ShaderCompilerOptions[i] =
809 brw->screen->compiler->glsl_compiler_options[i];
810 }
811
812 if (brw->gen >= 7) {
813 ctx->Const.MaxViewportWidth = 32768;
814 ctx->Const.MaxViewportHeight = 32768;
815 }
816
817 /* ARB_viewport_array, OES_viewport_array */
818 if (brw->gen >= 6) {
819 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
820 ctx->Const.ViewportSubpixelBits = 0;
821
822 /* Cast to float before negating because MaxViewportWidth is unsigned.
823 */
824 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
825 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
826 }
827
828 /* ARB_gpu_shader5 */
829 if (brw->gen >= 7)
830 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
831
832 /* ARB_framebuffer_no_attachments */
833 ctx->Const.MaxFramebufferWidth = 16384;
834 ctx->Const.MaxFramebufferHeight = 16384;
835 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
836 ctx->Const.MaxFramebufferSamples = max_samples;
837
838 /* OES_primitive_bounding_box */
839 ctx->Const.NoPrimitiveBoundingBoxOutput = true;
840 }
841
842 static void
843 brw_initialize_cs_context_constants(struct brw_context *brw)
844 {
845 struct gl_context *ctx = &brw->ctx;
846 const struct intel_screen *screen = brw->screen;
847 struct gen_device_info *devinfo = &brw->screen->devinfo;
848
849 /* FINISHME: Do this for all platforms that the kernel supports */
850 if (brw->is_cherryview &&
851 screen->subslice_total > 0 && screen->eu_total > 0) {
852 /* Logical CS threads = EUs per subslice * 7 threads per EU */
853 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
854
855 /* Fuse configurations may give more threads than expected, never less. */
856 if (max_cs_threads > devinfo->max_cs_threads)
857 devinfo->max_cs_threads = max_cs_threads;
858 }
859
860 /* Maximum number of scalar compute shader invocations that can be run in
861 * parallel in the same subslice assuming SIMD32 dispatch.
862 *
863 * We don't advertise more than 64 threads, because we are limited to 64 by
864 * our usage of thread_width_max in the gpgpu walker command. This only
865 * currently impacts Haswell, which otherwise might be able to advertise 70
866 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
867 * required the number of invocation needed for ARB_compute_shader.
868 */
869 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
870 const uint32_t max_invocations = 32 * max_threads;
871 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
872 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
873 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
874 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
875 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
876 }
877
878 /**
879 * Process driconf (drirc) options, setting appropriate context flags.
880 *
881 * intelInitExtensions still pokes at optionCache directly, in order to
882 * avoid advertising various extensions. No flags are set, so it makes
883 * sense to continue doing that there.
884 */
885 static void
886 brw_process_driconf_options(struct brw_context *brw)
887 {
888 struct gl_context *ctx = &brw->ctx;
889
890 driOptionCache *options = &brw->optionCache;
891 driParseConfigFiles(options, &brw->screen->optionCache,
892 brw->driContext->driScreenPriv->myNum, "i965");
893
894 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
895 switch (bo_reuse_mode) {
896 case DRI_CONF_BO_REUSE_DISABLED:
897 break;
898 case DRI_CONF_BO_REUSE_ALL:
899 brw_bufmgr_enable_reuse(brw->bufmgr);
900 break;
901 }
902
903 if (INTEL_DEBUG & DEBUG_NO_HIZ) {
904 brw->has_hiz = false;
905 /* On gen6, you can only do separate stencil with HIZ. */
906 if (brw->gen == 6)
907 brw->has_separate_stencil = false;
908 }
909
910 if (driQueryOptionb(options, "always_flush_batch")) {
911 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
912 brw->always_flush_batch = true;
913 }
914
915 if (driQueryOptionb(options, "always_flush_cache")) {
916 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
917 brw->always_flush_cache = true;
918 }
919
920 if (driQueryOptionb(options, "disable_throttling")) {
921 fprintf(stderr, "disabling flush throttling\n");
922 brw->disable_throttling = true;
923 }
924
925 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
926
927 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
928 brw->screen->compiler->precise_trig = true;
929
930 ctx->Const.ForceGLSLExtensionsWarn =
931 driQueryOptionb(options, "force_glsl_extensions_warn");
932
933 ctx->Const.ForceGLSLVersion =
934 driQueryOptioni(options, "force_glsl_version");
935
936 ctx->Const.DisableGLSLLineContinuations =
937 driQueryOptionb(options, "disable_glsl_line_continuations");
938
939 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
940 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
941
942 ctx->Const.AllowGLSLBuiltinVariableRedeclaration =
943 driQueryOptionb(options, "allow_glsl_builtin_variable_redeclaration");
944
945 ctx->Const.AllowHigherCompatVersion =
946 driQueryOptionb(options, "allow_higher_compat_version");
947
948 ctx->Const.ForceGLSLAbsSqrt =
949 driQueryOptionb(options, "force_glsl_abs_sqrt");
950
951 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
952
953 brw->dual_color_blend_by_location =
954 driQueryOptionb(options, "dual_color_blend_by_location");
955 }
956
957 GLboolean
958 brwCreateContext(gl_api api,
959 const struct gl_config *mesaVis,
960 __DRIcontext *driContextPriv,
961 unsigned major_version,
962 unsigned minor_version,
963 uint32_t flags,
964 bool notify_reset,
965 unsigned *dri_ctx_error,
966 void *sharedContextPrivate)
967 {
968 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
969 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
970 const struct gen_device_info *devinfo = &screen->devinfo;
971 struct dd_function_table functions;
972
973 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
974 * provides us with context reset notifications.
975 */
976 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
977 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
978
979 if (screen->has_context_reset_notification)
980 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
981
982 if (flags & ~allowed_flags) {
983 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
984 return false;
985 }
986
987 struct brw_context *brw = rzalloc(NULL, struct brw_context);
988 if (!brw) {
989 fprintf(stderr, "%s: failed to alloc context\n", __func__);
990 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
991 return false;
992 }
993
994 driContextPriv->driverPrivate = brw;
995 brw->driContext = driContextPriv;
996 brw->screen = screen;
997 brw->bufmgr = screen->bufmgr;
998
999 brw->gen = devinfo->gen;
1000 brw->gt = devinfo->gt;
1001 brw->is_g4x = devinfo->is_g4x;
1002 brw->is_baytrail = devinfo->is_baytrail;
1003 brw->is_haswell = devinfo->is_haswell;
1004 brw->is_cherryview = devinfo->is_cherryview;
1005 brw->is_broxton = devinfo->is_broxton;
1006 brw->has_llc = devinfo->has_llc;
1007 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
1008 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
1009 brw->has_pln = devinfo->has_pln;
1010 brw->has_compr4 = devinfo->has_compr4;
1011 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
1012 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
1013 brw->needs_unlit_centroid_workaround =
1014 devinfo->needs_unlit_centroid_workaround;
1015
1016 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
1017 brw->has_swizzling = screen->hw_has_swizzling;
1018
1019 isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling);
1020
1021 brw->vs.base.stage = MESA_SHADER_VERTEX;
1022 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
1023 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
1024 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
1025 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
1026 if (brw->gen >= 8) {
1027 gen8_init_vtable_surface_functions(brw);
1028 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
1029 } else if (brw->gen >= 7) {
1030 gen7_init_vtable_surface_functions(brw);
1031 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
1032 } else if (brw->gen >= 6) {
1033 gen6_init_vtable_surface_functions(brw);
1034 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
1035 } else {
1036 gen4_init_vtable_surface_functions(brw);
1037 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
1038 }
1039
1040 brw_init_driver_functions(brw, &functions);
1041
1042 if (notify_reset)
1043 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
1044
1045 struct gl_context *ctx = &brw->ctx;
1046
1047 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
1048 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1049 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
1050 intelDestroyContext(driContextPriv);
1051 return false;
1052 }
1053
1054 driContextSetFlags(ctx, flags);
1055
1056 /* Initialize the software rasterizer and helper modules.
1057 *
1058 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1059 * software fallbacks (which we have to support on legacy GL to do weird
1060 * glDrawPixels(), glBitmap(), and other functions).
1061 */
1062 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
1063 _swrast_CreateContext(ctx);
1064 }
1065
1066 _vbo_CreateContext(ctx);
1067 if (ctx->swrast_context) {
1068 _tnl_CreateContext(ctx);
1069 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
1070 _swsetup_CreateContext(ctx);
1071
1072 /* Configure swrast to match hardware characteristics: */
1073 _swrast_allow_pixel_fog(ctx, false);
1074 _swrast_allow_vertex_fog(ctx, true);
1075 }
1076
1077 _mesa_meta_init(ctx);
1078
1079 brw_process_driconf_options(brw);
1080
1081 if (INTEL_DEBUG & DEBUG_PERF)
1082 brw->perf_debug = true;
1083
1084 brw_initialize_cs_context_constants(brw);
1085 brw_initialize_context_constants(brw);
1086
1087 ctx->Const.ResetStrategy = notify_reset
1088 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
1089
1090 /* Reinitialize the context point state. It depends on ctx->Const values. */
1091 _mesa_init_point(ctx);
1092
1093 intel_fbo_init(brw);
1094
1095 intel_batchbuffer_init(&brw->batch, brw->bufmgr, brw->has_llc);
1096
1097 if (brw->gen >= 6) {
1098 /* Create a new hardware context. Using a hardware context means that
1099 * our GPU state will be saved/restored on context switch, allowing us
1100 * to assume that the GPU is in the same state we left it in.
1101 *
1102 * This is required for transform feedback buffer offsets, query objects,
1103 * and also allows us to reduce how much state we have to emit.
1104 */
1105 brw->hw_ctx = brw_create_hw_context(brw->bufmgr);
1106
1107 if (!brw->hw_ctx) {
1108 fprintf(stderr, "Failed to create hardware context.\n");
1109 intelDestroyContext(driContextPriv);
1110 return false;
1111 }
1112 }
1113
1114 if (brw_init_pipe_control(brw, devinfo)) {
1115 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1116 intelDestroyContext(driContextPriv);
1117 return false;
1118 }
1119
1120 brw_init_state(brw);
1121
1122 intelInitExtensions(ctx);
1123
1124 brw_init_surface_formats(brw);
1125
1126 brw_blorp_init(brw);
1127
1128 brw->urb.size = devinfo->urb.size;
1129
1130 if (brw->gen == 6)
1131 brw->urb.gs_present = false;
1132
1133 brw->prim_restart.in_progress = false;
1134 brw->prim_restart.enable_cut_index = false;
1135 brw->gs.enabled = false;
1136 brw->clip.viewport_count = 1;
1137
1138 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1139
1140 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
1141
1142 ctx->VertexProgram._MaintainTnlProgram = true;
1143 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1144
1145 brw_draw_init( brw );
1146
1147 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1148 /* Turn on some extra GL_ARB_debug_output generation. */
1149 brw->perf_debug = true;
1150 }
1151
1152 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) {
1153 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1154 ctx->Const.RobustAccess = GL_TRUE;
1155 }
1156
1157 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1158 brw_init_shader_time(brw);
1159
1160 _mesa_compute_version(ctx);
1161
1162 _mesa_initialize_dispatch_tables(ctx);
1163 _mesa_initialize_vbo_vtxfmt(ctx);
1164
1165 if (ctx->Extensions.INTEL_performance_query)
1166 brw_init_performance_queries(brw);
1167
1168 vbo_use_buffer_objects(ctx);
1169 vbo_always_unmap_buffers(ctx);
1170
1171 return true;
1172 }
1173
1174 void
1175 intelDestroyContext(__DRIcontext * driContextPriv)
1176 {
1177 struct brw_context *brw =
1178 (struct brw_context *) driContextPriv->driverPrivate;
1179 struct gl_context *ctx = &brw->ctx;
1180
1181 _mesa_meta_free(&brw->ctx);
1182
1183 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1184 /* Force a report. */
1185 brw->shader_time.report_time = 0;
1186
1187 brw_collect_and_report_shader_time(brw);
1188 brw_destroy_shader_time(brw);
1189 }
1190
1191 if (brw->gen >= 6)
1192 blorp_finish(&brw->blorp);
1193
1194 brw_destroy_state(brw);
1195 brw_draw_destroy(brw);
1196
1197 brw_bo_unreference(brw->curbe.curbe_bo);
1198 if (brw->vs.base.scratch_bo)
1199 brw_bo_unreference(brw->vs.base.scratch_bo);
1200 if (brw->tcs.base.scratch_bo)
1201 brw_bo_unreference(brw->tcs.base.scratch_bo);
1202 if (brw->tes.base.scratch_bo)
1203 brw_bo_unreference(brw->tes.base.scratch_bo);
1204 if (brw->gs.base.scratch_bo)
1205 brw_bo_unreference(brw->gs.base.scratch_bo);
1206 if (brw->wm.base.scratch_bo)
1207 brw_bo_unreference(brw->wm.base.scratch_bo);
1208
1209 brw_destroy_hw_context(brw->bufmgr, brw->hw_ctx);
1210
1211 if (ctx->swrast_context) {
1212 _swsetup_DestroyContext(&brw->ctx);
1213 _tnl_DestroyContext(&brw->ctx);
1214 }
1215 _vbo_DestroyContext(&brw->ctx);
1216
1217 if (ctx->swrast_context)
1218 _swrast_DestroyContext(&brw->ctx);
1219
1220 brw_fini_pipe_control(brw);
1221 intel_batchbuffer_free(&brw->batch);
1222
1223 brw_bo_unreference(brw->throttle_batch[1]);
1224 brw_bo_unreference(brw->throttle_batch[0]);
1225 brw->throttle_batch[1] = NULL;
1226 brw->throttle_batch[0] = NULL;
1227
1228 driDestroyOptionCache(&brw->optionCache);
1229
1230 /* free the Mesa context */
1231 _mesa_free_context_data(&brw->ctx);
1232
1233 ralloc_free(brw);
1234 driContextPriv->driverPrivate = NULL;
1235 }
1236
1237 GLboolean
1238 intelUnbindContext(__DRIcontext * driContextPriv)
1239 {
1240 /* Unset current context and dispath table */
1241 _mesa_make_current(NULL, NULL, NULL);
1242
1243 return true;
1244 }
1245
1246 /**
1247 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1248 * on window system framebuffers.
1249 *
1250 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1251 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1252 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1253 * for a visual where you're guaranteed to be capable, but it turns out that
1254 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1255 * incapable ones, because there's no difference between the two in resources
1256 * used. Applications thus get built that accidentally rely on the default
1257 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1258 * great...
1259 *
1260 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1261 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1262 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1263 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1264 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1265 * and get no sRGB encode (assuming that both kinds of visual are available).
1266 * Thus our choice to support sRGB by default on our visuals for desktop would
1267 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1268 *
1269 * Unfortunately, renderbuffer setup happens before a context is created. So
1270 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1271 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1272 * yet), we go turn that back off before anyone finds out.
1273 */
1274 static void
1275 intel_gles3_srgb_workaround(struct brw_context *brw,
1276 struct gl_framebuffer *fb)
1277 {
1278 struct gl_context *ctx = &brw->ctx;
1279
1280 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1281 return;
1282
1283 /* Some day when we support the sRGB capable bit on visuals available for
1284 * GLES, we'll need to respect that and not disable things here.
1285 */
1286 fb->Visual.sRGBCapable = false;
1287 for (int i = 0; i < BUFFER_COUNT; i++) {
1288 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1289 if (rb)
1290 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1291 }
1292 }
1293
1294 GLboolean
1295 intelMakeCurrent(__DRIcontext * driContextPriv,
1296 __DRIdrawable * driDrawPriv,
1297 __DRIdrawable * driReadPriv)
1298 {
1299 struct brw_context *brw;
1300 GET_CURRENT_CONTEXT(curCtx);
1301
1302 if (driContextPriv)
1303 brw = (struct brw_context *) driContextPriv->driverPrivate;
1304 else
1305 brw = NULL;
1306
1307 /* According to the glXMakeCurrent() man page: "Pending commands to
1308 * the previous context, if any, are flushed before it is released."
1309 * But only flush if we're actually changing contexts.
1310 */
1311 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1312 _mesa_flush(curCtx);
1313 }
1314
1315 if (driContextPriv) {
1316 struct gl_context *ctx = &brw->ctx;
1317 struct gl_framebuffer *fb, *readFb;
1318
1319 if (driDrawPriv == NULL) {
1320 fb = _mesa_get_incomplete_framebuffer();
1321 } else {
1322 fb = driDrawPriv->driverPrivate;
1323 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1324 }
1325
1326 if (driReadPriv == NULL) {
1327 readFb = _mesa_get_incomplete_framebuffer();
1328 } else {
1329 readFb = driReadPriv->driverPrivate;
1330 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1331 }
1332
1333 /* The sRGB workaround changes the renderbuffer's format. We must change
1334 * the format before the renderbuffer's miptree get's allocated, otherwise
1335 * the formats of the renderbuffer and its miptree will differ.
1336 */
1337 intel_gles3_srgb_workaround(brw, fb);
1338 intel_gles3_srgb_workaround(brw, readFb);
1339
1340 /* If the context viewport hasn't been initialized, force a call out to
1341 * the loader to get buffers so we have a drawable size for the initial
1342 * viewport. */
1343 if (!brw->ctx.ViewportInitialized)
1344 intel_prepare_render(brw);
1345
1346 _mesa_make_current(ctx, fb, readFb);
1347 } else {
1348 _mesa_make_current(NULL, NULL, NULL);
1349 }
1350
1351 return true;
1352 }
1353
1354 void
1355 intel_resolve_for_dri2_flush(struct brw_context *brw,
1356 __DRIdrawable *drawable)
1357 {
1358 if (brw->gen < 6) {
1359 /* MSAA and fast color clear are not supported, so don't waste time
1360 * checking whether a resolve is needed.
1361 */
1362 return;
1363 }
1364
1365 struct gl_framebuffer *fb = drawable->driverPrivate;
1366 struct intel_renderbuffer *rb;
1367
1368 /* Usually, only the back buffer will need to be downsampled. However,
1369 * the front buffer will also need it if the user has rendered into it.
1370 */
1371 static const gl_buffer_index buffers[2] = {
1372 BUFFER_BACK_LEFT,
1373 BUFFER_FRONT_LEFT,
1374 };
1375
1376 for (int i = 0; i < 2; ++i) {
1377 rb = intel_get_renderbuffer(fb, buffers[i]);
1378 if (rb == NULL || rb->mt == NULL)
1379 continue;
1380 if (rb->mt->num_samples <= 1) {
1381 assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
1382 rb->layer_count == 1);
1383 intel_miptree_resolve_color(brw, rb->mt, 0, 0, 1, 0);
1384 } else {
1385 intel_renderbuffer_downsample(brw, rb);
1386 }
1387 }
1388 }
1389
1390 static unsigned
1391 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1392 {
1393 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1394 }
1395
1396 static void
1397 intel_query_dri2_buffers(struct brw_context *brw,
1398 __DRIdrawable *drawable,
1399 __DRIbuffer **buffers,
1400 int *count);
1401
1402 static void
1403 intel_process_dri2_buffer(struct brw_context *brw,
1404 __DRIdrawable *drawable,
1405 __DRIbuffer *buffer,
1406 struct intel_renderbuffer *rb,
1407 const char *buffer_name);
1408
1409 static void
1410 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1411
1412 static void
1413 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1414 {
1415 struct gl_framebuffer *fb = drawable->driverPrivate;
1416 struct intel_renderbuffer *rb;
1417 __DRIbuffer *buffers = NULL;
1418 int count;
1419 const char *region_name;
1420
1421 /* Set this up front, so that in case our buffers get invalidated
1422 * while we're getting new buffers, we don't clobber the stamp and
1423 * thus ignore the invalidate. */
1424 drawable->lastStamp = drawable->dri2.stamp;
1425
1426 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1427 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1428
1429 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1430
1431 if (buffers == NULL)
1432 return;
1433
1434 for (int i = 0; i < count; i++) {
1435 switch (buffers[i].attachment) {
1436 case __DRI_BUFFER_FRONT_LEFT:
1437 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1438 region_name = "dri2 front buffer";
1439 break;
1440
1441 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1442 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1443 region_name = "dri2 fake front buffer";
1444 break;
1445
1446 case __DRI_BUFFER_BACK_LEFT:
1447 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1448 region_name = "dri2 back buffer";
1449 break;
1450
1451 case __DRI_BUFFER_DEPTH:
1452 case __DRI_BUFFER_HIZ:
1453 case __DRI_BUFFER_DEPTH_STENCIL:
1454 case __DRI_BUFFER_STENCIL:
1455 case __DRI_BUFFER_ACCUM:
1456 default:
1457 fprintf(stderr,
1458 "unhandled buffer attach event, attachment type %d\n",
1459 buffers[i].attachment);
1460 return;
1461 }
1462
1463 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1464 }
1465
1466 }
1467
1468 void
1469 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1470 {
1471 struct brw_context *brw = context->driverPrivate;
1472 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1473
1474 /* Set this up front, so that in case our buffers get invalidated
1475 * while we're getting new buffers, we don't clobber the stamp and
1476 * thus ignore the invalidate. */
1477 drawable->lastStamp = drawable->dri2.stamp;
1478
1479 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1480 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1481
1482 if (dri_screen->image.loader)
1483 intel_update_image_buffers(brw, drawable);
1484 else
1485 intel_update_dri2_buffers(brw, drawable);
1486
1487 driUpdateFramebufferSize(&brw->ctx, drawable);
1488 }
1489
1490 /**
1491 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1492 * state is required.
1493 */
1494 void
1495 intel_prepare_render(struct brw_context *brw)
1496 {
1497 struct gl_context *ctx = &brw->ctx;
1498 __DRIcontext *driContext = brw->driContext;
1499 __DRIdrawable *drawable;
1500
1501 drawable = driContext->driDrawablePriv;
1502 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1503 if (drawable->lastStamp != drawable->dri2.stamp)
1504 intel_update_renderbuffers(driContext, drawable);
1505 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1506 }
1507
1508 drawable = driContext->driReadablePriv;
1509 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1510 if (drawable->lastStamp != drawable->dri2.stamp)
1511 intel_update_renderbuffers(driContext, drawable);
1512 driContext->dri2.read_stamp = drawable->dri2.stamp;
1513 }
1514
1515 /* If we're currently rendering to the front buffer, the rendering
1516 * that will happen next will probably dirty the front buffer. So
1517 * mark it as dirty here.
1518 */
1519 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1520 brw->front_buffer_dirty = true;
1521 }
1522
1523 /**
1524 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1525 *
1526 * To determine which DRI buffers to request, examine the renderbuffers
1527 * attached to the drawable's framebuffer. Then request the buffers with
1528 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1529 *
1530 * This is called from intel_update_renderbuffers().
1531 *
1532 * \param drawable Drawable whose buffers are queried.
1533 * \param buffers [out] List of buffers returned by DRI2 query.
1534 * \param buffer_count [out] Number of buffers returned.
1535 *
1536 * \see intel_update_renderbuffers()
1537 * \see DRI2GetBuffers()
1538 * \see DRI2GetBuffersWithFormat()
1539 */
1540 static void
1541 intel_query_dri2_buffers(struct brw_context *brw,
1542 __DRIdrawable *drawable,
1543 __DRIbuffer **buffers,
1544 int *buffer_count)
1545 {
1546 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1547 struct gl_framebuffer *fb = drawable->driverPrivate;
1548 int i = 0;
1549 unsigned attachments[8];
1550
1551 struct intel_renderbuffer *front_rb;
1552 struct intel_renderbuffer *back_rb;
1553
1554 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1555 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1556
1557 memset(attachments, 0, sizeof(attachments));
1558 if ((_mesa_is_front_buffer_drawing(fb) ||
1559 _mesa_is_front_buffer_reading(fb) ||
1560 !back_rb) && front_rb) {
1561 /* If a fake front buffer is in use, then querying for
1562 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1563 * the real front buffer to the fake front buffer. So before doing the
1564 * query, we need to make sure all the pending drawing has landed in the
1565 * real front buffer.
1566 */
1567 intel_batchbuffer_flush(brw);
1568 intel_flush_front(&brw->ctx);
1569
1570 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1571 attachments[i++] = intel_bits_per_pixel(front_rb);
1572 } else if (front_rb && brw->front_buffer_dirty) {
1573 /* We have pending front buffer rendering, but we aren't querying for a
1574 * front buffer. If the front buffer we have is a fake front buffer,
1575 * the X server is going to throw it away when it processes the query.
1576 * So before doing the query, make sure all the pending drawing has
1577 * landed in the real front buffer.
1578 */
1579 intel_batchbuffer_flush(brw);
1580 intel_flush_front(&brw->ctx);
1581 }
1582
1583 if (back_rb) {
1584 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1585 attachments[i++] = intel_bits_per_pixel(back_rb);
1586 }
1587
1588 assert(i <= ARRAY_SIZE(attachments));
1589
1590 *buffers =
1591 dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1592 &drawable->w,
1593 &drawable->h,
1594 attachments, i / 2,
1595 buffer_count,
1596 drawable->loaderPrivate);
1597 }
1598
1599 /**
1600 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1601 *
1602 * This is called from intel_update_renderbuffers().
1603 *
1604 * \par Note:
1605 * DRI buffers whose attachment point is DRI2BufferStencil or
1606 * DRI2BufferDepthStencil are handled as special cases.
1607 *
1608 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1609 * that is passed to brw_bo_gem_create_from_name().
1610 *
1611 * \see intel_update_renderbuffers()
1612 */
1613 static void
1614 intel_process_dri2_buffer(struct brw_context *brw,
1615 __DRIdrawable *drawable,
1616 __DRIbuffer *buffer,
1617 struct intel_renderbuffer *rb,
1618 const char *buffer_name)
1619 {
1620 struct gl_framebuffer *fb = drawable->driverPrivate;
1621 struct brw_bo *bo;
1622
1623 if (!rb)
1624 return;
1625
1626 unsigned num_samples = rb->Base.Base.NumSamples;
1627
1628 /* We try to avoid closing and reopening the same BO name, because the first
1629 * use of a mapping of the buffer involves a bunch of page faulting which is
1630 * moderately expensive.
1631 */
1632 struct intel_mipmap_tree *last_mt;
1633 if (num_samples == 0)
1634 last_mt = rb->mt;
1635 else
1636 last_mt = rb->singlesample_mt;
1637
1638 uint32_t old_name = 0;
1639 if (last_mt) {
1640 /* The bo already has a name because the miptree was created by a
1641 * previous call to intel_process_dri2_buffer(). If a bo already has a
1642 * name, then brw_bo_flink() is a low-cost getter. It does not
1643 * create a new name.
1644 */
1645 brw_bo_flink(last_mt->bo, &old_name);
1646 }
1647
1648 if (old_name == buffer->name)
1649 return;
1650
1651 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1652 fprintf(stderr,
1653 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1654 buffer->name, buffer->attachment,
1655 buffer->cpp, buffer->pitch);
1656 }
1657
1658 bo = brw_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1659 buffer->name);
1660 if (!bo) {
1661 fprintf(stderr,
1662 "Failed to open BO for returned DRI2 buffer "
1663 "(%dx%d, %s, named %d).\n"
1664 "This is likely a bug in the X Server that will lead to a "
1665 "crash soon.\n",
1666 drawable->w, drawable->h, buffer_name, buffer->name);
1667 return;
1668 }
1669
1670 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1671 drawable->w, drawable->h,
1672 buffer->pitch);
1673
1674 if (_mesa_is_front_buffer_drawing(fb) &&
1675 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1676 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1677 rb->Base.Base.NumSamples > 1) {
1678 intel_renderbuffer_upsample(brw, rb);
1679 }
1680
1681 assert(rb->mt);
1682
1683 brw_bo_unreference(bo);
1684 }
1685
1686 /**
1687 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1688 *
1689 * To determine which DRI buffers to request, examine the renderbuffers
1690 * attached to the drawable's framebuffer. Then request the buffers from
1691 * the image loader
1692 *
1693 * This is called from intel_update_renderbuffers().
1694 *
1695 * \param drawable Drawable whose buffers are queried.
1696 * \param buffers [out] List of buffers returned by DRI2 query.
1697 * \param buffer_count [out] Number of buffers returned.
1698 *
1699 * \see intel_update_renderbuffers()
1700 */
1701
1702 static void
1703 intel_update_image_buffer(struct brw_context *intel,
1704 __DRIdrawable *drawable,
1705 struct intel_renderbuffer *rb,
1706 __DRIimage *buffer,
1707 enum __DRIimageBufferMask buffer_type)
1708 {
1709 struct gl_framebuffer *fb = drawable->driverPrivate;
1710
1711 if (!rb || !buffer->bo)
1712 return;
1713
1714 unsigned num_samples = rb->Base.Base.NumSamples;
1715
1716 /* Check and see if we're already bound to the right
1717 * buffer object
1718 */
1719 struct intel_mipmap_tree *last_mt;
1720 if (num_samples == 0)
1721 last_mt = rb->mt;
1722 else
1723 last_mt = rb->singlesample_mt;
1724
1725 if (last_mt && last_mt->bo == buffer->bo)
1726 return;
1727
1728 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1729 buffer->width, buffer->height,
1730 buffer->pitch);
1731
1732 if (_mesa_is_front_buffer_drawing(fb) &&
1733 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1734 rb->Base.Base.NumSamples > 1) {
1735 intel_renderbuffer_upsample(intel, rb);
1736 }
1737 }
1738
1739 static void
1740 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1741 {
1742 struct gl_framebuffer *fb = drawable->driverPrivate;
1743 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1744 struct intel_renderbuffer *front_rb;
1745 struct intel_renderbuffer *back_rb;
1746 struct __DRIimageList images;
1747 mesa_format format;
1748 uint32_t buffer_mask = 0;
1749 int ret;
1750
1751 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1752 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1753
1754 if (back_rb)
1755 format = intel_rb_format(back_rb);
1756 else if (front_rb)
1757 format = intel_rb_format(front_rb);
1758 else
1759 return;
1760
1761 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1762 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1763 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1764 }
1765
1766 if (back_rb)
1767 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1768
1769 ret = dri_screen->image.loader->getBuffers(drawable,
1770 driGLFormatToImageFormat(format),
1771 &drawable->dri2.stamp,
1772 drawable->loaderPrivate,
1773 buffer_mask,
1774 &images);
1775 if (!ret)
1776 return;
1777
1778 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1779 drawable->w = images.front->width;
1780 drawable->h = images.front->height;
1781 intel_update_image_buffer(brw,
1782 drawable,
1783 front_rb,
1784 images.front,
1785 __DRI_IMAGE_BUFFER_FRONT);
1786 }
1787
1788 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1789 drawable->w = images.back->width;
1790 drawable->h = images.back->height;
1791 intel_update_image_buffer(brw,
1792 drawable,
1793 back_rb,
1794 images.back,
1795 __DRI_IMAGE_BUFFER_BACK);
1796 }
1797 }