src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/imports.h"
  34 #include "main/macros.h"
  35 #include "main/simple_list.h"
  36
  37 #include "vbo/vbo_context.h"
  38
  39 #include "brw_context.h"
  40 #include "brw_defines.h"
  41 #include "brw_draw.h"
  42 #include "brw_state.h"
  43
  44 #include "intel_fbo.h"
  45 #include "intel_mipmap_tree.h"
  46 #include "intel_regions.h"
  47 #include "intel_span.h"
  48 #include "intel_tex.h"
  49 #include "intel_tex_obj.h"
  50
  51 #include "tnl/t_pipeline.h"
  52 #include "glsl/ralloc.h"
  53
  54 /***************************************
  55  * Mesa's Driver Functions
  56  ***************************************/
  57
  58 static void brwInitDriverFunctions(struct intel_screen *screen,
  59                                    struct dd_function_table *functions)
  60 {
  61    intelInitDriverFunctions( functions );
  62
  63    brwInitFragProgFuncs( functions );
  64    brw_init_queryobj_functions(functions);
  65
  66    functions->BeginTransformFeedback = brw_begin_transform_feedback;
  67
  68    if (screen->gen >= 7)
  69       functions->EndTransformFeedback = gen7_end_transform_feedback;
  70    else
  71       functions->EndTransformFeedback = brw_end_transform_feedback;
  72 }
  73
  74 bool
  75 brwCreateContext(int api,
  76                  const struct gl_config *mesaVis,
  77                  __DRIcontext *driContextPriv,
  78                  void *sharedContextPrivate)
  79 {
  80    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
  81    struct intel_screen *screen = sPriv->driverPrivate;
  82    struct dd_function_table functions;
  83    struct brw_context *brw = rzalloc(NULL, struct brw_context);
  84    struct intel_context *intel = &brw->intel;
  85    struct gl_context *ctx = &intel->ctx;
  86    unsigned i;
  87
  88    if (!brw) {
  89       printf("%s: failed to alloc context\n", __FUNCTION__);
  90       return false;
  91    }
  92
  93    brwInitDriverFunctions(screen, &functions);
  94
  95    if (!intelInitContext( intel, api, mesaVis, driContextPriv,
  96                           sharedContextPrivate, &functions )) {
  97       printf("%s: failed to init intel context\n", __FUNCTION__);
  98       FREE(brw);
  99       return false;
 100    }
 101
 102    brwInitVtbl( brw );
 103
 104    brw_init_surface_formats(brw);
 105
 106    /* Initialize swrast, tnl driver tables: */
 107    intelInitSpanFuncs(ctx);
 108
 109    TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
 110
 111    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
 112    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
 113    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
 114    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
 115                                      ctx->Const.MaxTextureImageUnits);
 116    ctx->Const.MaxVertexTextureImageUnits = BRW_MAX_TEX_UNIT;
 117    ctx->Const.MaxCombinedTextureImageUnits =
 118       ctx->Const.MaxVertexTextureImageUnits +
 119       ctx->Const.MaxTextureImageUnits;
 120
 121    ctx->Const.MaxTextureLevels = 14; /* 8192 */
 122    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 123            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 124    ctx->Const.Max3DTextureLevels = 9;
 125    ctx->Const.MaxCubeTextureLevels = 12;
 126
 127    if (intel->gen >= 7)
 128       ctx->Const.MaxArrayTextureLayers = 2048;
 129    else
 130       ctx->Const.MaxArrayTextureLayers = 512;
 131
 132    ctx->Const.MaxTextureRectSize = (1<<12);
 133
 134    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 135
 136    /* Hardware only supports a limited number of transform feedback buffers.
 137     * So we need to override the Mesa default (which is based only on software
 138     * limits).
 139     */
 140    ctx->Const.MaxTransformFeedbackSeparateAttribs = BRW_MAX_SOL_BUFFERS;
 141
 142    /* On Gen6, in the worst case, we use up one binding table entry per
 143     * transform feedback component (see comments above the definition of
 144     * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
 145     * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
 146     * BRW_MAX_SOL_BINDINGS.
 147     *
 148     * In "separate components" mode, we need to divide this value by
 149     * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
 150     * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
 151     */
 152    ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
 153    ctx->Const.MaxTransformFeedbackSeparateComponents =
 154       BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
 155
 156    /* Claim to support 4 multisamples, even though we don't.  This is a
 157     * requirement for GL 3.0 that we missed until the last minute.  Go ahead and
 158     * claim the limit, so that usage of the 4 multisample-based API that is
 159     * guaranteed in 3.0 succeeds, even though we only rasterize a single sample.
 160     */
 161    if (intel->gen >= 6)
 162       ctx->Const.MaxSamples = 4;
 163
 164    /* if conformance mode is set, swrast can handle any size AA point */
 165    ctx->Const.MaxPointSizeAA = 255.0;
 166
 167    /* We want the GLSL compiler to emit code that uses condition codes */
 168    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 169       ctx->ShaderCompilerOptions[i].MaxIfDepth = intel->gen < 6 ? 16 : UINT_MAX;
 170       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
 171       ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = true;
 172       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
 173       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
 174       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
 175       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
 176
 177       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 178          (i == MESA_SHADER_FRAGMENT);
 179       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 180          (i == MESA_SHADER_FRAGMENT);
 181       ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
 182    }
 183
 184    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 185    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 186    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 187    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 188    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 189    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 190    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 191    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 192    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 193    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 194    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 195    ctx->Const.VertexProgram.MaxEnvParams =
 196       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 197            ctx->Const.VertexProgram.MaxEnvParams);
 198
 199    ctx->Const.FragmentProgram.MaxNativeInstructions = (16 * 1024);
 200    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (16 * 1024);
 201    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (16 * 1024);
 202    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (16 * 1024);
 203    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 204    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 205    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 206    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 207    ctx->Const.FragmentProgram.MaxEnvParams =
 208       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 209            ctx->Const.FragmentProgram.MaxEnvParams);
 210
 211    /* Fragment shaders use real, 32-bit twos-complement integers for all
 212     * integer types.
 213     */
 214    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 215    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 216    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 217    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 218       = ctx->Const.FragmentProgram.LowInt;
 219
 220    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 221       but we're not sure how it's actually done for vertex order,
 222       that affect provoking vertex decision. Always use last vertex
 223       convention for quad primitive which works as expected for now. */
 224    if (intel->gen >= 6)
 225        ctx->Const.QuadsFollowProvokingVertexConvention = false;
 226
 227    if (intel->is_g4x || intel->gen >= 5) {
 228       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 229       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 230       brw->has_surface_tile_offset = true;
 231       if (intel->gen < 6)
 232           brw->has_compr4 = true;
 233       brw->has_aa_line_parameters = true;
 234       brw->has_pln = true;
 235   } else {
 236       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 237       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 238    }
 239
 240    /* WM maximum threads is number of EUs times number of threads per EU. */
 241    if (intel->gen >= 7) {
 242       if (intel->gt == 1) {
 243          brw->max_wm_threads = 86;
 244          brw->max_vs_threads = 36;
 245          brw->max_gs_threads = 36;
 246          brw->urb.size = 128;
 247          brw->urb.max_vs_entries = 512;
 248          brw->urb.max_gs_entries = 192;
 249       } else if (intel->gt == 2) {
 250          brw->max_wm_threads = 86;
 251          brw->max_vs_threads = 128;
 252          brw->max_gs_threads = 128;
 253          brw->urb.size = 256;
 254          brw->urb.max_vs_entries = 704;
 255          brw->urb.max_gs_entries = 320;
 256       } else {
 257          assert(!"Unknown gen7 device.");
 258       }
 259    } else if (intel->gen == 6) {
 260       if (intel->gt == 2) {
 261          /* This could possibly be 80, but is supposed to require
 262           * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
 263           * GPU reset to change.
 264           */
 265          brw->max_wm_threads = 40;
 266          brw->max_vs_threads = 60;
 267          brw->max_gs_threads = 60;
 268          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 269          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 270          brw->urb.max_gs_entries = 256;
 271       } else {
 272          brw->max_wm_threads = 40;
 273          brw->max_vs_threads = 24;
 274          brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
 275          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 276          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 277          brw->urb.max_gs_entries = 256;
 278       }
 279       brw->urb.gen6_gs_previously_active = false;
 280    } else if (intel->gen == 5) {
 281       brw->urb.size = 1024;
 282       brw->max_vs_threads = 72;
 283       brw->max_gs_threads = 32;
 284       brw->max_wm_threads = 12 * 6;
 285    } else if (intel->is_g4x) {
 286       brw->urb.size = 384;
 287       brw->max_vs_threads = 32;
 288       brw->max_gs_threads = 2;
 289       brw->max_wm_threads = 10 * 5;
 290    } else if (intel->gen < 6) {
 291       brw->urb.size = 256;
 292       brw->max_vs_threads = 16;
 293       brw->max_gs_threads = 2;
 294       brw->max_wm_threads = 8 * 4;
 295       brw->has_negative_rhw_bug = true;
 296    }
 297
 298    brw_init_state( brw );
 299
 300    brw->curbe.last_buf = calloc(1, 4096);
 301    brw->curbe.next_buf = calloc(1, 4096);
 302
 303    brw->state.dirty.mesa = ~0;
 304    brw->state.dirty.brw = ~0;
 305
 306    brw->emit_state_always = 0;
 307
 308    intel->batch.need_workaround_flush = true;
 309
 310    ctx->VertexProgram._MaintainTnlProgram = true;
 311    ctx->FragmentProgram._MaintainTexEnvProgram = true;
 312
 313    brw_draw_init( brw );
 314
 315    brw->precompile = driQueryOptionb(&intel->optionCache, "shader_precompile");
 316
 317    ctx->Const.NativeIntegers = true;
 318    ctx->Const.UniformBooleanTrue = 1;
 319
 320    ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(&intel->optionCache, "force_glsl_extensions_warn");
 321
 322    return true;
 323 }
 324