2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **********************************************************************/
30 * Keith Whitwell <keithw@vmware.com>
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
47 #include "vbo/vbo_context.h"
49 #include "drivers/common/driverfuncs.h"
50 #include "drivers/common/meta.h"
53 #include "brw_context.h"
54 #include "brw_defines.h"
55 #include "brw_blorp.h"
56 #include "brw_compiler.h"
58 #include "brw_state.h"
60 #include "intel_batchbuffer.h"
61 #include "intel_buffer_objects.h"
62 #include "intel_buffers.h"
63 #include "intel_fbo.h"
64 #include "intel_mipmap_tree.h"
65 #include "intel_pixel.h"
66 #include "intel_image.h"
67 #include "intel_tex.h"
68 #include "intel_tex_obj.h"
70 #include "swrast_setup/swrast_setup.h"
72 #include "tnl/t_pipeline.h"
73 #include "util/ralloc.h"
74 #include "util/debug.h"
77 /***************************************
78 * Mesa's Driver Functions
79 ***************************************/
81 const char *const brw_vendor_string
= "Intel Open Source Technology Center";
84 get_bsw_model(const struct intel_screen
*screen
)
86 switch (screen
->eu_total
) {
97 brw_get_renderer_string(const struct intel_screen
*screen
)
100 static char buffer
[128];
103 switch (screen
->deviceID
) {
105 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
106 #include "pci_ids/i965_pci_ids.h"
108 chipset
= "Unknown Intel Chipset";
112 /* Braswell branding is funny, so we have to fix it up here */
113 if (screen
->deviceID
== 0x22B1) {
114 bsw
= strdup(chipset
);
115 char *needle
= strstr(bsw
, "XXX");
117 memcpy(needle
, get_bsw_model(screen
), 3);
122 (void) driGetRendererString(buffer
, chipset
, 0);
127 static const GLubyte
*
128 intel_get_string(struct gl_context
* ctx
, GLenum name
)
130 const struct brw_context
*const brw
= brw_context(ctx
);
134 return (GLubyte
*) brw_vendor_string
;
138 (GLubyte
*) brw_get_renderer_string(brw
->screen
);
146 intel_viewport(struct gl_context
*ctx
)
148 struct brw_context
*brw
= brw_context(ctx
);
149 __DRIcontext
*driContext
= brw
->driContext
;
151 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
152 if (driContext
->driDrawablePriv
)
153 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
154 if (driContext
->driReadablePriv
)
155 dri2InvalidateDrawable(driContext
->driReadablePriv
);
160 intel_update_framebuffer(struct gl_context
*ctx
,
161 struct gl_framebuffer
*fb
)
163 struct brw_context
*brw
= brw_context(ctx
);
165 /* Quantize the derived default number of samples
167 fb
->DefaultGeometry
._NumSamples
=
168 intel_quantize_num_samples(brw
->screen
,
169 fb
->DefaultGeometry
.NumSamples
);
173 intel_disable_rb_aux_buffer(struct brw_context
*brw
, const drm_intel_bo
*bo
)
175 const struct gl_framebuffer
*fb
= brw
->ctx
.DrawBuffer
;
178 for (unsigned i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
179 const struct intel_renderbuffer
*irb
=
180 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
182 if (irb
&& irb
->mt
->bo
== bo
) {
183 found
= brw
->draw_aux_buffer_disabled
[i
] = true;
190 /* On Gen9 color buffers may be compressed by the hardware (lossless
191 * compression). There are, however, format restrictions and care needs to be
192 * taken that the sampler engine is capable for re-interpreting a buffer with
193 * format different the buffer was originally written with.
195 * For example, SRGB formats are not compressible and the sampler engine isn't
196 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
197 * color buffer needs to be resolved so that the sampling surface can be
198 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
202 intel_texture_view_requires_resolve(struct brw_context
*brw
,
203 struct intel_texture_object
*intel_tex
)
206 !intel_miptree_is_lossless_compressed(brw
, intel_tex
->mt
))
209 const uint32_t brw_format
= brw_format_for_mesa_format(intel_tex
->_Format
);
211 if (isl_format_supports_lossless_compression(&brw
->screen
->devinfo
,
215 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
216 _mesa_get_format_name(intel_tex
->_Format
),
217 _mesa_get_format_name(intel_tex
->mt
->format
));
219 if (intel_disable_rb_aux_buffer(brw
, intel_tex
->mt
->bo
))
220 perf_debug("Sampling renderbuffer with non-compressible format - "
221 "turning off compression");
227 intel_update_state(struct gl_context
* ctx
, GLuint new_state
)
229 struct brw_context
*brw
= brw_context(ctx
);
230 struct intel_texture_object
*tex_obj
;
231 struct intel_renderbuffer
*depth_irb
;
233 if (ctx
->swrast_context
)
234 _swrast_InvalidateState(ctx
, new_state
);
235 _vbo_InvalidateState(ctx
, new_state
);
237 brw
->NewGLState
|= new_state
;
239 _mesa_unlock_context_textures(ctx
);
241 /* Resolve the depth buffer's HiZ buffer. */
242 depth_irb
= intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_DEPTH
);
244 intel_renderbuffer_resolve_hiz(brw
, depth_irb
);
246 memset(brw
->draw_aux_buffer_disabled
, 0,
247 sizeof(brw
->draw_aux_buffer_disabled
));
249 /* Resolve depth buffer and render cache of each enabled texture. */
250 int maxEnabledUnit
= ctx
->Texture
._MaxEnabledTexImageUnit
;
251 for (int i
= 0; i
<= maxEnabledUnit
; i
++) {
252 if (!ctx
->Texture
.Unit
[i
]._Current
)
254 tex_obj
= intel_texture_object(ctx
->Texture
.Unit
[i
]._Current
);
255 if (!tex_obj
|| !tex_obj
->mt
)
257 if (intel_miptree_sample_with_hiz(brw
, tex_obj
->mt
))
258 intel_miptree_all_slices_resolve_hiz(brw
, tex_obj
->mt
);
260 intel_miptree_all_slices_resolve_depth(brw
, tex_obj
->mt
);
261 /* Sampling engine understands lossless compression and resolving
262 * those surfaces should be skipped for performance reasons.
264 const int flags
= intel_texture_view_requires_resolve(brw
, tex_obj
) ?
265 0 : INTEL_MIPTREE_IGNORE_CCS_E
;
266 intel_miptree_resolve_color(brw
, tex_obj
->mt
, flags
);
267 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
269 if (tex_obj
->base
.StencilSampling
||
270 tex_obj
->mt
->format
== MESA_FORMAT_S_UINT8
) {
271 intel_update_r8stencil(brw
, tex_obj
->mt
);
275 /* Resolve color for each active shader image. */
276 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
277 const struct gl_linked_shader
*shader
=
278 ctx
->_Shader
->CurrentProgram
[i
] ?
279 ctx
->_Shader
->CurrentProgram
[i
]->_LinkedShaders
[i
] : NULL
;
281 if (unlikely(shader
&& shader
->NumImages
)) {
282 for (unsigned j
= 0; j
< shader
->NumImages
; j
++) {
283 struct gl_image_unit
*u
= &ctx
->ImageUnits
[shader
->ImageUnits
[j
]];
284 tex_obj
= intel_texture_object(u
->TexObj
);
286 if (tex_obj
&& tex_obj
->mt
) {
287 /* Access to images is implemented using indirect messages
288 * against data port. Normal render target write understands
289 * lossless compression but unfortunately the typed/untyped
290 * read/write interface doesn't. Therefore even lossless
291 * compressed surfaces need to be resolved prior to accessing
292 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
294 intel_miptree_resolve_color(brw
, tex_obj
->mt
, 0);
296 if (intel_miptree_is_lossless_compressed(brw
, tex_obj
->mt
) &&
297 intel_disable_rb_aux_buffer(brw
, tex_obj
->mt
->bo
)) {
298 perf_debug("Using renderbuffer as shader image - turning "
299 "off lossless compression");
302 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
308 /* Resolve color buffers for non-coherent framebuffer fetch. */
309 if (!ctx
->Extensions
.MESA_shader_framebuffer_fetch
&&
310 ctx
->FragmentProgram
._Current
&&
311 ctx
->FragmentProgram
._Current
->info
.outputs_read
) {
312 const struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
314 for (unsigned i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
315 const struct intel_renderbuffer
*irb
=
316 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
319 intel_miptree_resolve_color(brw
, irb
->mt
,
320 INTEL_MIPTREE_IGNORE_CCS_E
))
321 brw_render_cache_set_check_flush(brw
, irb
->mt
->bo
);
325 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
326 * single-sampled color renderbuffers because the CCS buffer isn't
327 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
328 * enabled because otherwise the surface state will be programmed with the
329 * linear equivalent format anyway.
331 if (brw
->gen
>= 9 && ctx
->Color
.sRGBEnabled
) {
332 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
333 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
334 struct gl_renderbuffer
*rb
= fb
->_ColorDrawBuffers
[i
];
339 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
340 struct intel_mipmap_tree
*mt
= irb
->mt
;
343 mt
->num_samples
> 1 ||
344 _mesa_get_srgb_format_linear(mt
->format
) == mt
->format
)
347 /* Lossless compression is not supported for SRGB formats, it
348 * should be impossible to get here with such surfaces.
350 assert(!intel_miptree_is_lossless_compressed(brw
, mt
));
351 intel_miptree_resolve_color(brw
, mt
, 0);
352 brw_render_cache_set_check_flush(brw
, mt
->bo
);
356 _mesa_lock_context_textures(ctx
);
358 if (new_state
& _NEW_BUFFERS
) {
359 intel_update_framebuffer(ctx
, ctx
->DrawBuffer
);
360 if (ctx
->DrawBuffer
!= ctx
->ReadBuffer
)
361 intel_update_framebuffer(ctx
, ctx
->ReadBuffer
);
365 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
368 intel_flush_front(struct gl_context
*ctx
)
370 struct brw_context
*brw
= brw_context(ctx
);
371 __DRIcontext
*driContext
= brw
->driContext
;
372 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
373 __DRIscreen
*const dri_screen
= brw
->screen
->driScrnPriv
;
375 if (brw
->front_buffer_dirty
&& _mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
376 if (flushFront(dri_screen
) && driDrawable
&&
377 driDrawable
->loaderPrivate
) {
379 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
381 * This potentially resolves both front and back buffer. It
382 * is unnecessary to resolve the back, but harms nothing except
383 * performance. And no one cares about front-buffer render
386 intel_resolve_for_dri2_flush(brw
, driDrawable
);
387 intel_batchbuffer_flush(brw
);
389 flushFront(dri_screen
)(driDrawable
, driDrawable
->loaderPrivate
);
391 /* We set the dirty bit in intel_prepare_render() if we're
392 * front buffer rendering once we get there.
394 brw
->front_buffer_dirty
= false;
400 intel_glFlush(struct gl_context
*ctx
)
402 struct brw_context
*brw
= brw_context(ctx
);
404 intel_batchbuffer_flush(brw
);
405 intel_flush_front(ctx
);
407 brw
->need_flush_throttle
= true;
411 intel_finish(struct gl_context
* ctx
)
413 struct brw_context
*brw
= brw_context(ctx
);
417 if (brw
->batch
.last_bo
)
418 drm_intel_bo_wait_rendering(brw
->batch
.last_bo
);
422 brw_init_driver_functions(struct brw_context
*brw
,
423 struct dd_function_table
*functions
)
425 _mesa_init_driver_functions(functions
);
427 /* GLX uses DRI2 invalidate events to handle window resizing.
428 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
429 * which doesn't provide a mechanism for snooping the event queues.
431 * So EGL still relies on viewport hacks to handle window resizing.
432 * This should go away with DRI3000.
434 if (!brw
->driContext
->driScreenPriv
->dri2
.useInvalidate
)
435 functions
->Viewport
= intel_viewport
;
437 functions
->Flush
= intel_glFlush
;
438 functions
->Finish
= intel_finish
;
439 functions
->GetString
= intel_get_string
;
440 functions
->UpdateState
= intel_update_state
;
442 intelInitTextureFuncs(functions
);
443 intelInitTextureImageFuncs(functions
);
444 intelInitTextureSubImageFuncs(functions
);
445 intelInitTextureCopyImageFuncs(functions
);
446 intelInitCopyImageFuncs(functions
);
447 intelInitClearFuncs(functions
);
448 intelInitBufferFuncs(functions
);
449 intelInitPixelFuncs(functions
);
450 intelInitBufferObjectFuncs(functions
);
451 brw_init_syncobj_functions(functions
);
452 brw_init_object_purgeable_functions(functions
);
454 brwInitFragProgFuncs( functions
);
455 brw_init_common_queryobj_functions(functions
);
456 if (brw
->gen
>= 8 || brw
->is_haswell
)
457 hsw_init_queryobj_functions(functions
);
458 else if (brw
->gen
>= 6)
459 gen6_init_queryobj_functions(functions
);
461 gen4_init_queryobj_functions(functions
);
462 brw_init_compute_functions(functions
);
464 brw_init_conditional_render_functions(functions
);
466 functions
->QueryInternalFormat
= brw_query_internal_format
;
468 functions
->NewTransformFeedback
= brw_new_transform_feedback
;
469 functions
->DeleteTransformFeedback
= brw_delete_transform_feedback
;
470 if (brw
->screen
->has_mi_math_and_lrr
) {
471 functions
->BeginTransformFeedback
= hsw_begin_transform_feedback
;
472 functions
->EndTransformFeedback
= hsw_end_transform_feedback
;
473 functions
->PauseTransformFeedback
= hsw_pause_transform_feedback
;
474 functions
->ResumeTransformFeedback
= hsw_resume_transform_feedback
;
475 } else if (brw
->gen
>= 7) {
476 functions
->BeginTransformFeedback
= gen7_begin_transform_feedback
;
477 functions
->EndTransformFeedback
= gen7_end_transform_feedback
;
478 functions
->PauseTransformFeedback
= gen7_pause_transform_feedback
;
479 functions
->ResumeTransformFeedback
= gen7_resume_transform_feedback
;
480 functions
->GetTransformFeedbackVertexCount
=
481 brw_get_transform_feedback_vertex_count
;
483 functions
->BeginTransformFeedback
= brw_begin_transform_feedback
;
484 functions
->EndTransformFeedback
= brw_end_transform_feedback
;
488 functions
->GetSamplePosition
= gen6_get_sample_position
;
492 brw_initialize_context_constants(struct brw_context
*brw
)
494 struct gl_context
*ctx
= &brw
->ctx
;
495 const struct brw_compiler
*compiler
= brw
->screen
->compiler
;
497 const bool stage_exists
[MESA_SHADER_STAGES
] = {
498 [MESA_SHADER_VERTEX
] = true,
499 [MESA_SHADER_TESS_CTRL
] = brw
->gen
>= 7,
500 [MESA_SHADER_TESS_EVAL
] = brw
->gen
>= 7,
501 [MESA_SHADER_GEOMETRY
] = brw
->gen
>= 6,
502 [MESA_SHADER_FRAGMENT
] = true,
503 [MESA_SHADER_COMPUTE
] =
504 ((ctx
->API
== API_OPENGL_COMPAT
|| ctx
->API
== API_OPENGL_CORE
) &&
505 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 1024) ||
506 (ctx
->API
== API_OPENGLES2
&&
507 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 128) ||
508 _mesa_extension_override_enables
.ARB_compute_shader
,
511 unsigned num_stages
= 0;
512 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
517 unsigned max_samplers
=
518 brw
->gen
>= 8 || brw
->is_haswell
? BRW_MAX_TEX_UNIT
: 16;
520 ctx
->Const
.MaxDualSourceDrawBuffers
= 1;
521 ctx
->Const
.MaxDrawBuffers
= BRW_MAX_DRAW_BUFFERS
;
522 ctx
->Const
.MaxCombinedShaderOutputResources
=
523 MAX_IMAGE_UNITS
+ BRW_MAX_DRAW_BUFFERS
;
525 ctx
->Const
.QueryCounterBits
.Timestamp
= 36;
527 ctx
->Const
.MaxTextureCoordUnits
= 8; /* Mesa limit */
528 ctx
->Const
.MaxImageUnits
= MAX_IMAGE_UNITS
;
529 ctx
->Const
.MaxRenderbufferSize
= 8192;
530 ctx
->Const
.MaxTextureLevels
= MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS
);
531 ctx
->Const
.Max3DTextureLevels
= 12; /* 2048 */
532 ctx
->Const
.MaxCubeTextureLevels
= 14; /* 8192 */
533 ctx
->Const
.MaxArrayTextureLayers
= brw
->gen
>= 7 ? 2048 : 512;
534 ctx
->Const
.MaxTextureMbytes
= 1536;
535 ctx
->Const
.MaxTextureRectSize
= 1 << 12;
536 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
537 ctx
->Const
.StripTextureBorder
= true;
539 ctx
->Const
.MaxProgramTextureGatherComponents
= 4;
540 else if (brw
->gen
== 6)
541 ctx
->Const
.MaxProgramTextureGatherComponents
= 1;
543 ctx
->Const
.MaxUniformBlockSize
= 65536;
545 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
546 struct gl_program_constants
*prog
= &ctx
->Const
.Program
[i
];
548 if (!stage_exists
[i
])
551 prog
->MaxTextureImageUnits
= max_samplers
;
553 prog
->MaxUniformBlocks
= BRW_MAX_UBO
;
554 prog
->MaxCombinedUniformComponents
=
555 prog
->MaxUniformComponents
+
556 ctx
->Const
.MaxUniformBlockSize
/ 4 * prog
->MaxUniformBlocks
;
558 prog
->MaxAtomicCounters
= MAX_ATOMIC_COUNTERS
;
559 prog
->MaxAtomicBuffers
= BRW_MAX_ABO
;
560 prog
->MaxImageUniforms
= compiler
->scalar_stage
[i
] ? BRW_MAX_IMAGES
: 0;
561 prog
->MaxShaderStorageBlocks
= BRW_MAX_SSBO
;
564 ctx
->Const
.MaxTextureUnits
=
565 MIN2(ctx
->Const
.MaxTextureCoordUnits
,
566 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
);
568 ctx
->Const
.MaxUniformBufferBindings
= num_stages
* BRW_MAX_UBO
;
569 ctx
->Const
.MaxCombinedUniformBlocks
= num_stages
* BRW_MAX_UBO
;
570 ctx
->Const
.MaxCombinedAtomicBuffers
= num_stages
* BRW_MAX_ABO
;
571 ctx
->Const
.MaxCombinedShaderStorageBlocks
= num_stages
* BRW_MAX_SSBO
;
572 ctx
->Const
.MaxShaderStorageBufferBindings
= num_stages
* BRW_MAX_SSBO
;
573 ctx
->Const
.MaxCombinedTextureImageUnits
= num_stages
* max_samplers
;
574 ctx
->Const
.MaxCombinedImageUniforms
= num_stages
* BRW_MAX_IMAGES
;
577 /* Hardware only supports a limited number of transform feedback buffers.
578 * So we need to override the Mesa default (which is based only on software
581 ctx
->Const
.MaxTransformFeedbackBuffers
= BRW_MAX_SOL_BUFFERS
;
583 /* On Gen6, in the worst case, we use up one binding table entry per
584 * transform feedback component (see comments above the definition of
585 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
586 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
587 * BRW_MAX_SOL_BINDINGS.
589 * In "separate components" mode, we need to divide this value by
590 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
591 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
593 ctx
->Const
.MaxTransformFeedbackInterleavedComponents
= BRW_MAX_SOL_BINDINGS
;
594 ctx
->Const
.MaxTransformFeedbackSeparateComponents
=
595 BRW_MAX_SOL_BINDINGS
/ BRW_MAX_SOL_BUFFERS
;
597 ctx
->Const
.AlwaysUseGetTransformFeedbackVertexCount
=
598 !brw
->screen
->has_mi_math_and_lrr
;
601 const int *msaa_modes
= intel_supported_msaa_modes(brw
->screen
);
602 const int clamp_max_samples
=
603 driQueryOptioni(&brw
->optionCache
, "clamp_max_samples");
605 if (clamp_max_samples
< 0) {
606 max_samples
= msaa_modes
[0];
608 /* Select the largest supported MSAA mode that does not exceed
612 for (int i
= 0; msaa_modes
[i
] != 0; ++i
) {
613 if (msaa_modes
[i
] <= clamp_max_samples
) {
614 max_samples
= msaa_modes
[i
];
620 ctx
->Const
.MaxSamples
= max_samples
;
621 ctx
->Const
.MaxColorTextureSamples
= max_samples
;
622 ctx
->Const
.MaxDepthTextureSamples
= max_samples
;
623 ctx
->Const
.MaxIntegerSamples
= max_samples
;
624 ctx
->Const
.MaxImageSamples
= 0;
626 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
627 * to map indices of rectangular grid to sample numbers within a pixel.
628 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
629 * extension implementation. For more details see the comment above
630 * gen6_set_sample_maps() definition.
632 gen6_set_sample_maps(ctx
);
634 ctx
->Const
.MinLineWidth
= 1.0;
635 ctx
->Const
.MinLineWidthAA
= 1.0;
637 ctx
->Const
.MaxLineWidth
= 7.375;
638 ctx
->Const
.MaxLineWidthAA
= 7.375;
639 ctx
->Const
.LineWidthGranularity
= 0.125;
641 ctx
->Const
.MaxLineWidth
= 7.0;
642 ctx
->Const
.MaxLineWidthAA
= 7.0;
643 ctx
->Const
.LineWidthGranularity
= 0.5;
646 /* For non-antialiased lines, we have to round the line width to the
647 * nearest whole number. Make sure that we don't advertise a line
648 * width that, when rounded, will be beyond the actual hardware
651 assert(roundf(ctx
->Const
.MaxLineWidth
) <= ctx
->Const
.MaxLineWidth
);
653 ctx
->Const
.MinPointSize
= 1.0;
654 ctx
->Const
.MinPointSizeAA
= 1.0;
655 ctx
->Const
.MaxPointSize
= 255.0;
656 ctx
->Const
.MaxPointSizeAA
= 255.0;
657 ctx
->Const
.PointSizeGranularity
= 1.0;
659 if (brw
->gen
>= 5 || brw
->is_g4x
)
660 ctx
->Const
.MaxClipPlanes
= 8;
662 ctx
->Const
.LowerTessLevel
= true;
663 ctx
->Const
.LowerTCSPatchVerticesIn
= brw
->gen
>= 8;
664 ctx
->Const
.LowerTESPatchVerticesIn
= true;
665 ctx
->Const
.PrimitiveRestartForPatches
= true;
667 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeInstructions
= 16 * 1024;
668 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxAluInstructions
= 0;
669 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexInstructions
= 0;
670 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexIndirections
= 0;
671 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAluInstructions
= 0;
672 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexInstructions
= 0;
673 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexIndirections
= 0;
674 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAttribs
= 16;
675 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTemps
= 256;
676 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAddressRegs
= 1;
677 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
= 1024;
678 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
=
679 MIN2(ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
,
680 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
);
682 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeInstructions
= 1024;
683 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAluInstructions
= 1024;
684 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexInstructions
= 1024;
685 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexIndirections
= 1024;
686 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAttribs
= 12;
687 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTemps
= 256;
688 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAddressRegs
= 0;
689 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
= 1024;
690 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
=
691 MIN2(ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
,
692 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
);
694 /* Fragment shaders use real, 32-bit twos-complement integers for all
697 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMin
= 31;
698 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMax
= 30;
699 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.Precision
= 0;
700 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
701 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
703 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMin
= 31;
704 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMax
= 30;
705 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.Precision
= 0;
706 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
707 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
709 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
710 * but we're not sure how it's actually done for vertex order,
711 * that affect provoking vertex decision. Always use last vertex
712 * convention for quad primitive which works as expected for now.
715 ctx
->Const
.QuadsFollowProvokingVertexConvention
= false;
717 ctx
->Const
.NativeIntegers
= true;
718 ctx
->Const
.VertexID_is_zero_based
= true;
720 /* Regarding the CMP instruction, the Ivybridge PRM says:
722 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
723 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
724 * 0xFFFFFFFF) is assigned to dst."
726 * but PRMs for earlier generations say
728 * "In dword format, one GRF may store up to 8 results. When the register
729 * is used later as a vector of Booleans, as only LSB at each channel
730 * contains meaning [sic] data, software should make sure all higher bits
731 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
733 * We select the representation of a true boolean uniform to be ~0, and fix
734 * the results of Gen <= 5 CMP instruction's with -(result & 1).
736 ctx
->Const
.UniformBooleanTrue
= ~0;
738 /* From the gen4 PRM, volume 4 page 127:
740 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
741 * the base address of the first element of the surface, computed in
742 * software by adding the surface base address to the byte offset of
743 * the element in the buffer."
745 * However, unaligned accesses are slower, so enforce buffer alignment.
747 ctx
->Const
.UniformBufferOffsetAlignment
= 16;
749 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
750 * that we can safely have the CPU and GPU writing the same SSBO on
751 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
752 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
753 * be updating disjoint regions of the buffer simultaneously and that will
754 * break if the regions overlap the same cacheline.
756 ctx
->Const
.ShaderStorageBufferOffsetAlignment
= 64;
757 ctx
->Const
.TextureBufferOffsetAlignment
= 16;
758 ctx
->Const
.MaxTextureBufferSize
= 128 * 1024 * 1024;
761 ctx
->Const
.MaxVarying
= 32;
762 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxOutputComponents
= 128;
763 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxInputComponents
= 64;
764 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxOutputComponents
= 128;
765 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxInputComponents
= 128;
766 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxInputComponents
= 128;
767 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxOutputComponents
= 128;
768 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxInputComponents
= 128;
769 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxOutputComponents
= 128;
772 /* We want the GLSL compiler to emit code that uses condition codes */
773 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
774 ctx
->Const
.ShaderCompilerOptions
[i
] =
775 brw
->screen
->compiler
->glsl_compiler_options
[i
];
779 ctx
->Const
.MaxViewportWidth
= 32768;
780 ctx
->Const
.MaxViewportHeight
= 32768;
783 /* ARB_viewport_array, OES_viewport_array */
784 if ((brw
->gen
>= 6 && ctx
->API
== API_OPENGL_CORE
) ||
785 (brw
->gen
>= 8 && ctx
->API
== API_OPENGLES2
)) {
786 ctx
->Const
.MaxViewports
= GEN6_NUM_VIEWPORTS
;
787 ctx
->Const
.ViewportSubpixelBits
= 0;
789 /* Cast to float before negating because MaxViewportWidth is unsigned.
791 ctx
->Const
.ViewportBounds
.Min
= -(float)ctx
->Const
.MaxViewportWidth
;
792 ctx
->Const
.ViewportBounds
.Max
= ctx
->Const
.MaxViewportWidth
;
795 /* ARB_gpu_shader5 */
797 ctx
->Const
.MaxVertexStreams
= MIN2(4, MAX_VERTEX_STREAMS
);
799 /* ARB_framebuffer_no_attachments */
800 ctx
->Const
.MaxFramebufferWidth
= 16384;
801 ctx
->Const
.MaxFramebufferHeight
= 16384;
802 ctx
->Const
.MaxFramebufferLayers
= ctx
->Const
.MaxArrayTextureLayers
;
803 ctx
->Const
.MaxFramebufferSamples
= max_samples
;
805 /* OES_primitive_bounding_box */
806 ctx
->Const
.NoPrimitiveBoundingBoxOutput
= true;
810 brw_initialize_cs_context_constants(struct brw_context
*brw
)
812 struct gl_context
*ctx
= &brw
->ctx
;
813 const struct intel_screen
*screen
= brw
->screen
;
814 struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
816 /* FINISHME: Do this for all platforms that the kernel supports */
817 if (brw
->is_cherryview
&&
818 screen
->subslice_total
> 0 && screen
->eu_total
> 0) {
819 /* Logical CS threads = EUs per subslice * 7 threads per EU */
820 uint32_t max_cs_threads
= screen
->eu_total
/ screen
->subslice_total
* 7;
822 /* Fuse configurations may give more threads than expected, never less. */
823 if (max_cs_threads
> devinfo
->max_cs_threads
)
824 devinfo
->max_cs_threads
= max_cs_threads
;
827 /* Maximum number of scalar compute shader invocations that can be run in
828 * parallel in the same subslice assuming SIMD32 dispatch.
830 * We don't advertise more than 64 threads, because we are limited to 64 by
831 * our usage of thread_width_max in the gpgpu walker command. This only
832 * currently impacts Haswell, which otherwise might be able to advertise 70
833 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
834 * required the number of invocation needed for ARB_compute_shader.
836 const unsigned max_threads
= MIN2(64, devinfo
->max_cs_threads
);
837 const uint32_t max_invocations
= 32 * max_threads
;
838 ctx
->Const
.MaxComputeWorkGroupSize
[0] = max_invocations
;
839 ctx
->Const
.MaxComputeWorkGroupSize
[1] = max_invocations
;
840 ctx
->Const
.MaxComputeWorkGroupSize
[2] = max_invocations
;
841 ctx
->Const
.MaxComputeWorkGroupInvocations
= max_invocations
;
842 ctx
->Const
.MaxComputeSharedMemorySize
= 64 * 1024;
846 * Process driconf (drirc) options, setting appropriate context flags.
848 * intelInitExtensions still pokes at optionCache directly, in order to
849 * avoid advertising various extensions. No flags are set, so it makes
850 * sense to continue doing that there.
853 brw_process_driconf_options(struct brw_context
*brw
)
855 struct gl_context
*ctx
= &brw
->ctx
;
857 driOptionCache
*options
= &brw
->optionCache
;
858 driParseConfigFiles(options
, &brw
->screen
->optionCache
,
859 brw
->driContext
->driScreenPriv
->myNum
, "i965");
861 int bo_reuse_mode
= driQueryOptioni(options
, "bo_reuse");
862 switch (bo_reuse_mode
) {
863 case DRI_CONF_BO_REUSE_DISABLED
:
865 case DRI_CONF_BO_REUSE_ALL
:
866 intel_bufmgr_gem_enable_reuse(brw
->bufmgr
);
870 if (!driQueryOptionb(options
, "hiz")) {
871 brw
->has_hiz
= false;
872 /* On gen6, you can only do separate stencil with HIZ. */
874 brw
->has_separate_stencil
= false;
877 if (driQueryOptionb(options
, "always_flush_batch")) {
878 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
879 brw
->always_flush_batch
= true;
882 if (driQueryOptionb(options
, "always_flush_cache")) {
883 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
884 brw
->always_flush_cache
= true;
887 if (driQueryOptionb(options
, "disable_throttling")) {
888 fprintf(stderr
, "disabling flush throttling\n");
889 brw
->disable_throttling
= true;
892 brw
->precompile
= driQueryOptionb(&brw
->optionCache
, "shader_precompile");
894 if (driQueryOptionb(&brw
->optionCache
, "precise_trig"))
895 brw
->screen
->compiler
->precise_trig
= true;
897 ctx
->Const
.ForceGLSLExtensionsWarn
=
898 driQueryOptionb(options
, "force_glsl_extensions_warn");
900 ctx
->Const
.DisableGLSLLineContinuations
=
901 driQueryOptionb(options
, "disable_glsl_line_continuations");
903 ctx
->Const
.AllowGLSLExtensionDirectiveMidShader
=
904 driQueryOptionb(options
, "allow_glsl_extension_directive_midshader");
906 ctx
->Const
.GLSLZeroInit
= driQueryOptionb(options
, "glsl_zero_init");
908 brw
->dual_color_blend_by_location
=
909 driQueryOptionb(options
, "dual_color_blend_by_location");
913 brwCreateContext(gl_api api
,
914 const struct gl_config
*mesaVis
,
915 __DRIcontext
*driContextPriv
,
916 unsigned major_version
,
917 unsigned minor_version
,
920 unsigned *dri_ctx_error
,
921 void *sharedContextPrivate
)
923 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
924 struct intel_screen
*screen
= driContextPriv
->driScreenPriv
->driverPrivate
;
925 const struct gen_device_info
*devinfo
= &screen
->devinfo
;
926 struct dd_function_table functions
;
928 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
929 * provides us with context reset notifications.
931 uint32_t allowed_flags
= __DRI_CTX_FLAG_DEBUG
932 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
;
934 if (screen
->has_context_reset_notification
)
935 allowed_flags
|= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
;
937 if (flags
& ~allowed_flags
) {
938 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
942 struct brw_context
*brw
= rzalloc(NULL
, struct brw_context
);
944 fprintf(stderr
, "%s: failed to alloc context\n", __func__
);
945 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
949 driContextPriv
->driverPrivate
= brw
;
950 brw
->driContext
= driContextPriv
;
951 brw
->screen
= screen
;
952 brw
->bufmgr
= screen
->bufmgr
;
954 brw
->gen
= devinfo
->gen
;
955 brw
->gt
= devinfo
->gt
;
956 brw
->is_g4x
= devinfo
->is_g4x
;
957 brw
->is_baytrail
= devinfo
->is_baytrail
;
958 brw
->is_haswell
= devinfo
->is_haswell
;
959 brw
->is_cherryview
= devinfo
->is_cherryview
;
960 brw
->is_broxton
= devinfo
->is_broxton
;
961 brw
->has_llc
= devinfo
->has_llc
;
962 brw
->has_hiz
= devinfo
->has_hiz_and_separate_stencil
;
963 brw
->has_separate_stencil
= devinfo
->has_hiz_and_separate_stencil
;
964 brw
->has_pln
= devinfo
->has_pln
;
965 brw
->has_compr4
= devinfo
->has_compr4
;
966 brw
->has_surface_tile_offset
= devinfo
->has_surface_tile_offset
;
967 brw
->has_negative_rhw_bug
= devinfo
->has_negative_rhw_bug
;
968 brw
->needs_unlit_centroid_workaround
=
969 devinfo
->needs_unlit_centroid_workaround
;
971 brw
->must_use_separate_stencil
= devinfo
->must_use_separate_stencil
;
972 brw
->has_swizzling
= screen
->hw_has_swizzling
;
974 isl_device_init(&brw
->isl_dev
, devinfo
, screen
->hw_has_swizzling
);
976 brw
->vs
.base
.stage
= MESA_SHADER_VERTEX
;
977 brw
->tcs
.base
.stage
= MESA_SHADER_TESS_CTRL
;
978 brw
->tes
.base
.stage
= MESA_SHADER_TESS_EVAL
;
979 brw
->gs
.base
.stage
= MESA_SHADER_GEOMETRY
;
980 brw
->wm
.base
.stage
= MESA_SHADER_FRAGMENT
;
982 gen8_init_vtable_surface_functions(brw
);
983 brw
->vtbl
.emit_depth_stencil_hiz
= gen8_emit_depth_stencil_hiz
;
984 } else if (brw
->gen
>= 7) {
985 gen7_init_vtable_surface_functions(brw
);
986 brw
->vtbl
.emit_depth_stencil_hiz
= gen7_emit_depth_stencil_hiz
;
987 } else if (brw
->gen
>= 6) {
988 gen6_init_vtable_surface_functions(brw
);
989 brw
->vtbl
.emit_depth_stencil_hiz
= gen6_emit_depth_stencil_hiz
;
991 gen4_init_vtable_surface_functions(brw
);
992 brw
->vtbl
.emit_depth_stencil_hiz
= brw_emit_depth_stencil_hiz
;
995 brw_init_driver_functions(brw
, &functions
);
998 functions
.GetGraphicsResetStatus
= brw_get_graphics_reset_status
;
1000 struct gl_context
*ctx
= &brw
->ctx
;
1002 if (!_mesa_initialize_context(ctx
, api
, mesaVis
, shareCtx
, &functions
)) {
1003 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1004 fprintf(stderr
, "%s: failed to init mesa context\n", __func__
);
1005 intelDestroyContext(driContextPriv
);
1009 driContextSetFlags(ctx
, flags
);
1011 /* Initialize the software rasterizer and helper modules.
1013 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1014 * software fallbacks (which we have to support on legacy GL to do weird
1015 * glDrawPixels(), glBitmap(), and other functions).
1017 if (api
!= API_OPENGL_CORE
&& api
!= API_OPENGLES2
) {
1018 _swrast_CreateContext(ctx
);
1021 _vbo_CreateContext(ctx
);
1022 if (ctx
->swrast_context
) {
1023 _tnl_CreateContext(ctx
);
1024 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= _tnl_run_pipeline
;
1025 _swsetup_CreateContext(ctx
);
1027 /* Configure swrast to match hardware characteristics: */
1028 _swrast_allow_pixel_fog(ctx
, false);
1029 _swrast_allow_vertex_fog(ctx
, true);
1032 _mesa_meta_init(ctx
);
1034 brw_process_driconf_options(brw
);
1036 if (INTEL_DEBUG
& DEBUG_PERF
)
1037 brw
->perf_debug
= true;
1039 brw_initialize_cs_context_constants(brw
);
1040 brw_initialize_context_constants(brw
);
1042 ctx
->Const
.ResetStrategy
= notify_reset
1043 ? GL_LOSE_CONTEXT_ON_RESET_ARB
: GL_NO_RESET_NOTIFICATION_ARB
;
1045 /* Reinitialize the context point state. It depends on ctx->Const values. */
1046 _mesa_init_point(ctx
);
1048 intel_fbo_init(brw
);
1050 intel_batchbuffer_init(brw
);
1052 if (brw
->gen
>= 6) {
1053 /* Create a new hardware context. Using a hardware context means that
1054 * our GPU state will be saved/restored on context switch, allowing us
1055 * to assume that the GPU is in the same state we left it in.
1057 * This is required for transform feedback buffer offsets, query objects,
1058 * and also allows us to reduce how much state we have to emit.
1060 brw
->hw_ctx
= drm_intel_gem_context_create(brw
->bufmgr
);
1063 fprintf(stderr
, "Gen6+ requires Kernel 3.6 or later.\n");
1064 intelDestroyContext(driContextPriv
);
1069 if (brw_init_pipe_control(brw
, devinfo
)) {
1070 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1071 intelDestroyContext(driContextPriv
);
1075 brw_init_state(brw
);
1077 intelInitExtensions(ctx
);
1079 brw_init_surface_formats(brw
);
1082 brw_blorp_init(brw
);
1084 brw
->urb
.size
= devinfo
->urb
.size
;
1087 brw
->urb
.gs_present
= false;
1089 brw
->prim_restart
.in_progress
= false;
1090 brw
->prim_restart
.enable_cut_index
= false;
1091 brw
->gs
.enabled
= false;
1092 brw
->sf
.viewport_transform_enable
= true;
1093 brw
->clip
.viewport_count
= 1;
1095 brw
->predicate
.state
= BRW_PREDICATE_STATE_RENDER
;
1097 brw
->max_gtt_map_object_size
= screen
->max_gtt_map_object_size
;
1099 brw
->use_resource_streamer
= screen
->has_resource_streamer
&&
1100 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1101 env_var_as_boolean("INTEL_USE_GATHER", false));
1103 ctx
->VertexProgram
._MaintainTnlProgram
= true;
1104 ctx
->FragmentProgram
._MaintainTexEnvProgram
= true;
1106 brw_draw_init( brw
);
1108 if ((flags
& __DRI_CTX_FLAG_DEBUG
) != 0) {
1109 /* Turn on some extra GL_ARB_debug_output generation. */
1110 brw
->perf_debug
= true;
1113 if ((flags
& __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
) != 0) {
1114 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB
;
1115 ctx
->Const
.RobustAccess
= GL_TRUE
;
1118 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
1119 brw_init_shader_time(brw
);
1121 _mesa_compute_version(ctx
);
1123 _mesa_initialize_dispatch_tables(ctx
);
1124 _mesa_initialize_vbo_vtxfmt(ctx
);
1126 if (ctx
->Extensions
.AMD_performance_monitor
) {
1127 brw_init_performance_monitors(brw
);
1130 vbo_use_buffer_objects(ctx
);
1131 vbo_always_unmap_buffers(ctx
);
1137 intelDestroyContext(__DRIcontext
* driContextPriv
)
1139 struct brw_context
*brw
=
1140 (struct brw_context
*) driContextPriv
->driverPrivate
;
1141 struct gl_context
*ctx
= &brw
->ctx
;
1143 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1144 if (INTEL_DEBUG
& DEBUG_AUB
) {
1145 intel_batchbuffer_flush(brw
);
1146 aub_dump_bmp(&brw
->ctx
);
1149 _mesa_meta_free(&brw
->ctx
);
1151 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
1152 /* Force a report. */
1153 brw
->shader_time
.report_time
= 0;
1155 brw_collect_and_report_shader_time(brw
);
1156 brw_destroy_shader_time(brw
);
1160 blorp_finish(&brw
->blorp
);
1162 brw_destroy_state(brw
);
1163 brw_draw_destroy(brw
);
1165 drm_intel_bo_unreference(brw
->curbe
.curbe_bo
);
1166 if (brw
->vs
.base
.scratch_bo
)
1167 drm_intel_bo_unreference(brw
->vs
.base
.scratch_bo
);
1168 if (brw
->tcs
.base
.scratch_bo
)
1169 drm_intel_bo_unreference(brw
->tcs
.base
.scratch_bo
);
1170 if (brw
->tes
.base
.scratch_bo
)
1171 drm_intel_bo_unreference(brw
->tes
.base
.scratch_bo
);
1172 if (brw
->gs
.base
.scratch_bo
)
1173 drm_intel_bo_unreference(brw
->gs
.base
.scratch_bo
);
1174 if (brw
->wm
.base
.scratch_bo
)
1175 drm_intel_bo_unreference(brw
->wm
.base
.scratch_bo
);
1177 gen7_reset_hw_bt_pool_offsets(brw
);
1178 drm_intel_bo_unreference(brw
->hw_bt_pool
.bo
);
1179 brw
->hw_bt_pool
.bo
= NULL
;
1181 drm_intel_gem_context_destroy(brw
->hw_ctx
);
1183 if (ctx
->swrast_context
) {
1184 _swsetup_DestroyContext(&brw
->ctx
);
1185 _tnl_DestroyContext(&brw
->ctx
);
1187 _vbo_DestroyContext(&brw
->ctx
);
1189 if (ctx
->swrast_context
)
1190 _swrast_DestroyContext(&brw
->ctx
);
1192 brw_fini_pipe_control(brw
);
1193 intel_batchbuffer_free(brw
);
1195 drm_intel_bo_unreference(brw
->throttle_batch
[1]);
1196 drm_intel_bo_unreference(brw
->throttle_batch
[0]);
1197 brw
->throttle_batch
[1] = NULL
;
1198 brw
->throttle_batch
[0] = NULL
;
1200 driDestroyOptionCache(&brw
->optionCache
);
1202 /* free the Mesa context */
1203 _mesa_free_context_data(&brw
->ctx
);
1206 driContextPriv
->driverPrivate
= NULL
;
1210 intelUnbindContext(__DRIcontext
* driContextPriv
)
1212 /* Unset current context and dispath table */
1213 _mesa_make_current(NULL
, NULL
, NULL
);
1219 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1220 * on window system framebuffers.
1222 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1223 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1224 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1225 * for a visual where you're guaranteed to be capable, but it turns out that
1226 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1227 * incapable ones, because there's no difference between the two in resources
1228 * used. Applications thus get built that accidentally rely on the default
1229 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1232 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1233 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1234 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1235 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1236 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1237 * and get no sRGB encode (assuming that both kinds of visual are available).
1238 * Thus our choice to support sRGB by default on our visuals for desktop would
1239 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1241 * Unfortunately, renderbuffer setup happens before a context is created. So
1242 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1243 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1244 * yet), we go turn that back off before anyone finds out.
1247 intel_gles3_srgb_workaround(struct brw_context
*brw
,
1248 struct gl_framebuffer
*fb
)
1250 struct gl_context
*ctx
= &brw
->ctx
;
1252 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
1255 /* Some day when we support the sRGB capable bit on visuals available for
1256 * GLES, we'll need to respect that and not disable things here.
1258 fb
->Visual
.sRGBCapable
= false;
1259 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
1260 struct gl_renderbuffer
*rb
= fb
->Attachment
[i
].Renderbuffer
;
1262 rb
->Format
= _mesa_get_srgb_format_linear(rb
->Format
);
1267 intelMakeCurrent(__DRIcontext
* driContextPriv
,
1268 __DRIdrawable
* driDrawPriv
,
1269 __DRIdrawable
* driReadPriv
)
1271 struct brw_context
*brw
;
1272 GET_CURRENT_CONTEXT(curCtx
);
1275 brw
= (struct brw_context
*) driContextPriv
->driverPrivate
;
1279 /* According to the glXMakeCurrent() man page: "Pending commands to
1280 * the previous context, if any, are flushed before it is released."
1281 * But only flush if we're actually changing contexts.
1283 if (brw_context(curCtx
) && brw_context(curCtx
) != brw
) {
1284 _mesa_flush(curCtx
);
1287 if (driContextPriv
) {
1288 struct gl_context
*ctx
= &brw
->ctx
;
1289 struct gl_framebuffer
*fb
, *readFb
;
1291 if (driDrawPriv
== NULL
) {
1292 fb
= _mesa_get_incomplete_framebuffer();
1294 fb
= driDrawPriv
->driverPrivate
;
1295 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1298 if (driReadPriv
== NULL
) {
1299 readFb
= _mesa_get_incomplete_framebuffer();
1301 readFb
= driReadPriv
->driverPrivate
;
1302 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1305 /* The sRGB workaround changes the renderbuffer's format. We must change
1306 * the format before the renderbuffer's miptree get's allocated, otherwise
1307 * the formats of the renderbuffer and its miptree will differ.
1309 intel_gles3_srgb_workaround(brw
, fb
);
1310 intel_gles3_srgb_workaround(brw
, readFb
);
1312 /* If the context viewport hasn't been initialized, force a call out to
1313 * the loader to get buffers so we have a drawable size for the initial
1315 if (!brw
->ctx
.ViewportInitialized
)
1316 intel_prepare_render(brw
);
1318 _mesa_make_current(ctx
, fb
, readFb
);
1320 _mesa_make_current(NULL
, NULL
, NULL
);
1327 intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1328 __DRIdrawable
*drawable
)
1331 /* MSAA and fast color clear are not supported, so don't waste time
1332 * checking whether a resolve is needed.
1337 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1338 struct intel_renderbuffer
*rb
;
1340 /* Usually, only the back buffer will need to be downsampled. However,
1341 * the front buffer will also need it if the user has rendered into it.
1343 static const gl_buffer_index buffers
[2] = {
1348 for (int i
= 0; i
< 2; ++i
) {
1349 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
1350 if (rb
== NULL
|| rb
->mt
== NULL
)
1352 if (rb
->mt
->num_samples
<= 1)
1353 intel_miptree_resolve_color(brw
, rb
->mt
, 0);
1355 intel_renderbuffer_downsample(brw
, rb
);
1360 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
1362 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
1366 intel_query_dri2_buffers(struct brw_context
*brw
,
1367 __DRIdrawable
*drawable
,
1368 __DRIbuffer
**buffers
,
1372 intel_process_dri2_buffer(struct brw_context
*brw
,
1373 __DRIdrawable
*drawable
,
1374 __DRIbuffer
*buffer
,
1375 struct intel_renderbuffer
*rb
,
1376 const char *buffer_name
);
1379 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
);
1382 intel_update_dri2_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1384 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1385 struct intel_renderbuffer
*rb
;
1386 __DRIbuffer
*buffers
= NULL
;
1388 const char *region_name
;
1390 /* Set this up front, so that in case our buffers get invalidated
1391 * while we're getting new buffers, we don't clobber the stamp and
1392 * thus ignore the invalidate. */
1393 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1395 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1396 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1398 intel_query_dri2_buffers(brw
, drawable
, &buffers
, &count
);
1400 if (buffers
== NULL
)
1403 for (i
= 0; i
< count
; i
++) {
1404 switch (buffers
[i
].attachment
) {
1405 case __DRI_BUFFER_FRONT_LEFT
:
1406 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1407 region_name
= "dri2 front buffer";
1410 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
1411 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1412 region_name
= "dri2 fake front buffer";
1415 case __DRI_BUFFER_BACK_LEFT
:
1416 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1417 region_name
= "dri2 back buffer";
1420 case __DRI_BUFFER_DEPTH
:
1421 case __DRI_BUFFER_HIZ
:
1422 case __DRI_BUFFER_DEPTH_STENCIL
:
1423 case __DRI_BUFFER_STENCIL
:
1424 case __DRI_BUFFER_ACCUM
:
1427 "unhandled buffer attach event, attachment type %d\n",
1428 buffers
[i
].attachment
);
1432 intel_process_dri2_buffer(brw
, drawable
, &buffers
[i
], rb
, region_name
);
1438 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
1440 struct brw_context
*brw
= context
->driverPrivate
;
1441 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1443 /* Set this up front, so that in case our buffers get invalidated
1444 * while we're getting new buffers, we don't clobber the stamp and
1445 * thus ignore the invalidate. */
1446 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1448 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1449 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1451 if (dri_screen
->image
.loader
)
1452 intel_update_image_buffers(brw
, drawable
);
1454 intel_update_dri2_buffers(brw
, drawable
);
1456 driUpdateFramebufferSize(&brw
->ctx
, drawable
);
1460 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1461 * state is required.
1464 intel_prepare_render(struct brw_context
*brw
)
1466 struct gl_context
*ctx
= &brw
->ctx
;
1467 __DRIcontext
*driContext
= brw
->driContext
;
1468 __DRIdrawable
*drawable
;
1470 drawable
= driContext
->driDrawablePriv
;
1471 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
1472 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1473 intel_update_renderbuffers(driContext
, drawable
);
1474 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
1477 drawable
= driContext
->driReadablePriv
;
1478 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
1479 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1480 intel_update_renderbuffers(driContext
, drawable
);
1481 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
1484 /* If we're currently rendering to the front buffer, the rendering
1485 * that will happen next will probably dirty the front buffer. So
1486 * mark it as dirty here.
1488 if (_mesa_is_front_buffer_drawing(ctx
->DrawBuffer
))
1489 brw
->front_buffer_dirty
= true;
1493 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1495 * To determine which DRI buffers to request, examine the renderbuffers
1496 * attached to the drawable's framebuffer. Then request the buffers with
1497 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1499 * This is called from intel_update_renderbuffers().
1501 * \param drawable Drawable whose buffers are queried.
1502 * \param buffers [out] List of buffers returned by DRI2 query.
1503 * \param buffer_count [out] Number of buffers returned.
1505 * \see intel_update_renderbuffers()
1506 * \see DRI2GetBuffers()
1507 * \see DRI2GetBuffersWithFormat()
1510 intel_query_dri2_buffers(struct brw_context
*brw
,
1511 __DRIdrawable
*drawable
,
1512 __DRIbuffer
**buffers
,
1515 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1516 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1518 unsigned attachments
[8];
1520 struct intel_renderbuffer
*front_rb
;
1521 struct intel_renderbuffer
*back_rb
;
1523 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1524 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1526 memset(attachments
, 0, sizeof(attachments
));
1527 if ((_mesa_is_front_buffer_drawing(fb
) ||
1528 _mesa_is_front_buffer_reading(fb
) ||
1529 !back_rb
) && front_rb
) {
1530 /* If a fake front buffer is in use, then querying for
1531 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1532 * the real front buffer to the fake front buffer. So before doing the
1533 * query, we need to make sure all the pending drawing has landed in the
1534 * real front buffer.
1536 intel_batchbuffer_flush(brw
);
1537 intel_flush_front(&brw
->ctx
);
1539 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1540 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1541 } else if (front_rb
&& brw
->front_buffer_dirty
) {
1542 /* We have pending front buffer rendering, but we aren't querying for a
1543 * front buffer. If the front buffer we have is a fake front buffer,
1544 * the X server is going to throw it away when it processes the query.
1545 * So before doing the query, make sure all the pending drawing has
1546 * landed in the real front buffer.
1548 intel_batchbuffer_flush(brw
);
1549 intel_flush_front(&brw
->ctx
);
1553 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1554 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1557 assert(i
<= ARRAY_SIZE(attachments
));
1560 dri_screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1565 drawable
->loaderPrivate
);
1569 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1571 * This is called from intel_update_renderbuffers().
1574 * DRI buffers whose attachment point is DRI2BufferStencil or
1575 * DRI2BufferDepthStencil are handled as special cases.
1577 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1578 * that is passed to drm_intel_bo_gem_create_from_name().
1580 * \see intel_update_renderbuffers()
1583 intel_process_dri2_buffer(struct brw_context
*brw
,
1584 __DRIdrawable
*drawable
,
1585 __DRIbuffer
*buffer
,
1586 struct intel_renderbuffer
*rb
,
1587 const char *buffer_name
)
1589 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1595 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1597 /* We try to avoid closing and reopening the same BO name, because the first
1598 * use of a mapping of the buffer involves a bunch of page faulting which is
1599 * moderately expensive.
1601 struct intel_mipmap_tree
*last_mt
;
1602 if (num_samples
== 0)
1605 last_mt
= rb
->singlesample_mt
;
1607 uint32_t old_name
= 0;
1609 /* The bo already has a name because the miptree was created by a
1610 * previous call to intel_process_dri2_buffer(). If a bo already has a
1611 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1612 * create a new name.
1614 drm_intel_bo_flink(last_mt
->bo
, &old_name
);
1617 if (old_name
== buffer
->name
)
1620 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1622 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1623 buffer
->name
, buffer
->attachment
,
1624 buffer
->cpp
, buffer
->pitch
);
1627 bo
= drm_intel_bo_gem_create_from_name(brw
->bufmgr
, buffer_name
,
1631 "Failed to open BO for returned DRI2 buffer "
1632 "(%dx%d, %s, named %d).\n"
1633 "This is likely a bug in the X Server that will lead to a "
1635 drawable
->w
, drawable
->h
, buffer_name
, buffer
->name
);
1639 intel_update_winsys_renderbuffer_miptree(brw
, rb
, bo
,
1640 drawable
->w
, drawable
->h
,
1643 if (_mesa_is_front_buffer_drawing(fb
) &&
1644 (buffer
->attachment
== __DRI_BUFFER_FRONT_LEFT
||
1645 buffer
->attachment
== __DRI_BUFFER_FAKE_FRONT_LEFT
) &&
1646 rb
->Base
.Base
.NumSamples
> 1) {
1647 intel_renderbuffer_upsample(brw
, rb
);
1652 drm_intel_bo_unreference(bo
);
1656 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1658 * To determine which DRI buffers to request, examine the renderbuffers
1659 * attached to the drawable's framebuffer. Then request the buffers from
1662 * This is called from intel_update_renderbuffers().
1664 * \param drawable Drawable whose buffers are queried.
1665 * \param buffers [out] List of buffers returned by DRI2 query.
1666 * \param buffer_count [out] Number of buffers returned.
1668 * \see intel_update_renderbuffers()
1672 intel_update_image_buffer(struct brw_context
*intel
,
1673 __DRIdrawable
*drawable
,
1674 struct intel_renderbuffer
*rb
,
1676 enum __DRIimageBufferMask buffer_type
)
1678 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1680 if (!rb
|| !buffer
->bo
)
1683 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1685 /* Check and see if we're already bound to the right
1688 struct intel_mipmap_tree
*last_mt
;
1689 if (num_samples
== 0)
1692 last_mt
= rb
->singlesample_mt
;
1694 if (last_mt
&& last_mt
->bo
== buffer
->bo
)
1697 intel_update_winsys_renderbuffer_miptree(intel
, rb
, buffer
->bo
,
1698 buffer
->width
, buffer
->height
,
1701 if (_mesa_is_front_buffer_drawing(fb
) &&
1702 buffer_type
== __DRI_IMAGE_BUFFER_FRONT
&&
1703 rb
->Base
.Base
.NumSamples
> 1) {
1704 intel_renderbuffer_upsample(intel
, rb
);
1709 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1711 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1712 __DRIscreen
*dri_screen
= brw
->screen
->driScrnPriv
;
1713 struct intel_renderbuffer
*front_rb
;
1714 struct intel_renderbuffer
*back_rb
;
1715 struct __DRIimageList images
;
1716 unsigned int format
;
1717 uint32_t buffer_mask
= 0;
1720 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1721 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1724 format
= intel_rb_format(back_rb
);
1726 format
= intel_rb_format(front_rb
);
1730 if (front_rb
&& (_mesa_is_front_buffer_drawing(fb
) ||
1731 _mesa_is_front_buffer_reading(fb
) || !back_rb
)) {
1732 buffer_mask
|= __DRI_IMAGE_BUFFER_FRONT
;
1736 buffer_mask
|= __DRI_IMAGE_BUFFER_BACK
;
1738 ret
= dri_screen
->image
.loader
->getBuffers(drawable
,
1739 driGLFormatToImageFormat(format
),
1740 &drawable
->dri2
.stamp
,
1741 drawable
->loaderPrivate
,
1747 if (images
.image_mask
& __DRI_IMAGE_BUFFER_FRONT
) {
1748 drawable
->w
= images
.front
->width
;
1749 drawable
->h
= images
.front
->height
;
1750 intel_update_image_buffer(brw
,
1754 __DRI_IMAGE_BUFFER_FRONT
);
1756 if (images
.image_mask
& __DRI_IMAGE_BUFFER_BACK
) {
1757 drawable
->w
= images
.back
->width
;
1758 drawable
->h
= images
.back
->height
;
1759 intel_update_image_buffer(brw
,
1763 __DRI_IMAGE_BUFFER_BACK
);