2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **********************************************************************/
30 * Keith Whitwell <keithw@vmware.com>
34 #include "main/api_exec.h"
35 #include "main/context.h"
36 #include "main/fbobject.h"
37 #include "main/extensions.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
40 #include "main/points.h"
41 #include "main/version.h"
42 #include "main/vtxfmt.h"
43 #include "main/texobj.h"
44 #include "main/framebuffer.h"
46 #include "vbo/vbo_context.h"
48 #include "drivers/common/driverfuncs.h"
49 #include "drivers/common/meta.h"
52 #include "brw_context.h"
53 #include "brw_defines.h"
54 #include "brw_compiler.h"
56 #include "brw_state.h"
58 #include "intel_batchbuffer.h"
59 #include "intel_buffer_objects.h"
60 #include "intel_buffers.h"
61 #include "intel_fbo.h"
62 #include "intel_mipmap_tree.h"
63 #include "intel_pixel.h"
64 #include "intel_image.h"
65 #include "intel_tex.h"
66 #include "intel_tex_obj.h"
68 #include "swrast_setup/swrast_setup.h"
70 #include "tnl/t_pipeline.h"
71 #include "util/ralloc.h"
72 #include "util/debug.h"
75 /***************************************
76 * Mesa's Driver Functions
77 ***************************************/
79 const char *const brw_vendor_string
= "Intel Open Source Technology Center";
82 get_bsw_model(const struct intel_screen
*intelScreen
)
84 switch (intelScreen
->eu_total
) {
95 brw_get_renderer_string(const struct intel_screen
*intelScreen
)
98 static char buffer
[128];
101 switch (intelScreen
->deviceID
) {
103 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
104 #include "pci_ids/i965_pci_ids.h"
106 chipset
= "Unknown Intel Chipset";
110 /* Braswell branding is funny, so we have to fix it up here */
111 if (intelScreen
->deviceID
== 0x22B1) {
112 bsw
= strdup(chipset
);
113 char *needle
= strstr(bsw
, "XXX");
115 memcpy(needle
, get_bsw_model(intelScreen
), 3);
120 (void) driGetRendererString(buffer
, chipset
, 0);
125 static const GLubyte
*
126 intel_get_string(struct gl_context
* ctx
, GLenum name
)
128 const struct brw_context
*const brw
= brw_context(ctx
);
132 return (GLubyte
*) brw_vendor_string
;
136 (GLubyte
*) brw_get_renderer_string(brw
->intelScreen
);
144 intel_viewport(struct gl_context
*ctx
)
146 struct brw_context
*brw
= brw_context(ctx
);
147 __DRIcontext
*driContext
= brw
->driContext
;
149 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
150 if (driContext
->driDrawablePriv
)
151 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
152 if (driContext
->driReadablePriv
)
153 dri2InvalidateDrawable(driContext
->driReadablePriv
);
158 intel_update_framebuffer(struct gl_context
*ctx
,
159 struct gl_framebuffer
*fb
)
161 struct brw_context
*brw
= brw_context(ctx
);
163 /* Quantize the derived default number of samples
165 fb
->DefaultGeometry
._NumSamples
=
166 intel_quantize_num_samples(brw
->intelScreen
,
167 fb
->DefaultGeometry
.NumSamples
);
170 /* On Gen9 color buffers may be compressed by the hardware (lossless
171 * compression). There are, however, format restrictions and care needs to be
172 * taken that the sampler engine is capable for re-interpreting a buffer with
173 * format different the buffer was originally written with.
175 * For example, SRGB formats are not compressible and the sampler engine isn't
176 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
177 * color buffer needs to be resolved so that the sampling surface can be
178 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
182 intel_texture_view_requires_resolve(struct brw_context
*brw
,
183 struct intel_texture_object
*intel_tex
)
186 !intel_miptree_is_lossless_compressed(brw
, intel_tex
->mt
))
189 const uint32_t brw_format
= brw_format_for_mesa_format(intel_tex
->_Format
);
191 if (isl_format_supports_lossless_compression(brw
->intelScreen
->devinfo
,
195 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
196 _mesa_get_format_name(intel_tex
->_Format
),
197 _mesa_get_format_name(intel_tex
->mt
->format
));
203 intel_update_state(struct gl_context
* ctx
, GLuint new_state
)
205 struct brw_context
*brw
= brw_context(ctx
);
206 struct intel_texture_object
*tex_obj
;
207 struct intel_renderbuffer
*depth_irb
;
209 if (ctx
->swrast_context
)
210 _swrast_InvalidateState(ctx
, new_state
);
211 _vbo_InvalidateState(ctx
, new_state
);
213 brw
->NewGLState
|= new_state
;
215 _mesa_unlock_context_textures(ctx
);
217 /* Resolve the depth buffer's HiZ buffer. */
218 depth_irb
= intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_DEPTH
);
220 intel_renderbuffer_resolve_hiz(brw
, depth_irb
);
222 /* Resolve depth buffer and render cache of each enabled texture. */
223 int maxEnabledUnit
= ctx
->Texture
._MaxEnabledTexImageUnit
;
224 for (int i
= 0; i
<= maxEnabledUnit
; i
++) {
225 if (!ctx
->Texture
.Unit
[i
]._Current
)
227 tex_obj
= intel_texture_object(ctx
->Texture
.Unit
[i
]._Current
);
228 if (!tex_obj
|| !tex_obj
->mt
)
230 intel_miptree_all_slices_resolve_depth(brw
, tex_obj
->mt
);
231 /* Sampling engine understands lossless compression and resolving
232 * those surfaces should be skipped for performance reasons.
234 const int flags
= intel_texture_view_requires_resolve(brw
, tex_obj
) ?
235 0 : INTEL_MIPTREE_IGNORE_CCS_E
;
236 intel_miptree_resolve_color(brw
, tex_obj
->mt
, flags
);
237 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
239 if (tex_obj
->base
.StencilSampling
||
240 tex_obj
->mt
->format
== MESA_FORMAT_S_UINT8
) {
241 intel_update_r8stencil(brw
, tex_obj
->mt
);
245 /* Resolve color for each active shader image. */
246 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
247 const struct gl_linked_shader
*shader
=
248 ctx
->_Shader
->CurrentProgram
[i
] ?
249 ctx
->_Shader
->CurrentProgram
[i
]->_LinkedShaders
[i
] : NULL
;
251 if (unlikely(shader
&& shader
->NumImages
)) {
252 for (unsigned j
= 0; j
< shader
->NumImages
; j
++) {
253 struct gl_image_unit
*u
= &ctx
->ImageUnits
[shader
->ImageUnits
[j
]];
254 tex_obj
= intel_texture_object(u
->TexObj
);
256 if (tex_obj
&& tex_obj
->mt
) {
257 /* Access to images is implemented using indirect messages
258 * against data port. Normal render target write understands
259 * lossless compression but unfortunately the typed/untyped
260 * read/write interface doesn't. Therefore the compressed
261 * surfaces need to be resolved prior to accessing them.
263 intel_miptree_resolve_color(brw
, tex_obj
->mt
, 0);
264 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
270 /* Resolve color buffers for non-coherent framebufer fetch. */
271 if (!ctx
->Extensions
.MESA_shader_framebuffer_fetch
&&
272 ctx
->FragmentProgram
._Current
&&
273 ctx
->FragmentProgram
._Current
->Base
.OutputsRead
) {
274 const struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
276 for (unsigned i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
277 const struct intel_renderbuffer
*irb
=
278 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
281 intel_miptree_resolve_color(brw
, irb
->mt
,
282 INTEL_MIPTREE_IGNORE_CCS_E
))
283 brw_render_cache_set_check_flush(brw
, irb
->mt
->bo
);
287 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
288 * single-sampled color renderbuffers because the CCS buffer isn't
289 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
290 * enabled because otherwise the surface state will be programmed with the
291 * linear equivalent format anyway.
293 if (brw
->gen
>= 9 && ctx
->Color
.sRGBEnabled
) {
294 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
295 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
296 struct gl_renderbuffer
*rb
= fb
->_ColorDrawBuffers
[i
];
301 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
302 struct intel_mipmap_tree
*mt
= irb
->mt
;
305 mt
->num_samples
> 1 ||
306 _mesa_get_srgb_format_linear(mt
->format
) == mt
->format
)
309 /* Lossless compression is not supported for SRGB formats, it
310 * should be impossible to get here with such surfaces.
312 assert(!intel_miptree_is_lossless_compressed(brw
, mt
));
313 intel_miptree_resolve_color(brw
, mt
, 0);
314 brw_render_cache_set_check_flush(brw
, mt
->bo
);
318 _mesa_lock_context_textures(ctx
);
320 if (new_state
& _NEW_BUFFERS
) {
321 intel_update_framebuffer(ctx
, ctx
->DrawBuffer
);
322 if (ctx
->DrawBuffer
!= ctx
->ReadBuffer
)
323 intel_update_framebuffer(ctx
, ctx
->ReadBuffer
);
327 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
330 intel_flush_front(struct gl_context
*ctx
)
332 struct brw_context
*brw
= brw_context(ctx
);
333 __DRIcontext
*driContext
= brw
->driContext
;
334 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
335 __DRIscreen
*const screen
= brw
->intelScreen
->driScrnPriv
;
337 if (brw
->front_buffer_dirty
&& _mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
338 if (flushFront(screen
) && driDrawable
&&
339 driDrawable
->loaderPrivate
) {
341 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
343 * This potentially resolves both front and back buffer. It
344 * is unnecessary to resolve the back, but harms nothing except
345 * performance. And no one cares about front-buffer render
348 intel_resolve_for_dri2_flush(brw
, driDrawable
);
349 intel_batchbuffer_flush(brw
);
351 flushFront(screen
)(driDrawable
, driDrawable
->loaderPrivate
);
353 /* We set the dirty bit in intel_prepare_render() if we're
354 * front buffer rendering once we get there.
356 brw
->front_buffer_dirty
= false;
362 intel_glFlush(struct gl_context
*ctx
)
364 struct brw_context
*brw
= brw_context(ctx
);
366 intel_batchbuffer_flush(brw
);
367 intel_flush_front(ctx
);
369 brw
->need_flush_throttle
= true;
373 intel_finish(struct gl_context
* ctx
)
375 struct brw_context
*brw
= brw_context(ctx
);
379 if (brw
->batch
.last_bo
)
380 drm_intel_bo_wait_rendering(brw
->batch
.last_bo
);
384 brw_init_driver_functions(struct brw_context
*brw
,
385 struct dd_function_table
*functions
)
387 _mesa_init_driver_functions(functions
);
389 /* GLX uses DRI2 invalidate events to handle window resizing.
390 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
391 * which doesn't provide a mechanism for snooping the event queues.
393 * So EGL still relies on viewport hacks to handle window resizing.
394 * This should go away with DRI3000.
396 if (!brw
->driContext
->driScreenPriv
->dri2
.useInvalidate
)
397 functions
->Viewport
= intel_viewport
;
399 functions
->Flush
= intel_glFlush
;
400 functions
->Finish
= intel_finish
;
401 functions
->GetString
= intel_get_string
;
402 functions
->UpdateState
= intel_update_state
;
404 intelInitTextureFuncs(functions
);
405 intelInitTextureImageFuncs(functions
);
406 intelInitTextureSubImageFuncs(functions
);
407 intelInitTextureCopyImageFuncs(functions
);
408 intelInitCopyImageFuncs(functions
);
409 intelInitClearFuncs(functions
);
410 intelInitBufferFuncs(functions
);
411 intelInitPixelFuncs(functions
);
412 intelInitBufferObjectFuncs(functions
);
413 intel_init_syncobj_functions(functions
);
414 brw_init_object_purgeable_functions(functions
);
416 brwInitFragProgFuncs( functions
);
417 brw_init_common_queryobj_functions(functions
);
418 if (brw
->gen
>= 8 || brw
->is_haswell
)
419 hsw_init_queryobj_functions(functions
);
420 else if (brw
->gen
>= 6)
421 gen6_init_queryobj_functions(functions
);
423 gen4_init_queryobj_functions(functions
);
424 brw_init_compute_functions(functions
);
426 brw_init_conditional_render_functions(functions
);
428 functions
->QueryInternalFormat
= brw_query_internal_format
;
430 functions
->NewTransformFeedback
= brw_new_transform_feedback
;
431 functions
->DeleteTransformFeedback
= brw_delete_transform_feedback
;
432 if (brw
->intelScreen
->has_mi_math_and_lrr
) {
433 functions
->BeginTransformFeedback
= hsw_begin_transform_feedback
;
434 functions
->EndTransformFeedback
= hsw_end_transform_feedback
;
435 functions
->PauseTransformFeedback
= hsw_pause_transform_feedback
;
436 functions
->ResumeTransformFeedback
= hsw_resume_transform_feedback
;
437 } else if (brw
->gen
>= 7) {
438 functions
->BeginTransformFeedback
= gen7_begin_transform_feedback
;
439 functions
->EndTransformFeedback
= gen7_end_transform_feedback
;
440 functions
->PauseTransformFeedback
= gen7_pause_transform_feedback
;
441 functions
->ResumeTransformFeedback
= gen7_resume_transform_feedback
;
442 functions
->GetTransformFeedbackVertexCount
=
443 brw_get_transform_feedback_vertex_count
;
445 functions
->BeginTransformFeedback
= brw_begin_transform_feedback
;
446 functions
->EndTransformFeedback
= brw_end_transform_feedback
;
450 functions
->GetSamplePosition
= gen6_get_sample_position
;
454 brw_initialize_context_constants(struct brw_context
*brw
)
456 struct gl_context
*ctx
= &brw
->ctx
;
457 const struct brw_compiler
*compiler
= brw
->intelScreen
->compiler
;
459 const bool stage_exists
[MESA_SHADER_STAGES
] = {
460 [MESA_SHADER_VERTEX
] = true,
461 [MESA_SHADER_TESS_CTRL
] = brw
->gen
>= 7,
462 [MESA_SHADER_TESS_EVAL
] = brw
->gen
>= 7,
463 [MESA_SHADER_GEOMETRY
] = brw
->gen
>= 6,
464 [MESA_SHADER_FRAGMENT
] = true,
465 [MESA_SHADER_COMPUTE
] =
466 (ctx
->API
== API_OPENGL_CORE
&&
467 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 1024) ||
468 (ctx
->API
== API_OPENGLES2
&&
469 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 128) ||
470 _mesa_extension_override_enables
.ARB_compute_shader
,
473 unsigned num_stages
= 0;
474 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
479 unsigned max_samplers
=
480 brw
->gen
>= 8 || brw
->is_haswell
? BRW_MAX_TEX_UNIT
: 16;
482 ctx
->Const
.MaxDualSourceDrawBuffers
= 1;
483 ctx
->Const
.MaxDrawBuffers
= BRW_MAX_DRAW_BUFFERS
;
484 ctx
->Const
.MaxCombinedShaderOutputResources
=
485 MAX_IMAGE_UNITS
+ BRW_MAX_DRAW_BUFFERS
;
487 ctx
->Const
.QueryCounterBits
.Timestamp
= 36;
489 ctx
->Const
.MaxTextureCoordUnits
= 8; /* Mesa limit */
490 ctx
->Const
.MaxImageUnits
= MAX_IMAGE_UNITS
;
491 ctx
->Const
.MaxRenderbufferSize
= 8192;
492 ctx
->Const
.MaxTextureLevels
= MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS
);
494 /* On Sandy Bridge and prior, the "Render Target View Extent" field of
495 * RENDER_SURFACE_STATE is only 9 bits so the largest 3-D texture we can do
496 * a layered render into has a depth of 512. On Iron Lake and earlier, we
497 * don't support layered rendering and we use manual offsetting to render
498 * into the different layers so this doesn't matter. On Sandy Bridge,
499 * however, we do support layered rendering so this is a problem.
501 ctx
->Const
.Max3DTextureLevels
= brw
->gen
== 6 ? 10 /* 512 */ : 12; /* 2048 */
503 ctx
->Const
.MaxCubeTextureLevels
= 14; /* 8192 */
504 ctx
->Const
.MaxArrayTextureLayers
= brw
->gen
>= 7 ? 2048 : 512;
505 ctx
->Const
.MaxTextureMbytes
= 1536;
506 ctx
->Const
.MaxTextureRectSize
= 1 << 12;
507 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
508 ctx
->Const
.StripTextureBorder
= true;
510 ctx
->Const
.MaxProgramTextureGatherComponents
= 4;
511 else if (brw
->gen
== 6)
512 ctx
->Const
.MaxProgramTextureGatherComponents
= 1;
514 ctx
->Const
.MaxUniformBlockSize
= 65536;
516 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
517 struct gl_program_constants
*prog
= &ctx
->Const
.Program
[i
];
519 if (!stage_exists
[i
])
522 prog
->MaxTextureImageUnits
= max_samplers
;
524 prog
->MaxUniformBlocks
= BRW_MAX_UBO
;
525 prog
->MaxCombinedUniformComponents
=
526 prog
->MaxUniformComponents
+
527 ctx
->Const
.MaxUniformBlockSize
/ 4 * prog
->MaxUniformBlocks
;
529 prog
->MaxAtomicCounters
= MAX_ATOMIC_COUNTERS
;
530 prog
->MaxAtomicBuffers
= BRW_MAX_ABO
;
531 prog
->MaxImageUniforms
= compiler
->scalar_stage
[i
] ? BRW_MAX_IMAGES
: 0;
532 prog
->MaxShaderStorageBlocks
= BRW_MAX_SSBO
;
535 ctx
->Const
.MaxTextureUnits
=
536 MIN2(ctx
->Const
.MaxTextureCoordUnits
,
537 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
);
539 ctx
->Const
.MaxUniformBufferBindings
= num_stages
* BRW_MAX_UBO
;
540 ctx
->Const
.MaxCombinedUniformBlocks
= num_stages
* BRW_MAX_UBO
;
541 ctx
->Const
.MaxCombinedAtomicBuffers
= num_stages
* BRW_MAX_ABO
;
542 ctx
->Const
.MaxCombinedShaderStorageBlocks
= num_stages
* BRW_MAX_SSBO
;
543 ctx
->Const
.MaxShaderStorageBufferBindings
= num_stages
* BRW_MAX_SSBO
;
544 ctx
->Const
.MaxCombinedTextureImageUnits
= num_stages
* max_samplers
;
545 ctx
->Const
.MaxCombinedImageUniforms
= num_stages
* BRW_MAX_IMAGES
;
548 /* Hardware only supports a limited number of transform feedback buffers.
549 * So we need to override the Mesa default (which is based only on software
552 ctx
->Const
.MaxTransformFeedbackBuffers
= BRW_MAX_SOL_BUFFERS
;
554 /* On Gen6, in the worst case, we use up one binding table entry per
555 * transform feedback component (see comments above the definition of
556 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
557 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
558 * BRW_MAX_SOL_BINDINGS.
560 * In "separate components" mode, we need to divide this value by
561 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
562 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
564 ctx
->Const
.MaxTransformFeedbackInterleavedComponents
= BRW_MAX_SOL_BINDINGS
;
565 ctx
->Const
.MaxTransformFeedbackSeparateComponents
=
566 BRW_MAX_SOL_BINDINGS
/ BRW_MAX_SOL_BUFFERS
;
568 ctx
->Const
.AlwaysUseGetTransformFeedbackVertexCount
=
569 !brw
->intelScreen
->has_mi_math_and_lrr
;
572 const int *msaa_modes
= intel_supported_msaa_modes(brw
->intelScreen
);
573 const int clamp_max_samples
=
574 driQueryOptioni(&brw
->optionCache
, "clamp_max_samples");
576 if (clamp_max_samples
< 0) {
577 max_samples
= msaa_modes
[0];
579 /* Select the largest supported MSAA mode that does not exceed
583 for (int i
= 0; msaa_modes
[i
] != 0; ++i
) {
584 if (msaa_modes
[i
] <= clamp_max_samples
) {
585 max_samples
= msaa_modes
[i
];
591 ctx
->Const
.MaxSamples
= max_samples
;
592 ctx
->Const
.MaxColorTextureSamples
= max_samples
;
593 ctx
->Const
.MaxDepthTextureSamples
= max_samples
;
594 ctx
->Const
.MaxIntegerSamples
= max_samples
;
595 ctx
->Const
.MaxImageSamples
= 0;
597 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
598 * to map indices of rectangular grid to sample numbers within a pixel.
599 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
600 * extension implementation. For more details see the comment above
601 * gen6_set_sample_maps() definition.
603 gen6_set_sample_maps(ctx
);
605 ctx
->Const
.MinLineWidth
= 1.0;
606 ctx
->Const
.MinLineWidthAA
= 1.0;
608 ctx
->Const
.MaxLineWidth
= 7.375;
609 ctx
->Const
.MaxLineWidthAA
= 7.375;
610 ctx
->Const
.LineWidthGranularity
= 0.125;
612 ctx
->Const
.MaxLineWidth
= 7.0;
613 ctx
->Const
.MaxLineWidthAA
= 7.0;
614 ctx
->Const
.LineWidthGranularity
= 0.5;
617 /* For non-antialiased lines, we have to round the line width to the
618 * nearest whole number. Make sure that we don't advertise a line
619 * width that, when rounded, will be beyond the actual hardware
622 assert(roundf(ctx
->Const
.MaxLineWidth
) <= ctx
->Const
.MaxLineWidth
);
624 ctx
->Const
.MinPointSize
= 1.0;
625 ctx
->Const
.MinPointSizeAA
= 1.0;
626 ctx
->Const
.MaxPointSize
= 255.0;
627 ctx
->Const
.MaxPointSizeAA
= 255.0;
628 ctx
->Const
.PointSizeGranularity
= 1.0;
630 if (brw
->gen
>= 5 || brw
->is_g4x
)
631 ctx
->Const
.MaxClipPlanes
= 8;
633 ctx
->Const
.LowerTessLevel
= true;
634 ctx
->Const
.LowerTCSPatchVerticesIn
= brw
->gen
>= 8;
635 ctx
->Const
.LowerTESPatchVerticesIn
= true;
636 ctx
->Const
.PrimitiveRestartForPatches
= true;
638 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeInstructions
= 16 * 1024;
639 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxAluInstructions
= 0;
640 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexInstructions
= 0;
641 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexIndirections
= 0;
642 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAluInstructions
= 0;
643 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexInstructions
= 0;
644 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexIndirections
= 0;
645 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAttribs
= 16;
646 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTemps
= 256;
647 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAddressRegs
= 1;
648 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
= 1024;
649 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
=
650 MIN2(ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
,
651 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
);
653 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeInstructions
= 1024;
654 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAluInstructions
= 1024;
655 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexInstructions
= 1024;
656 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexIndirections
= 1024;
657 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAttribs
= 12;
658 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTemps
= 256;
659 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAddressRegs
= 0;
660 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
= 1024;
661 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
=
662 MIN2(ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
,
663 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
);
665 /* Fragment shaders use real, 32-bit twos-complement integers for all
668 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMin
= 31;
669 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMax
= 30;
670 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.Precision
= 0;
671 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
672 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
674 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMin
= 31;
675 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMax
= 30;
676 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.Precision
= 0;
677 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
678 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
680 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
681 * but we're not sure how it's actually done for vertex order,
682 * that affect provoking vertex decision. Always use last vertex
683 * convention for quad primitive which works as expected for now.
686 ctx
->Const
.QuadsFollowProvokingVertexConvention
= false;
688 ctx
->Const
.NativeIntegers
= true;
689 ctx
->Const
.VertexID_is_zero_based
= true;
691 /* Regarding the CMP instruction, the Ivybridge PRM says:
693 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
694 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
695 * 0xFFFFFFFF) is assigned to dst."
697 * but PRMs for earlier generations say
699 * "In dword format, one GRF may store up to 8 results. When the register
700 * is used later as a vector of Booleans, as only LSB at each channel
701 * contains meaning [sic] data, software should make sure all higher bits
702 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
704 * We select the representation of a true boolean uniform to be ~0, and fix
705 * the results of Gen <= 5 CMP instruction's with -(result & 1).
707 ctx
->Const
.UniformBooleanTrue
= ~0;
709 /* From the gen4 PRM, volume 4 page 127:
711 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
712 * the base address of the first element of the surface, computed in
713 * software by adding the surface base address to the byte offset of
714 * the element in the buffer."
716 * However, unaligned accesses are slower, so enforce buffer alignment.
718 ctx
->Const
.UniformBufferOffsetAlignment
= 16;
720 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
721 * that we can safely have the CPU and GPU writing the same SSBO on
722 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
723 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
724 * be updating disjoint regions of the buffer simultaneously and that will
725 * break if the regions overlap the same cacheline.
727 ctx
->Const
.ShaderStorageBufferOffsetAlignment
= 64;
728 ctx
->Const
.TextureBufferOffsetAlignment
= 16;
729 ctx
->Const
.MaxTextureBufferSize
= 128 * 1024 * 1024;
732 ctx
->Const
.MaxVarying
= 32;
733 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxOutputComponents
= 128;
734 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxInputComponents
= 64;
735 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxOutputComponents
= 128;
736 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxInputComponents
= 128;
737 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxInputComponents
= 128;
738 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxOutputComponents
= 128;
739 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxInputComponents
= 128;
740 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxOutputComponents
= 128;
743 /* We want the GLSL compiler to emit code that uses condition codes */
744 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
745 ctx
->Const
.ShaderCompilerOptions
[i
] =
746 brw
->intelScreen
->compiler
->glsl_compiler_options
[i
];
750 ctx
->Const
.MaxViewportWidth
= 32768;
751 ctx
->Const
.MaxViewportHeight
= 32768;
754 /* ARB_viewport_array */
755 if (brw
->gen
>= 6 && ctx
->API
== API_OPENGL_CORE
) {
756 ctx
->Const
.MaxViewports
= GEN6_NUM_VIEWPORTS
;
757 ctx
->Const
.ViewportSubpixelBits
= 0;
759 /* Cast to float before negating because MaxViewportWidth is unsigned.
761 ctx
->Const
.ViewportBounds
.Min
= -(float)ctx
->Const
.MaxViewportWidth
;
762 ctx
->Const
.ViewportBounds
.Max
= ctx
->Const
.MaxViewportWidth
;
765 /* ARB_gpu_shader5 */
767 ctx
->Const
.MaxVertexStreams
= MIN2(4, MAX_VERTEX_STREAMS
);
769 /* ARB_framebuffer_no_attachments */
770 ctx
->Const
.MaxFramebufferWidth
= 16384;
771 ctx
->Const
.MaxFramebufferHeight
= 16384;
772 ctx
->Const
.MaxFramebufferLayers
= ctx
->Const
.MaxArrayTextureLayers
;
773 ctx
->Const
.MaxFramebufferSamples
= max_samples
;
777 brw_initialize_cs_context_constants(struct brw_context
*brw
)
779 struct gl_context
*ctx
= &brw
->ctx
;
780 const struct intel_screen
*screen
= brw
->intelScreen
;
781 const struct brw_device_info
*devinfo
= screen
->devinfo
;
783 /* FINISHME: Do this for all platforms that the kernel supports */
784 if (brw
->is_cherryview
&&
785 screen
->subslice_total
> 0 && screen
->eu_total
> 0) {
786 /* Logical CS threads = EUs per subslice * 7 threads per EU */
787 brw
->max_cs_threads
= screen
->eu_total
/ screen
->subslice_total
* 7;
789 /* Fuse configurations may give more threads than expected, never less. */
790 if (brw
->max_cs_threads
< devinfo
->max_cs_threads
)
791 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
793 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
796 /* Maximum number of scalar compute shader invocations that can be run in
797 * parallel in the same subslice assuming SIMD32 dispatch.
799 * We don't advertise more than 64 threads, because we are limited to 64 by
800 * our usage of thread_width_max in the gpgpu walker command. This only
801 * currently impacts Haswell, which otherwise might be able to advertise 70
802 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
803 * required the number of invocation needed for ARB_compute_shader.
805 const unsigned max_threads
= MIN2(64, brw
->max_cs_threads
);
806 const uint32_t max_invocations
= 32 * max_threads
;
807 ctx
->Const
.MaxComputeWorkGroupSize
[0] = max_invocations
;
808 ctx
->Const
.MaxComputeWorkGroupSize
[1] = max_invocations
;
809 ctx
->Const
.MaxComputeWorkGroupSize
[2] = max_invocations
;
810 ctx
->Const
.MaxComputeWorkGroupInvocations
= max_invocations
;
811 ctx
->Const
.MaxComputeSharedMemorySize
= 64 * 1024;
815 * Process driconf (drirc) options, setting appropriate context flags.
817 * intelInitExtensions still pokes at optionCache directly, in order to
818 * avoid advertising various extensions. No flags are set, so it makes
819 * sense to continue doing that there.
822 brw_process_driconf_options(struct brw_context
*brw
)
824 struct gl_context
*ctx
= &brw
->ctx
;
826 driOptionCache
*options
= &brw
->optionCache
;
827 driParseConfigFiles(options
, &brw
->intelScreen
->optionCache
,
828 brw
->driContext
->driScreenPriv
->myNum
, "i965");
830 int bo_reuse_mode
= driQueryOptioni(options
, "bo_reuse");
831 switch (bo_reuse_mode
) {
832 case DRI_CONF_BO_REUSE_DISABLED
:
834 case DRI_CONF_BO_REUSE_ALL
:
835 intel_bufmgr_gem_enable_reuse(brw
->bufmgr
);
839 if (!driQueryOptionb(options
, "hiz")) {
840 brw
->has_hiz
= false;
841 /* On gen6, you can only do separate stencil with HIZ. */
843 brw
->has_separate_stencil
= false;
846 if (driQueryOptionb(options
, "always_flush_batch")) {
847 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
848 brw
->always_flush_batch
= true;
851 if (driQueryOptionb(options
, "always_flush_cache")) {
852 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
853 brw
->always_flush_cache
= true;
856 if (driQueryOptionb(options
, "disable_throttling")) {
857 fprintf(stderr
, "disabling flush throttling\n");
858 brw
->disable_throttling
= true;
861 brw
->precompile
= driQueryOptionb(&brw
->optionCache
, "shader_precompile");
863 if (driQueryOptionb(&brw
->optionCache
, "precise_trig"))
864 brw
->intelScreen
->compiler
->precise_trig
= true;
866 ctx
->Const
.ForceGLSLExtensionsWarn
=
867 driQueryOptionb(options
, "force_glsl_extensions_warn");
869 ctx
->Const
.DisableGLSLLineContinuations
=
870 driQueryOptionb(options
, "disable_glsl_line_continuations");
872 ctx
->Const
.AllowGLSLExtensionDirectiveMidShader
=
873 driQueryOptionb(options
, "allow_glsl_extension_directive_midshader");
875 ctx
->Const
.GLSLZeroInit
= driQueryOptionb(options
, "glsl_zero_init");
877 brw
->dual_color_blend_by_location
=
878 driQueryOptionb(options
, "dual_color_blend_by_location");
882 brwCreateContext(gl_api api
,
883 const struct gl_config
*mesaVis
,
884 __DRIcontext
*driContextPriv
,
885 unsigned major_version
,
886 unsigned minor_version
,
889 unsigned *dri_ctx_error
,
890 void *sharedContextPrivate
)
892 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
893 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
894 struct intel_screen
*screen
= sPriv
->driverPrivate
;
895 const struct brw_device_info
*devinfo
= screen
->devinfo
;
896 struct dd_function_table functions
;
898 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
899 * provides us with context reset notifications.
901 uint32_t allowed_flags
= __DRI_CTX_FLAG_DEBUG
902 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
;
904 if (screen
->has_context_reset_notification
)
905 allowed_flags
|= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
;
907 if (flags
& ~allowed_flags
) {
908 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
912 struct brw_context
*brw
= rzalloc(NULL
, struct brw_context
);
914 fprintf(stderr
, "%s: failed to alloc context\n", __func__
);
915 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
919 driContextPriv
->driverPrivate
= brw
;
920 brw
->driContext
= driContextPriv
;
921 brw
->intelScreen
= screen
;
922 brw
->bufmgr
= screen
->bufmgr
;
924 brw
->gen
= devinfo
->gen
;
925 brw
->gt
= devinfo
->gt
;
926 brw
->is_g4x
= devinfo
->is_g4x
;
927 brw
->is_baytrail
= devinfo
->is_baytrail
;
928 brw
->is_haswell
= devinfo
->is_haswell
;
929 brw
->is_cherryview
= devinfo
->is_cherryview
;
930 brw
->is_broxton
= devinfo
->is_broxton
;
931 brw
->has_llc
= devinfo
->has_llc
;
932 brw
->has_hiz
= devinfo
->has_hiz_and_separate_stencil
;
933 brw
->has_separate_stencil
= devinfo
->has_hiz_and_separate_stencil
;
934 brw
->has_pln
= devinfo
->has_pln
;
935 brw
->has_compr4
= devinfo
->has_compr4
;
936 brw
->has_surface_tile_offset
= devinfo
->has_surface_tile_offset
;
937 brw
->has_negative_rhw_bug
= devinfo
->has_negative_rhw_bug
;
938 brw
->needs_unlit_centroid_workaround
=
939 devinfo
->needs_unlit_centroid_workaround
;
941 brw
->must_use_separate_stencil
= devinfo
->must_use_separate_stencil
;
942 brw
->has_swizzling
= screen
->hw_has_swizzling
;
944 isl_device_init(&brw
->isl_dev
, devinfo
, screen
->hw_has_swizzling
);
946 brw
->vs
.base
.stage
= MESA_SHADER_VERTEX
;
947 brw
->tcs
.base
.stage
= MESA_SHADER_TESS_CTRL
;
948 brw
->tes
.base
.stage
= MESA_SHADER_TESS_EVAL
;
949 brw
->gs
.base
.stage
= MESA_SHADER_GEOMETRY
;
950 brw
->wm
.base
.stage
= MESA_SHADER_FRAGMENT
;
952 gen8_init_vtable_surface_functions(brw
);
953 brw
->vtbl
.emit_depth_stencil_hiz
= gen8_emit_depth_stencil_hiz
;
954 } else if (brw
->gen
>= 7) {
955 gen7_init_vtable_surface_functions(brw
);
956 brw
->vtbl
.emit_depth_stencil_hiz
= gen7_emit_depth_stencil_hiz
;
957 } else if (brw
->gen
>= 6) {
958 gen6_init_vtable_surface_functions(brw
);
959 brw
->vtbl
.emit_depth_stencil_hiz
= gen6_emit_depth_stencil_hiz
;
961 gen4_init_vtable_surface_functions(brw
);
962 brw
->vtbl
.emit_depth_stencil_hiz
= brw_emit_depth_stencil_hiz
;
965 brw_init_driver_functions(brw
, &functions
);
968 functions
.GetGraphicsResetStatus
= brw_get_graphics_reset_status
;
970 struct gl_context
*ctx
= &brw
->ctx
;
972 if (!_mesa_initialize_context(ctx
, api
, mesaVis
, shareCtx
, &functions
)) {
973 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
974 fprintf(stderr
, "%s: failed to init mesa context\n", __func__
);
975 intelDestroyContext(driContextPriv
);
979 driContextSetFlags(ctx
, flags
);
981 /* Initialize the software rasterizer and helper modules.
983 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
984 * software fallbacks (which we have to support on legacy GL to do weird
985 * glDrawPixels(), glBitmap(), and other functions).
987 if (api
!= API_OPENGL_CORE
&& api
!= API_OPENGLES2
) {
988 _swrast_CreateContext(ctx
);
991 _vbo_CreateContext(ctx
);
992 if (ctx
->swrast_context
) {
993 _tnl_CreateContext(ctx
);
994 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= _tnl_run_pipeline
;
995 _swsetup_CreateContext(ctx
);
997 /* Configure swrast to match hardware characteristics: */
998 _swrast_allow_pixel_fog(ctx
, false);
999 _swrast_allow_vertex_fog(ctx
, true);
1002 _mesa_meta_init(ctx
);
1004 brw_process_driconf_options(brw
);
1006 if (INTEL_DEBUG
& DEBUG_PERF
)
1007 brw
->perf_debug
= true;
1009 brw_initialize_cs_context_constants(brw
);
1010 brw_initialize_context_constants(brw
);
1012 ctx
->Const
.ResetStrategy
= notify_reset
1013 ? GL_LOSE_CONTEXT_ON_RESET_ARB
: GL_NO_RESET_NOTIFICATION_ARB
;
1015 /* Reinitialize the context point state. It depends on ctx->Const values. */
1016 _mesa_init_point(ctx
);
1018 intel_fbo_init(brw
);
1020 intel_batchbuffer_init(brw
);
1022 if (brw
->gen
>= 6) {
1023 /* Create a new hardware context. Using a hardware context means that
1024 * our GPU state will be saved/restored on context switch, allowing us
1025 * to assume that the GPU is in the same state we left it in.
1027 * This is required for transform feedback buffer offsets, query objects,
1028 * and also allows us to reduce how much state we have to emit.
1030 brw
->hw_ctx
= drm_intel_gem_context_create(brw
->bufmgr
);
1033 fprintf(stderr
, "Gen6+ requires Kernel 3.6 or later.\n");
1034 intelDestroyContext(driContextPriv
);
1039 if (brw_init_pipe_control(brw
, devinfo
)) {
1040 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1041 intelDestroyContext(driContextPriv
);
1045 brw_init_state(brw
);
1047 intelInitExtensions(ctx
);
1049 brw_init_surface_formats(brw
);
1051 brw
->max_vs_threads
= devinfo
->max_vs_threads
;
1052 brw
->max_hs_threads
= devinfo
->max_hs_threads
;
1053 brw
->max_ds_threads
= devinfo
->max_ds_threads
;
1054 brw
->max_gs_threads
= devinfo
->max_gs_threads
;
1055 brw
->max_wm_threads
= devinfo
->max_wm_threads
;
1056 brw
->urb
.size
= devinfo
->urb
.size
;
1057 brw
->urb
.min_vs_entries
= devinfo
->urb
.min_vs_entries
;
1058 brw
->urb
.max_vs_entries
= devinfo
->urb
.max_vs_entries
;
1059 brw
->urb
.max_hs_entries
= devinfo
->urb
.max_hs_entries
;
1060 brw
->urb
.max_ds_entries
= devinfo
->urb
.max_ds_entries
;
1061 brw
->urb
.max_gs_entries
= devinfo
->urb
.max_gs_entries
;
1064 brw
->urb
.gs_present
= false;
1066 brw
->prim_restart
.in_progress
= false;
1067 brw
->prim_restart
.enable_cut_index
= false;
1068 brw
->gs
.enabled
= false;
1069 brw
->sf
.viewport_transform_enable
= true;
1071 brw
->predicate
.state
= BRW_PREDICATE_STATE_RENDER
;
1073 brw
->max_gtt_map_object_size
= screen
->max_gtt_map_object_size
;
1075 brw
->use_resource_streamer
= screen
->has_resource_streamer
&&
1076 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1077 env_var_as_boolean("INTEL_USE_GATHER", false));
1079 ctx
->VertexProgram
._MaintainTnlProgram
= true;
1080 ctx
->FragmentProgram
._MaintainTexEnvProgram
= true;
1082 brw_draw_init( brw
);
1084 if ((flags
& __DRI_CTX_FLAG_DEBUG
) != 0) {
1085 /* Turn on some extra GL_ARB_debug_output generation. */
1086 brw
->perf_debug
= true;
1089 if ((flags
& __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
) != 0)
1090 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB
;
1092 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
1093 brw_init_shader_time(brw
);
1095 _mesa_compute_version(ctx
);
1097 _mesa_initialize_dispatch_tables(ctx
);
1098 _mesa_initialize_vbo_vtxfmt(ctx
);
1100 if (ctx
->Extensions
.AMD_performance_monitor
) {
1101 brw_init_performance_monitors(brw
);
1104 vbo_use_buffer_objects(ctx
);
1105 vbo_always_unmap_buffers(ctx
);
1111 intelDestroyContext(__DRIcontext
* driContextPriv
)
1113 struct brw_context
*brw
=
1114 (struct brw_context
*) driContextPriv
->driverPrivate
;
1115 struct gl_context
*ctx
= &brw
->ctx
;
1117 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1118 if (INTEL_DEBUG
& DEBUG_AUB
) {
1119 intel_batchbuffer_flush(brw
);
1120 aub_dump_bmp(&brw
->ctx
);
1123 _mesa_meta_free(&brw
->ctx
);
1125 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
1126 /* Force a report. */
1127 brw
->shader_time
.report_time
= 0;
1129 brw_collect_and_report_shader_time(brw
);
1130 brw_destroy_shader_time(brw
);
1133 brw_destroy_state(brw
);
1134 brw_draw_destroy(brw
);
1136 drm_intel_bo_unreference(brw
->curbe
.curbe_bo
);
1137 if (brw
->vs
.base
.scratch_bo
)
1138 drm_intel_bo_unreference(brw
->vs
.base
.scratch_bo
);
1139 if (brw
->tcs
.base
.scratch_bo
)
1140 drm_intel_bo_unreference(brw
->tcs
.base
.scratch_bo
);
1141 if (brw
->tes
.base
.scratch_bo
)
1142 drm_intel_bo_unreference(brw
->tes
.base
.scratch_bo
);
1143 if (brw
->gs
.base
.scratch_bo
)
1144 drm_intel_bo_unreference(brw
->gs
.base
.scratch_bo
);
1145 if (brw
->wm
.base
.scratch_bo
)
1146 drm_intel_bo_unreference(brw
->wm
.base
.scratch_bo
);
1148 gen7_reset_hw_bt_pool_offsets(brw
);
1149 drm_intel_bo_unreference(brw
->hw_bt_pool
.bo
);
1150 brw
->hw_bt_pool
.bo
= NULL
;
1152 drm_intel_gem_context_destroy(brw
->hw_ctx
);
1154 if (ctx
->swrast_context
) {
1155 _swsetup_DestroyContext(&brw
->ctx
);
1156 _tnl_DestroyContext(&brw
->ctx
);
1158 _vbo_DestroyContext(&brw
->ctx
);
1160 if (ctx
->swrast_context
)
1161 _swrast_DestroyContext(&brw
->ctx
);
1163 brw_fini_pipe_control(brw
);
1164 intel_batchbuffer_free(brw
);
1166 drm_intel_bo_unreference(brw
->throttle_batch
[1]);
1167 drm_intel_bo_unreference(brw
->throttle_batch
[0]);
1168 brw
->throttle_batch
[1] = NULL
;
1169 brw
->throttle_batch
[0] = NULL
;
1171 driDestroyOptionCache(&brw
->optionCache
);
1173 /* free the Mesa context */
1174 _mesa_free_context_data(&brw
->ctx
);
1177 driContextPriv
->driverPrivate
= NULL
;
1181 intelUnbindContext(__DRIcontext
* driContextPriv
)
1183 /* Unset current context and dispath table */
1184 _mesa_make_current(NULL
, NULL
, NULL
);
1190 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1191 * on window system framebuffers.
1193 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1194 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1195 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1196 * for a visual where you're guaranteed to be capable, but it turns out that
1197 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1198 * incapable ones, because there's no difference between the two in resources
1199 * used. Applications thus get built that accidentally rely on the default
1200 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1203 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1204 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1205 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1206 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1207 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1208 * and get no sRGB encode (assuming that both kinds of visual are available).
1209 * Thus our choice to support sRGB by default on our visuals for desktop would
1210 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1212 * Unfortunately, renderbuffer setup happens before a context is created. So
1213 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1214 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1215 * yet), we go turn that back off before anyone finds out.
1218 intel_gles3_srgb_workaround(struct brw_context
*brw
,
1219 struct gl_framebuffer
*fb
)
1221 struct gl_context
*ctx
= &brw
->ctx
;
1223 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
1226 /* Some day when we support the sRGB capable bit on visuals available for
1227 * GLES, we'll need to respect that and not disable things here.
1229 fb
->Visual
.sRGBCapable
= false;
1230 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
1231 struct gl_renderbuffer
*rb
= fb
->Attachment
[i
].Renderbuffer
;
1233 rb
->Format
= _mesa_get_srgb_format_linear(rb
->Format
);
1238 intelMakeCurrent(__DRIcontext
* driContextPriv
,
1239 __DRIdrawable
* driDrawPriv
,
1240 __DRIdrawable
* driReadPriv
)
1242 struct brw_context
*brw
;
1243 GET_CURRENT_CONTEXT(curCtx
);
1246 brw
= (struct brw_context
*) driContextPriv
->driverPrivate
;
1250 /* According to the glXMakeCurrent() man page: "Pending commands to
1251 * the previous context, if any, are flushed before it is released."
1252 * But only flush if we're actually changing contexts.
1254 if (brw_context(curCtx
) && brw_context(curCtx
) != brw
) {
1255 _mesa_flush(curCtx
);
1258 if (driContextPriv
) {
1259 struct gl_context
*ctx
= &brw
->ctx
;
1260 struct gl_framebuffer
*fb
, *readFb
;
1262 if (driDrawPriv
== NULL
) {
1263 fb
= _mesa_get_incomplete_framebuffer();
1265 fb
= driDrawPriv
->driverPrivate
;
1266 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1269 if (driReadPriv
== NULL
) {
1270 readFb
= _mesa_get_incomplete_framebuffer();
1272 readFb
= driReadPriv
->driverPrivate
;
1273 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1276 /* The sRGB workaround changes the renderbuffer's format. We must change
1277 * the format before the renderbuffer's miptree get's allocated, otherwise
1278 * the formats of the renderbuffer and its miptree will differ.
1280 intel_gles3_srgb_workaround(brw
, fb
);
1281 intel_gles3_srgb_workaround(brw
, readFb
);
1283 /* If the context viewport hasn't been initialized, force a call out to
1284 * the loader to get buffers so we have a drawable size for the initial
1286 if (!brw
->ctx
.ViewportInitialized
)
1287 intel_prepare_render(brw
);
1289 _mesa_make_current(ctx
, fb
, readFb
);
1291 _mesa_make_current(NULL
, NULL
, NULL
);
1298 intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1299 __DRIdrawable
*drawable
)
1302 /* MSAA and fast color clear are not supported, so don't waste time
1303 * checking whether a resolve is needed.
1308 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1309 struct intel_renderbuffer
*rb
;
1311 /* Usually, only the back buffer will need to be downsampled. However,
1312 * the front buffer will also need it if the user has rendered into it.
1314 static const gl_buffer_index buffers
[2] = {
1319 for (int i
= 0; i
< 2; ++i
) {
1320 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
1321 if (rb
== NULL
|| rb
->mt
== NULL
)
1323 if (rb
->mt
->num_samples
<= 1)
1324 intel_miptree_resolve_color(brw
, rb
->mt
, 0);
1326 intel_renderbuffer_downsample(brw
, rb
);
1331 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
1333 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
1337 intel_query_dri2_buffers(struct brw_context
*brw
,
1338 __DRIdrawable
*drawable
,
1339 __DRIbuffer
**buffers
,
1343 intel_process_dri2_buffer(struct brw_context
*brw
,
1344 __DRIdrawable
*drawable
,
1345 __DRIbuffer
*buffer
,
1346 struct intel_renderbuffer
*rb
,
1347 const char *buffer_name
);
1350 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
);
1353 intel_update_dri2_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1355 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1356 struct intel_renderbuffer
*rb
;
1357 __DRIbuffer
*buffers
= NULL
;
1359 const char *region_name
;
1361 /* Set this up front, so that in case our buffers get invalidated
1362 * while we're getting new buffers, we don't clobber the stamp and
1363 * thus ignore the invalidate. */
1364 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1366 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1367 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1369 intel_query_dri2_buffers(brw
, drawable
, &buffers
, &count
);
1371 if (buffers
== NULL
)
1374 for (i
= 0; i
< count
; i
++) {
1375 switch (buffers
[i
].attachment
) {
1376 case __DRI_BUFFER_FRONT_LEFT
:
1377 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1378 region_name
= "dri2 front buffer";
1381 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
1382 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1383 region_name
= "dri2 fake front buffer";
1386 case __DRI_BUFFER_BACK_LEFT
:
1387 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1388 region_name
= "dri2 back buffer";
1391 case __DRI_BUFFER_DEPTH
:
1392 case __DRI_BUFFER_HIZ
:
1393 case __DRI_BUFFER_DEPTH_STENCIL
:
1394 case __DRI_BUFFER_STENCIL
:
1395 case __DRI_BUFFER_ACCUM
:
1398 "unhandled buffer attach event, attachment type %d\n",
1399 buffers
[i
].attachment
);
1403 intel_process_dri2_buffer(brw
, drawable
, &buffers
[i
], rb
, region_name
);
1409 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
1411 struct brw_context
*brw
= context
->driverPrivate
;
1412 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1414 /* Set this up front, so that in case our buffers get invalidated
1415 * while we're getting new buffers, we don't clobber the stamp and
1416 * thus ignore the invalidate. */
1417 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1419 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1420 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1422 if (screen
->image
.loader
)
1423 intel_update_image_buffers(brw
, drawable
);
1425 intel_update_dri2_buffers(brw
, drawable
);
1427 driUpdateFramebufferSize(&brw
->ctx
, drawable
);
1431 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1432 * state is required.
1435 intel_prepare_render(struct brw_context
*brw
)
1437 struct gl_context
*ctx
= &brw
->ctx
;
1438 __DRIcontext
*driContext
= brw
->driContext
;
1439 __DRIdrawable
*drawable
;
1441 drawable
= driContext
->driDrawablePriv
;
1442 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
1443 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1444 intel_update_renderbuffers(driContext
, drawable
);
1445 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
1448 drawable
= driContext
->driReadablePriv
;
1449 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
1450 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1451 intel_update_renderbuffers(driContext
, drawable
);
1452 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
1455 /* If we're currently rendering to the front buffer, the rendering
1456 * that will happen next will probably dirty the front buffer. So
1457 * mark it as dirty here.
1459 if (_mesa_is_front_buffer_drawing(ctx
->DrawBuffer
))
1460 brw
->front_buffer_dirty
= true;
1464 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1466 * To determine which DRI buffers to request, examine the renderbuffers
1467 * attached to the drawable's framebuffer. Then request the buffers with
1468 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1470 * This is called from intel_update_renderbuffers().
1472 * \param drawable Drawable whose buffers are queried.
1473 * \param buffers [out] List of buffers returned by DRI2 query.
1474 * \param buffer_count [out] Number of buffers returned.
1476 * \see intel_update_renderbuffers()
1477 * \see DRI2GetBuffers()
1478 * \see DRI2GetBuffersWithFormat()
1481 intel_query_dri2_buffers(struct brw_context
*brw
,
1482 __DRIdrawable
*drawable
,
1483 __DRIbuffer
**buffers
,
1486 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1487 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1489 unsigned attachments
[8];
1491 struct intel_renderbuffer
*front_rb
;
1492 struct intel_renderbuffer
*back_rb
;
1494 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1495 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1497 memset(attachments
, 0, sizeof(attachments
));
1498 if ((_mesa_is_front_buffer_drawing(fb
) ||
1499 _mesa_is_front_buffer_reading(fb
) ||
1500 !back_rb
) && front_rb
) {
1501 /* If a fake front buffer is in use, then querying for
1502 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1503 * the real front buffer to the fake front buffer. So before doing the
1504 * query, we need to make sure all the pending drawing has landed in the
1505 * real front buffer.
1507 intel_batchbuffer_flush(brw
);
1508 intel_flush_front(&brw
->ctx
);
1510 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1511 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1512 } else if (front_rb
&& brw
->front_buffer_dirty
) {
1513 /* We have pending front buffer rendering, but we aren't querying for a
1514 * front buffer. If the front buffer we have is a fake front buffer,
1515 * the X server is going to throw it away when it processes the query.
1516 * So before doing the query, make sure all the pending drawing has
1517 * landed in the real front buffer.
1519 intel_batchbuffer_flush(brw
);
1520 intel_flush_front(&brw
->ctx
);
1524 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1525 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1528 assert(i
<= ARRAY_SIZE(attachments
));
1530 *buffers
= screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1535 drawable
->loaderPrivate
);
1539 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1541 * This is called from intel_update_renderbuffers().
1544 * DRI buffers whose attachment point is DRI2BufferStencil or
1545 * DRI2BufferDepthStencil are handled as special cases.
1547 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1548 * that is passed to drm_intel_bo_gem_create_from_name().
1550 * \see intel_update_renderbuffers()
1553 intel_process_dri2_buffer(struct brw_context
*brw
,
1554 __DRIdrawable
*drawable
,
1555 __DRIbuffer
*buffer
,
1556 struct intel_renderbuffer
*rb
,
1557 const char *buffer_name
)
1559 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1565 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1567 /* We try to avoid closing and reopening the same BO name, because the first
1568 * use of a mapping of the buffer involves a bunch of page faulting which is
1569 * moderately expensive.
1571 struct intel_mipmap_tree
*last_mt
;
1572 if (num_samples
== 0)
1575 last_mt
= rb
->singlesample_mt
;
1577 uint32_t old_name
= 0;
1579 /* The bo already has a name because the miptree was created by a
1580 * previous call to intel_process_dri2_buffer(). If a bo already has a
1581 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1582 * create a new name.
1584 drm_intel_bo_flink(last_mt
->bo
, &old_name
);
1587 if (old_name
== buffer
->name
)
1590 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1592 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1593 buffer
->name
, buffer
->attachment
,
1594 buffer
->cpp
, buffer
->pitch
);
1597 bo
= drm_intel_bo_gem_create_from_name(brw
->bufmgr
, buffer_name
,
1601 "Failed to open BO for returned DRI2 buffer "
1602 "(%dx%d, %s, named %d).\n"
1603 "This is likely a bug in the X Server that will lead to a "
1605 drawable
->w
, drawable
->h
, buffer_name
, buffer
->name
);
1609 intel_update_winsys_renderbuffer_miptree(brw
, rb
, bo
,
1610 drawable
->w
, drawable
->h
,
1613 if (_mesa_is_front_buffer_drawing(fb
) &&
1614 (buffer
->attachment
== __DRI_BUFFER_FRONT_LEFT
||
1615 buffer
->attachment
== __DRI_BUFFER_FAKE_FRONT_LEFT
) &&
1616 rb
->Base
.Base
.NumSamples
> 1) {
1617 intel_renderbuffer_upsample(brw
, rb
);
1622 drm_intel_bo_unreference(bo
);
1626 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1628 * To determine which DRI buffers to request, examine the renderbuffers
1629 * attached to the drawable's framebuffer. Then request the buffers from
1632 * This is called from intel_update_renderbuffers().
1634 * \param drawable Drawable whose buffers are queried.
1635 * \param buffers [out] List of buffers returned by DRI2 query.
1636 * \param buffer_count [out] Number of buffers returned.
1638 * \see intel_update_renderbuffers()
1642 intel_update_image_buffer(struct brw_context
*intel
,
1643 __DRIdrawable
*drawable
,
1644 struct intel_renderbuffer
*rb
,
1646 enum __DRIimageBufferMask buffer_type
)
1648 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1650 if (!rb
|| !buffer
->bo
)
1653 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1655 /* Check and see if we're already bound to the right
1658 struct intel_mipmap_tree
*last_mt
;
1659 if (num_samples
== 0)
1662 last_mt
= rb
->singlesample_mt
;
1664 if (last_mt
&& last_mt
->bo
== buffer
->bo
)
1667 intel_update_winsys_renderbuffer_miptree(intel
, rb
, buffer
->bo
,
1668 buffer
->width
, buffer
->height
,
1671 if (_mesa_is_front_buffer_drawing(fb
) &&
1672 buffer_type
== __DRI_IMAGE_BUFFER_FRONT
&&
1673 rb
->Base
.Base
.NumSamples
> 1) {
1674 intel_renderbuffer_upsample(intel
, rb
);
1679 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1681 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1682 __DRIscreen
*screen
= brw
->intelScreen
->driScrnPriv
;
1683 struct intel_renderbuffer
*front_rb
;
1684 struct intel_renderbuffer
*back_rb
;
1685 struct __DRIimageList images
;
1686 unsigned int format
;
1687 uint32_t buffer_mask
= 0;
1690 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1691 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1694 format
= intel_rb_format(back_rb
);
1696 format
= intel_rb_format(front_rb
);
1700 if (front_rb
&& (_mesa_is_front_buffer_drawing(fb
) ||
1701 _mesa_is_front_buffer_reading(fb
) || !back_rb
)) {
1702 buffer_mask
|= __DRI_IMAGE_BUFFER_FRONT
;
1706 buffer_mask
|= __DRI_IMAGE_BUFFER_BACK
;
1708 ret
= screen
->image
.loader
->getBuffers(drawable
,
1709 driGLFormatToImageFormat(format
),
1710 &drawable
->dri2
.stamp
,
1711 drawable
->loaderPrivate
,
1717 if (images
.image_mask
& __DRI_IMAGE_BUFFER_FRONT
) {
1718 drawable
->w
= images
.front
->width
;
1719 drawable
->h
= images
.front
->height
;
1720 intel_update_image_buffer(brw
,
1724 __DRI_IMAGE_BUFFER_FRONT
);
1726 if (images
.image_mask
& __DRI_IMAGE_BUFFER_BACK
) {
1727 drawable
->w
= images
.back
->width
;
1728 drawable
->h
= images
.back
->height
;
1729 intel_update_image_buffer(brw
,
1733 __DRI_IMAGE_BUFFER_BACK
);