2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **********************************************************************/
30 * Keith Whitwell <keithw@vmware.com>
34 #include "main/api_exec.h"
35 #include "main/context.h"
36 #include "main/fbobject.h"
37 #include "main/extensions.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
40 #include "main/points.h"
41 #include "main/version.h"
42 #include "main/vtxfmt.h"
43 #include "main/texobj.h"
44 #include "main/framebuffer.h"
46 #include "vbo/vbo_context.h"
48 #include "drivers/common/driverfuncs.h"
49 #include "drivers/common/meta.h"
52 #include "brw_context.h"
53 #include "brw_defines.h"
54 #include "brw_blorp.h"
55 #include "brw_compiler.h"
57 #include "brw_state.h"
59 #include "intel_batchbuffer.h"
60 #include "intel_buffer_objects.h"
61 #include "intel_buffers.h"
62 #include "intel_fbo.h"
63 #include "intel_mipmap_tree.h"
64 #include "intel_pixel.h"
65 #include "intel_image.h"
66 #include "intel_tex.h"
67 #include "intel_tex_obj.h"
69 #include "swrast_setup/swrast_setup.h"
71 #include "tnl/t_pipeline.h"
72 #include "util/ralloc.h"
73 #include "util/debug.h"
76 /***************************************
77 * Mesa's Driver Functions
78 ***************************************/
80 const char *const brw_vendor_string
= "Intel Open Source Technology Center";
83 get_bsw_model(const struct intel_screen
*intelScreen
)
85 switch (intelScreen
->eu_total
) {
96 brw_get_renderer_string(const struct intel_screen
*intelScreen
)
99 static char buffer
[128];
102 switch (intelScreen
->deviceID
) {
104 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
105 #include "pci_ids/i965_pci_ids.h"
107 chipset
= "Unknown Intel Chipset";
111 /* Braswell branding is funny, so we have to fix it up here */
112 if (intelScreen
->deviceID
== 0x22B1) {
113 bsw
= strdup(chipset
);
114 char *needle
= strstr(bsw
, "XXX");
116 memcpy(needle
, get_bsw_model(intelScreen
), 3);
121 (void) driGetRendererString(buffer
, chipset
, 0);
126 static const GLubyte
*
127 intel_get_string(struct gl_context
* ctx
, GLenum name
)
129 const struct brw_context
*const brw
= brw_context(ctx
);
133 return (GLubyte
*) brw_vendor_string
;
137 (GLubyte
*) brw_get_renderer_string(brw
->intelScreen
);
145 intel_viewport(struct gl_context
*ctx
)
147 struct brw_context
*brw
= brw_context(ctx
);
148 __DRIcontext
*driContext
= brw
->driContext
;
150 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
151 if (driContext
->driDrawablePriv
)
152 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
153 if (driContext
->driReadablePriv
)
154 dri2InvalidateDrawable(driContext
->driReadablePriv
);
159 intel_update_framebuffer(struct gl_context
*ctx
,
160 struct gl_framebuffer
*fb
)
162 struct brw_context
*brw
= brw_context(ctx
);
164 /* Quantize the derived default number of samples
166 fb
->DefaultGeometry
._NumSamples
=
167 intel_quantize_num_samples(brw
->intelScreen
,
168 fb
->DefaultGeometry
.NumSamples
);
172 intel_disable_rb_aux_buffer(struct brw_context
*brw
, const drm_intel_bo
*bo
)
174 const struct gl_framebuffer
*fb
= brw
->ctx
.DrawBuffer
;
177 for (unsigned i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
178 const struct intel_renderbuffer
*irb
=
179 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
181 if (irb
&& irb
->mt
->bo
== bo
) {
182 found
= brw
->draw_aux_buffer_disabled
[i
] = true;
189 /* On Gen9 color buffers may be compressed by the hardware (lossless
190 * compression). There are, however, format restrictions and care needs to be
191 * taken that the sampler engine is capable for re-interpreting a buffer with
192 * format different the buffer was originally written with.
194 * For example, SRGB formats are not compressible and the sampler engine isn't
195 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
196 * color buffer needs to be resolved so that the sampling surface can be
197 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
201 intel_texture_view_requires_resolve(struct brw_context
*brw
,
202 struct intel_texture_object
*intel_tex
)
205 !intel_miptree_is_lossless_compressed(brw
, intel_tex
->mt
))
208 const uint32_t brw_format
= brw_format_for_mesa_format(intel_tex
->_Format
);
210 if (isl_format_supports_lossless_compression(brw
->intelScreen
->devinfo
,
214 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
215 _mesa_get_format_name(intel_tex
->_Format
),
216 _mesa_get_format_name(intel_tex
->mt
->format
));
218 if (intel_disable_rb_aux_buffer(brw
, intel_tex
->mt
->bo
))
219 perf_debug("Sampling renderbuffer with non-compressible format - "
220 "turning off compression");
226 intel_update_state(struct gl_context
* ctx
, GLuint new_state
)
228 struct brw_context
*brw
= brw_context(ctx
);
229 struct intel_texture_object
*tex_obj
;
230 struct intel_renderbuffer
*depth_irb
;
232 if (ctx
->swrast_context
)
233 _swrast_InvalidateState(ctx
, new_state
);
234 _vbo_InvalidateState(ctx
, new_state
);
236 brw
->NewGLState
|= new_state
;
238 _mesa_unlock_context_textures(ctx
);
240 /* Resolve the depth buffer's HiZ buffer. */
241 depth_irb
= intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_DEPTH
);
243 intel_renderbuffer_resolve_hiz(brw
, depth_irb
);
245 memset(brw
->draw_aux_buffer_disabled
, 0,
246 sizeof(brw
->draw_aux_buffer_disabled
));
248 /* Resolve depth buffer and render cache of each enabled texture. */
249 int maxEnabledUnit
= ctx
->Texture
._MaxEnabledTexImageUnit
;
250 for (int i
= 0; i
<= maxEnabledUnit
; i
++) {
251 if (!ctx
->Texture
.Unit
[i
]._Current
)
253 tex_obj
= intel_texture_object(ctx
->Texture
.Unit
[i
]._Current
);
254 if (!tex_obj
|| !tex_obj
->mt
)
256 intel_miptree_all_slices_resolve_depth(brw
, tex_obj
->mt
);
257 /* Sampling engine understands lossless compression and resolving
258 * those surfaces should be skipped for performance reasons.
260 const int flags
= intel_texture_view_requires_resolve(brw
, tex_obj
) ?
261 0 : INTEL_MIPTREE_IGNORE_CCS_E
;
262 intel_miptree_resolve_color(brw
, tex_obj
->mt
, flags
);
263 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
265 if (tex_obj
->base
.StencilSampling
||
266 tex_obj
->mt
->format
== MESA_FORMAT_S_UINT8
) {
267 intel_update_r8stencil(brw
, tex_obj
->mt
);
271 /* Resolve color for each active shader image. */
272 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
273 const struct gl_linked_shader
*shader
=
274 ctx
->_Shader
->CurrentProgram
[i
] ?
275 ctx
->_Shader
->CurrentProgram
[i
]->_LinkedShaders
[i
] : NULL
;
277 if (unlikely(shader
&& shader
->NumImages
)) {
278 for (unsigned j
= 0; j
< shader
->NumImages
; j
++) {
279 struct gl_image_unit
*u
= &ctx
->ImageUnits
[shader
->ImageUnits
[j
]];
280 tex_obj
= intel_texture_object(u
->TexObj
);
282 if (tex_obj
&& tex_obj
->mt
) {
283 /* Access to images is implemented using indirect messages
284 * against data port. Normal render target write understands
285 * lossless compression but unfortunately the typed/untyped
286 * read/write interface doesn't. Therefore even lossless
287 * compressed surfaces need to be resolved prior to accessing
288 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
290 intel_miptree_resolve_color(brw
, tex_obj
->mt
, 0);
292 if (intel_miptree_is_lossless_compressed(brw
, tex_obj
->mt
) &&
293 intel_disable_rb_aux_buffer(brw
, tex_obj
->mt
->bo
)) {
294 perf_debug("Using renderbuffer as shader image - turning "
295 "off lossless compression");
298 brw_render_cache_set_check_flush(brw
, tex_obj
->mt
->bo
);
304 /* Resolve color buffers for non-coherent framebuffer fetch. */
305 if (!ctx
->Extensions
.MESA_shader_framebuffer_fetch
&&
306 ctx
->FragmentProgram
._Current
&&
307 ctx
->FragmentProgram
._Current
->Base
.OutputsRead
) {
308 const struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
310 for (unsigned i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
311 const struct intel_renderbuffer
*irb
=
312 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
315 intel_miptree_resolve_color(brw
, irb
->mt
,
316 INTEL_MIPTREE_IGNORE_CCS_E
))
317 brw_render_cache_set_check_flush(brw
, irb
->mt
->bo
);
321 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
322 * single-sampled color renderbuffers because the CCS buffer isn't
323 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
324 * enabled because otherwise the surface state will be programmed with the
325 * linear equivalent format anyway.
327 if (brw
->gen
>= 9 && ctx
->Color
.sRGBEnabled
) {
328 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
329 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
330 struct gl_renderbuffer
*rb
= fb
->_ColorDrawBuffers
[i
];
335 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
336 struct intel_mipmap_tree
*mt
= irb
->mt
;
339 mt
->num_samples
> 1 ||
340 _mesa_get_srgb_format_linear(mt
->format
) == mt
->format
)
343 /* Lossless compression is not supported for SRGB formats, it
344 * should be impossible to get here with such surfaces.
346 assert(!intel_miptree_is_lossless_compressed(brw
, mt
));
347 intel_miptree_resolve_color(brw
, mt
, 0);
348 brw_render_cache_set_check_flush(brw
, mt
->bo
);
352 _mesa_lock_context_textures(ctx
);
354 if (new_state
& _NEW_BUFFERS
) {
355 intel_update_framebuffer(ctx
, ctx
->DrawBuffer
);
356 if (ctx
->DrawBuffer
!= ctx
->ReadBuffer
)
357 intel_update_framebuffer(ctx
, ctx
->ReadBuffer
);
361 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
364 intel_flush_front(struct gl_context
*ctx
)
366 struct brw_context
*brw
= brw_context(ctx
);
367 __DRIcontext
*driContext
= brw
->driContext
;
368 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
369 __DRIscreen
*const dri_screen
= brw
->intelScreen
->driScrnPriv
;
371 if (brw
->front_buffer_dirty
&& _mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
372 if (flushFront(dri_screen
) && driDrawable
&&
373 driDrawable
->loaderPrivate
) {
375 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
377 * This potentially resolves both front and back buffer. It
378 * is unnecessary to resolve the back, but harms nothing except
379 * performance. And no one cares about front-buffer render
382 intel_resolve_for_dri2_flush(brw
, driDrawable
);
383 intel_batchbuffer_flush(brw
);
385 flushFront(dri_screen
)(driDrawable
, driDrawable
->loaderPrivate
);
387 /* We set the dirty bit in intel_prepare_render() if we're
388 * front buffer rendering once we get there.
390 brw
->front_buffer_dirty
= false;
396 intel_glFlush(struct gl_context
*ctx
)
398 struct brw_context
*brw
= brw_context(ctx
);
400 intel_batchbuffer_flush(brw
);
401 intel_flush_front(ctx
);
403 brw
->need_flush_throttle
= true;
407 intel_finish(struct gl_context
* ctx
)
409 struct brw_context
*brw
= brw_context(ctx
);
413 if (brw
->batch
.last_bo
)
414 drm_intel_bo_wait_rendering(brw
->batch
.last_bo
);
418 brw_init_driver_functions(struct brw_context
*brw
,
419 struct dd_function_table
*functions
)
421 _mesa_init_driver_functions(functions
);
423 /* GLX uses DRI2 invalidate events to handle window resizing.
424 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
425 * which doesn't provide a mechanism for snooping the event queues.
427 * So EGL still relies on viewport hacks to handle window resizing.
428 * This should go away with DRI3000.
430 if (!brw
->driContext
->driScreenPriv
->dri2
.useInvalidate
)
431 functions
->Viewport
= intel_viewport
;
433 functions
->Flush
= intel_glFlush
;
434 functions
->Finish
= intel_finish
;
435 functions
->GetString
= intel_get_string
;
436 functions
->UpdateState
= intel_update_state
;
438 intelInitTextureFuncs(functions
);
439 intelInitTextureImageFuncs(functions
);
440 intelInitTextureSubImageFuncs(functions
);
441 intelInitTextureCopyImageFuncs(functions
);
442 intelInitCopyImageFuncs(functions
);
443 intelInitClearFuncs(functions
);
444 intelInitBufferFuncs(functions
);
445 intelInitPixelFuncs(functions
);
446 intelInitBufferObjectFuncs(functions
);
447 intel_init_syncobj_functions(functions
);
448 brw_init_object_purgeable_functions(functions
);
450 brwInitFragProgFuncs( functions
);
451 brw_init_common_queryobj_functions(functions
);
452 if (brw
->gen
>= 8 || brw
->is_haswell
)
453 hsw_init_queryobj_functions(functions
);
454 else if (brw
->gen
>= 6)
455 gen6_init_queryobj_functions(functions
);
457 gen4_init_queryobj_functions(functions
);
458 brw_init_compute_functions(functions
);
460 brw_init_conditional_render_functions(functions
);
462 functions
->QueryInternalFormat
= brw_query_internal_format
;
464 functions
->NewTransformFeedback
= brw_new_transform_feedback
;
465 functions
->DeleteTransformFeedback
= brw_delete_transform_feedback
;
466 if (brw
->intelScreen
->has_mi_math_and_lrr
) {
467 functions
->BeginTransformFeedback
= hsw_begin_transform_feedback
;
468 functions
->EndTransformFeedback
= hsw_end_transform_feedback
;
469 functions
->PauseTransformFeedback
= hsw_pause_transform_feedback
;
470 functions
->ResumeTransformFeedback
= hsw_resume_transform_feedback
;
471 } else if (brw
->gen
>= 7) {
472 functions
->BeginTransformFeedback
= gen7_begin_transform_feedback
;
473 functions
->EndTransformFeedback
= gen7_end_transform_feedback
;
474 functions
->PauseTransformFeedback
= gen7_pause_transform_feedback
;
475 functions
->ResumeTransformFeedback
= gen7_resume_transform_feedback
;
476 functions
->GetTransformFeedbackVertexCount
=
477 brw_get_transform_feedback_vertex_count
;
479 functions
->BeginTransformFeedback
= brw_begin_transform_feedback
;
480 functions
->EndTransformFeedback
= brw_end_transform_feedback
;
484 functions
->GetSamplePosition
= gen6_get_sample_position
;
488 brw_initialize_context_constants(struct brw_context
*brw
)
490 struct gl_context
*ctx
= &brw
->ctx
;
491 const struct brw_compiler
*compiler
= brw
->intelScreen
->compiler
;
493 const bool stage_exists
[MESA_SHADER_STAGES
] = {
494 [MESA_SHADER_VERTEX
] = true,
495 [MESA_SHADER_TESS_CTRL
] = brw
->gen
>= 7,
496 [MESA_SHADER_TESS_EVAL
] = brw
->gen
>= 7,
497 [MESA_SHADER_GEOMETRY
] = brw
->gen
>= 6,
498 [MESA_SHADER_FRAGMENT
] = true,
499 [MESA_SHADER_COMPUTE
] =
500 (ctx
->API
== API_OPENGL_CORE
&&
501 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 1024) ||
502 (ctx
->API
== API_OPENGLES2
&&
503 ctx
->Const
.MaxComputeWorkGroupSize
[0] >= 128) ||
504 _mesa_extension_override_enables
.ARB_compute_shader
,
507 unsigned num_stages
= 0;
508 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
513 unsigned max_samplers
=
514 brw
->gen
>= 8 || brw
->is_haswell
? BRW_MAX_TEX_UNIT
: 16;
516 ctx
->Const
.MaxDualSourceDrawBuffers
= 1;
517 ctx
->Const
.MaxDrawBuffers
= BRW_MAX_DRAW_BUFFERS
;
518 ctx
->Const
.MaxCombinedShaderOutputResources
=
519 MAX_IMAGE_UNITS
+ BRW_MAX_DRAW_BUFFERS
;
521 ctx
->Const
.QueryCounterBits
.Timestamp
= 36;
523 ctx
->Const
.MaxTextureCoordUnits
= 8; /* Mesa limit */
524 ctx
->Const
.MaxImageUnits
= MAX_IMAGE_UNITS
;
525 ctx
->Const
.MaxRenderbufferSize
= 8192;
526 ctx
->Const
.MaxTextureLevels
= MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS
);
527 ctx
->Const
.Max3DTextureLevels
= 12; /* 2048 */
528 ctx
->Const
.MaxCubeTextureLevels
= 14; /* 8192 */
529 ctx
->Const
.MaxArrayTextureLayers
= brw
->gen
>= 7 ? 2048 : 512;
530 ctx
->Const
.MaxTextureMbytes
= 1536;
531 ctx
->Const
.MaxTextureRectSize
= 1 << 12;
532 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
533 ctx
->Const
.StripTextureBorder
= true;
535 ctx
->Const
.MaxProgramTextureGatherComponents
= 4;
536 else if (brw
->gen
== 6)
537 ctx
->Const
.MaxProgramTextureGatherComponents
= 1;
539 ctx
->Const
.MaxUniformBlockSize
= 65536;
541 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
542 struct gl_program_constants
*prog
= &ctx
->Const
.Program
[i
];
544 if (!stage_exists
[i
])
547 prog
->MaxTextureImageUnits
= max_samplers
;
549 prog
->MaxUniformBlocks
= BRW_MAX_UBO
;
550 prog
->MaxCombinedUniformComponents
=
551 prog
->MaxUniformComponents
+
552 ctx
->Const
.MaxUniformBlockSize
/ 4 * prog
->MaxUniformBlocks
;
554 prog
->MaxAtomicCounters
= MAX_ATOMIC_COUNTERS
;
555 prog
->MaxAtomicBuffers
= BRW_MAX_ABO
;
556 prog
->MaxImageUniforms
= compiler
->scalar_stage
[i
] ? BRW_MAX_IMAGES
: 0;
557 prog
->MaxShaderStorageBlocks
= BRW_MAX_SSBO
;
560 ctx
->Const
.MaxTextureUnits
=
561 MIN2(ctx
->Const
.MaxTextureCoordUnits
,
562 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
);
564 ctx
->Const
.MaxUniformBufferBindings
= num_stages
* BRW_MAX_UBO
;
565 ctx
->Const
.MaxCombinedUniformBlocks
= num_stages
* BRW_MAX_UBO
;
566 ctx
->Const
.MaxCombinedAtomicBuffers
= num_stages
* BRW_MAX_ABO
;
567 ctx
->Const
.MaxCombinedShaderStorageBlocks
= num_stages
* BRW_MAX_SSBO
;
568 ctx
->Const
.MaxShaderStorageBufferBindings
= num_stages
* BRW_MAX_SSBO
;
569 ctx
->Const
.MaxCombinedTextureImageUnits
= num_stages
* max_samplers
;
570 ctx
->Const
.MaxCombinedImageUniforms
= num_stages
* BRW_MAX_IMAGES
;
573 /* Hardware only supports a limited number of transform feedback buffers.
574 * So we need to override the Mesa default (which is based only on software
577 ctx
->Const
.MaxTransformFeedbackBuffers
= BRW_MAX_SOL_BUFFERS
;
579 /* On Gen6, in the worst case, we use up one binding table entry per
580 * transform feedback component (see comments above the definition of
581 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
582 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
583 * BRW_MAX_SOL_BINDINGS.
585 * In "separate components" mode, we need to divide this value by
586 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
587 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
589 ctx
->Const
.MaxTransformFeedbackInterleavedComponents
= BRW_MAX_SOL_BINDINGS
;
590 ctx
->Const
.MaxTransformFeedbackSeparateComponents
=
591 BRW_MAX_SOL_BINDINGS
/ BRW_MAX_SOL_BUFFERS
;
593 ctx
->Const
.AlwaysUseGetTransformFeedbackVertexCount
=
594 !brw
->intelScreen
->has_mi_math_and_lrr
;
597 const int *msaa_modes
= intel_supported_msaa_modes(brw
->intelScreen
);
598 const int clamp_max_samples
=
599 driQueryOptioni(&brw
->optionCache
, "clamp_max_samples");
601 if (clamp_max_samples
< 0) {
602 max_samples
= msaa_modes
[0];
604 /* Select the largest supported MSAA mode that does not exceed
608 for (int i
= 0; msaa_modes
[i
] != 0; ++i
) {
609 if (msaa_modes
[i
] <= clamp_max_samples
) {
610 max_samples
= msaa_modes
[i
];
616 ctx
->Const
.MaxSamples
= max_samples
;
617 ctx
->Const
.MaxColorTextureSamples
= max_samples
;
618 ctx
->Const
.MaxDepthTextureSamples
= max_samples
;
619 ctx
->Const
.MaxIntegerSamples
= max_samples
;
620 ctx
->Const
.MaxImageSamples
= 0;
622 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
623 * to map indices of rectangular grid to sample numbers within a pixel.
624 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
625 * extension implementation. For more details see the comment above
626 * gen6_set_sample_maps() definition.
628 gen6_set_sample_maps(ctx
);
630 ctx
->Const
.MinLineWidth
= 1.0;
631 ctx
->Const
.MinLineWidthAA
= 1.0;
633 ctx
->Const
.MaxLineWidth
= 7.375;
634 ctx
->Const
.MaxLineWidthAA
= 7.375;
635 ctx
->Const
.LineWidthGranularity
= 0.125;
637 ctx
->Const
.MaxLineWidth
= 7.0;
638 ctx
->Const
.MaxLineWidthAA
= 7.0;
639 ctx
->Const
.LineWidthGranularity
= 0.5;
642 /* For non-antialiased lines, we have to round the line width to the
643 * nearest whole number. Make sure that we don't advertise a line
644 * width that, when rounded, will be beyond the actual hardware
647 assert(roundf(ctx
->Const
.MaxLineWidth
) <= ctx
->Const
.MaxLineWidth
);
649 ctx
->Const
.MinPointSize
= 1.0;
650 ctx
->Const
.MinPointSizeAA
= 1.0;
651 ctx
->Const
.MaxPointSize
= 255.0;
652 ctx
->Const
.MaxPointSizeAA
= 255.0;
653 ctx
->Const
.PointSizeGranularity
= 1.0;
655 if (brw
->gen
>= 5 || brw
->is_g4x
)
656 ctx
->Const
.MaxClipPlanes
= 8;
658 ctx
->Const
.LowerTessLevel
= true;
659 ctx
->Const
.LowerTCSPatchVerticesIn
= brw
->gen
>= 8;
660 ctx
->Const
.LowerTESPatchVerticesIn
= true;
661 ctx
->Const
.PrimitiveRestartForPatches
= true;
663 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeInstructions
= 16 * 1024;
664 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxAluInstructions
= 0;
665 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexInstructions
= 0;
666 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxTexIndirections
= 0;
667 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAluInstructions
= 0;
668 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexInstructions
= 0;
669 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTexIndirections
= 0;
670 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAttribs
= 16;
671 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeTemps
= 256;
672 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeAddressRegs
= 1;
673 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
= 1024;
674 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
=
675 MIN2(ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxNativeParameters
,
676 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxEnvParams
);
678 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeInstructions
= 1024;
679 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAluInstructions
= 1024;
680 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexInstructions
= 1024;
681 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTexIndirections
= 1024;
682 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAttribs
= 12;
683 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeTemps
= 256;
684 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeAddressRegs
= 0;
685 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
= 1024;
686 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
=
687 MIN2(ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxNativeParameters
,
688 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxEnvParams
);
690 /* Fragment shaders use real, 32-bit twos-complement integers for all
693 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMin
= 31;
694 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.RangeMax
= 30;
695 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
.Precision
= 0;
696 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
697 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].LowInt
;
699 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMin
= 31;
700 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.RangeMax
= 30;
701 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
.Precision
= 0;
702 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].HighInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
703 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MediumInt
= ctx
->Const
.Program
[MESA_SHADER_VERTEX
].LowInt
;
705 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
706 * but we're not sure how it's actually done for vertex order,
707 * that affect provoking vertex decision. Always use last vertex
708 * convention for quad primitive which works as expected for now.
711 ctx
->Const
.QuadsFollowProvokingVertexConvention
= false;
713 ctx
->Const
.NativeIntegers
= true;
714 ctx
->Const
.VertexID_is_zero_based
= true;
716 /* Regarding the CMP instruction, the Ivybridge PRM says:
718 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
719 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
720 * 0xFFFFFFFF) is assigned to dst."
722 * but PRMs for earlier generations say
724 * "In dword format, one GRF may store up to 8 results. When the register
725 * is used later as a vector of Booleans, as only LSB at each channel
726 * contains meaning [sic] data, software should make sure all higher bits
727 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
729 * We select the representation of a true boolean uniform to be ~0, and fix
730 * the results of Gen <= 5 CMP instruction's with -(result & 1).
732 ctx
->Const
.UniformBooleanTrue
= ~0;
734 /* From the gen4 PRM, volume 4 page 127:
736 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
737 * the base address of the first element of the surface, computed in
738 * software by adding the surface base address to the byte offset of
739 * the element in the buffer."
741 * However, unaligned accesses are slower, so enforce buffer alignment.
743 ctx
->Const
.UniformBufferOffsetAlignment
= 16;
745 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
746 * that we can safely have the CPU and GPU writing the same SSBO on
747 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
748 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
749 * be updating disjoint regions of the buffer simultaneously and that will
750 * break if the regions overlap the same cacheline.
752 ctx
->Const
.ShaderStorageBufferOffsetAlignment
= 64;
753 ctx
->Const
.TextureBufferOffsetAlignment
= 16;
754 ctx
->Const
.MaxTextureBufferSize
= 128 * 1024 * 1024;
757 ctx
->Const
.MaxVarying
= 32;
758 ctx
->Const
.Program
[MESA_SHADER_VERTEX
].MaxOutputComponents
= 128;
759 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxInputComponents
= 64;
760 ctx
->Const
.Program
[MESA_SHADER_GEOMETRY
].MaxOutputComponents
= 128;
761 ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxInputComponents
= 128;
762 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxInputComponents
= 128;
763 ctx
->Const
.Program
[MESA_SHADER_TESS_CTRL
].MaxOutputComponents
= 128;
764 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxInputComponents
= 128;
765 ctx
->Const
.Program
[MESA_SHADER_TESS_EVAL
].MaxOutputComponents
= 128;
768 /* We want the GLSL compiler to emit code that uses condition codes */
769 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
770 ctx
->Const
.ShaderCompilerOptions
[i
] =
771 brw
->intelScreen
->compiler
->glsl_compiler_options
[i
];
775 ctx
->Const
.MaxViewportWidth
= 32768;
776 ctx
->Const
.MaxViewportHeight
= 32768;
779 /* ARB_viewport_array */
780 if (brw
->gen
>= 6 && ctx
->API
== API_OPENGL_CORE
) {
781 ctx
->Const
.MaxViewports
= GEN6_NUM_VIEWPORTS
;
782 ctx
->Const
.ViewportSubpixelBits
= 0;
784 /* Cast to float before negating because MaxViewportWidth is unsigned.
786 ctx
->Const
.ViewportBounds
.Min
= -(float)ctx
->Const
.MaxViewportWidth
;
787 ctx
->Const
.ViewportBounds
.Max
= ctx
->Const
.MaxViewportWidth
;
790 /* ARB_gpu_shader5 */
792 ctx
->Const
.MaxVertexStreams
= MIN2(4, MAX_VERTEX_STREAMS
);
794 /* ARB_framebuffer_no_attachments */
795 ctx
->Const
.MaxFramebufferWidth
= 16384;
796 ctx
->Const
.MaxFramebufferHeight
= 16384;
797 ctx
->Const
.MaxFramebufferLayers
= ctx
->Const
.MaxArrayTextureLayers
;
798 ctx
->Const
.MaxFramebufferSamples
= max_samples
;
800 /* OES_primitive_bounding_box */
801 ctx
->Const
.NoPrimitiveBoundingBoxOutput
= true;
805 brw_initialize_cs_context_constants(struct brw_context
*brw
)
807 struct gl_context
*ctx
= &brw
->ctx
;
808 const struct intel_screen
*screen
= brw
->intelScreen
;
809 const struct gen_device_info
*devinfo
= screen
->devinfo
;
811 /* FINISHME: Do this for all platforms that the kernel supports */
812 if (brw
->is_cherryview
&&
813 screen
->subslice_total
> 0 && screen
->eu_total
> 0) {
814 /* Logical CS threads = EUs per subslice * 7 threads per EU */
815 brw
->max_cs_threads
= screen
->eu_total
/ screen
->subslice_total
* 7;
817 /* Fuse configurations may give more threads than expected, never less. */
818 if (brw
->max_cs_threads
< devinfo
->max_cs_threads
)
819 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
821 brw
->max_cs_threads
= devinfo
->max_cs_threads
;
824 /* Maximum number of scalar compute shader invocations that can be run in
825 * parallel in the same subslice assuming SIMD32 dispatch.
827 * We don't advertise more than 64 threads, because we are limited to 64 by
828 * our usage of thread_width_max in the gpgpu walker command. This only
829 * currently impacts Haswell, which otherwise might be able to advertise 70
830 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
831 * required the number of invocation needed for ARB_compute_shader.
833 const unsigned max_threads
= MIN2(64, brw
->max_cs_threads
);
834 const uint32_t max_invocations
= 32 * max_threads
;
835 ctx
->Const
.MaxComputeWorkGroupSize
[0] = max_invocations
;
836 ctx
->Const
.MaxComputeWorkGroupSize
[1] = max_invocations
;
837 ctx
->Const
.MaxComputeWorkGroupSize
[2] = max_invocations
;
838 ctx
->Const
.MaxComputeWorkGroupInvocations
= max_invocations
;
839 ctx
->Const
.MaxComputeSharedMemorySize
= 64 * 1024;
843 * Process driconf (drirc) options, setting appropriate context flags.
845 * intelInitExtensions still pokes at optionCache directly, in order to
846 * avoid advertising various extensions. No flags are set, so it makes
847 * sense to continue doing that there.
850 brw_process_driconf_options(struct brw_context
*brw
)
852 struct gl_context
*ctx
= &brw
->ctx
;
854 driOptionCache
*options
= &brw
->optionCache
;
855 driParseConfigFiles(options
, &brw
->intelScreen
->optionCache
,
856 brw
->driContext
->driScreenPriv
->myNum
, "i965");
858 int bo_reuse_mode
= driQueryOptioni(options
, "bo_reuse");
859 switch (bo_reuse_mode
) {
860 case DRI_CONF_BO_REUSE_DISABLED
:
862 case DRI_CONF_BO_REUSE_ALL
:
863 intel_bufmgr_gem_enable_reuse(brw
->bufmgr
);
867 if (!driQueryOptionb(options
, "hiz")) {
868 brw
->has_hiz
= false;
869 /* On gen6, you can only do separate stencil with HIZ. */
871 brw
->has_separate_stencil
= false;
874 if (driQueryOptionb(options
, "always_flush_batch")) {
875 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
876 brw
->always_flush_batch
= true;
879 if (driQueryOptionb(options
, "always_flush_cache")) {
880 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
881 brw
->always_flush_cache
= true;
884 if (driQueryOptionb(options
, "disable_throttling")) {
885 fprintf(stderr
, "disabling flush throttling\n");
886 brw
->disable_throttling
= true;
889 brw
->precompile
= driQueryOptionb(&brw
->optionCache
, "shader_precompile");
891 if (driQueryOptionb(&brw
->optionCache
, "precise_trig"))
892 brw
->intelScreen
->compiler
->precise_trig
= true;
894 ctx
->Const
.ForceGLSLExtensionsWarn
=
895 driQueryOptionb(options
, "force_glsl_extensions_warn");
897 ctx
->Const
.DisableGLSLLineContinuations
=
898 driQueryOptionb(options
, "disable_glsl_line_continuations");
900 ctx
->Const
.AllowGLSLExtensionDirectiveMidShader
=
901 driQueryOptionb(options
, "allow_glsl_extension_directive_midshader");
903 ctx
->Const
.GLSLZeroInit
= driQueryOptionb(options
, "glsl_zero_init");
905 brw
->dual_color_blend_by_location
=
906 driQueryOptionb(options
, "dual_color_blend_by_location");
910 brwCreateContext(gl_api api
,
911 const struct gl_config
*mesaVis
,
912 __DRIcontext
*driContextPriv
,
913 unsigned major_version
,
914 unsigned minor_version
,
917 unsigned *dri_ctx_error
,
918 void *sharedContextPrivate
)
920 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
921 struct intel_screen
*screen
= driContextPriv
->driScreenPriv
->driverPrivate
;
922 const struct gen_device_info
*devinfo
= screen
->devinfo
;
923 struct dd_function_table functions
;
925 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
926 * provides us with context reset notifications.
928 uint32_t allowed_flags
= __DRI_CTX_FLAG_DEBUG
929 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
;
931 if (screen
->has_context_reset_notification
)
932 allowed_flags
|= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
;
934 if (flags
& ~allowed_flags
) {
935 *dri_ctx_error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
939 struct brw_context
*brw
= rzalloc(NULL
, struct brw_context
);
941 fprintf(stderr
, "%s: failed to alloc context\n", __func__
);
942 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
946 driContextPriv
->driverPrivate
= brw
;
947 brw
->driContext
= driContextPriv
;
948 brw
->intelScreen
= screen
;
949 brw
->bufmgr
= screen
->bufmgr
;
951 brw
->gen
= devinfo
->gen
;
952 brw
->gt
= devinfo
->gt
;
953 brw
->is_g4x
= devinfo
->is_g4x
;
954 brw
->is_baytrail
= devinfo
->is_baytrail
;
955 brw
->is_haswell
= devinfo
->is_haswell
;
956 brw
->is_cherryview
= devinfo
->is_cherryview
;
957 brw
->is_broxton
= devinfo
->is_broxton
;
958 brw
->has_llc
= devinfo
->has_llc
;
959 brw
->has_hiz
= devinfo
->has_hiz_and_separate_stencil
;
960 brw
->has_separate_stencil
= devinfo
->has_hiz_and_separate_stencil
;
961 brw
->has_pln
= devinfo
->has_pln
;
962 brw
->has_compr4
= devinfo
->has_compr4
;
963 brw
->has_surface_tile_offset
= devinfo
->has_surface_tile_offset
;
964 brw
->has_negative_rhw_bug
= devinfo
->has_negative_rhw_bug
;
965 brw
->needs_unlit_centroid_workaround
=
966 devinfo
->needs_unlit_centroid_workaround
;
968 brw
->must_use_separate_stencil
= devinfo
->must_use_separate_stencil
;
969 brw
->has_swizzling
= screen
->hw_has_swizzling
;
971 isl_device_init(&brw
->isl_dev
, devinfo
, screen
->hw_has_swizzling
);
973 brw
->vs
.base
.stage
= MESA_SHADER_VERTEX
;
974 brw
->tcs
.base
.stage
= MESA_SHADER_TESS_CTRL
;
975 brw
->tes
.base
.stage
= MESA_SHADER_TESS_EVAL
;
976 brw
->gs
.base
.stage
= MESA_SHADER_GEOMETRY
;
977 brw
->wm
.base
.stage
= MESA_SHADER_FRAGMENT
;
979 gen8_init_vtable_surface_functions(brw
);
980 brw
->vtbl
.emit_depth_stencil_hiz
= gen8_emit_depth_stencil_hiz
;
981 } else if (brw
->gen
>= 7) {
982 gen7_init_vtable_surface_functions(brw
);
983 brw
->vtbl
.emit_depth_stencil_hiz
= gen7_emit_depth_stencil_hiz
;
984 } else if (brw
->gen
>= 6) {
985 gen6_init_vtable_surface_functions(brw
);
986 brw
->vtbl
.emit_depth_stencil_hiz
= gen6_emit_depth_stencil_hiz
;
988 gen4_init_vtable_surface_functions(brw
);
989 brw
->vtbl
.emit_depth_stencil_hiz
= brw_emit_depth_stencil_hiz
;
992 brw_init_driver_functions(brw
, &functions
);
995 functions
.GetGraphicsResetStatus
= brw_get_graphics_reset_status
;
997 struct gl_context
*ctx
= &brw
->ctx
;
999 if (!_mesa_initialize_context(ctx
, api
, mesaVis
, shareCtx
, &functions
)) {
1000 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1001 fprintf(stderr
, "%s: failed to init mesa context\n", __func__
);
1002 intelDestroyContext(driContextPriv
);
1006 driContextSetFlags(ctx
, flags
);
1008 /* Initialize the software rasterizer and helper modules.
1010 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1011 * software fallbacks (which we have to support on legacy GL to do weird
1012 * glDrawPixels(), glBitmap(), and other functions).
1014 if (api
!= API_OPENGL_CORE
&& api
!= API_OPENGLES2
) {
1015 _swrast_CreateContext(ctx
);
1018 _vbo_CreateContext(ctx
);
1019 if (ctx
->swrast_context
) {
1020 _tnl_CreateContext(ctx
);
1021 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= _tnl_run_pipeline
;
1022 _swsetup_CreateContext(ctx
);
1024 /* Configure swrast to match hardware characteristics: */
1025 _swrast_allow_pixel_fog(ctx
, false);
1026 _swrast_allow_vertex_fog(ctx
, true);
1029 _mesa_meta_init(ctx
);
1031 brw_process_driconf_options(brw
);
1033 if (INTEL_DEBUG
& DEBUG_PERF
)
1034 brw
->perf_debug
= true;
1036 brw_initialize_cs_context_constants(brw
);
1037 brw_initialize_context_constants(brw
);
1039 ctx
->Const
.ResetStrategy
= notify_reset
1040 ? GL_LOSE_CONTEXT_ON_RESET_ARB
: GL_NO_RESET_NOTIFICATION_ARB
;
1042 /* Reinitialize the context point state. It depends on ctx->Const values. */
1043 _mesa_init_point(ctx
);
1045 intel_fbo_init(brw
);
1047 intel_batchbuffer_init(brw
);
1049 if (brw
->gen
>= 6) {
1050 /* Create a new hardware context. Using a hardware context means that
1051 * our GPU state will be saved/restored on context switch, allowing us
1052 * to assume that the GPU is in the same state we left it in.
1054 * This is required for transform feedback buffer offsets, query objects,
1055 * and also allows us to reduce how much state we have to emit.
1057 brw
->hw_ctx
= drm_intel_gem_context_create(brw
->bufmgr
);
1060 fprintf(stderr
, "Gen6+ requires Kernel 3.6 or later.\n");
1061 intelDestroyContext(driContextPriv
);
1066 if (brw_init_pipe_control(brw
, devinfo
)) {
1067 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
1068 intelDestroyContext(driContextPriv
);
1072 brw_init_state(brw
);
1074 intelInitExtensions(ctx
);
1076 brw_init_surface_formats(brw
);
1079 brw_blorp_init(brw
);
1081 brw
->max_vs_threads
= devinfo
->max_vs_threads
;
1082 brw
->max_hs_threads
= devinfo
->max_hs_threads
;
1083 brw
->max_ds_threads
= devinfo
->max_ds_threads
;
1084 brw
->max_gs_threads
= devinfo
->max_gs_threads
;
1085 brw
->max_wm_threads
= devinfo
->max_wm_threads
;
1086 brw
->urb
.size
= devinfo
->urb
.size
;
1087 brw
->urb
.min_vs_entries
= devinfo
->urb
.min_vs_entries
;
1088 brw
->urb
.max_vs_entries
= devinfo
->urb
.max_vs_entries
;
1089 brw
->urb
.max_hs_entries
= devinfo
->urb
.max_hs_entries
;
1090 brw
->urb
.max_ds_entries
= devinfo
->urb
.max_ds_entries
;
1091 brw
->urb
.max_gs_entries
= devinfo
->urb
.max_gs_entries
;
1094 brw
->urb
.gs_present
= false;
1096 brw
->prim_restart
.in_progress
= false;
1097 brw
->prim_restart
.enable_cut_index
= false;
1098 brw
->gs
.enabled
= false;
1099 brw
->sf
.viewport_transform_enable
= true;
1101 brw
->predicate
.state
= BRW_PREDICATE_STATE_RENDER
;
1103 brw
->max_gtt_map_object_size
= screen
->max_gtt_map_object_size
;
1105 brw
->use_resource_streamer
= screen
->has_resource_streamer
&&
1106 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1107 env_var_as_boolean("INTEL_USE_GATHER", false));
1109 ctx
->VertexProgram
._MaintainTnlProgram
= true;
1110 ctx
->FragmentProgram
._MaintainTexEnvProgram
= true;
1112 brw_draw_init( brw
);
1114 if ((flags
& __DRI_CTX_FLAG_DEBUG
) != 0) {
1115 /* Turn on some extra GL_ARB_debug_output generation. */
1116 brw
->perf_debug
= true;
1119 if ((flags
& __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS
) != 0)
1120 ctx
->Const
.ContextFlags
|= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB
;
1122 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
1123 brw_init_shader_time(brw
);
1125 _mesa_compute_version(ctx
);
1127 _mesa_initialize_dispatch_tables(ctx
);
1128 _mesa_initialize_vbo_vtxfmt(ctx
);
1130 if (ctx
->Extensions
.AMD_performance_monitor
) {
1131 brw_init_performance_monitors(brw
);
1134 vbo_use_buffer_objects(ctx
);
1135 vbo_always_unmap_buffers(ctx
);
1141 intelDestroyContext(__DRIcontext
* driContextPriv
)
1143 struct brw_context
*brw
=
1144 (struct brw_context
*) driContextPriv
->driverPrivate
;
1145 struct gl_context
*ctx
= &brw
->ctx
;
1147 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1148 if (INTEL_DEBUG
& DEBUG_AUB
) {
1149 intel_batchbuffer_flush(brw
);
1150 aub_dump_bmp(&brw
->ctx
);
1153 _mesa_meta_free(&brw
->ctx
);
1155 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
1156 /* Force a report. */
1157 brw
->shader_time
.report_time
= 0;
1159 brw_collect_and_report_shader_time(brw
);
1160 brw_destroy_shader_time(brw
);
1164 blorp_finish(&brw
->blorp
);
1166 brw_destroy_state(brw
);
1167 brw_draw_destroy(brw
);
1169 drm_intel_bo_unreference(brw
->curbe
.curbe_bo
);
1170 if (brw
->vs
.base
.scratch_bo
)
1171 drm_intel_bo_unreference(brw
->vs
.base
.scratch_bo
);
1172 if (brw
->tcs
.base
.scratch_bo
)
1173 drm_intel_bo_unreference(brw
->tcs
.base
.scratch_bo
);
1174 if (brw
->tes
.base
.scratch_bo
)
1175 drm_intel_bo_unreference(brw
->tes
.base
.scratch_bo
);
1176 if (brw
->gs
.base
.scratch_bo
)
1177 drm_intel_bo_unreference(brw
->gs
.base
.scratch_bo
);
1178 if (brw
->wm
.base
.scratch_bo
)
1179 drm_intel_bo_unreference(brw
->wm
.base
.scratch_bo
);
1181 gen7_reset_hw_bt_pool_offsets(brw
);
1182 drm_intel_bo_unreference(brw
->hw_bt_pool
.bo
);
1183 brw
->hw_bt_pool
.bo
= NULL
;
1185 drm_intel_gem_context_destroy(brw
->hw_ctx
);
1187 if (ctx
->swrast_context
) {
1188 _swsetup_DestroyContext(&brw
->ctx
);
1189 _tnl_DestroyContext(&brw
->ctx
);
1191 _vbo_DestroyContext(&brw
->ctx
);
1193 if (ctx
->swrast_context
)
1194 _swrast_DestroyContext(&brw
->ctx
);
1196 brw_fini_pipe_control(brw
);
1197 intel_batchbuffer_free(brw
);
1199 drm_intel_bo_unreference(brw
->throttle_batch
[1]);
1200 drm_intel_bo_unreference(brw
->throttle_batch
[0]);
1201 brw
->throttle_batch
[1] = NULL
;
1202 brw
->throttle_batch
[0] = NULL
;
1204 driDestroyOptionCache(&brw
->optionCache
);
1206 /* free the Mesa context */
1207 _mesa_free_context_data(&brw
->ctx
);
1210 driContextPriv
->driverPrivate
= NULL
;
1214 intelUnbindContext(__DRIcontext
* driContextPriv
)
1216 /* Unset current context and dispath table */
1217 _mesa_make_current(NULL
, NULL
, NULL
);
1223 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1224 * on window system framebuffers.
1226 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1227 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1228 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1229 * for a visual where you're guaranteed to be capable, but it turns out that
1230 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1231 * incapable ones, because there's no difference between the two in resources
1232 * used. Applications thus get built that accidentally rely on the default
1233 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1236 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1237 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1238 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1239 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1240 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1241 * and get no sRGB encode (assuming that both kinds of visual are available).
1242 * Thus our choice to support sRGB by default on our visuals for desktop would
1243 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1245 * Unfortunately, renderbuffer setup happens before a context is created. So
1246 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1247 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1248 * yet), we go turn that back off before anyone finds out.
1251 intel_gles3_srgb_workaround(struct brw_context
*brw
,
1252 struct gl_framebuffer
*fb
)
1254 struct gl_context
*ctx
= &brw
->ctx
;
1256 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
1259 /* Some day when we support the sRGB capable bit on visuals available for
1260 * GLES, we'll need to respect that and not disable things here.
1262 fb
->Visual
.sRGBCapable
= false;
1263 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
1264 struct gl_renderbuffer
*rb
= fb
->Attachment
[i
].Renderbuffer
;
1266 rb
->Format
= _mesa_get_srgb_format_linear(rb
->Format
);
1271 intelMakeCurrent(__DRIcontext
* driContextPriv
,
1272 __DRIdrawable
* driDrawPriv
,
1273 __DRIdrawable
* driReadPriv
)
1275 struct brw_context
*brw
;
1276 GET_CURRENT_CONTEXT(curCtx
);
1279 brw
= (struct brw_context
*) driContextPriv
->driverPrivate
;
1283 /* According to the glXMakeCurrent() man page: "Pending commands to
1284 * the previous context, if any, are flushed before it is released."
1285 * But only flush if we're actually changing contexts.
1287 if (brw_context(curCtx
) && brw_context(curCtx
) != brw
) {
1288 _mesa_flush(curCtx
);
1291 if (driContextPriv
) {
1292 struct gl_context
*ctx
= &brw
->ctx
;
1293 struct gl_framebuffer
*fb
, *readFb
;
1295 if (driDrawPriv
== NULL
) {
1296 fb
= _mesa_get_incomplete_framebuffer();
1298 fb
= driDrawPriv
->driverPrivate
;
1299 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1302 if (driReadPriv
== NULL
) {
1303 readFb
= _mesa_get_incomplete_framebuffer();
1305 readFb
= driReadPriv
->driverPrivate
;
1306 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1309 /* The sRGB workaround changes the renderbuffer's format. We must change
1310 * the format before the renderbuffer's miptree get's allocated, otherwise
1311 * the formats of the renderbuffer and its miptree will differ.
1313 intel_gles3_srgb_workaround(brw
, fb
);
1314 intel_gles3_srgb_workaround(brw
, readFb
);
1316 /* If the context viewport hasn't been initialized, force a call out to
1317 * the loader to get buffers so we have a drawable size for the initial
1319 if (!brw
->ctx
.ViewportInitialized
)
1320 intel_prepare_render(brw
);
1322 _mesa_make_current(ctx
, fb
, readFb
);
1324 _mesa_make_current(NULL
, NULL
, NULL
);
1331 intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1332 __DRIdrawable
*drawable
)
1335 /* MSAA and fast color clear are not supported, so don't waste time
1336 * checking whether a resolve is needed.
1341 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1342 struct intel_renderbuffer
*rb
;
1344 /* Usually, only the back buffer will need to be downsampled. However,
1345 * the front buffer will also need it if the user has rendered into it.
1347 static const gl_buffer_index buffers
[2] = {
1352 for (int i
= 0; i
< 2; ++i
) {
1353 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
1354 if (rb
== NULL
|| rb
->mt
== NULL
)
1356 if (rb
->mt
->num_samples
<= 1)
1357 intel_miptree_resolve_color(brw
, rb
->mt
, 0);
1359 intel_renderbuffer_downsample(brw
, rb
);
1364 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
1366 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
1370 intel_query_dri2_buffers(struct brw_context
*brw
,
1371 __DRIdrawable
*drawable
,
1372 __DRIbuffer
**buffers
,
1376 intel_process_dri2_buffer(struct brw_context
*brw
,
1377 __DRIdrawable
*drawable
,
1378 __DRIbuffer
*buffer
,
1379 struct intel_renderbuffer
*rb
,
1380 const char *buffer_name
);
1383 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
);
1386 intel_update_dri2_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1388 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1389 struct intel_renderbuffer
*rb
;
1390 __DRIbuffer
*buffers
= NULL
;
1392 const char *region_name
;
1394 /* Set this up front, so that in case our buffers get invalidated
1395 * while we're getting new buffers, we don't clobber the stamp and
1396 * thus ignore the invalidate. */
1397 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1399 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1400 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1402 intel_query_dri2_buffers(brw
, drawable
, &buffers
, &count
);
1404 if (buffers
== NULL
)
1407 for (i
= 0; i
< count
; i
++) {
1408 switch (buffers
[i
].attachment
) {
1409 case __DRI_BUFFER_FRONT_LEFT
:
1410 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1411 region_name
= "dri2 front buffer";
1414 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
1415 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1416 region_name
= "dri2 fake front buffer";
1419 case __DRI_BUFFER_BACK_LEFT
:
1420 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1421 region_name
= "dri2 back buffer";
1424 case __DRI_BUFFER_DEPTH
:
1425 case __DRI_BUFFER_HIZ
:
1426 case __DRI_BUFFER_DEPTH_STENCIL
:
1427 case __DRI_BUFFER_STENCIL
:
1428 case __DRI_BUFFER_ACCUM
:
1431 "unhandled buffer attach event, attachment type %d\n",
1432 buffers
[i
].attachment
);
1436 intel_process_dri2_buffer(brw
, drawable
, &buffers
[i
], rb
, region_name
);
1442 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
1444 struct brw_context
*brw
= context
->driverPrivate
;
1445 __DRIscreen
*dri_screen
= brw
->intelScreen
->driScrnPriv
;
1447 /* Set this up front, so that in case our buffers get invalidated
1448 * while we're getting new buffers, we don't clobber the stamp and
1449 * thus ignore the invalidate. */
1450 drawable
->lastStamp
= drawable
->dri2
.stamp
;
1452 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
1453 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
1455 if (dri_screen
->image
.loader
)
1456 intel_update_image_buffers(brw
, drawable
);
1458 intel_update_dri2_buffers(brw
, drawable
);
1460 driUpdateFramebufferSize(&brw
->ctx
, drawable
);
1464 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1465 * state is required.
1468 intel_prepare_render(struct brw_context
*brw
)
1470 struct gl_context
*ctx
= &brw
->ctx
;
1471 __DRIcontext
*driContext
= brw
->driContext
;
1472 __DRIdrawable
*drawable
;
1474 drawable
= driContext
->driDrawablePriv
;
1475 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
1476 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1477 intel_update_renderbuffers(driContext
, drawable
);
1478 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
1481 drawable
= driContext
->driReadablePriv
;
1482 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
1483 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
1484 intel_update_renderbuffers(driContext
, drawable
);
1485 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
1488 /* If we're currently rendering to the front buffer, the rendering
1489 * that will happen next will probably dirty the front buffer. So
1490 * mark it as dirty here.
1492 if (_mesa_is_front_buffer_drawing(ctx
->DrawBuffer
))
1493 brw
->front_buffer_dirty
= true;
1497 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1499 * To determine which DRI buffers to request, examine the renderbuffers
1500 * attached to the drawable's framebuffer. Then request the buffers with
1501 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1503 * This is called from intel_update_renderbuffers().
1505 * \param drawable Drawable whose buffers are queried.
1506 * \param buffers [out] List of buffers returned by DRI2 query.
1507 * \param buffer_count [out] Number of buffers returned.
1509 * \see intel_update_renderbuffers()
1510 * \see DRI2GetBuffers()
1511 * \see DRI2GetBuffersWithFormat()
1514 intel_query_dri2_buffers(struct brw_context
*brw
,
1515 __DRIdrawable
*drawable
,
1516 __DRIbuffer
**buffers
,
1519 __DRIscreen
*dri_screen
= brw
->intelScreen
->driScrnPriv
;
1520 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1522 unsigned attachments
[8];
1524 struct intel_renderbuffer
*front_rb
;
1525 struct intel_renderbuffer
*back_rb
;
1527 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1528 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1530 memset(attachments
, 0, sizeof(attachments
));
1531 if ((_mesa_is_front_buffer_drawing(fb
) ||
1532 _mesa_is_front_buffer_reading(fb
) ||
1533 !back_rb
) && front_rb
) {
1534 /* If a fake front buffer is in use, then querying for
1535 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1536 * the real front buffer to the fake front buffer. So before doing the
1537 * query, we need to make sure all the pending drawing has landed in the
1538 * real front buffer.
1540 intel_batchbuffer_flush(brw
);
1541 intel_flush_front(&brw
->ctx
);
1543 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1544 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1545 } else if (front_rb
&& brw
->front_buffer_dirty
) {
1546 /* We have pending front buffer rendering, but we aren't querying for a
1547 * front buffer. If the front buffer we have is a fake front buffer,
1548 * the X server is going to throw it away when it processes the query.
1549 * So before doing the query, make sure all the pending drawing has
1550 * landed in the real front buffer.
1552 intel_batchbuffer_flush(brw
);
1553 intel_flush_front(&brw
->ctx
);
1557 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1558 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1561 assert(i
<= ARRAY_SIZE(attachments
));
1564 dri_screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1569 drawable
->loaderPrivate
);
1573 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1575 * This is called from intel_update_renderbuffers().
1578 * DRI buffers whose attachment point is DRI2BufferStencil or
1579 * DRI2BufferDepthStencil are handled as special cases.
1581 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1582 * that is passed to drm_intel_bo_gem_create_from_name().
1584 * \see intel_update_renderbuffers()
1587 intel_process_dri2_buffer(struct brw_context
*brw
,
1588 __DRIdrawable
*drawable
,
1589 __DRIbuffer
*buffer
,
1590 struct intel_renderbuffer
*rb
,
1591 const char *buffer_name
)
1593 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1599 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1601 /* We try to avoid closing and reopening the same BO name, because the first
1602 * use of a mapping of the buffer involves a bunch of page faulting which is
1603 * moderately expensive.
1605 struct intel_mipmap_tree
*last_mt
;
1606 if (num_samples
== 0)
1609 last_mt
= rb
->singlesample_mt
;
1611 uint32_t old_name
= 0;
1613 /* The bo already has a name because the miptree was created by a
1614 * previous call to intel_process_dri2_buffer(). If a bo already has a
1615 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1616 * create a new name.
1618 drm_intel_bo_flink(last_mt
->bo
, &old_name
);
1621 if (old_name
== buffer
->name
)
1624 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1626 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1627 buffer
->name
, buffer
->attachment
,
1628 buffer
->cpp
, buffer
->pitch
);
1631 bo
= drm_intel_bo_gem_create_from_name(brw
->bufmgr
, buffer_name
,
1635 "Failed to open BO for returned DRI2 buffer "
1636 "(%dx%d, %s, named %d).\n"
1637 "This is likely a bug in the X Server that will lead to a "
1639 drawable
->w
, drawable
->h
, buffer_name
, buffer
->name
);
1643 intel_update_winsys_renderbuffer_miptree(brw
, rb
, bo
,
1644 drawable
->w
, drawable
->h
,
1647 if (_mesa_is_front_buffer_drawing(fb
) &&
1648 (buffer
->attachment
== __DRI_BUFFER_FRONT_LEFT
||
1649 buffer
->attachment
== __DRI_BUFFER_FAKE_FRONT_LEFT
) &&
1650 rb
->Base
.Base
.NumSamples
> 1) {
1651 intel_renderbuffer_upsample(brw
, rb
);
1656 drm_intel_bo_unreference(bo
);
1660 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1662 * To determine which DRI buffers to request, examine the renderbuffers
1663 * attached to the drawable's framebuffer. Then request the buffers from
1666 * This is called from intel_update_renderbuffers().
1668 * \param drawable Drawable whose buffers are queried.
1669 * \param buffers [out] List of buffers returned by DRI2 query.
1670 * \param buffer_count [out] Number of buffers returned.
1672 * \see intel_update_renderbuffers()
1676 intel_update_image_buffer(struct brw_context
*intel
,
1677 __DRIdrawable
*drawable
,
1678 struct intel_renderbuffer
*rb
,
1680 enum __DRIimageBufferMask buffer_type
)
1682 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1684 if (!rb
|| !buffer
->bo
)
1687 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1689 /* Check and see if we're already bound to the right
1692 struct intel_mipmap_tree
*last_mt
;
1693 if (num_samples
== 0)
1696 last_mt
= rb
->singlesample_mt
;
1698 if (last_mt
&& last_mt
->bo
== buffer
->bo
)
1701 intel_update_winsys_renderbuffer_miptree(intel
, rb
, buffer
->bo
,
1702 buffer
->width
, buffer
->height
,
1705 if (_mesa_is_front_buffer_drawing(fb
) &&
1706 buffer_type
== __DRI_IMAGE_BUFFER_FRONT
&&
1707 rb
->Base
.Base
.NumSamples
> 1) {
1708 intel_renderbuffer_upsample(intel
, rb
);
1713 intel_update_image_buffers(struct brw_context
*brw
, __DRIdrawable
*drawable
)
1715 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1716 __DRIscreen
*dri_screen
= brw
->intelScreen
->driScrnPriv
;
1717 struct intel_renderbuffer
*front_rb
;
1718 struct intel_renderbuffer
*back_rb
;
1719 struct __DRIimageList images
;
1720 unsigned int format
;
1721 uint32_t buffer_mask
= 0;
1724 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1725 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1728 format
= intel_rb_format(back_rb
);
1730 format
= intel_rb_format(front_rb
);
1734 if (front_rb
&& (_mesa_is_front_buffer_drawing(fb
) ||
1735 _mesa_is_front_buffer_reading(fb
) || !back_rb
)) {
1736 buffer_mask
|= __DRI_IMAGE_BUFFER_FRONT
;
1740 buffer_mask
|= __DRI_IMAGE_BUFFER_BACK
;
1742 ret
= dri_screen
->image
.loader
->getBuffers(drawable
,
1743 driGLFormatToImageFormat(format
),
1744 &drawable
->dri2
.stamp
,
1745 drawable
->loaderPrivate
,
1751 if (images
.image_mask
& __DRI_IMAGE_BUFFER_FRONT
) {
1752 drawable
->w
= images
.front
->width
;
1753 drawable
->h
= images
.front
->height
;
1754 intel_update_image_buffer(brw
,
1758 __DRI_IMAGE_BUFFER_FRONT
);
1760 if (images
.image_mask
& __DRI_IMAGE_BUFFER_BACK
) {
1761 drawable
->w
= images
.back
->width
;
1762 drawable
->h
= images
.back
->height
;
1763 intel_update_image_buffer(brw
,
1767 __DRI_IMAGE_BUFFER_BACK
);