src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/api_exec.h"
  34 #include "main/imports.h"
  35 #include "main/macros.h"
  36 #include "main/simple_list.h"
  37 #include "main/version.h"
  38 #include "main/vtxfmt.h"
  39
  40 #include "vbo/vbo_context.h"
  41
  42 #include "brw_context.h"
  43 #include "brw_defines.h"
  44 #include "brw_draw.h"
  45 #include "brw_state.h"
  46
  47 #include "intel_fbo.h"
  48 #include "intel_mipmap_tree.h"
  49 #include "intel_regions.h"
  50 #include "intel_span.h"
  51 #include "intel_tex.h"
  52 #include "intel_tex_obj.h"
  53
  54 #include "tnl/t_pipeline.h"
  55 #include "glsl/ralloc.h"
  56
  57 /***************************************
  58  * Mesa's Driver Functions
  59  ***************************************/
  60
  61 static size_t
  62 brw_query_samples_for_format(struct gl_context *ctx, GLenum internalFormat,
  63                              int samples[16])
  64 {
  65    struct intel_context *intel = intel_context(ctx);
  66
  67    switch (intel->gen) {
  68    case 7:
  69       samples[0] = 8;
  70       samples[1] = 4;
  71       return 2;
  72
  73    case 6:
  74       samples[0] = 4;
  75       return 1;
  76
  77    default:
  78       samples[0] = 1;
  79       return 1;
  80    }
  81 }
  82
  83 static void brwInitDriverFunctions(struct intel_screen *screen,
  84                                    struct dd_function_table *functions)
  85 {
  86    intelInitDriverFunctions( functions );
  87
  88    brwInitFragProgFuncs( functions );
  89    brw_init_queryobj_functions(functions);
  90
  91    functions->QuerySamplesForFormat = brw_query_samples_for_format;
  92    functions->BeginTransformFeedback = brw_begin_transform_feedback;
  93
  94    if (screen->gen >= 7)
  95       functions->EndTransformFeedback = gen7_end_transform_feedback;
  96    else
  97       functions->EndTransformFeedback = brw_end_transform_feedback;
  98 }
  99
 100 bool
 101 brwCreateContext(int api,
 102                  const struct gl_config *mesaVis,
 103                  __DRIcontext *driContextPriv,
 104                  unsigned major_version,
 105                  unsigned minor_version,
 106                  uint32_t flags,
 107                  unsigned *error,
 108                  void *sharedContextPrivate)
 109 {
 110    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 111    struct intel_screen *screen = sPriv->driverPrivate;
 112    struct dd_function_table functions;
 113    unsigned i;
 114
 115    struct brw_context *brw = rzalloc(NULL, struct brw_context);
 116    if (!brw) {
 117       printf("%s: failed to alloc context\n", __FUNCTION__);
 118       *error = __DRI_CTX_ERROR_NO_MEMORY;
 119       return false;
 120    }
 121
 122    /* brwInitVtbl needs to know the chipset generation so that it can set the
 123     * right pointers.
 124     */
 125    brw->intel.gen = screen->gen;
 126
 127    brwInitVtbl( brw );
 128
 129    brwInitDriverFunctions(screen, &functions);
 130
 131    struct intel_context *intel = &brw->intel;
 132    struct gl_context *ctx = &intel->ctx;
 133
 134    if (!intelInitContext( intel, api, major_version, minor_version,
 135                           mesaVis, driContextPriv,
 136                           sharedContextPrivate, &functions,
 137                           error)) {
 138       printf("%s: failed to init intel context\n", __FUNCTION__);
 139       ralloc_free(brw);
 140       return false;
 141    }
 142
 143    brw_init_surface_formats(brw);
 144
 145    /* Initialize swrast, tnl driver tables: */
 146    intelInitSpanFuncs(ctx);
 147
 148    TNLcontext *tnl = TNL_CONTEXT(ctx);
 149    if (tnl)
 150       tnl->Driver.RunPipeline = _tnl_run_pipeline;
 151
 152    ctx->Const.MaxDualSourceDrawBuffers = 1;
 153    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
 154    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
 155    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
 156    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
 157                                      ctx->Const.MaxTextureImageUnits);
 158    ctx->Const.MaxVertexTextureImageUnits = BRW_MAX_TEX_UNIT;
 159    ctx->Const.MaxCombinedTextureImageUnits =
 160       ctx->Const.MaxVertexTextureImageUnits +
 161       ctx->Const.MaxTextureImageUnits;
 162
 163    ctx->Const.MaxTextureLevels = 14; /* 8192 */
 164    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 165            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 166    ctx->Const.Max3DTextureLevels = 9;
 167    ctx->Const.MaxCubeTextureLevels = 12;
 168
 169    if (intel->gen >= 7)
 170       ctx->Const.MaxArrayTextureLayers = 2048;
 171    else
 172       ctx->Const.MaxArrayTextureLayers = 512;
 173
 174    ctx->Const.MaxTextureRectSize = (1<<12);
 175
 176    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 177
 178    /* Hardware only supports a limited number of transform feedback buffers.
 179     * So we need to override the Mesa default (which is based only on software
 180     * limits).
 181     */
 182    ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
 183
 184    /* On Gen6, in the worst case, we use up one binding table entry per
 185     * transform feedback component (see comments above the definition of
 186     * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
 187     * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
 188     * BRW_MAX_SOL_BINDINGS.
 189     *
 190     * In "separate components" mode, we need to divide this value by
 191     * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
 192     * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
 193     */
 194    ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
 195    ctx->Const.MaxTransformFeedbackSeparateComponents =
 196       BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
 197
 198    if (intel->gen == 6)
 199       ctx->Const.MaxSamples = 4;
 200    else if (intel->gen >= 7)
 201       ctx->Const.MaxSamples = 8;
 202
 203    /* if conformance mode is set, swrast can handle any size AA point */
 204    ctx->Const.MaxPointSizeAA = 255.0;
 205
 206    /* We want the GLSL compiler to emit code that uses condition codes */
 207    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 208       ctx->ShaderCompilerOptions[i].MaxIfDepth = intel->gen < 6 ? 16 : UINT_MAX;
 209       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
 210       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
 211       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
 212       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
 213       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
 214
 215       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 216          (i == MESA_SHADER_FRAGMENT);
 217       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 218          (i == MESA_SHADER_FRAGMENT);
 219       ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
 220    }
 221
 222    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 223    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 224    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 225    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 226    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 227    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 228    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 229    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 230    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 231    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 232    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 233    ctx->Const.VertexProgram.MaxEnvParams =
 234       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 235            ctx->Const.VertexProgram.MaxEnvParams);
 236
 237    ctx->Const.FragmentProgram.MaxNativeInstructions = (1 * 1024);
 238    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (1 * 1024);
 239    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (1 * 1024);
 240    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (1 * 1024);
 241    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 242    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 243    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 244    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 245    ctx->Const.FragmentProgram.MaxEnvParams =
 246       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 247            ctx->Const.FragmentProgram.MaxEnvParams);
 248
 249    /* Fragment shaders use real, 32-bit twos-complement integers for all
 250     * integer types.
 251     */
 252    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 253    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 254    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 255    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 256       = ctx->Const.FragmentProgram.LowInt;
 257
 258    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 259       but we're not sure how it's actually done for vertex order,
 260       that affect provoking vertex decision. Always use last vertex
 261       convention for quad primitive which works as expected for now. */
 262    if (intel->gen >= 6)
 263        ctx->Const.QuadsFollowProvokingVertexConvention = false;
 264
 265    ctx->Const.QueryCounterBits.Timestamp = 36;
 266
 267    if (intel->is_g4x || intel->gen >= 5) {
 268       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 269       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 270       brw->has_surface_tile_offset = true;
 271       if (intel->gen < 6)
 272           brw->has_compr4 = true;
 273       brw->has_aa_line_parameters = true;
 274       brw->has_pln = true;
 275   } else {
 276       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 277       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 278    }
 279
 280    /* WM maximum threads is number of EUs times number of threads per EU. */
 281    assert(intel->gen <= 7);
 282
 283    if (intel->is_haswell) {
 284       if (intel->gt == 1) {
 285          brw->max_wm_threads = 102;
 286          brw->max_vs_threads = 70;
 287          brw->urb.size = 128;
 288          brw->urb.max_vs_entries = 640;
 289          brw->urb.max_gs_entries = 256;
 290       } else if (intel->gt == 2) {
 291          brw->max_wm_threads = 204;
 292          brw->max_vs_threads = 280;
 293          brw->urb.size = 256;
 294          brw->urb.max_vs_entries = 1664;
 295          brw->urb.max_gs_entries = 640;
 296       }
 297    } else if (intel->gen == 7) {
 298       if (intel->gt == 1) {
 299          brw->max_wm_threads = 48;
 300          brw->max_vs_threads = 36;
 301          brw->max_gs_threads = 36;
 302          brw->urb.size = 128;
 303          brw->urb.max_vs_entries = 512;
 304          brw->urb.max_gs_entries = 192;
 305       } else if (intel->gt == 2) {
 306          brw->max_wm_threads = 172;
 307          brw->max_vs_threads = 128;
 308          brw->max_gs_threads = 128;
 309          brw->urb.size = 256;
 310          brw->urb.max_vs_entries = 704;
 311          brw->urb.max_gs_entries = 320;
 312       } else {
 313          assert(!"Unknown gen7 device.");
 314       }
 315    } else if (intel->gen == 6) {
 316       if (intel->gt == 2) {
 317          brw->max_wm_threads = 80;
 318          brw->max_vs_threads = 60;
 319          brw->max_gs_threads = 60;
 320          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 321          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 322          brw->urb.max_gs_entries = 256;
 323       } else {
 324          brw->max_wm_threads = 40;
 325          brw->max_vs_threads = 24;
 326          brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
 327          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 328          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 329          brw->urb.max_gs_entries = 256;
 330       }
 331       brw->urb.gen6_gs_previously_active = false;
 332    } else if (intel->gen == 5) {
 333       brw->urb.size = 1024;
 334       brw->max_vs_threads = 72;
 335       brw->max_gs_threads = 32;
 336       brw->max_wm_threads = 12 * 6;
 337    } else if (intel->is_g4x) {
 338       brw->urb.size = 384;
 339       brw->max_vs_threads = 32;
 340       brw->max_gs_threads = 2;
 341       brw->max_wm_threads = 10 * 5;
 342    } else if (intel->gen < 6) {
 343       brw->urb.size = 256;
 344       brw->max_vs_threads = 16;
 345       brw->max_gs_threads = 2;
 346       brw->max_wm_threads = 8 * 4;
 347       brw->has_negative_rhw_bug = true;
 348    }
 349
 350    if (intel->gen <= 7) {
 351       brw->needs_unlit_centroid_workaround = true;
 352    }
 353
 354    brw->prim_restart.in_progress = false;
 355    brw->prim_restart.enable_cut_index = false;
 356    intel->hw_ctx = drm_intel_gem_context_create(intel->bufmgr);
 357
 358    brw_init_state( brw );
 359
 360    brw->curbe.last_buf = calloc(1, 4096);
 361    brw->curbe.next_buf = calloc(1, 4096);
 362
 363    brw->state.dirty.mesa = ~0;
 364    brw->state.dirty.brw = ~0;
 365
 366    brw->emit_state_always = 0;
 367
 368    intel->batch.need_workaround_flush = true;
 369
 370    ctx->VertexProgram._MaintainTnlProgram = true;
 371    ctx->FragmentProgram._MaintainTexEnvProgram = true;
 372
 373    brw_draw_init( brw );
 374
 375    brw->precompile = driQueryOptionb(&intel->optionCache, "shader_precompile");
 376
 377    ctx->Const.NativeIntegers = true;
 378    ctx->Const.UniformBooleanTrue = 1;
 379
 380    ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(&intel->optionCache, "force_glsl_extensions_warn");
 381
 382    ctx->Const.DisableGLSLLineContinuations = driQueryOptionb(&intel->optionCache, "disable_glsl_line_continuations");
 383
 384    ctx->Const.ContextFlags = 0;
 385    if ((flags & __DRI_CTX_FLAG_FORWARD_COMPATIBLE) != 0)
 386       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_FORWARD_COMPATIBLE_BIT;
 387
 388    if ((flags & __DRI_CTX_FLAG_DEBUG) != 0)
 389       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_DEBUG_BIT;
 390
 391    brw_fs_alloc_reg_sets(brw);
 392
 393    if (INTEL_DEBUG & DEBUG_SHADER_TIME)
 394       brw_init_shader_time(brw);
 395
 396    _mesa_compute_version(ctx);
 397
 398    _mesa_initialize_dispatch_tables(ctx);
 399    _mesa_initialize_vbo_vtxfmt(ctx);
 400
 401    return true;
 402 }
 403