i965: Provide slice details to color resolver
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46
47 #include "vbo/vbo_context.h"
48
49 #include "drivers/common/driverfuncs.h"
50 #include "drivers/common/meta.h"
51 #include "utils.h"
52
53 #include "brw_context.h"
54 #include "brw_defines.h"
55 #include "brw_blorp.h"
56 #include "brw_compiler.h"
57 #include "brw_draw.h"
58 #include "brw_state.h"
59
60 #include "intel_batchbuffer.h"
61 #include "intel_buffer_objects.h"
62 #include "intel_buffers.h"
63 #include "intel_fbo.h"
64 #include "intel_mipmap_tree.h"
65 #include "intel_pixel.h"
66 #include "intel_image.h"
67 #include "intel_tex.h"
68 #include "intel_tex_obj.h"
69
70 #include "swrast_setup/swrast_setup.h"
71 #include "tnl/tnl.h"
72 #include "tnl/t_pipeline.h"
73 #include "util/ralloc.h"
74 #include "util/debug.h"
75 #include "isl/isl.h"
76
77 /***************************************
78 * Mesa's Driver Functions
79 ***************************************/
80
81 const char *const brw_vendor_string = "Intel Open Source Technology Center";
82
83 static const char *
84 get_bsw_model(const struct intel_screen *screen)
85 {
86 switch (screen->eu_total) {
87 case 16:
88 return "405";
89 case 12:
90 return "400";
91 default:
92 return " ";
93 }
94 }
95
96 const char *
97 brw_get_renderer_string(const struct intel_screen *screen)
98 {
99 const char *chipset;
100 static char buffer[128];
101 char *bsw = NULL;
102
103 switch (screen->deviceID) {
104 #undef CHIPSET
105 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
106 #include "pci_ids/i965_pci_ids.h"
107 default:
108 chipset = "Unknown Intel Chipset";
109 break;
110 }
111
112 /* Braswell branding is funny, so we have to fix it up here */
113 if (screen->deviceID == 0x22B1) {
114 bsw = strdup(chipset);
115 char *needle = strstr(bsw, "XXX");
116 if (needle) {
117 memcpy(needle, get_bsw_model(screen), 3);
118 chipset = bsw;
119 }
120 }
121
122 (void) driGetRendererString(buffer, chipset, 0);
123 free(bsw);
124 return buffer;
125 }
126
127 static const GLubyte *
128 intel_get_string(struct gl_context * ctx, GLenum name)
129 {
130 const struct brw_context *const brw = brw_context(ctx);
131
132 switch (name) {
133 case GL_VENDOR:
134 return (GLubyte *) brw_vendor_string;
135
136 case GL_RENDERER:
137 return
138 (GLubyte *) brw_get_renderer_string(brw->screen);
139
140 default:
141 return NULL;
142 }
143 }
144
145 static void
146 intel_viewport(struct gl_context *ctx)
147 {
148 struct brw_context *brw = brw_context(ctx);
149 __DRIcontext *driContext = brw->driContext;
150
151 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
152 if (driContext->driDrawablePriv)
153 dri2InvalidateDrawable(driContext->driDrawablePriv);
154 if (driContext->driReadablePriv)
155 dri2InvalidateDrawable(driContext->driReadablePriv);
156 }
157 }
158
159 static void
160 intel_update_framebuffer(struct gl_context *ctx,
161 struct gl_framebuffer *fb)
162 {
163 struct brw_context *brw = brw_context(ctx);
164
165 /* Quantize the derived default number of samples
166 */
167 fb->DefaultGeometry._NumSamples =
168 intel_quantize_num_samples(brw->screen,
169 fb->DefaultGeometry.NumSamples);
170 }
171
172 static bool
173 intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo)
174 {
175 const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
176 bool found = false;
177
178 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
179 const struct intel_renderbuffer *irb =
180 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
181
182 if (irb && irb->mt->bo == bo) {
183 found = brw->draw_aux_buffer_disabled[i] = true;
184 }
185 }
186
187 return found;
188 }
189
190 /* On Gen9 color buffers may be compressed by the hardware (lossless
191 * compression). There are, however, format restrictions and care needs to be
192 * taken that the sampler engine is capable for re-interpreting a buffer with
193 * format different the buffer was originally written with.
194 *
195 * For example, SRGB formats are not compressible and the sampler engine isn't
196 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
197 * color buffer needs to be resolved so that the sampling surface can be
198 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
199 * set).
200 */
201 static bool
202 intel_texture_view_requires_resolve(struct brw_context *brw,
203 struct intel_texture_object *intel_tex)
204 {
205 if (brw->gen < 9 ||
206 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
207 return false;
208
209 const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format);
210
211 if (isl_format_supports_lossless_compression(&brw->screen->devinfo,
212 brw_format))
213 return false;
214
215 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
216 _mesa_get_format_name(intel_tex->_Format),
217 _mesa_get_format_name(intel_tex->mt->format));
218
219 if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
220 perf_debug("Sampling renderbuffer with non-compressible format - "
221 "turning off compression");
222
223 return true;
224 }
225
226 static void
227 intel_update_state(struct gl_context * ctx, GLuint new_state)
228 {
229 struct brw_context *brw = brw_context(ctx);
230 struct intel_texture_object *tex_obj;
231 struct intel_renderbuffer *depth_irb;
232
233 if (ctx->swrast_context)
234 _swrast_InvalidateState(ctx, new_state);
235 _vbo_InvalidateState(ctx, new_state);
236
237 brw->NewGLState |= new_state;
238
239 _mesa_unlock_context_textures(ctx);
240
241 /* Resolve the depth buffer's HiZ buffer. */
242 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
243 if (depth_irb)
244 intel_renderbuffer_resolve_hiz(brw, depth_irb);
245
246 memset(brw->draw_aux_buffer_disabled, 0,
247 sizeof(brw->draw_aux_buffer_disabled));
248
249 /* Resolve depth buffer and render cache of each enabled texture. */
250 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
251 for (int i = 0; i <= maxEnabledUnit; i++) {
252 if (!ctx->Texture.Unit[i]._Current)
253 continue;
254 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
255 if (!tex_obj || !tex_obj->mt)
256 continue;
257 if (intel_miptree_sample_with_hiz(brw, tex_obj->mt))
258 intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt);
259 else
260 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
261 /* Sampling engine understands lossless compression and resolving
262 * those surfaces should be skipped for performance reasons.
263 */
264 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
265 0 : INTEL_MIPTREE_IGNORE_CCS_E;
266 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags);
267 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
268
269 if (tex_obj->base.StencilSampling ||
270 tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
271 intel_update_r8stencil(brw, tex_obj->mt);
272 }
273 }
274
275 /* Resolve color for each active shader image. */
276 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
277 const struct gl_linked_shader *shader =
278 ctx->_Shader->CurrentProgram[i] ?
279 ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL;
280
281 if (unlikely(shader && shader->Program->info.num_images)) {
282 for (unsigned j = 0; j < shader->Program->info.num_images; j++) {
283 struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]];
284 tex_obj = intel_texture_object(u->TexObj);
285
286 if (tex_obj && tex_obj->mt) {
287 /* Access to images is implemented using indirect messages
288 * against data port. Normal render target write understands
289 * lossless compression but unfortunately the typed/untyped
290 * read/write interface doesn't. Therefore even lossless
291 * compressed surfaces need to be resolved prior to accessing
292 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
293 */
294 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0);
295
296 if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
297 intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
298 perf_debug("Using renderbuffer as shader image - turning "
299 "off lossless compression");
300 }
301
302 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
303 }
304 }
305 }
306 }
307
308 /* Resolve color buffers for non-coherent framebuffer fetch. */
309 if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
310 ctx->FragmentProgram._Current &&
311 ctx->FragmentProgram._Current->info.outputs_read) {
312 const struct gl_framebuffer *fb = ctx->DrawBuffer;
313
314 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
315 const struct intel_renderbuffer *irb =
316 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
317
318 if (irb &&
319 intel_miptree_resolve_color(
320 brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count,
321 INTEL_MIPTREE_IGNORE_CCS_E))
322 brw_render_cache_set_check_flush(brw, irb->mt->bo);
323 }
324 }
325
326 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
327 * single-sampled color renderbuffers because the CCS buffer isn't
328 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
329 * enabled because otherwise the surface state will be programmed with the
330 * linear equivalent format anyway.
331 */
332 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
333 struct gl_framebuffer *fb = ctx->DrawBuffer;
334 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
335 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
336
337 if (rb == NULL)
338 continue;
339
340 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
341 struct intel_mipmap_tree *mt = irb->mt;
342
343 if (mt == NULL ||
344 mt->num_samples > 1 ||
345 _mesa_get_srgb_format_linear(mt->format) == mt->format)
346 continue;
347
348 /* Lossless compression is not supported for SRGB formats, it
349 * should be impossible to get here with such surfaces.
350 */
351 assert(!intel_miptree_is_lossless_compressed(brw, mt));
352 intel_miptree_all_slices_resolve_color(brw, mt, 0);
353 brw_render_cache_set_check_flush(brw, mt->bo);
354 }
355 }
356
357 _mesa_lock_context_textures(ctx);
358
359 if (new_state & _NEW_BUFFERS) {
360 intel_update_framebuffer(ctx, ctx->DrawBuffer);
361 if (ctx->DrawBuffer != ctx->ReadBuffer)
362 intel_update_framebuffer(ctx, ctx->ReadBuffer);
363 }
364 }
365
366 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
367
368 static void
369 intel_flush_front(struct gl_context *ctx)
370 {
371 struct brw_context *brw = brw_context(ctx);
372 __DRIcontext *driContext = brw->driContext;
373 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
374 __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
375
376 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
377 if (flushFront(dri_screen) && driDrawable &&
378 driDrawable->loaderPrivate) {
379
380 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
381 *
382 * This potentially resolves both front and back buffer. It
383 * is unnecessary to resolve the back, but harms nothing except
384 * performance. And no one cares about front-buffer render
385 * performance.
386 */
387 intel_resolve_for_dri2_flush(brw, driDrawable);
388 intel_batchbuffer_flush(brw);
389
390 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
391
392 /* We set the dirty bit in intel_prepare_render() if we're
393 * front buffer rendering once we get there.
394 */
395 brw->front_buffer_dirty = false;
396 }
397 }
398 }
399
400 static void
401 intel_glFlush(struct gl_context *ctx)
402 {
403 struct brw_context *brw = brw_context(ctx);
404
405 intel_batchbuffer_flush(brw);
406 intel_flush_front(ctx);
407
408 brw->need_flush_throttle = true;
409 }
410
411 static void
412 intel_finish(struct gl_context * ctx)
413 {
414 struct brw_context *brw = brw_context(ctx);
415
416 intel_glFlush(ctx);
417
418 if (brw->batch.last_bo)
419 drm_intel_bo_wait_rendering(brw->batch.last_bo);
420 }
421
422 static void
423 brw_init_driver_functions(struct brw_context *brw,
424 struct dd_function_table *functions)
425 {
426 _mesa_init_driver_functions(functions);
427
428 /* GLX uses DRI2 invalidate events to handle window resizing.
429 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
430 * which doesn't provide a mechanism for snooping the event queues.
431 *
432 * So EGL still relies on viewport hacks to handle window resizing.
433 * This should go away with DRI3000.
434 */
435 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
436 functions->Viewport = intel_viewport;
437
438 functions->Flush = intel_glFlush;
439 functions->Finish = intel_finish;
440 functions->GetString = intel_get_string;
441 functions->UpdateState = intel_update_state;
442
443 intelInitTextureFuncs(functions);
444 intelInitTextureImageFuncs(functions);
445 intelInitTextureSubImageFuncs(functions);
446 intelInitTextureCopyImageFuncs(functions);
447 intelInitCopyImageFuncs(functions);
448 intelInitClearFuncs(functions);
449 intelInitBufferFuncs(functions);
450 intelInitPixelFuncs(functions);
451 intelInitBufferObjectFuncs(functions);
452 brw_init_syncobj_functions(functions);
453 brw_init_object_purgeable_functions(functions);
454
455 brwInitFragProgFuncs( functions );
456 brw_init_common_queryobj_functions(functions);
457 if (brw->gen >= 8 || brw->is_haswell)
458 hsw_init_queryobj_functions(functions);
459 else if (brw->gen >= 6)
460 gen6_init_queryobj_functions(functions);
461 else
462 gen4_init_queryobj_functions(functions);
463 brw_init_compute_functions(functions);
464 if (brw->gen >= 7)
465 brw_init_conditional_render_functions(functions);
466
467 functions->QueryInternalFormat = brw_query_internal_format;
468
469 functions->NewTransformFeedback = brw_new_transform_feedback;
470 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
471 if (brw->screen->has_mi_math_and_lrr) {
472 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
473 functions->EndTransformFeedback = hsw_end_transform_feedback;
474 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
475 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
476 } else if (brw->gen >= 7) {
477 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
478 functions->EndTransformFeedback = gen7_end_transform_feedback;
479 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
480 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
481 functions->GetTransformFeedbackVertexCount =
482 brw_get_transform_feedback_vertex_count;
483 } else {
484 functions->BeginTransformFeedback = brw_begin_transform_feedback;
485 functions->EndTransformFeedback = brw_end_transform_feedback;
486 }
487
488 if (brw->gen >= 6)
489 functions->GetSamplePosition = gen6_get_sample_position;
490 }
491
492 static void
493 brw_initialize_context_constants(struct brw_context *brw)
494 {
495 struct gl_context *ctx = &brw->ctx;
496 const struct brw_compiler *compiler = brw->screen->compiler;
497
498 const bool stage_exists[MESA_SHADER_STAGES] = {
499 [MESA_SHADER_VERTEX] = true,
500 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
501 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
502 [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
503 [MESA_SHADER_FRAGMENT] = true,
504 [MESA_SHADER_COMPUTE] =
505 ((ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE) &&
506 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
507 (ctx->API == API_OPENGLES2 &&
508 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
509 _mesa_extension_override_enables.ARB_compute_shader,
510 };
511
512 unsigned num_stages = 0;
513 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
514 if (stage_exists[i])
515 num_stages++;
516 }
517
518 unsigned max_samplers =
519 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
520
521 ctx->Const.MaxDualSourceDrawBuffers = 1;
522 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
523 ctx->Const.MaxCombinedShaderOutputResources =
524 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
525
526 ctx->Const.QueryCounterBits.Timestamp = 36;
527
528 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
529 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
530 ctx->Const.MaxRenderbufferSize = 8192;
531 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
532 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
533 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
534 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
535 ctx->Const.MaxTextureMbytes = 1536;
536 ctx->Const.MaxTextureRectSize = 1 << 12;
537 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
538 ctx->Const.StripTextureBorder = true;
539 if (brw->gen >= 7)
540 ctx->Const.MaxProgramTextureGatherComponents = 4;
541 else if (brw->gen == 6)
542 ctx->Const.MaxProgramTextureGatherComponents = 1;
543
544 ctx->Const.MaxUniformBlockSize = 65536;
545
546 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
547 struct gl_program_constants *prog = &ctx->Const.Program[i];
548
549 if (!stage_exists[i])
550 continue;
551
552 prog->MaxTextureImageUnits = max_samplers;
553
554 prog->MaxUniformBlocks = BRW_MAX_UBO;
555 prog->MaxCombinedUniformComponents =
556 prog->MaxUniformComponents +
557 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
558
559 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
560 prog->MaxAtomicBuffers = BRW_MAX_ABO;
561 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
562 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
563 }
564
565 ctx->Const.MaxTextureUnits =
566 MIN2(ctx->Const.MaxTextureCoordUnits,
567 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
568
569 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
570 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
571 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
572 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
573 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
574 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
575 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
576
577
578 /* Hardware only supports a limited number of transform feedback buffers.
579 * So we need to override the Mesa default (which is based only on software
580 * limits).
581 */
582 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
583
584 /* On Gen6, in the worst case, we use up one binding table entry per
585 * transform feedback component (see comments above the definition of
586 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
587 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
588 * BRW_MAX_SOL_BINDINGS.
589 *
590 * In "separate components" mode, we need to divide this value by
591 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
592 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
593 */
594 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
595 ctx->Const.MaxTransformFeedbackSeparateComponents =
596 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
597
598 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
599 !brw->screen->has_mi_math_and_lrr;
600
601 int max_samples;
602 const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
603 const int clamp_max_samples =
604 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
605
606 if (clamp_max_samples < 0) {
607 max_samples = msaa_modes[0];
608 } else {
609 /* Select the largest supported MSAA mode that does not exceed
610 * clamp_max_samples.
611 */
612 max_samples = 0;
613 for (int i = 0; msaa_modes[i] != 0; ++i) {
614 if (msaa_modes[i] <= clamp_max_samples) {
615 max_samples = msaa_modes[i];
616 break;
617 }
618 }
619 }
620
621 ctx->Const.MaxSamples = max_samples;
622 ctx->Const.MaxColorTextureSamples = max_samples;
623 ctx->Const.MaxDepthTextureSamples = max_samples;
624 ctx->Const.MaxIntegerSamples = max_samples;
625 ctx->Const.MaxImageSamples = 0;
626
627 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
628 * to map indices of rectangular grid to sample numbers within a pixel.
629 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
630 * extension implementation. For more details see the comment above
631 * gen6_set_sample_maps() definition.
632 */
633 gen6_set_sample_maps(ctx);
634
635 ctx->Const.MinLineWidth = 1.0;
636 ctx->Const.MinLineWidthAA = 1.0;
637 if (brw->gen >= 6) {
638 ctx->Const.MaxLineWidth = 7.375;
639 ctx->Const.MaxLineWidthAA = 7.375;
640 ctx->Const.LineWidthGranularity = 0.125;
641 } else {
642 ctx->Const.MaxLineWidth = 7.0;
643 ctx->Const.MaxLineWidthAA = 7.0;
644 ctx->Const.LineWidthGranularity = 0.5;
645 }
646
647 /* For non-antialiased lines, we have to round the line width to the
648 * nearest whole number. Make sure that we don't advertise a line
649 * width that, when rounded, will be beyond the actual hardware
650 * maximum.
651 */
652 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
653
654 ctx->Const.MinPointSize = 1.0;
655 ctx->Const.MinPointSizeAA = 1.0;
656 ctx->Const.MaxPointSize = 255.0;
657 ctx->Const.MaxPointSizeAA = 255.0;
658 ctx->Const.PointSizeGranularity = 1.0;
659
660 if (brw->gen >= 5 || brw->is_g4x)
661 ctx->Const.MaxClipPlanes = 8;
662
663 ctx->Const.LowerTessLevel = true;
664 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8;
665 ctx->Const.LowerTESPatchVerticesIn = true;
666 ctx->Const.PrimitiveRestartForPatches = true;
667
668 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
669 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
670 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
671 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
672 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
673 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
674 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
675 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
676 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
677 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
678 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
679 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
680 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
681 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
682
683 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
684 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
685 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
686 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
687 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
688 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
689 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
690 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
691 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
692 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
693 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
694
695 /* Fragment shaders use real, 32-bit twos-complement integers for all
696 * integer types.
697 */
698 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
699 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
700 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
701 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
702 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
703
704 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
705 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
706 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
707 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
708 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
709
710 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
711 * but we're not sure how it's actually done for vertex order,
712 * that affect provoking vertex decision. Always use last vertex
713 * convention for quad primitive which works as expected for now.
714 */
715 if (brw->gen >= 6)
716 ctx->Const.QuadsFollowProvokingVertexConvention = false;
717
718 ctx->Const.NativeIntegers = true;
719 ctx->Const.VertexID_is_zero_based = true;
720
721 /* Regarding the CMP instruction, the Ivybridge PRM says:
722 *
723 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
724 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
725 * 0xFFFFFFFF) is assigned to dst."
726 *
727 * but PRMs for earlier generations say
728 *
729 * "In dword format, one GRF may store up to 8 results. When the register
730 * is used later as a vector of Booleans, as only LSB at each channel
731 * contains meaning [sic] data, software should make sure all higher bits
732 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
733 *
734 * We select the representation of a true boolean uniform to be ~0, and fix
735 * the results of Gen <= 5 CMP instruction's with -(result & 1).
736 */
737 ctx->Const.UniformBooleanTrue = ~0;
738
739 /* From the gen4 PRM, volume 4 page 127:
740 *
741 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
742 * the base address of the first element of the surface, computed in
743 * software by adding the surface base address to the byte offset of
744 * the element in the buffer."
745 *
746 * However, unaligned accesses are slower, so enforce buffer alignment.
747 */
748 ctx->Const.UniformBufferOffsetAlignment = 16;
749
750 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
751 * that we can safely have the CPU and GPU writing the same SSBO on
752 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
753 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
754 * be updating disjoint regions of the buffer simultaneously and that will
755 * break if the regions overlap the same cacheline.
756 */
757 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
758 ctx->Const.TextureBufferOffsetAlignment = 16;
759 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
760
761 if (brw->gen >= 6) {
762 ctx->Const.MaxVarying = 32;
763 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
764 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
765 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
766 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
767 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
768 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
769 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
770 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
771 }
772
773 /* We want the GLSL compiler to emit code that uses condition codes */
774 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
775 ctx->Const.ShaderCompilerOptions[i] =
776 brw->screen->compiler->glsl_compiler_options[i];
777 }
778
779 if (brw->gen >= 7) {
780 ctx->Const.MaxViewportWidth = 32768;
781 ctx->Const.MaxViewportHeight = 32768;
782 }
783
784 /* ARB_viewport_array, OES_viewport_array */
785 if ((brw->gen >= 6 && ctx->API == API_OPENGL_CORE) ||
786 (brw->gen >= 8 && ctx->API == API_OPENGLES2)) {
787 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
788 ctx->Const.ViewportSubpixelBits = 0;
789
790 /* Cast to float before negating because MaxViewportWidth is unsigned.
791 */
792 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
793 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
794 }
795
796 /* ARB_gpu_shader5 */
797 if (brw->gen >= 7)
798 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
799
800 /* ARB_framebuffer_no_attachments */
801 ctx->Const.MaxFramebufferWidth = 16384;
802 ctx->Const.MaxFramebufferHeight = 16384;
803 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
804 ctx->Const.MaxFramebufferSamples = max_samples;
805
806 /* OES_primitive_bounding_box */
807 ctx->Const.NoPrimitiveBoundingBoxOutput = true;
808 }
809
810 static void
811 brw_initialize_cs_context_constants(struct brw_context *brw)
812 {
813 struct gl_context *ctx = &brw->ctx;
814 const struct intel_screen *screen = brw->screen;
815 struct gen_device_info *devinfo = &brw->screen->devinfo;
816
817 /* FINISHME: Do this for all platforms that the kernel supports */
818 if (brw->is_cherryview &&
819 screen->subslice_total > 0 && screen->eu_total > 0) {
820 /* Logical CS threads = EUs per subslice * 7 threads per EU */
821 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
822
823 /* Fuse configurations may give more threads than expected, never less. */
824 if (max_cs_threads > devinfo->max_cs_threads)
825 devinfo->max_cs_threads = max_cs_threads;
826 }
827
828 /* Maximum number of scalar compute shader invocations that can be run in
829 * parallel in the same subslice assuming SIMD32 dispatch.
830 *
831 * We don't advertise more than 64 threads, because we are limited to 64 by
832 * our usage of thread_width_max in the gpgpu walker command. This only
833 * currently impacts Haswell, which otherwise might be able to advertise 70
834 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
835 * required the number of invocation needed for ARB_compute_shader.
836 */
837 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
838 const uint32_t max_invocations = 32 * max_threads;
839 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
840 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
841 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
842 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
843 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
844 }
845
846 /**
847 * Process driconf (drirc) options, setting appropriate context flags.
848 *
849 * intelInitExtensions still pokes at optionCache directly, in order to
850 * avoid advertising various extensions. No flags are set, so it makes
851 * sense to continue doing that there.
852 */
853 static void
854 brw_process_driconf_options(struct brw_context *brw)
855 {
856 struct gl_context *ctx = &brw->ctx;
857
858 driOptionCache *options = &brw->optionCache;
859 driParseConfigFiles(options, &brw->screen->optionCache,
860 brw->driContext->driScreenPriv->myNum, "i965");
861
862 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
863 switch (bo_reuse_mode) {
864 case DRI_CONF_BO_REUSE_DISABLED:
865 break;
866 case DRI_CONF_BO_REUSE_ALL:
867 intel_bufmgr_gem_enable_reuse(brw->bufmgr);
868 break;
869 }
870
871 if (!driQueryOptionb(options, "hiz")) {
872 brw->has_hiz = false;
873 /* On gen6, you can only do separate stencil with HIZ. */
874 if (brw->gen == 6)
875 brw->has_separate_stencil = false;
876 }
877
878 if (driQueryOptionb(options, "always_flush_batch")) {
879 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
880 brw->always_flush_batch = true;
881 }
882
883 if (driQueryOptionb(options, "always_flush_cache")) {
884 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
885 brw->always_flush_cache = true;
886 }
887
888 if (driQueryOptionb(options, "disable_throttling")) {
889 fprintf(stderr, "disabling flush throttling\n");
890 brw->disable_throttling = true;
891 }
892
893 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
894
895 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
896 brw->screen->compiler->precise_trig = true;
897
898 ctx->Const.ForceGLSLExtensionsWarn =
899 driQueryOptionb(options, "force_glsl_extensions_warn");
900
901 ctx->Const.DisableGLSLLineContinuations =
902 driQueryOptionb(options, "disable_glsl_line_continuations");
903
904 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
905 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
906
907 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
908
909 brw->dual_color_blend_by_location =
910 driQueryOptionb(options, "dual_color_blend_by_location");
911 }
912
913 GLboolean
914 brwCreateContext(gl_api api,
915 const struct gl_config *mesaVis,
916 __DRIcontext *driContextPriv,
917 unsigned major_version,
918 unsigned minor_version,
919 uint32_t flags,
920 bool notify_reset,
921 unsigned *dri_ctx_error,
922 void *sharedContextPrivate)
923 {
924 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
925 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
926 const struct gen_device_info *devinfo = &screen->devinfo;
927 struct dd_function_table functions;
928
929 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
930 * provides us with context reset notifications.
931 */
932 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
933 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
934
935 if (screen->has_context_reset_notification)
936 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
937
938 if (flags & ~allowed_flags) {
939 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
940 return false;
941 }
942
943 struct brw_context *brw = rzalloc(NULL, struct brw_context);
944 if (!brw) {
945 fprintf(stderr, "%s: failed to alloc context\n", __func__);
946 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
947 return false;
948 }
949
950 driContextPriv->driverPrivate = brw;
951 brw->driContext = driContextPriv;
952 brw->screen = screen;
953 brw->bufmgr = screen->bufmgr;
954
955 brw->gen = devinfo->gen;
956 brw->gt = devinfo->gt;
957 brw->is_g4x = devinfo->is_g4x;
958 brw->is_baytrail = devinfo->is_baytrail;
959 brw->is_haswell = devinfo->is_haswell;
960 brw->is_cherryview = devinfo->is_cherryview;
961 brw->is_broxton = devinfo->is_broxton;
962 brw->has_llc = devinfo->has_llc;
963 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
964 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
965 brw->has_pln = devinfo->has_pln;
966 brw->has_compr4 = devinfo->has_compr4;
967 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
968 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
969 brw->needs_unlit_centroid_workaround =
970 devinfo->needs_unlit_centroid_workaround;
971
972 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
973 brw->has_swizzling = screen->hw_has_swizzling;
974
975 isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling);
976
977 brw->vs.base.stage = MESA_SHADER_VERTEX;
978 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
979 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
980 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
981 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
982 if (brw->gen >= 8) {
983 gen8_init_vtable_surface_functions(brw);
984 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
985 } else if (brw->gen >= 7) {
986 gen7_init_vtable_surface_functions(brw);
987 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
988 } else if (brw->gen >= 6) {
989 gen6_init_vtable_surface_functions(brw);
990 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
991 } else {
992 gen4_init_vtable_surface_functions(brw);
993 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
994 }
995
996 brw_init_driver_functions(brw, &functions);
997
998 if (notify_reset)
999 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
1000
1001 struct gl_context *ctx = &brw->ctx;
1002
1003 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
1004 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1005 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
1006 intelDestroyContext(driContextPriv);
1007 return false;
1008 }
1009
1010 driContextSetFlags(ctx, flags);
1011
1012 /* Initialize the software rasterizer and helper modules.
1013 *
1014 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1015 * software fallbacks (which we have to support on legacy GL to do weird
1016 * glDrawPixels(), glBitmap(), and other functions).
1017 */
1018 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
1019 _swrast_CreateContext(ctx);
1020 }
1021
1022 _vbo_CreateContext(ctx);
1023 if (ctx->swrast_context) {
1024 _tnl_CreateContext(ctx);
1025 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
1026 _swsetup_CreateContext(ctx);
1027
1028 /* Configure swrast to match hardware characteristics: */
1029 _swrast_allow_pixel_fog(ctx, false);
1030 _swrast_allow_vertex_fog(ctx, true);
1031 }
1032
1033 _mesa_meta_init(ctx);
1034
1035 brw_process_driconf_options(brw);
1036
1037 if (INTEL_DEBUG & DEBUG_PERF)
1038 brw->perf_debug = true;
1039
1040 brw_initialize_cs_context_constants(brw);
1041 brw_initialize_context_constants(brw);
1042
1043 ctx->Const.ResetStrategy = notify_reset
1044 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
1045
1046 /* Reinitialize the context point state. It depends on ctx->Const values. */
1047 _mesa_init_point(ctx);
1048
1049 intel_fbo_init(brw);
1050
1051 intel_batchbuffer_init(brw);
1052
1053 if (brw->gen >= 6) {
1054 /* Create a new hardware context. Using a hardware context means that
1055 * our GPU state will be saved/restored on context switch, allowing us
1056 * to assume that the GPU is in the same state we left it in.
1057 *
1058 * This is required for transform feedback buffer offsets, query objects,
1059 * and also allows us to reduce how much state we have to emit.
1060 */
1061 brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr);
1062
1063 if (!brw->hw_ctx) {
1064 fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
1065 intelDestroyContext(driContextPriv);
1066 return false;
1067 }
1068 }
1069
1070 if (brw_init_pipe_control(brw, devinfo)) {
1071 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1072 intelDestroyContext(driContextPriv);
1073 return false;
1074 }
1075
1076 brw_init_state(brw);
1077
1078 intelInitExtensions(ctx);
1079
1080 brw_init_surface_formats(brw);
1081
1082 if (brw->gen >= 6)
1083 brw_blorp_init(brw);
1084
1085 brw->urb.size = devinfo->urb.size;
1086
1087 if (brw->gen == 6)
1088 brw->urb.gs_present = false;
1089
1090 brw->prim_restart.in_progress = false;
1091 brw->prim_restart.enable_cut_index = false;
1092 brw->gs.enabled = false;
1093 brw->sf.viewport_transform_enable = true;
1094 brw->clip.viewport_count = 1;
1095
1096 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1097
1098 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
1099
1100 brw->use_resource_streamer = screen->has_resource_streamer &&
1101 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1102 env_var_as_boolean("INTEL_USE_GATHER", false));
1103
1104 ctx->VertexProgram._MaintainTnlProgram = true;
1105 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1106
1107 brw_draw_init( brw );
1108
1109 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1110 /* Turn on some extra GL_ARB_debug_output generation. */
1111 brw->perf_debug = true;
1112 }
1113
1114 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) {
1115 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1116 ctx->Const.RobustAccess = GL_TRUE;
1117 }
1118
1119 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1120 brw_init_shader_time(brw);
1121
1122 _mesa_compute_version(ctx);
1123
1124 _mesa_initialize_dispatch_tables(ctx);
1125 _mesa_initialize_vbo_vtxfmt(ctx);
1126
1127 if (ctx->Extensions.AMD_performance_monitor) {
1128 brw_init_performance_monitors(brw);
1129 }
1130
1131 vbo_use_buffer_objects(ctx);
1132 vbo_always_unmap_buffers(ctx);
1133
1134 return true;
1135 }
1136
1137 void
1138 intelDestroyContext(__DRIcontext * driContextPriv)
1139 {
1140 struct brw_context *brw =
1141 (struct brw_context *) driContextPriv->driverPrivate;
1142 struct gl_context *ctx = &brw->ctx;
1143
1144 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1145 if (INTEL_DEBUG & DEBUG_AUB) {
1146 intel_batchbuffer_flush(brw);
1147 aub_dump_bmp(&brw->ctx);
1148 }
1149
1150 _mesa_meta_free(&brw->ctx);
1151
1152 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1153 /* Force a report. */
1154 brw->shader_time.report_time = 0;
1155
1156 brw_collect_and_report_shader_time(brw);
1157 brw_destroy_shader_time(brw);
1158 }
1159
1160 if (brw->gen >= 6)
1161 blorp_finish(&brw->blorp);
1162
1163 brw_destroy_state(brw);
1164 brw_draw_destroy(brw);
1165
1166 drm_intel_bo_unreference(brw->curbe.curbe_bo);
1167 if (brw->vs.base.scratch_bo)
1168 drm_intel_bo_unreference(brw->vs.base.scratch_bo);
1169 if (brw->tcs.base.scratch_bo)
1170 drm_intel_bo_unreference(brw->tcs.base.scratch_bo);
1171 if (brw->tes.base.scratch_bo)
1172 drm_intel_bo_unreference(brw->tes.base.scratch_bo);
1173 if (brw->gs.base.scratch_bo)
1174 drm_intel_bo_unreference(brw->gs.base.scratch_bo);
1175 if (brw->wm.base.scratch_bo)
1176 drm_intel_bo_unreference(brw->wm.base.scratch_bo);
1177
1178 gen7_reset_hw_bt_pool_offsets(brw);
1179 drm_intel_bo_unreference(brw->hw_bt_pool.bo);
1180 brw->hw_bt_pool.bo = NULL;
1181
1182 drm_intel_gem_context_destroy(brw->hw_ctx);
1183
1184 if (ctx->swrast_context) {
1185 _swsetup_DestroyContext(&brw->ctx);
1186 _tnl_DestroyContext(&brw->ctx);
1187 }
1188 _vbo_DestroyContext(&brw->ctx);
1189
1190 if (ctx->swrast_context)
1191 _swrast_DestroyContext(&brw->ctx);
1192
1193 brw_fini_pipe_control(brw);
1194 intel_batchbuffer_free(brw);
1195
1196 drm_intel_bo_unreference(brw->throttle_batch[1]);
1197 drm_intel_bo_unreference(brw->throttle_batch[0]);
1198 brw->throttle_batch[1] = NULL;
1199 brw->throttle_batch[0] = NULL;
1200
1201 driDestroyOptionCache(&brw->optionCache);
1202
1203 /* free the Mesa context */
1204 _mesa_free_context_data(&brw->ctx);
1205
1206 ralloc_free(brw);
1207 driContextPriv->driverPrivate = NULL;
1208 }
1209
1210 GLboolean
1211 intelUnbindContext(__DRIcontext * driContextPriv)
1212 {
1213 /* Unset current context and dispath table */
1214 _mesa_make_current(NULL, NULL, NULL);
1215
1216 return true;
1217 }
1218
1219 /**
1220 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1221 * on window system framebuffers.
1222 *
1223 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1224 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1225 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1226 * for a visual where you're guaranteed to be capable, but it turns out that
1227 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1228 * incapable ones, because there's no difference between the two in resources
1229 * used. Applications thus get built that accidentally rely on the default
1230 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1231 * great...
1232 *
1233 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1234 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1235 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1236 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1237 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1238 * and get no sRGB encode (assuming that both kinds of visual are available).
1239 * Thus our choice to support sRGB by default on our visuals for desktop would
1240 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1241 *
1242 * Unfortunately, renderbuffer setup happens before a context is created. So
1243 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1244 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1245 * yet), we go turn that back off before anyone finds out.
1246 */
1247 static void
1248 intel_gles3_srgb_workaround(struct brw_context *brw,
1249 struct gl_framebuffer *fb)
1250 {
1251 struct gl_context *ctx = &brw->ctx;
1252
1253 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1254 return;
1255
1256 /* Some day when we support the sRGB capable bit on visuals available for
1257 * GLES, we'll need to respect that and not disable things here.
1258 */
1259 fb->Visual.sRGBCapable = false;
1260 for (int i = 0; i < BUFFER_COUNT; i++) {
1261 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1262 if (rb)
1263 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1264 }
1265 }
1266
1267 GLboolean
1268 intelMakeCurrent(__DRIcontext * driContextPriv,
1269 __DRIdrawable * driDrawPriv,
1270 __DRIdrawable * driReadPriv)
1271 {
1272 struct brw_context *brw;
1273 GET_CURRENT_CONTEXT(curCtx);
1274
1275 if (driContextPriv)
1276 brw = (struct brw_context *) driContextPriv->driverPrivate;
1277 else
1278 brw = NULL;
1279
1280 /* According to the glXMakeCurrent() man page: "Pending commands to
1281 * the previous context, if any, are flushed before it is released."
1282 * But only flush if we're actually changing contexts.
1283 */
1284 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1285 _mesa_flush(curCtx);
1286 }
1287
1288 if (driContextPriv) {
1289 struct gl_context *ctx = &brw->ctx;
1290 struct gl_framebuffer *fb, *readFb;
1291
1292 if (driDrawPriv == NULL) {
1293 fb = _mesa_get_incomplete_framebuffer();
1294 } else {
1295 fb = driDrawPriv->driverPrivate;
1296 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1297 }
1298
1299 if (driReadPriv == NULL) {
1300 readFb = _mesa_get_incomplete_framebuffer();
1301 } else {
1302 readFb = driReadPriv->driverPrivate;
1303 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1304 }
1305
1306 /* The sRGB workaround changes the renderbuffer's format. We must change
1307 * the format before the renderbuffer's miptree get's allocated, otherwise
1308 * the formats of the renderbuffer and its miptree will differ.
1309 */
1310 intel_gles3_srgb_workaround(brw, fb);
1311 intel_gles3_srgb_workaround(brw, readFb);
1312
1313 /* If the context viewport hasn't been initialized, force a call out to
1314 * the loader to get buffers so we have a drawable size for the initial
1315 * viewport. */
1316 if (!brw->ctx.ViewportInitialized)
1317 intel_prepare_render(brw);
1318
1319 _mesa_make_current(ctx, fb, readFb);
1320 } else {
1321 _mesa_make_current(NULL, NULL, NULL);
1322 }
1323
1324 return true;
1325 }
1326
1327 void
1328 intel_resolve_for_dri2_flush(struct brw_context *brw,
1329 __DRIdrawable *drawable)
1330 {
1331 if (brw->gen < 6) {
1332 /* MSAA and fast color clear are not supported, so don't waste time
1333 * checking whether a resolve is needed.
1334 */
1335 return;
1336 }
1337
1338 struct gl_framebuffer *fb = drawable->driverPrivate;
1339 struct intel_renderbuffer *rb;
1340
1341 /* Usually, only the back buffer will need to be downsampled. However,
1342 * the front buffer will also need it if the user has rendered into it.
1343 */
1344 static const gl_buffer_index buffers[2] = {
1345 BUFFER_BACK_LEFT,
1346 BUFFER_FRONT_LEFT,
1347 };
1348
1349 for (int i = 0; i < 2; ++i) {
1350 rb = intel_get_renderbuffer(fb, buffers[i]);
1351 if (rb == NULL || rb->mt == NULL)
1352 continue;
1353 if (rb->mt->num_samples <= 1) {
1354 assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
1355 rb->layer_count == 1);
1356 intel_miptree_resolve_color(brw, rb->mt, 0, 0, 1, 0);
1357 } else {
1358 intel_renderbuffer_downsample(brw, rb);
1359 }
1360 }
1361 }
1362
1363 static unsigned
1364 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1365 {
1366 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1367 }
1368
1369 static void
1370 intel_query_dri2_buffers(struct brw_context *brw,
1371 __DRIdrawable *drawable,
1372 __DRIbuffer **buffers,
1373 int *count);
1374
1375 static void
1376 intel_process_dri2_buffer(struct brw_context *brw,
1377 __DRIdrawable *drawable,
1378 __DRIbuffer *buffer,
1379 struct intel_renderbuffer *rb,
1380 const char *buffer_name);
1381
1382 static void
1383 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1384
1385 static void
1386 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1387 {
1388 struct gl_framebuffer *fb = drawable->driverPrivate;
1389 struct intel_renderbuffer *rb;
1390 __DRIbuffer *buffers = NULL;
1391 int i, count;
1392 const char *region_name;
1393
1394 /* Set this up front, so that in case our buffers get invalidated
1395 * while we're getting new buffers, we don't clobber the stamp and
1396 * thus ignore the invalidate. */
1397 drawable->lastStamp = drawable->dri2.stamp;
1398
1399 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1400 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1401
1402 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1403
1404 if (buffers == NULL)
1405 return;
1406
1407 for (i = 0; i < count; i++) {
1408 switch (buffers[i].attachment) {
1409 case __DRI_BUFFER_FRONT_LEFT:
1410 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1411 region_name = "dri2 front buffer";
1412 break;
1413
1414 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1415 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1416 region_name = "dri2 fake front buffer";
1417 break;
1418
1419 case __DRI_BUFFER_BACK_LEFT:
1420 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1421 region_name = "dri2 back buffer";
1422 break;
1423
1424 case __DRI_BUFFER_DEPTH:
1425 case __DRI_BUFFER_HIZ:
1426 case __DRI_BUFFER_DEPTH_STENCIL:
1427 case __DRI_BUFFER_STENCIL:
1428 case __DRI_BUFFER_ACCUM:
1429 default:
1430 fprintf(stderr,
1431 "unhandled buffer attach event, attachment type %d\n",
1432 buffers[i].attachment);
1433 return;
1434 }
1435
1436 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1437 }
1438
1439 }
1440
1441 void
1442 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1443 {
1444 struct brw_context *brw = context->driverPrivate;
1445 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1446
1447 /* Set this up front, so that in case our buffers get invalidated
1448 * while we're getting new buffers, we don't clobber the stamp and
1449 * thus ignore the invalidate. */
1450 drawable->lastStamp = drawable->dri2.stamp;
1451
1452 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1453 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1454
1455 if (dri_screen->image.loader)
1456 intel_update_image_buffers(brw, drawable);
1457 else
1458 intel_update_dri2_buffers(brw, drawable);
1459
1460 driUpdateFramebufferSize(&brw->ctx, drawable);
1461 }
1462
1463 /**
1464 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1465 * state is required.
1466 */
1467 void
1468 intel_prepare_render(struct brw_context *brw)
1469 {
1470 struct gl_context *ctx = &brw->ctx;
1471 __DRIcontext *driContext = brw->driContext;
1472 __DRIdrawable *drawable;
1473
1474 drawable = driContext->driDrawablePriv;
1475 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1476 if (drawable->lastStamp != drawable->dri2.stamp)
1477 intel_update_renderbuffers(driContext, drawable);
1478 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1479 }
1480
1481 drawable = driContext->driReadablePriv;
1482 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1483 if (drawable->lastStamp != drawable->dri2.stamp)
1484 intel_update_renderbuffers(driContext, drawable);
1485 driContext->dri2.read_stamp = drawable->dri2.stamp;
1486 }
1487
1488 /* If we're currently rendering to the front buffer, the rendering
1489 * that will happen next will probably dirty the front buffer. So
1490 * mark it as dirty here.
1491 */
1492 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1493 brw->front_buffer_dirty = true;
1494 }
1495
1496 /**
1497 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1498 *
1499 * To determine which DRI buffers to request, examine the renderbuffers
1500 * attached to the drawable's framebuffer. Then request the buffers with
1501 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1502 *
1503 * This is called from intel_update_renderbuffers().
1504 *
1505 * \param drawable Drawable whose buffers are queried.
1506 * \param buffers [out] List of buffers returned by DRI2 query.
1507 * \param buffer_count [out] Number of buffers returned.
1508 *
1509 * \see intel_update_renderbuffers()
1510 * \see DRI2GetBuffers()
1511 * \see DRI2GetBuffersWithFormat()
1512 */
1513 static void
1514 intel_query_dri2_buffers(struct brw_context *brw,
1515 __DRIdrawable *drawable,
1516 __DRIbuffer **buffers,
1517 int *buffer_count)
1518 {
1519 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1520 struct gl_framebuffer *fb = drawable->driverPrivate;
1521 int i = 0;
1522 unsigned attachments[8];
1523
1524 struct intel_renderbuffer *front_rb;
1525 struct intel_renderbuffer *back_rb;
1526
1527 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1528 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1529
1530 memset(attachments, 0, sizeof(attachments));
1531 if ((_mesa_is_front_buffer_drawing(fb) ||
1532 _mesa_is_front_buffer_reading(fb) ||
1533 !back_rb) && front_rb) {
1534 /* If a fake front buffer is in use, then querying for
1535 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1536 * the real front buffer to the fake front buffer. So before doing the
1537 * query, we need to make sure all the pending drawing has landed in the
1538 * real front buffer.
1539 */
1540 intel_batchbuffer_flush(brw);
1541 intel_flush_front(&brw->ctx);
1542
1543 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1544 attachments[i++] = intel_bits_per_pixel(front_rb);
1545 } else if (front_rb && brw->front_buffer_dirty) {
1546 /* We have pending front buffer rendering, but we aren't querying for a
1547 * front buffer. If the front buffer we have is a fake front buffer,
1548 * the X server is going to throw it away when it processes the query.
1549 * So before doing the query, make sure all the pending drawing has
1550 * landed in the real front buffer.
1551 */
1552 intel_batchbuffer_flush(brw);
1553 intel_flush_front(&brw->ctx);
1554 }
1555
1556 if (back_rb) {
1557 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1558 attachments[i++] = intel_bits_per_pixel(back_rb);
1559 }
1560
1561 assert(i <= ARRAY_SIZE(attachments));
1562
1563 *buffers =
1564 dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1565 &drawable->w,
1566 &drawable->h,
1567 attachments, i / 2,
1568 buffer_count,
1569 drawable->loaderPrivate);
1570 }
1571
1572 /**
1573 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1574 *
1575 * This is called from intel_update_renderbuffers().
1576 *
1577 * \par Note:
1578 * DRI buffers whose attachment point is DRI2BufferStencil or
1579 * DRI2BufferDepthStencil are handled as special cases.
1580 *
1581 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1582 * that is passed to drm_intel_bo_gem_create_from_name().
1583 *
1584 * \see intel_update_renderbuffers()
1585 */
1586 static void
1587 intel_process_dri2_buffer(struct brw_context *brw,
1588 __DRIdrawable *drawable,
1589 __DRIbuffer *buffer,
1590 struct intel_renderbuffer *rb,
1591 const char *buffer_name)
1592 {
1593 struct gl_framebuffer *fb = drawable->driverPrivate;
1594 drm_intel_bo *bo;
1595
1596 if (!rb)
1597 return;
1598
1599 unsigned num_samples = rb->Base.Base.NumSamples;
1600
1601 /* We try to avoid closing and reopening the same BO name, because the first
1602 * use of a mapping of the buffer involves a bunch of page faulting which is
1603 * moderately expensive.
1604 */
1605 struct intel_mipmap_tree *last_mt;
1606 if (num_samples == 0)
1607 last_mt = rb->mt;
1608 else
1609 last_mt = rb->singlesample_mt;
1610
1611 uint32_t old_name = 0;
1612 if (last_mt) {
1613 /* The bo already has a name because the miptree was created by a
1614 * previous call to intel_process_dri2_buffer(). If a bo already has a
1615 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1616 * create a new name.
1617 */
1618 drm_intel_bo_flink(last_mt->bo, &old_name);
1619 }
1620
1621 if (old_name == buffer->name)
1622 return;
1623
1624 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1625 fprintf(stderr,
1626 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1627 buffer->name, buffer->attachment,
1628 buffer->cpp, buffer->pitch);
1629 }
1630
1631 bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1632 buffer->name);
1633 if (!bo) {
1634 fprintf(stderr,
1635 "Failed to open BO for returned DRI2 buffer "
1636 "(%dx%d, %s, named %d).\n"
1637 "This is likely a bug in the X Server that will lead to a "
1638 "crash soon.\n",
1639 drawable->w, drawable->h, buffer_name, buffer->name);
1640 return;
1641 }
1642
1643 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1644 drawable->w, drawable->h,
1645 buffer->pitch);
1646
1647 if (_mesa_is_front_buffer_drawing(fb) &&
1648 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1649 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1650 rb->Base.Base.NumSamples > 1) {
1651 intel_renderbuffer_upsample(brw, rb);
1652 }
1653
1654 assert(rb->mt);
1655
1656 drm_intel_bo_unreference(bo);
1657 }
1658
1659 /**
1660 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1661 *
1662 * To determine which DRI buffers to request, examine the renderbuffers
1663 * attached to the drawable's framebuffer. Then request the buffers from
1664 * the image loader
1665 *
1666 * This is called from intel_update_renderbuffers().
1667 *
1668 * \param drawable Drawable whose buffers are queried.
1669 * \param buffers [out] List of buffers returned by DRI2 query.
1670 * \param buffer_count [out] Number of buffers returned.
1671 *
1672 * \see intel_update_renderbuffers()
1673 */
1674
1675 static void
1676 intel_update_image_buffer(struct brw_context *intel,
1677 __DRIdrawable *drawable,
1678 struct intel_renderbuffer *rb,
1679 __DRIimage *buffer,
1680 enum __DRIimageBufferMask buffer_type)
1681 {
1682 struct gl_framebuffer *fb = drawable->driverPrivate;
1683
1684 if (!rb || !buffer->bo)
1685 return;
1686
1687 unsigned num_samples = rb->Base.Base.NumSamples;
1688
1689 /* Check and see if we're already bound to the right
1690 * buffer object
1691 */
1692 struct intel_mipmap_tree *last_mt;
1693 if (num_samples == 0)
1694 last_mt = rb->mt;
1695 else
1696 last_mt = rb->singlesample_mt;
1697
1698 if (last_mt && last_mt->bo == buffer->bo)
1699 return;
1700
1701 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1702 buffer->width, buffer->height,
1703 buffer->pitch);
1704
1705 if (_mesa_is_front_buffer_drawing(fb) &&
1706 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1707 rb->Base.Base.NumSamples > 1) {
1708 intel_renderbuffer_upsample(intel, rb);
1709 }
1710 }
1711
1712 static void
1713 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1714 {
1715 struct gl_framebuffer *fb = drawable->driverPrivate;
1716 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1717 struct intel_renderbuffer *front_rb;
1718 struct intel_renderbuffer *back_rb;
1719 struct __DRIimageList images;
1720 unsigned int format;
1721 uint32_t buffer_mask = 0;
1722 int ret;
1723
1724 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1725 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1726
1727 if (back_rb)
1728 format = intel_rb_format(back_rb);
1729 else if (front_rb)
1730 format = intel_rb_format(front_rb);
1731 else
1732 return;
1733
1734 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1735 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1736 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1737 }
1738
1739 if (back_rb)
1740 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1741
1742 ret = dri_screen->image.loader->getBuffers(drawable,
1743 driGLFormatToImageFormat(format),
1744 &drawable->dri2.stamp,
1745 drawable->loaderPrivate,
1746 buffer_mask,
1747 &images);
1748 if (!ret)
1749 return;
1750
1751 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1752 drawable->w = images.front->width;
1753 drawable->h = images.front->height;
1754 intel_update_image_buffer(brw,
1755 drawable,
1756 front_rb,
1757 images.front,
1758 __DRI_IMAGE_BUFFER_FRONT);
1759 }
1760 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1761 drawable->w = images.back->width;
1762 drawable->h = images.back->height;
1763 intel_update_image_buffer(brw,
1764 drawable,
1765 back_rb,
1766 images.back,
1767 __DRI_IMAGE_BUFFER_BACK);
1768 }
1769 }