i965: Only emit 1 viewport when possible.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "main/api_exec.h"
35 #include "main/context.h"
36 #include "main/fbobject.h"
37 #include "main/extensions.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
40 #include "main/points.h"
41 #include "main/version.h"
42 #include "main/vtxfmt.h"
43 #include "main/texobj.h"
44 #include "main/framebuffer.h"
45
46 #include "vbo/vbo_context.h"
47
48 #include "drivers/common/driverfuncs.h"
49 #include "drivers/common/meta.h"
50 #include "utils.h"
51
52 #include "brw_context.h"
53 #include "brw_defines.h"
54 #include "brw_blorp.h"
55 #include "brw_compiler.h"
56 #include "brw_draw.h"
57 #include "brw_state.h"
58
59 #include "intel_batchbuffer.h"
60 #include "intel_buffer_objects.h"
61 #include "intel_buffers.h"
62 #include "intel_fbo.h"
63 #include "intel_mipmap_tree.h"
64 #include "intel_pixel.h"
65 #include "intel_image.h"
66 #include "intel_tex.h"
67 #include "intel_tex_obj.h"
68
69 #include "swrast_setup/swrast_setup.h"
70 #include "tnl/tnl.h"
71 #include "tnl/t_pipeline.h"
72 #include "util/ralloc.h"
73 #include "util/debug.h"
74 #include "isl/isl.h"
75
76 /***************************************
77 * Mesa's Driver Functions
78 ***************************************/
79
80 const char *const brw_vendor_string = "Intel Open Source Technology Center";
81
82 static const char *
83 get_bsw_model(const struct intel_screen *screen)
84 {
85 switch (screen->eu_total) {
86 case 16:
87 return "405";
88 case 12:
89 return "400";
90 default:
91 return " ";
92 }
93 }
94
95 const char *
96 brw_get_renderer_string(const struct intel_screen *screen)
97 {
98 const char *chipset;
99 static char buffer[128];
100 char *bsw = NULL;
101
102 switch (screen->deviceID) {
103 #undef CHIPSET
104 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
105 #include "pci_ids/i965_pci_ids.h"
106 default:
107 chipset = "Unknown Intel Chipset";
108 break;
109 }
110
111 /* Braswell branding is funny, so we have to fix it up here */
112 if (screen->deviceID == 0x22B1) {
113 bsw = strdup(chipset);
114 char *needle = strstr(bsw, "XXX");
115 if (needle) {
116 memcpy(needle, get_bsw_model(screen), 3);
117 chipset = bsw;
118 }
119 }
120
121 (void) driGetRendererString(buffer, chipset, 0);
122 free(bsw);
123 return buffer;
124 }
125
126 static const GLubyte *
127 intel_get_string(struct gl_context * ctx, GLenum name)
128 {
129 const struct brw_context *const brw = brw_context(ctx);
130
131 switch (name) {
132 case GL_VENDOR:
133 return (GLubyte *) brw_vendor_string;
134
135 case GL_RENDERER:
136 return
137 (GLubyte *) brw_get_renderer_string(brw->screen);
138
139 default:
140 return NULL;
141 }
142 }
143
144 static void
145 intel_viewport(struct gl_context *ctx)
146 {
147 struct brw_context *brw = brw_context(ctx);
148 __DRIcontext *driContext = brw->driContext;
149
150 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
151 if (driContext->driDrawablePriv)
152 dri2InvalidateDrawable(driContext->driDrawablePriv);
153 if (driContext->driReadablePriv)
154 dri2InvalidateDrawable(driContext->driReadablePriv);
155 }
156 }
157
158 static void
159 intel_update_framebuffer(struct gl_context *ctx,
160 struct gl_framebuffer *fb)
161 {
162 struct brw_context *brw = brw_context(ctx);
163
164 /* Quantize the derived default number of samples
165 */
166 fb->DefaultGeometry._NumSamples =
167 intel_quantize_num_samples(brw->screen,
168 fb->DefaultGeometry.NumSamples);
169 }
170
171 static bool
172 intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo)
173 {
174 const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
175 bool found = false;
176
177 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
178 const struct intel_renderbuffer *irb =
179 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
180
181 if (irb && irb->mt->bo == bo) {
182 found = brw->draw_aux_buffer_disabled[i] = true;
183 }
184 }
185
186 return found;
187 }
188
189 /* On Gen9 color buffers may be compressed by the hardware (lossless
190 * compression). There are, however, format restrictions and care needs to be
191 * taken that the sampler engine is capable for re-interpreting a buffer with
192 * format different the buffer was originally written with.
193 *
194 * For example, SRGB formats are not compressible and the sampler engine isn't
195 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
196 * color buffer needs to be resolved so that the sampling surface can be
197 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
198 * set).
199 */
200 static bool
201 intel_texture_view_requires_resolve(struct brw_context *brw,
202 struct intel_texture_object *intel_tex)
203 {
204 if (brw->gen < 9 ||
205 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
206 return false;
207
208 const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format);
209
210 if (isl_format_supports_lossless_compression(&brw->screen->devinfo,
211 brw_format))
212 return false;
213
214 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
215 _mesa_get_format_name(intel_tex->_Format),
216 _mesa_get_format_name(intel_tex->mt->format));
217
218 if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
219 perf_debug("Sampling renderbuffer with non-compressible format - "
220 "turning off compression");
221
222 return true;
223 }
224
225 static void
226 intel_update_state(struct gl_context * ctx, GLuint new_state)
227 {
228 struct brw_context *brw = brw_context(ctx);
229 struct intel_texture_object *tex_obj;
230 struct intel_renderbuffer *depth_irb;
231
232 if (ctx->swrast_context)
233 _swrast_InvalidateState(ctx, new_state);
234 _vbo_InvalidateState(ctx, new_state);
235
236 brw->NewGLState |= new_state;
237
238 _mesa_unlock_context_textures(ctx);
239
240 /* Resolve the depth buffer's HiZ buffer. */
241 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
242 if (depth_irb)
243 intel_renderbuffer_resolve_hiz(brw, depth_irb);
244
245 memset(brw->draw_aux_buffer_disabled, 0,
246 sizeof(brw->draw_aux_buffer_disabled));
247
248 /* Resolve depth buffer and render cache of each enabled texture. */
249 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
250 for (int i = 0; i <= maxEnabledUnit; i++) {
251 if (!ctx->Texture.Unit[i]._Current)
252 continue;
253 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
254 if (!tex_obj || !tex_obj->mt)
255 continue;
256 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
257 /* Sampling engine understands lossless compression and resolving
258 * those surfaces should be skipped for performance reasons.
259 */
260 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
261 0 : INTEL_MIPTREE_IGNORE_CCS_E;
262 intel_miptree_resolve_color(brw, tex_obj->mt, flags);
263 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
264
265 if (tex_obj->base.StencilSampling ||
266 tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
267 intel_update_r8stencil(brw, tex_obj->mt);
268 }
269 }
270
271 /* Resolve color for each active shader image. */
272 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
273 const struct gl_linked_shader *shader =
274 ctx->_Shader->CurrentProgram[i] ?
275 ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL;
276
277 if (unlikely(shader && shader->NumImages)) {
278 for (unsigned j = 0; j < shader->NumImages; j++) {
279 struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]];
280 tex_obj = intel_texture_object(u->TexObj);
281
282 if (tex_obj && tex_obj->mt) {
283 /* Access to images is implemented using indirect messages
284 * against data port. Normal render target write understands
285 * lossless compression but unfortunately the typed/untyped
286 * read/write interface doesn't. Therefore even lossless
287 * compressed surfaces need to be resolved prior to accessing
288 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
289 */
290 intel_miptree_resolve_color(brw, tex_obj->mt, 0);
291
292 if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
293 intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
294 perf_debug("Using renderbuffer as shader image - turning "
295 "off lossless compression");
296 }
297
298 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
299 }
300 }
301 }
302 }
303
304 /* Resolve color buffers for non-coherent framebuffer fetch. */
305 if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
306 ctx->FragmentProgram._Current &&
307 ctx->FragmentProgram._Current->Base.OutputsRead) {
308 const struct gl_framebuffer *fb = ctx->DrawBuffer;
309
310 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
311 const struct intel_renderbuffer *irb =
312 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
313
314 if (irb &&
315 intel_miptree_resolve_color(brw, irb->mt,
316 INTEL_MIPTREE_IGNORE_CCS_E))
317 brw_render_cache_set_check_flush(brw, irb->mt->bo);
318 }
319 }
320
321 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
322 * single-sampled color renderbuffers because the CCS buffer isn't
323 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
324 * enabled because otherwise the surface state will be programmed with the
325 * linear equivalent format anyway.
326 */
327 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
328 struct gl_framebuffer *fb = ctx->DrawBuffer;
329 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
330 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
331
332 if (rb == NULL)
333 continue;
334
335 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
336 struct intel_mipmap_tree *mt = irb->mt;
337
338 if (mt == NULL ||
339 mt->num_samples > 1 ||
340 _mesa_get_srgb_format_linear(mt->format) == mt->format)
341 continue;
342
343 /* Lossless compression is not supported for SRGB formats, it
344 * should be impossible to get here with such surfaces.
345 */
346 assert(!intel_miptree_is_lossless_compressed(brw, mt));
347 intel_miptree_resolve_color(brw, mt, 0);
348 brw_render_cache_set_check_flush(brw, mt->bo);
349 }
350 }
351
352 _mesa_lock_context_textures(ctx);
353
354 if (new_state & _NEW_BUFFERS) {
355 intel_update_framebuffer(ctx, ctx->DrawBuffer);
356 if (ctx->DrawBuffer != ctx->ReadBuffer)
357 intel_update_framebuffer(ctx, ctx->ReadBuffer);
358 }
359 }
360
361 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
362
363 static void
364 intel_flush_front(struct gl_context *ctx)
365 {
366 struct brw_context *brw = brw_context(ctx);
367 __DRIcontext *driContext = brw->driContext;
368 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
369 __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
370
371 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
372 if (flushFront(dri_screen) && driDrawable &&
373 driDrawable->loaderPrivate) {
374
375 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
376 *
377 * This potentially resolves both front and back buffer. It
378 * is unnecessary to resolve the back, but harms nothing except
379 * performance. And no one cares about front-buffer render
380 * performance.
381 */
382 intel_resolve_for_dri2_flush(brw, driDrawable);
383 intel_batchbuffer_flush(brw);
384
385 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
386
387 /* We set the dirty bit in intel_prepare_render() if we're
388 * front buffer rendering once we get there.
389 */
390 brw->front_buffer_dirty = false;
391 }
392 }
393 }
394
395 static void
396 intel_glFlush(struct gl_context *ctx)
397 {
398 struct brw_context *brw = brw_context(ctx);
399
400 intel_batchbuffer_flush(brw);
401 intel_flush_front(ctx);
402
403 brw->need_flush_throttle = true;
404 }
405
406 static void
407 intel_finish(struct gl_context * ctx)
408 {
409 struct brw_context *brw = brw_context(ctx);
410
411 intel_glFlush(ctx);
412
413 if (brw->batch.last_bo)
414 drm_intel_bo_wait_rendering(brw->batch.last_bo);
415 }
416
417 static void
418 brw_init_driver_functions(struct brw_context *brw,
419 struct dd_function_table *functions)
420 {
421 _mesa_init_driver_functions(functions);
422
423 /* GLX uses DRI2 invalidate events to handle window resizing.
424 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
425 * which doesn't provide a mechanism for snooping the event queues.
426 *
427 * So EGL still relies on viewport hacks to handle window resizing.
428 * This should go away with DRI3000.
429 */
430 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
431 functions->Viewport = intel_viewport;
432
433 functions->Flush = intel_glFlush;
434 functions->Finish = intel_finish;
435 functions->GetString = intel_get_string;
436 functions->UpdateState = intel_update_state;
437
438 intelInitTextureFuncs(functions);
439 intelInitTextureImageFuncs(functions);
440 intelInitTextureSubImageFuncs(functions);
441 intelInitTextureCopyImageFuncs(functions);
442 intelInitCopyImageFuncs(functions);
443 intelInitClearFuncs(functions);
444 intelInitBufferFuncs(functions);
445 intelInitPixelFuncs(functions);
446 intelInitBufferObjectFuncs(functions);
447 intel_init_syncobj_functions(functions);
448 brw_init_object_purgeable_functions(functions);
449
450 brwInitFragProgFuncs( functions );
451 brw_init_common_queryobj_functions(functions);
452 if (brw->gen >= 8 || brw->is_haswell)
453 hsw_init_queryobj_functions(functions);
454 else if (brw->gen >= 6)
455 gen6_init_queryobj_functions(functions);
456 else
457 gen4_init_queryobj_functions(functions);
458 brw_init_compute_functions(functions);
459 if (brw->gen >= 7)
460 brw_init_conditional_render_functions(functions);
461
462 functions->QueryInternalFormat = brw_query_internal_format;
463
464 functions->NewTransformFeedback = brw_new_transform_feedback;
465 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
466 if (brw->screen->has_mi_math_and_lrr) {
467 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
468 functions->EndTransformFeedback = hsw_end_transform_feedback;
469 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
470 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
471 } else if (brw->gen >= 7) {
472 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
473 functions->EndTransformFeedback = gen7_end_transform_feedback;
474 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
475 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
476 functions->GetTransformFeedbackVertexCount =
477 brw_get_transform_feedback_vertex_count;
478 } else {
479 functions->BeginTransformFeedback = brw_begin_transform_feedback;
480 functions->EndTransformFeedback = brw_end_transform_feedback;
481 }
482
483 if (brw->gen >= 6)
484 functions->GetSamplePosition = gen6_get_sample_position;
485 }
486
487 static void
488 brw_initialize_context_constants(struct brw_context *brw)
489 {
490 struct gl_context *ctx = &brw->ctx;
491 const struct brw_compiler *compiler = brw->screen->compiler;
492
493 const bool stage_exists[MESA_SHADER_STAGES] = {
494 [MESA_SHADER_VERTEX] = true,
495 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
496 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
497 [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
498 [MESA_SHADER_FRAGMENT] = true,
499 [MESA_SHADER_COMPUTE] =
500 (ctx->API == API_OPENGL_CORE &&
501 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
502 (ctx->API == API_OPENGLES2 &&
503 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
504 _mesa_extension_override_enables.ARB_compute_shader,
505 };
506
507 unsigned num_stages = 0;
508 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
509 if (stage_exists[i])
510 num_stages++;
511 }
512
513 unsigned max_samplers =
514 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
515
516 ctx->Const.MaxDualSourceDrawBuffers = 1;
517 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
518 ctx->Const.MaxCombinedShaderOutputResources =
519 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
520
521 ctx->Const.QueryCounterBits.Timestamp = 36;
522
523 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
524 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
525 ctx->Const.MaxRenderbufferSize = 8192;
526 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
527 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
528 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
529 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
530 ctx->Const.MaxTextureMbytes = 1536;
531 ctx->Const.MaxTextureRectSize = 1 << 12;
532 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
533 ctx->Const.StripTextureBorder = true;
534 if (brw->gen >= 7)
535 ctx->Const.MaxProgramTextureGatherComponents = 4;
536 else if (brw->gen == 6)
537 ctx->Const.MaxProgramTextureGatherComponents = 1;
538
539 ctx->Const.MaxUniformBlockSize = 65536;
540
541 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
542 struct gl_program_constants *prog = &ctx->Const.Program[i];
543
544 if (!stage_exists[i])
545 continue;
546
547 prog->MaxTextureImageUnits = max_samplers;
548
549 prog->MaxUniformBlocks = BRW_MAX_UBO;
550 prog->MaxCombinedUniformComponents =
551 prog->MaxUniformComponents +
552 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
553
554 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
555 prog->MaxAtomicBuffers = BRW_MAX_ABO;
556 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
557 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
558 }
559
560 ctx->Const.MaxTextureUnits =
561 MIN2(ctx->Const.MaxTextureCoordUnits,
562 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
563
564 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
565 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
566 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
567 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
568 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
569 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
570 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
571
572
573 /* Hardware only supports a limited number of transform feedback buffers.
574 * So we need to override the Mesa default (which is based only on software
575 * limits).
576 */
577 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
578
579 /* On Gen6, in the worst case, we use up one binding table entry per
580 * transform feedback component (see comments above the definition of
581 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
582 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
583 * BRW_MAX_SOL_BINDINGS.
584 *
585 * In "separate components" mode, we need to divide this value by
586 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
587 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
588 */
589 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
590 ctx->Const.MaxTransformFeedbackSeparateComponents =
591 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
592
593 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
594 !brw->screen->has_mi_math_and_lrr;
595
596 int max_samples;
597 const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
598 const int clamp_max_samples =
599 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
600
601 if (clamp_max_samples < 0) {
602 max_samples = msaa_modes[0];
603 } else {
604 /* Select the largest supported MSAA mode that does not exceed
605 * clamp_max_samples.
606 */
607 max_samples = 0;
608 for (int i = 0; msaa_modes[i] != 0; ++i) {
609 if (msaa_modes[i] <= clamp_max_samples) {
610 max_samples = msaa_modes[i];
611 break;
612 }
613 }
614 }
615
616 ctx->Const.MaxSamples = max_samples;
617 ctx->Const.MaxColorTextureSamples = max_samples;
618 ctx->Const.MaxDepthTextureSamples = max_samples;
619 ctx->Const.MaxIntegerSamples = max_samples;
620 ctx->Const.MaxImageSamples = 0;
621
622 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
623 * to map indices of rectangular grid to sample numbers within a pixel.
624 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
625 * extension implementation. For more details see the comment above
626 * gen6_set_sample_maps() definition.
627 */
628 gen6_set_sample_maps(ctx);
629
630 ctx->Const.MinLineWidth = 1.0;
631 ctx->Const.MinLineWidthAA = 1.0;
632 if (brw->gen >= 6) {
633 ctx->Const.MaxLineWidth = 7.375;
634 ctx->Const.MaxLineWidthAA = 7.375;
635 ctx->Const.LineWidthGranularity = 0.125;
636 } else {
637 ctx->Const.MaxLineWidth = 7.0;
638 ctx->Const.MaxLineWidthAA = 7.0;
639 ctx->Const.LineWidthGranularity = 0.5;
640 }
641
642 /* For non-antialiased lines, we have to round the line width to the
643 * nearest whole number. Make sure that we don't advertise a line
644 * width that, when rounded, will be beyond the actual hardware
645 * maximum.
646 */
647 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
648
649 ctx->Const.MinPointSize = 1.0;
650 ctx->Const.MinPointSizeAA = 1.0;
651 ctx->Const.MaxPointSize = 255.0;
652 ctx->Const.MaxPointSizeAA = 255.0;
653 ctx->Const.PointSizeGranularity = 1.0;
654
655 if (brw->gen >= 5 || brw->is_g4x)
656 ctx->Const.MaxClipPlanes = 8;
657
658 ctx->Const.LowerTessLevel = true;
659 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8;
660 ctx->Const.LowerTESPatchVerticesIn = true;
661 ctx->Const.PrimitiveRestartForPatches = true;
662
663 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
664 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
665 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
666 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
667 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
668 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
669 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
670 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
671 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
672 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
673 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
674 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
675 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
676 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
677
678 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
679 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
680 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
681 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
682 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
683 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
684 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
685 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
686 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
687 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
688 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
689
690 /* Fragment shaders use real, 32-bit twos-complement integers for all
691 * integer types.
692 */
693 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
694 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
695 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
696 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
697 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
698
699 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
700 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
701 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
702 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
703 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
704
705 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
706 * but we're not sure how it's actually done for vertex order,
707 * that affect provoking vertex decision. Always use last vertex
708 * convention for quad primitive which works as expected for now.
709 */
710 if (brw->gen >= 6)
711 ctx->Const.QuadsFollowProvokingVertexConvention = false;
712
713 ctx->Const.NativeIntegers = true;
714 ctx->Const.VertexID_is_zero_based = true;
715
716 /* Regarding the CMP instruction, the Ivybridge PRM says:
717 *
718 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
719 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
720 * 0xFFFFFFFF) is assigned to dst."
721 *
722 * but PRMs for earlier generations say
723 *
724 * "In dword format, one GRF may store up to 8 results. When the register
725 * is used later as a vector of Booleans, as only LSB at each channel
726 * contains meaning [sic] data, software should make sure all higher bits
727 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
728 *
729 * We select the representation of a true boolean uniform to be ~0, and fix
730 * the results of Gen <= 5 CMP instruction's with -(result & 1).
731 */
732 ctx->Const.UniformBooleanTrue = ~0;
733
734 /* From the gen4 PRM, volume 4 page 127:
735 *
736 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
737 * the base address of the first element of the surface, computed in
738 * software by adding the surface base address to the byte offset of
739 * the element in the buffer."
740 *
741 * However, unaligned accesses are slower, so enforce buffer alignment.
742 */
743 ctx->Const.UniformBufferOffsetAlignment = 16;
744
745 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
746 * that we can safely have the CPU and GPU writing the same SSBO on
747 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
748 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
749 * be updating disjoint regions of the buffer simultaneously and that will
750 * break if the regions overlap the same cacheline.
751 */
752 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
753 ctx->Const.TextureBufferOffsetAlignment = 16;
754 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
755
756 if (brw->gen >= 6) {
757 ctx->Const.MaxVarying = 32;
758 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
759 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
760 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
761 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
762 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
763 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
764 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
765 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
766 }
767
768 /* We want the GLSL compiler to emit code that uses condition codes */
769 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
770 ctx->Const.ShaderCompilerOptions[i] =
771 brw->screen->compiler->glsl_compiler_options[i];
772 }
773
774 if (brw->gen >= 7) {
775 ctx->Const.MaxViewportWidth = 32768;
776 ctx->Const.MaxViewportHeight = 32768;
777 }
778
779 /* ARB_viewport_array */
780 if (brw->gen >= 6 && ctx->API == API_OPENGL_CORE) {
781 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
782 ctx->Const.ViewportSubpixelBits = 0;
783
784 /* Cast to float before negating because MaxViewportWidth is unsigned.
785 */
786 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
787 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
788 }
789
790 /* ARB_gpu_shader5 */
791 if (brw->gen >= 7)
792 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
793
794 /* ARB_framebuffer_no_attachments */
795 ctx->Const.MaxFramebufferWidth = 16384;
796 ctx->Const.MaxFramebufferHeight = 16384;
797 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
798 ctx->Const.MaxFramebufferSamples = max_samples;
799
800 /* OES_primitive_bounding_box */
801 ctx->Const.NoPrimitiveBoundingBoxOutput = true;
802 }
803
804 static void
805 brw_initialize_cs_context_constants(struct brw_context *brw)
806 {
807 struct gl_context *ctx = &brw->ctx;
808 const struct intel_screen *screen = brw->screen;
809 struct gen_device_info *devinfo = &brw->screen->devinfo;
810
811 /* FINISHME: Do this for all platforms that the kernel supports */
812 if (brw->is_cherryview &&
813 screen->subslice_total > 0 && screen->eu_total > 0) {
814 /* Logical CS threads = EUs per subslice * 7 threads per EU */
815 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
816
817 /* Fuse configurations may give more threads than expected, never less. */
818 if (max_cs_threads > devinfo->max_cs_threads)
819 devinfo->max_cs_threads = max_cs_threads;
820 }
821
822 /* Maximum number of scalar compute shader invocations that can be run in
823 * parallel in the same subslice assuming SIMD32 dispatch.
824 *
825 * We don't advertise more than 64 threads, because we are limited to 64 by
826 * our usage of thread_width_max in the gpgpu walker command. This only
827 * currently impacts Haswell, which otherwise might be able to advertise 70
828 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
829 * required the number of invocation needed for ARB_compute_shader.
830 */
831 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
832 const uint32_t max_invocations = 32 * max_threads;
833 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
834 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
835 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
836 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
837 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
838 }
839
840 /**
841 * Process driconf (drirc) options, setting appropriate context flags.
842 *
843 * intelInitExtensions still pokes at optionCache directly, in order to
844 * avoid advertising various extensions. No flags are set, so it makes
845 * sense to continue doing that there.
846 */
847 static void
848 brw_process_driconf_options(struct brw_context *brw)
849 {
850 struct gl_context *ctx = &brw->ctx;
851
852 driOptionCache *options = &brw->optionCache;
853 driParseConfigFiles(options, &brw->screen->optionCache,
854 brw->driContext->driScreenPriv->myNum, "i965");
855
856 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
857 switch (bo_reuse_mode) {
858 case DRI_CONF_BO_REUSE_DISABLED:
859 break;
860 case DRI_CONF_BO_REUSE_ALL:
861 intel_bufmgr_gem_enable_reuse(brw->bufmgr);
862 break;
863 }
864
865 if (!driQueryOptionb(options, "hiz")) {
866 brw->has_hiz = false;
867 /* On gen6, you can only do separate stencil with HIZ. */
868 if (brw->gen == 6)
869 brw->has_separate_stencil = false;
870 }
871
872 if (driQueryOptionb(options, "always_flush_batch")) {
873 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
874 brw->always_flush_batch = true;
875 }
876
877 if (driQueryOptionb(options, "always_flush_cache")) {
878 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
879 brw->always_flush_cache = true;
880 }
881
882 if (driQueryOptionb(options, "disable_throttling")) {
883 fprintf(stderr, "disabling flush throttling\n");
884 brw->disable_throttling = true;
885 }
886
887 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
888
889 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
890 brw->screen->compiler->precise_trig = true;
891
892 ctx->Const.ForceGLSLExtensionsWarn =
893 driQueryOptionb(options, "force_glsl_extensions_warn");
894
895 ctx->Const.DisableGLSLLineContinuations =
896 driQueryOptionb(options, "disable_glsl_line_continuations");
897
898 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
899 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
900
901 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
902
903 brw->dual_color_blend_by_location =
904 driQueryOptionb(options, "dual_color_blend_by_location");
905 }
906
907 GLboolean
908 brwCreateContext(gl_api api,
909 const struct gl_config *mesaVis,
910 __DRIcontext *driContextPriv,
911 unsigned major_version,
912 unsigned minor_version,
913 uint32_t flags,
914 bool notify_reset,
915 unsigned *dri_ctx_error,
916 void *sharedContextPrivate)
917 {
918 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
919 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
920 const struct gen_device_info *devinfo = &screen->devinfo;
921 struct dd_function_table functions;
922
923 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
924 * provides us with context reset notifications.
925 */
926 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
927 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
928
929 if (screen->has_context_reset_notification)
930 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
931
932 if (flags & ~allowed_flags) {
933 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
934 return false;
935 }
936
937 struct brw_context *brw = rzalloc(NULL, struct brw_context);
938 if (!brw) {
939 fprintf(stderr, "%s: failed to alloc context\n", __func__);
940 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
941 return false;
942 }
943
944 driContextPriv->driverPrivate = brw;
945 brw->driContext = driContextPriv;
946 brw->screen = screen;
947 brw->bufmgr = screen->bufmgr;
948
949 brw->gen = devinfo->gen;
950 brw->gt = devinfo->gt;
951 brw->is_g4x = devinfo->is_g4x;
952 brw->is_baytrail = devinfo->is_baytrail;
953 brw->is_haswell = devinfo->is_haswell;
954 brw->is_cherryview = devinfo->is_cherryview;
955 brw->is_broxton = devinfo->is_broxton;
956 brw->has_llc = devinfo->has_llc;
957 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
958 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
959 brw->has_pln = devinfo->has_pln;
960 brw->has_compr4 = devinfo->has_compr4;
961 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
962 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
963 brw->needs_unlit_centroid_workaround =
964 devinfo->needs_unlit_centroid_workaround;
965
966 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
967 brw->has_swizzling = screen->hw_has_swizzling;
968
969 isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling);
970
971 brw->vs.base.stage = MESA_SHADER_VERTEX;
972 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
973 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
974 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
975 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
976 if (brw->gen >= 8) {
977 gen8_init_vtable_surface_functions(brw);
978 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
979 } else if (brw->gen >= 7) {
980 gen7_init_vtable_surface_functions(brw);
981 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
982 } else if (brw->gen >= 6) {
983 gen6_init_vtable_surface_functions(brw);
984 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
985 } else {
986 gen4_init_vtable_surface_functions(brw);
987 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
988 }
989
990 brw_init_driver_functions(brw, &functions);
991
992 if (notify_reset)
993 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
994
995 struct gl_context *ctx = &brw->ctx;
996
997 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
998 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
999 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
1000 intelDestroyContext(driContextPriv);
1001 return false;
1002 }
1003
1004 driContextSetFlags(ctx, flags);
1005
1006 /* Initialize the software rasterizer and helper modules.
1007 *
1008 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1009 * software fallbacks (which we have to support on legacy GL to do weird
1010 * glDrawPixels(), glBitmap(), and other functions).
1011 */
1012 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
1013 _swrast_CreateContext(ctx);
1014 }
1015
1016 _vbo_CreateContext(ctx);
1017 if (ctx->swrast_context) {
1018 _tnl_CreateContext(ctx);
1019 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
1020 _swsetup_CreateContext(ctx);
1021
1022 /* Configure swrast to match hardware characteristics: */
1023 _swrast_allow_pixel_fog(ctx, false);
1024 _swrast_allow_vertex_fog(ctx, true);
1025 }
1026
1027 _mesa_meta_init(ctx);
1028
1029 brw_process_driconf_options(brw);
1030
1031 if (INTEL_DEBUG & DEBUG_PERF)
1032 brw->perf_debug = true;
1033
1034 brw_initialize_cs_context_constants(brw);
1035 brw_initialize_context_constants(brw);
1036
1037 ctx->Const.ResetStrategy = notify_reset
1038 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
1039
1040 /* Reinitialize the context point state. It depends on ctx->Const values. */
1041 _mesa_init_point(ctx);
1042
1043 intel_fbo_init(brw);
1044
1045 intel_batchbuffer_init(brw);
1046
1047 if (brw->gen >= 6) {
1048 /* Create a new hardware context. Using a hardware context means that
1049 * our GPU state will be saved/restored on context switch, allowing us
1050 * to assume that the GPU is in the same state we left it in.
1051 *
1052 * This is required for transform feedback buffer offsets, query objects,
1053 * and also allows us to reduce how much state we have to emit.
1054 */
1055 brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr);
1056
1057 if (!brw->hw_ctx) {
1058 fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
1059 intelDestroyContext(driContextPriv);
1060 return false;
1061 }
1062 }
1063
1064 if (brw_init_pipe_control(brw, devinfo)) {
1065 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1066 intelDestroyContext(driContextPriv);
1067 return false;
1068 }
1069
1070 brw_init_state(brw);
1071
1072 intelInitExtensions(ctx);
1073
1074 brw_init_surface_formats(brw);
1075
1076 if (brw->gen >= 6)
1077 brw_blorp_init(brw);
1078
1079 brw->urb.size = devinfo->urb.size;
1080
1081 if (brw->gen == 6)
1082 brw->urb.gs_present = false;
1083
1084 brw->prim_restart.in_progress = false;
1085 brw->prim_restart.enable_cut_index = false;
1086 brw->gs.enabled = false;
1087 brw->sf.viewport_transform_enable = true;
1088 brw->clip.viewport_count = 1;
1089
1090 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1091
1092 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
1093
1094 brw->use_resource_streamer = screen->has_resource_streamer &&
1095 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1096 env_var_as_boolean("INTEL_USE_GATHER", false));
1097
1098 ctx->VertexProgram._MaintainTnlProgram = true;
1099 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1100
1101 brw_draw_init( brw );
1102
1103 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1104 /* Turn on some extra GL_ARB_debug_output generation. */
1105 brw->perf_debug = true;
1106 }
1107
1108 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0)
1109 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1110
1111 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1112 brw_init_shader_time(brw);
1113
1114 _mesa_compute_version(ctx);
1115
1116 _mesa_initialize_dispatch_tables(ctx);
1117 _mesa_initialize_vbo_vtxfmt(ctx);
1118
1119 if (ctx->Extensions.AMD_performance_monitor) {
1120 brw_init_performance_monitors(brw);
1121 }
1122
1123 vbo_use_buffer_objects(ctx);
1124 vbo_always_unmap_buffers(ctx);
1125
1126 return true;
1127 }
1128
1129 void
1130 intelDestroyContext(__DRIcontext * driContextPriv)
1131 {
1132 struct brw_context *brw =
1133 (struct brw_context *) driContextPriv->driverPrivate;
1134 struct gl_context *ctx = &brw->ctx;
1135
1136 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1137 if (INTEL_DEBUG & DEBUG_AUB) {
1138 intel_batchbuffer_flush(brw);
1139 aub_dump_bmp(&brw->ctx);
1140 }
1141
1142 _mesa_meta_free(&brw->ctx);
1143
1144 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1145 /* Force a report. */
1146 brw->shader_time.report_time = 0;
1147
1148 brw_collect_and_report_shader_time(brw);
1149 brw_destroy_shader_time(brw);
1150 }
1151
1152 if (brw->gen >= 6)
1153 blorp_finish(&brw->blorp);
1154
1155 brw_destroy_state(brw);
1156 brw_draw_destroy(brw);
1157
1158 drm_intel_bo_unreference(brw->curbe.curbe_bo);
1159 if (brw->vs.base.scratch_bo)
1160 drm_intel_bo_unreference(brw->vs.base.scratch_bo);
1161 if (brw->tcs.base.scratch_bo)
1162 drm_intel_bo_unreference(brw->tcs.base.scratch_bo);
1163 if (brw->tes.base.scratch_bo)
1164 drm_intel_bo_unreference(brw->tes.base.scratch_bo);
1165 if (brw->gs.base.scratch_bo)
1166 drm_intel_bo_unreference(brw->gs.base.scratch_bo);
1167 if (brw->wm.base.scratch_bo)
1168 drm_intel_bo_unreference(brw->wm.base.scratch_bo);
1169
1170 gen7_reset_hw_bt_pool_offsets(brw);
1171 drm_intel_bo_unreference(brw->hw_bt_pool.bo);
1172 brw->hw_bt_pool.bo = NULL;
1173
1174 drm_intel_gem_context_destroy(brw->hw_ctx);
1175
1176 if (ctx->swrast_context) {
1177 _swsetup_DestroyContext(&brw->ctx);
1178 _tnl_DestroyContext(&brw->ctx);
1179 }
1180 _vbo_DestroyContext(&brw->ctx);
1181
1182 if (ctx->swrast_context)
1183 _swrast_DestroyContext(&brw->ctx);
1184
1185 brw_fini_pipe_control(brw);
1186 intel_batchbuffer_free(brw);
1187
1188 drm_intel_bo_unreference(brw->throttle_batch[1]);
1189 drm_intel_bo_unreference(brw->throttle_batch[0]);
1190 brw->throttle_batch[1] = NULL;
1191 brw->throttle_batch[0] = NULL;
1192
1193 driDestroyOptionCache(&brw->optionCache);
1194
1195 /* free the Mesa context */
1196 _mesa_free_context_data(&brw->ctx);
1197
1198 ralloc_free(brw);
1199 driContextPriv->driverPrivate = NULL;
1200 }
1201
1202 GLboolean
1203 intelUnbindContext(__DRIcontext * driContextPriv)
1204 {
1205 /* Unset current context and dispath table */
1206 _mesa_make_current(NULL, NULL, NULL);
1207
1208 return true;
1209 }
1210
1211 /**
1212 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1213 * on window system framebuffers.
1214 *
1215 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1216 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1217 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1218 * for a visual where you're guaranteed to be capable, but it turns out that
1219 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1220 * incapable ones, because there's no difference between the two in resources
1221 * used. Applications thus get built that accidentally rely on the default
1222 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1223 * great...
1224 *
1225 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1226 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1227 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1228 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1229 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1230 * and get no sRGB encode (assuming that both kinds of visual are available).
1231 * Thus our choice to support sRGB by default on our visuals for desktop would
1232 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1233 *
1234 * Unfortunately, renderbuffer setup happens before a context is created. So
1235 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1236 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1237 * yet), we go turn that back off before anyone finds out.
1238 */
1239 static void
1240 intel_gles3_srgb_workaround(struct brw_context *brw,
1241 struct gl_framebuffer *fb)
1242 {
1243 struct gl_context *ctx = &brw->ctx;
1244
1245 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1246 return;
1247
1248 /* Some day when we support the sRGB capable bit on visuals available for
1249 * GLES, we'll need to respect that and not disable things here.
1250 */
1251 fb->Visual.sRGBCapable = false;
1252 for (int i = 0; i < BUFFER_COUNT; i++) {
1253 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1254 if (rb)
1255 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1256 }
1257 }
1258
1259 GLboolean
1260 intelMakeCurrent(__DRIcontext * driContextPriv,
1261 __DRIdrawable * driDrawPriv,
1262 __DRIdrawable * driReadPriv)
1263 {
1264 struct brw_context *brw;
1265 GET_CURRENT_CONTEXT(curCtx);
1266
1267 if (driContextPriv)
1268 brw = (struct brw_context *) driContextPriv->driverPrivate;
1269 else
1270 brw = NULL;
1271
1272 /* According to the glXMakeCurrent() man page: "Pending commands to
1273 * the previous context, if any, are flushed before it is released."
1274 * But only flush if we're actually changing contexts.
1275 */
1276 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1277 _mesa_flush(curCtx);
1278 }
1279
1280 if (driContextPriv) {
1281 struct gl_context *ctx = &brw->ctx;
1282 struct gl_framebuffer *fb, *readFb;
1283
1284 if (driDrawPriv == NULL) {
1285 fb = _mesa_get_incomplete_framebuffer();
1286 } else {
1287 fb = driDrawPriv->driverPrivate;
1288 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1289 }
1290
1291 if (driReadPriv == NULL) {
1292 readFb = _mesa_get_incomplete_framebuffer();
1293 } else {
1294 readFb = driReadPriv->driverPrivate;
1295 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1296 }
1297
1298 /* The sRGB workaround changes the renderbuffer's format. We must change
1299 * the format before the renderbuffer's miptree get's allocated, otherwise
1300 * the formats of the renderbuffer and its miptree will differ.
1301 */
1302 intel_gles3_srgb_workaround(brw, fb);
1303 intel_gles3_srgb_workaround(brw, readFb);
1304
1305 /* If the context viewport hasn't been initialized, force a call out to
1306 * the loader to get buffers so we have a drawable size for the initial
1307 * viewport. */
1308 if (!brw->ctx.ViewportInitialized)
1309 intel_prepare_render(brw);
1310
1311 _mesa_make_current(ctx, fb, readFb);
1312 } else {
1313 _mesa_make_current(NULL, NULL, NULL);
1314 }
1315
1316 return true;
1317 }
1318
1319 void
1320 intel_resolve_for_dri2_flush(struct brw_context *brw,
1321 __DRIdrawable *drawable)
1322 {
1323 if (brw->gen < 6) {
1324 /* MSAA and fast color clear are not supported, so don't waste time
1325 * checking whether a resolve is needed.
1326 */
1327 return;
1328 }
1329
1330 struct gl_framebuffer *fb = drawable->driverPrivate;
1331 struct intel_renderbuffer *rb;
1332
1333 /* Usually, only the back buffer will need to be downsampled. However,
1334 * the front buffer will also need it if the user has rendered into it.
1335 */
1336 static const gl_buffer_index buffers[2] = {
1337 BUFFER_BACK_LEFT,
1338 BUFFER_FRONT_LEFT,
1339 };
1340
1341 for (int i = 0; i < 2; ++i) {
1342 rb = intel_get_renderbuffer(fb, buffers[i]);
1343 if (rb == NULL || rb->mt == NULL)
1344 continue;
1345 if (rb->mt->num_samples <= 1)
1346 intel_miptree_resolve_color(brw, rb->mt, 0);
1347 else
1348 intel_renderbuffer_downsample(brw, rb);
1349 }
1350 }
1351
1352 static unsigned
1353 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1354 {
1355 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1356 }
1357
1358 static void
1359 intel_query_dri2_buffers(struct brw_context *brw,
1360 __DRIdrawable *drawable,
1361 __DRIbuffer **buffers,
1362 int *count);
1363
1364 static void
1365 intel_process_dri2_buffer(struct brw_context *brw,
1366 __DRIdrawable *drawable,
1367 __DRIbuffer *buffer,
1368 struct intel_renderbuffer *rb,
1369 const char *buffer_name);
1370
1371 static void
1372 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1373
1374 static void
1375 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1376 {
1377 struct gl_framebuffer *fb = drawable->driverPrivate;
1378 struct intel_renderbuffer *rb;
1379 __DRIbuffer *buffers = NULL;
1380 int i, count;
1381 const char *region_name;
1382
1383 /* Set this up front, so that in case our buffers get invalidated
1384 * while we're getting new buffers, we don't clobber the stamp and
1385 * thus ignore the invalidate. */
1386 drawable->lastStamp = drawable->dri2.stamp;
1387
1388 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1389 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1390
1391 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1392
1393 if (buffers == NULL)
1394 return;
1395
1396 for (i = 0; i < count; i++) {
1397 switch (buffers[i].attachment) {
1398 case __DRI_BUFFER_FRONT_LEFT:
1399 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1400 region_name = "dri2 front buffer";
1401 break;
1402
1403 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1404 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1405 region_name = "dri2 fake front buffer";
1406 break;
1407
1408 case __DRI_BUFFER_BACK_LEFT:
1409 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1410 region_name = "dri2 back buffer";
1411 break;
1412
1413 case __DRI_BUFFER_DEPTH:
1414 case __DRI_BUFFER_HIZ:
1415 case __DRI_BUFFER_DEPTH_STENCIL:
1416 case __DRI_BUFFER_STENCIL:
1417 case __DRI_BUFFER_ACCUM:
1418 default:
1419 fprintf(stderr,
1420 "unhandled buffer attach event, attachment type %d\n",
1421 buffers[i].attachment);
1422 return;
1423 }
1424
1425 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1426 }
1427
1428 }
1429
1430 void
1431 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1432 {
1433 struct brw_context *brw = context->driverPrivate;
1434 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1435
1436 /* Set this up front, so that in case our buffers get invalidated
1437 * while we're getting new buffers, we don't clobber the stamp and
1438 * thus ignore the invalidate. */
1439 drawable->lastStamp = drawable->dri2.stamp;
1440
1441 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1442 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1443
1444 if (dri_screen->image.loader)
1445 intel_update_image_buffers(brw, drawable);
1446 else
1447 intel_update_dri2_buffers(brw, drawable);
1448
1449 driUpdateFramebufferSize(&brw->ctx, drawable);
1450 }
1451
1452 /**
1453 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1454 * state is required.
1455 */
1456 void
1457 intel_prepare_render(struct brw_context *brw)
1458 {
1459 struct gl_context *ctx = &brw->ctx;
1460 __DRIcontext *driContext = brw->driContext;
1461 __DRIdrawable *drawable;
1462
1463 drawable = driContext->driDrawablePriv;
1464 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1465 if (drawable->lastStamp != drawable->dri2.stamp)
1466 intel_update_renderbuffers(driContext, drawable);
1467 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1468 }
1469
1470 drawable = driContext->driReadablePriv;
1471 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1472 if (drawable->lastStamp != drawable->dri2.stamp)
1473 intel_update_renderbuffers(driContext, drawable);
1474 driContext->dri2.read_stamp = drawable->dri2.stamp;
1475 }
1476
1477 /* If we're currently rendering to the front buffer, the rendering
1478 * that will happen next will probably dirty the front buffer. So
1479 * mark it as dirty here.
1480 */
1481 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1482 brw->front_buffer_dirty = true;
1483 }
1484
1485 /**
1486 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1487 *
1488 * To determine which DRI buffers to request, examine the renderbuffers
1489 * attached to the drawable's framebuffer. Then request the buffers with
1490 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1491 *
1492 * This is called from intel_update_renderbuffers().
1493 *
1494 * \param drawable Drawable whose buffers are queried.
1495 * \param buffers [out] List of buffers returned by DRI2 query.
1496 * \param buffer_count [out] Number of buffers returned.
1497 *
1498 * \see intel_update_renderbuffers()
1499 * \see DRI2GetBuffers()
1500 * \see DRI2GetBuffersWithFormat()
1501 */
1502 static void
1503 intel_query_dri2_buffers(struct brw_context *brw,
1504 __DRIdrawable *drawable,
1505 __DRIbuffer **buffers,
1506 int *buffer_count)
1507 {
1508 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1509 struct gl_framebuffer *fb = drawable->driverPrivate;
1510 int i = 0;
1511 unsigned attachments[8];
1512
1513 struct intel_renderbuffer *front_rb;
1514 struct intel_renderbuffer *back_rb;
1515
1516 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1517 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1518
1519 memset(attachments, 0, sizeof(attachments));
1520 if ((_mesa_is_front_buffer_drawing(fb) ||
1521 _mesa_is_front_buffer_reading(fb) ||
1522 !back_rb) && front_rb) {
1523 /* If a fake front buffer is in use, then querying for
1524 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1525 * the real front buffer to the fake front buffer. So before doing the
1526 * query, we need to make sure all the pending drawing has landed in the
1527 * real front buffer.
1528 */
1529 intel_batchbuffer_flush(brw);
1530 intel_flush_front(&brw->ctx);
1531
1532 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1533 attachments[i++] = intel_bits_per_pixel(front_rb);
1534 } else if (front_rb && brw->front_buffer_dirty) {
1535 /* We have pending front buffer rendering, but we aren't querying for a
1536 * front buffer. If the front buffer we have is a fake front buffer,
1537 * the X server is going to throw it away when it processes the query.
1538 * So before doing the query, make sure all the pending drawing has
1539 * landed in the real front buffer.
1540 */
1541 intel_batchbuffer_flush(brw);
1542 intel_flush_front(&brw->ctx);
1543 }
1544
1545 if (back_rb) {
1546 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1547 attachments[i++] = intel_bits_per_pixel(back_rb);
1548 }
1549
1550 assert(i <= ARRAY_SIZE(attachments));
1551
1552 *buffers =
1553 dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1554 &drawable->w,
1555 &drawable->h,
1556 attachments, i / 2,
1557 buffer_count,
1558 drawable->loaderPrivate);
1559 }
1560
1561 /**
1562 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1563 *
1564 * This is called from intel_update_renderbuffers().
1565 *
1566 * \par Note:
1567 * DRI buffers whose attachment point is DRI2BufferStencil or
1568 * DRI2BufferDepthStencil are handled as special cases.
1569 *
1570 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1571 * that is passed to drm_intel_bo_gem_create_from_name().
1572 *
1573 * \see intel_update_renderbuffers()
1574 */
1575 static void
1576 intel_process_dri2_buffer(struct brw_context *brw,
1577 __DRIdrawable *drawable,
1578 __DRIbuffer *buffer,
1579 struct intel_renderbuffer *rb,
1580 const char *buffer_name)
1581 {
1582 struct gl_framebuffer *fb = drawable->driverPrivate;
1583 drm_intel_bo *bo;
1584
1585 if (!rb)
1586 return;
1587
1588 unsigned num_samples = rb->Base.Base.NumSamples;
1589
1590 /* We try to avoid closing and reopening the same BO name, because the first
1591 * use of a mapping of the buffer involves a bunch of page faulting which is
1592 * moderately expensive.
1593 */
1594 struct intel_mipmap_tree *last_mt;
1595 if (num_samples == 0)
1596 last_mt = rb->mt;
1597 else
1598 last_mt = rb->singlesample_mt;
1599
1600 uint32_t old_name = 0;
1601 if (last_mt) {
1602 /* The bo already has a name because the miptree was created by a
1603 * previous call to intel_process_dri2_buffer(). If a bo already has a
1604 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1605 * create a new name.
1606 */
1607 drm_intel_bo_flink(last_mt->bo, &old_name);
1608 }
1609
1610 if (old_name == buffer->name)
1611 return;
1612
1613 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1614 fprintf(stderr,
1615 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1616 buffer->name, buffer->attachment,
1617 buffer->cpp, buffer->pitch);
1618 }
1619
1620 bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1621 buffer->name);
1622 if (!bo) {
1623 fprintf(stderr,
1624 "Failed to open BO for returned DRI2 buffer "
1625 "(%dx%d, %s, named %d).\n"
1626 "This is likely a bug in the X Server that will lead to a "
1627 "crash soon.\n",
1628 drawable->w, drawable->h, buffer_name, buffer->name);
1629 return;
1630 }
1631
1632 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1633 drawable->w, drawable->h,
1634 buffer->pitch);
1635
1636 if (_mesa_is_front_buffer_drawing(fb) &&
1637 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1638 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1639 rb->Base.Base.NumSamples > 1) {
1640 intel_renderbuffer_upsample(brw, rb);
1641 }
1642
1643 assert(rb->mt);
1644
1645 drm_intel_bo_unreference(bo);
1646 }
1647
1648 /**
1649 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1650 *
1651 * To determine which DRI buffers to request, examine the renderbuffers
1652 * attached to the drawable's framebuffer. Then request the buffers from
1653 * the image loader
1654 *
1655 * This is called from intel_update_renderbuffers().
1656 *
1657 * \param drawable Drawable whose buffers are queried.
1658 * \param buffers [out] List of buffers returned by DRI2 query.
1659 * \param buffer_count [out] Number of buffers returned.
1660 *
1661 * \see intel_update_renderbuffers()
1662 */
1663
1664 static void
1665 intel_update_image_buffer(struct brw_context *intel,
1666 __DRIdrawable *drawable,
1667 struct intel_renderbuffer *rb,
1668 __DRIimage *buffer,
1669 enum __DRIimageBufferMask buffer_type)
1670 {
1671 struct gl_framebuffer *fb = drawable->driverPrivate;
1672
1673 if (!rb || !buffer->bo)
1674 return;
1675
1676 unsigned num_samples = rb->Base.Base.NumSamples;
1677
1678 /* Check and see if we're already bound to the right
1679 * buffer object
1680 */
1681 struct intel_mipmap_tree *last_mt;
1682 if (num_samples == 0)
1683 last_mt = rb->mt;
1684 else
1685 last_mt = rb->singlesample_mt;
1686
1687 if (last_mt && last_mt->bo == buffer->bo)
1688 return;
1689
1690 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1691 buffer->width, buffer->height,
1692 buffer->pitch);
1693
1694 if (_mesa_is_front_buffer_drawing(fb) &&
1695 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1696 rb->Base.Base.NumSamples > 1) {
1697 intel_renderbuffer_upsample(intel, rb);
1698 }
1699 }
1700
1701 static void
1702 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1703 {
1704 struct gl_framebuffer *fb = drawable->driverPrivate;
1705 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1706 struct intel_renderbuffer *front_rb;
1707 struct intel_renderbuffer *back_rb;
1708 struct __DRIimageList images;
1709 unsigned int format;
1710 uint32_t buffer_mask = 0;
1711 int ret;
1712
1713 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1714 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1715
1716 if (back_rb)
1717 format = intel_rb_format(back_rb);
1718 else if (front_rb)
1719 format = intel_rb_format(front_rb);
1720 else
1721 return;
1722
1723 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1724 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1725 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1726 }
1727
1728 if (back_rb)
1729 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1730
1731 ret = dri_screen->image.loader->getBuffers(drawable,
1732 driGLFormatToImageFormat(format),
1733 &drawable->dri2.stamp,
1734 drawable->loaderPrivate,
1735 buffer_mask,
1736 &images);
1737 if (!ret)
1738 return;
1739
1740 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1741 drawable->w = images.front->width;
1742 drawable->h = images.front->height;
1743 intel_update_image_buffer(brw,
1744 drawable,
1745 front_rb,
1746 images.front,
1747 __DRI_IMAGE_BUFFER_FRONT);
1748 }
1749 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1750 drawable->w = images.back->width;
1751 drawable->h = images.back->height;
1752 intel_update_image_buffer(brw,
1753 drawable,
1754 back_rb,
1755 images.back,
1756 __DRI_IMAGE_BUFFER_BACK);
1757 }
1758 }