src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/api_exec.h"
  34 #include "main/imports.h"
  35 #include "main/macros.h"
  36 #include "main/simple_list.h"
  37 #include "main/version.h"
  38 #include "main/vtxfmt.h"
  39
  40 #include "vbo/vbo_context.h"
  41
  42 #include "brw_context.h"
  43 #include "brw_defines.h"
  44 #include "brw_draw.h"
  45 #include "brw_state.h"
  46
  47 #include "intel_fbo.h"
  48 #include "intel_mipmap_tree.h"
  49 #include "intel_regions.h"
  50 #include "intel_span.h"
  51 #include "intel_tex.h"
  52 #include "intel_tex_obj.h"
  53
  54 #include "tnl/t_pipeline.h"
  55 #include "glsl/ralloc.h"
  56
  57 /***************************************
  58  * Mesa's Driver Functions
  59  ***************************************/
  60
  61 static void brwInitDriverFunctions(struct intel_screen *screen,
  62                                    struct dd_function_table *functions)
  63 {
  64    intelInitDriverFunctions( functions );
  65
  66    brwInitFragProgFuncs( functions );
  67    brw_init_queryobj_functions(functions);
  68
  69    functions->BeginTransformFeedback = brw_begin_transform_feedback;
  70
  71    if (screen->gen >= 7)
  72       functions->EndTransformFeedback = gen7_end_transform_feedback;
  73    else
  74       functions->EndTransformFeedback = brw_end_transform_feedback;
  75 }
  76
  77 bool
  78 brwCreateContext(int api,
  79                  const struct gl_config *mesaVis,
  80                  __DRIcontext *driContextPriv,
  81                  unsigned major_version,
  82                  unsigned minor_version,
  83                  uint32_t flags,
  84                  unsigned *error,
  85                  void *sharedContextPrivate)
  86 {
  87    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
  88    struct intel_screen *screen = sPriv->driverPrivate;
  89    struct dd_function_table functions;
  90    unsigned i;
  91
  92    struct brw_context *brw = rzalloc(NULL, struct brw_context);
  93    if (!brw) {
  94       printf("%s: failed to alloc context\n", __FUNCTION__);
  95       *error = __DRI_CTX_ERROR_NO_MEMORY;
  96       return false;
  97    }
  98
  99    /* brwInitVtbl needs to know the chipset generation so that it can set the
 100     * right pointers.
 101     */
 102    brw->intel.gen = screen->gen;
 103
 104    brwInitVtbl( brw );
 105
 106    brwInitDriverFunctions(screen, &functions);
 107
 108    struct intel_context *intel = &brw->intel;
 109    struct gl_context *ctx = &intel->ctx;
 110
 111    if (!intelInitContext( intel, api, major_version, minor_version,
 112                           mesaVis, driContextPriv,
 113                           sharedContextPrivate, &functions,
 114                           error)) {
 115       printf("%s: failed to init intel context\n", __FUNCTION__);
 116       ralloc_free(brw);
 117       return false;
 118    }
 119
 120    brw_init_surface_formats(brw);
 121
 122    /* Initialize swrast, tnl driver tables: */
 123    intelInitSpanFuncs(ctx);
 124
 125    TNLcontext *tnl = TNL_CONTEXT(ctx);
 126    if (tnl)
 127       tnl->Driver.RunPipeline = _tnl_run_pipeline;
 128
 129    ctx->Const.MaxDualSourceDrawBuffers = 1;
 130    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
 131    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
 132    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
 133    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
 134                                      ctx->Const.MaxTextureImageUnits);
 135    ctx->Const.MaxVertexTextureImageUnits = BRW_MAX_TEX_UNIT;
 136    ctx->Const.MaxCombinedTextureImageUnits =
 137       ctx->Const.MaxVertexTextureImageUnits +
 138       ctx->Const.MaxTextureImageUnits;
 139
 140    ctx->Const.MaxTextureLevels = 14; /* 8192 */
 141    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 142            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 143    ctx->Const.Max3DTextureLevels = 9;
 144    ctx->Const.MaxCubeTextureLevels = 12;
 145
 146    if (intel->gen >= 7)
 147       ctx->Const.MaxArrayTextureLayers = 2048;
 148    else
 149       ctx->Const.MaxArrayTextureLayers = 512;
 150
 151    ctx->Const.MaxTextureRectSize = (1<<12);
 152
 153    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 154
 155    /* Hardware only supports a limited number of transform feedback buffers.
 156     * So we need to override the Mesa default (which is based only on software
 157     * limits).
 158     */
 159    ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
 160
 161    /* On Gen6, in the worst case, we use up one binding table entry per
 162     * transform feedback component (see comments above the definition of
 163     * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
 164     * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
 165     * BRW_MAX_SOL_BINDINGS.
 166     *
 167     * In "separate components" mode, we need to divide this value by
 168     * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
 169     * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
 170     */
 171    ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
 172    ctx->Const.MaxTransformFeedbackSeparateComponents =
 173       BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
 174
 175    if (intel->gen == 6)
 176       ctx->Const.MaxSamples = 4;
 177    else if (intel->gen >= 7)
 178       ctx->Const.MaxSamples = 8;
 179
 180    /* if conformance mode is set, swrast can handle any size AA point */
 181    ctx->Const.MaxPointSizeAA = 255.0;
 182
 183    /* We want the GLSL compiler to emit code that uses condition codes */
 184    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 185       ctx->ShaderCompilerOptions[i].MaxIfDepth = intel->gen < 6 ? 16 : UINT_MAX;
 186       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
 187       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
 188       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
 189       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
 190       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
 191
 192       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 193          (i == MESA_SHADER_FRAGMENT);
 194       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 195          (i == MESA_SHADER_FRAGMENT);
 196       ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
 197    }
 198
 199    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 200    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 201    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 202    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 203    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 204    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 205    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 206    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 207    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 208    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 209    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 210    ctx->Const.VertexProgram.MaxEnvParams =
 211       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 212            ctx->Const.VertexProgram.MaxEnvParams);
 213
 214    ctx->Const.FragmentProgram.MaxNativeInstructions = (1 * 1024);
 215    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (1 * 1024);
 216    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (1 * 1024);
 217    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (1 * 1024);
 218    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 219    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 220    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 221    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 222    ctx->Const.FragmentProgram.MaxEnvParams =
 223       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 224            ctx->Const.FragmentProgram.MaxEnvParams);
 225
 226    /* Fragment shaders use real, 32-bit twos-complement integers for all
 227     * integer types.
 228     */
 229    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 230    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 231    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 232    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 233       = ctx->Const.FragmentProgram.LowInt;
 234
 235    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 236       but we're not sure how it's actually done for vertex order,
 237       that affect provoking vertex decision. Always use last vertex
 238       convention for quad primitive which works as expected for now. */
 239    if (intel->gen >= 6)
 240        ctx->Const.QuadsFollowProvokingVertexConvention = false;
 241
 242    ctx->Const.QueryCounterBits.Timestamp = 36;
 243
 244    if (intel->is_g4x || intel->gen >= 5) {
 245       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 246       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 247       brw->has_surface_tile_offset = true;
 248       if (intel->gen < 6)
 249           brw->has_compr4 = true;
 250       brw->has_aa_line_parameters = true;
 251       brw->has_pln = true;
 252   } else {
 253       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 254       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 255    }
 256
 257    /* WM maximum threads is number of EUs times number of threads per EU. */
 258    if (intel->gen >= 7) {
 259       if (intel->gt == 1) {
 260          brw->max_wm_threads = 48;
 261          brw->max_vs_threads = 36;
 262          brw->max_gs_threads = 36;
 263          brw->urb.size = 128;
 264          brw->urb.max_vs_entries = 512;
 265          brw->urb.max_gs_entries = 192;
 266       } else if (intel->gt == 2) {
 267          brw->max_wm_threads = 172;
 268          brw->max_vs_threads = 128;
 269          brw->max_gs_threads = 128;
 270          brw->urb.size = 256;
 271          brw->urb.max_vs_entries = 704;
 272          brw->urb.max_gs_entries = 320;
 273       } else {
 274          assert(!"Unknown gen7 device.");
 275       }
 276    } else if (intel->gen == 6) {
 277       if (intel->gt == 2) {
 278          brw->max_wm_threads = 80;
 279          brw->max_vs_threads = 60;
 280          brw->max_gs_threads = 60;
 281          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 282          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 283          brw->urb.max_gs_entries = 256;
 284       } else {
 285          brw->max_wm_threads = 40;
 286          brw->max_vs_threads = 24;
 287          brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
 288          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 289          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 290          brw->urb.max_gs_entries = 256;
 291       }
 292       brw->urb.gen6_gs_previously_active = false;
 293    } else if (intel->gen == 5) {
 294       brw->urb.size = 1024;
 295       brw->max_vs_threads = 72;
 296       brw->max_gs_threads = 32;
 297       brw->max_wm_threads = 12 * 6;
 298    } else if (intel->is_g4x) {
 299       brw->urb.size = 384;
 300       brw->max_vs_threads = 32;
 301       brw->max_gs_threads = 2;
 302       brw->max_wm_threads = 10 * 5;
 303    } else if (intel->gen < 6) {
 304       brw->urb.size = 256;
 305       brw->max_vs_threads = 16;
 306       brw->max_gs_threads = 2;
 307       brw->max_wm_threads = 8 * 4;
 308       brw->has_negative_rhw_bug = true;
 309    }
 310
 311    if (intel->gen <= 7) {
 312       brw->needs_unlit_centroid_workaround = true;
 313    }
 314
 315    brw->prim_restart.in_progress = false;
 316    brw->prim_restart.enable_cut_index = false;
 317    intel->hw_ctx = drm_intel_gem_context_create(intel->bufmgr);
 318
 319    brw_init_state( brw );
 320
 321    brw->curbe.last_buf = calloc(1, 4096);
 322    brw->curbe.next_buf = calloc(1, 4096);
 323
 324    brw->state.dirty.mesa = ~0;
 325    brw->state.dirty.brw = ~0;
 326
 327    brw->emit_state_always = 0;
 328
 329    intel->batch.need_workaround_flush = true;
 330
 331    ctx->VertexProgram._MaintainTnlProgram = true;
 332    ctx->FragmentProgram._MaintainTexEnvProgram = true;
 333
 334    brw_draw_init( brw );
 335
 336    brw->precompile = driQueryOptionb(&intel->optionCache, "shader_precompile");
 337
 338    ctx->Const.NativeIntegers = true;
 339    ctx->Const.UniformBooleanTrue = 1;
 340
 341    ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(&intel->optionCache, "force_glsl_extensions_warn");
 342
 343    ctx->Const.DisableGLSLLineContinuations = driQueryOptionb(&intel->optionCache, "disable_glsl_line_continuations");
 344
 345    ctx->Const.ContextFlags = 0;
 346    if ((flags & __DRI_CTX_FLAG_FORWARD_COMPATIBLE) != 0)
 347       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_FORWARD_COMPATIBLE_BIT;
 348
 349    if ((flags & __DRI_CTX_FLAG_DEBUG) != 0)
 350       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_DEBUG_BIT;
 351
 352    brw_fs_alloc_reg_sets(brw);
 353
 354    if (INTEL_DEBUG & DEBUG_SHADER_TIME)
 355       brw_init_shader_time(brw);
 356
 357    _mesa_compute_version(ctx);
 358
 359    _mesa_initialize_exec_table(ctx);
 360    _mesa_initialize_vbo_vtxfmt(ctx);
 361
 362    return true;
 363 }
 364