src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/api_exec.h"
  34 #include "main/imports.h"
  35 #include "main/macros.h"
  36 #include "main/simple_list.h"
  37 #include "main/version.h"
  38 #include "main/vtxfmt.h"
  39
  40 #include "vbo/vbo_context.h"
  41
  42 #include "brw_context.h"
  43 #include "brw_defines.h"
  44 #include "brw_draw.h"
  45 #include "brw_state.h"
  46
  47 #include "intel_fbo.h"
  48 #include "intel_mipmap_tree.h"
  49 #include "intel_regions.h"
  50 #include "intel_span.h"
  51 #include "intel_tex.h"
  52 #include "intel_tex_obj.h"
  53
  54 #include "tnl/t_pipeline.h"
  55 #include "glsl/ralloc.h"
  56
  57 /***************************************
  58  * Mesa's Driver Functions
  59  ***************************************/
  60
  61 static size_t
  62 brw_query_samples_for_format(struct gl_context *ctx, GLenum internalFormat,
  63                              int samples[16])
  64 {
  65    struct intel_context *intel = intel_context(ctx);
  66
  67    switch (intel->gen) {
  68    case 7:
  69       samples[0] = 8;
  70       samples[1] = 4;
  71       return 2;
  72
  73    case 6:
  74       samples[0] = 4;
  75       return 1;
  76
  77    default:
  78       samples[0] = 1;
  79       return 1;
  80    }
  81 }
  82
  83 static void brwInitDriverFunctions(struct intel_screen *screen,
  84                                    struct dd_function_table *functions)
  85 {
  86    intelInitDriverFunctions( functions );
  87
  88    brwInitFragProgFuncs( functions );
  89    brw_init_queryobj_functions(functions);
  90
  91    functions->QuerySamplesForFormat = brw_query_samples_for_format;
  92    functions->BeginTransformFeedback = brw_begin_transform_feedback;
  93
  94    if (screen->gen >= 7)
  95       functions->EndTransformFeedback = gen7_end_transform_feedback;
  96    else
  97       functions->EndTransformFeedback = brw_end_transform_feedback;
  98 }
  99
 100 bool
 101 brwCreateContext(int api,
 102                  const struct gl_config *mesaVis,
 103                  __DRIcontext *driContextPriv,
 104                  unsigned major_version,
 105                  unsigned minor_version,
 106                  uint32_t flags,
 107                  unsigned *error,
 108                  void *sharedContextPrivate)
 109 {
 110    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 111    struct intel_screen *screen = sPriv->driverPrivate;
 112    struct dd_function_table functions;
 113    unsigned i;
 114
 115    struct brw_context *brw = rzalloc(NULL, struct brw_context);
 116    if (!brw) {
 117       printf("%s: failed to alloc context\n", __FUNCTION__);
 118       *error = __DRI_CTX_ERROR_NO_MEMORY;
 119       return false;
 120    }
 121
 122    /* brwInitVtbl needs to know the chipset generation so that it can set the
 123     * right pointers.
 124     */
 125    brw->intel.gen = screen->gen;
 126
 127    brwInitVtbl( brw );
 128
 129    brwInitDriverFunctions(screen, &functions);
 130
 131    struct intel_context *intel = &brw->intel;
 132    struct gl_context *ctx = &intel->ctx;
 133
 134    if (!intelInitContext( intel, api, major_version, minor_version,
 135                           mesaVis, driContextPriv,
 136                           sharedContextPrivate, &functions,
 137                           error)) {
 138       printf("%s: failed to init intel context\n", __FUNCTION__);
 139       ralloc_free(brw);
 140       return false;
 141    }
 142
 143    brw_init_surface_formats(brw);
 144
 145    /* Initialize swrast, tnl driver tables: */
 146    intelInitSpanFuncs(ctx);
 147
 148    TNLcontext *tnl = TNL_CONTEXT(ctx);
 149    if (tnl)
 150       tnl->Driver.RunPipeline = _tnl_run_pipeline;
 151
 152    ctx->Const.MaxDualSourceDrawBuffers = 1;
 153    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
 154    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
 155    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
 156    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
 157                                      ctx->Const.MaxTextureImageUnits);
 158    ctx->Const.MaxVertexTextureImageUnits = BRW_MAX_TEX_UNIT;
 159    ctx->Const.MaxCombinedTextureImageUnits =
 160       ctx->Const.MaxVertexTextureImageUnits +
 161       ctx->Const.MaxTextureImageUnits;
 162
 163    ctx->Const.MaxTextureLevels = 14; /* 8192 */
 164    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 165            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 166    ctx->Const.Max3DTextureLevels = 9;
 167    ctx->Const.MaxCubeTextureLevels = 12;
 168
 169    if (intel->gen >= 7)
 170       ctx->Const.MaxArrayTextureLayers = 2048;
 171    else
 172       ctx->Const.MaxArrayTextureLayers = 512;
 173
 174    ctx->Const.MaxTextureRectSize = (1<<12);
 175
 176    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 177
 178    /* Hardware only supports a limited number of transform feedback buffers.
 179     * So we need to override the Mesa default (which is based only on software
 180     * limits).
 181     */
 182    ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
 183
 184    /* On Gen6, in the worst case, we use up one binding table entry per
 185     * transform feedback component (see comments above the definition of
 186     * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
 187     * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
 188     * BRW_MAX_SOL_BINDINGS.
 189     *
 190     * In "separate components" mode, we need to divide this value by
 191     * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
 192     * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
 193     */
 194    ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
 195    ctx->Const.MaxTransformFeedbackSeparateComponents =
 196       BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
 197
 198    if (intel->gen == 6) {
 199       ctx->Const.MaxSamples = 4;
 200       ctx->Const.MaxColorTextureSamples = 4;
 201       ctx->Const.MaxDepthTextureSamples = 1;
 202       ctx->Const.MaxIntegerSamples = 4;
 203    }
 204    else if (intel->gen >= 7) {
 205       ctx->Const.MaxSamples = 8;
 206       ctx->Const.MaxColorTextureSamples = 8;
 207       ctx->Const.MaxDepthTextureSamples = 1;
 208       ctx->Const.MaxIntegerSamples = 8;
 209    }
 210
 211    /* if conformance mode is set, swrast can handle any size AA point */
 212    ctx->Const.MaxPointSizeAA = 255.0;
 213
 214    /* We want the GLSL compiler to emit code that uses condition codes */
 215    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 216       ctx->ShaderCompilerOptions[i].MaxIfDepth = intel->gen < 6 ? 16 : UINT_MAX;
 217       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
 218       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
 219       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
 220       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
 221       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
 222
 223       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 224          (i == MESA_SHADER_FRAGMENT);
 225       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 226          (i == MESA_SHADER_FRAGMENT);
 227       ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
 228    }
 229
 230    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 231    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 232    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 233    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 234    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 235    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 236    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 237    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 238    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 239    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 240    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 241    ctx->Const.VertexProgram.MaxEnvParams =
 242       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 243            ctx->Const.VertexProgram.MaxEnvParams);
 244
 245    ctx->Const.FragmentProgram.MaxNativeInstructions = (1 * 1024);
 246    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (1 * 1024);
 247    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (1 * 1024);
 248    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (1 * 1024);
 249    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 250    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 251    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 252    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 253    ctx->Const.FragmentProgram.MaxEnvParams =
 254       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 255            ctx->Const.FragmentProgram.MaxEnvParams);
 256
 257    /* Fragment shaders use real, 32-bit twos-complement integers for all
 258     * integer types.
 259     */
 260    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 261    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 262    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 263    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 264       = ctx->Const.FragmentProgram.LowInt;
 265
 266    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 267       but we're not sure how it's actually done for vertex order,
 268       that affect provoking vertex decision. Always use last vertex
 269       convention for quad primitive which works as expected for now. */
 270    if (intel->gen >= 6)
 271        ctx->Const.QuadsFollowProvokingVertexConvention = false;
 272
 273    ctx->Const.QueryCounterBits.Timestamp = 36;
 274
 275    if (intel->is_g4x || intel->gen >= 5) {
 276       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 277       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 278       brw->has_surface_tile_offset = true;
 279       if (intel->gen < 6)
 280           brw->has_compr4 = true;
 281       brw->has_aa_line_parameters = true;
 282       brw->has_pln = true;
 283   } else {
 284       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 285       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 286    }
 287
 288    /* WM maximum threads is number of EUs times number of threads per EU. */
 289    assert(intel->gen <= 7);
 290
 291    if (intel->is_haswell) {
 292       if (intel->gt == 1) {
 293          brw->max_wm_threads = 102;
 294          brw->max_vs_threads = 70;
 295          brw->urb.size = 128;
 296          brw->urb.max_vs_entries = 640;
 297          brw->urb.max_gs_entries = 256;
 298       } else if (intel->gt == 2) {
 299          brw->max_wm_threads = 204;
 300          brw->max_vs_threads = 280;
 301          brw->urb.size = 256;
 302          brw->urb.max_vs_entries = 1664;
 303          brw->urb.max_gs_entries = 640;
 304       }
 305    } else if (intel->gen == 7) {
 306       if (intel->gt == 1) {
 307          brw->max_wm_threads = 48;
 308          brw->max_vs_threads = 36;
 309          brw->max_gs_threads = 36;
 310          brw->urb.size = 128;
 311          brw->urb.max_vs_entries = 512;
 312          brw->urb.max_gs_entries = 192;
 313       } else if (intel->gt == 2) {
 314          brw->max_wm_threads = 172;
 315          brw->max_vs_threads = 128;
 316          brw->max_gs_threads = 128;
 317          brw->urb.size = 256;
 318          brw->urb.max_vs_entries = 704;
 319          brw->urb.max_gs_entries = 320;
 320       } else {
 321          assert(!"Unknown gen7 device.");
 322       }
 323    } else if (intel->gen == 6) {
 324       if (intel->gt == 2) {
 325          brw->max_wm_threads = 80;
 326          brw->max_vs_threads = 60;
 327          brw->max_gs_threads = 60;
 328          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 329          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 330          brw->urb.max_gs_entries = 256;
 331       } else {
 332          brw->max_wm_threads = 40;
 333          brw->max_vs_threads = 24;
 334          brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
 335          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 336          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 337          brw->urb.max_gs_entries = 256;
 338       }
 339       brw->urb.gen6_gs_previously_active = false;
 340    } else if (intel->gen == 5) {
 341       brw->urb.size = 1024;
 342       brw->max_vs_threads = 72;
 343       brw->max_gs_threads = 32;
 344       brw->max_wm_threads = 12 * 6;
 345    } else if (intel->is_g4x) {
 346       brw->urb.size = 384;
 347       brw->max_vs_threads = 32;
 348       brw->max_gs_threads = 2;
 349       brw->max_wm_threads = 10 * 5;
 350    } else if (intel->gen < 6) {
 351       brw->urb.size = 256;
 352       brw->max_vs_threads = 16;
 353       brw->max_gs_threads = 2;
 354       brw->max_wm_threads = 8 * 4;
 355       brw->has_negative_rhw_bug = true;
 356    }
 357
 358    if (intel->gen <= 7) {
 359       brw->needs_unlit_centroid_workaround = true;
 360    }
 361
 362    brw->prim_restart.in_progress = false;
 363    brw->prim_restart.enable_cut_index = false;
 364    intel->hw_ctx = drm_intel_gem_context_create(intel->bufmgr);
 365
 366    brw_init_state( brw );
 367
 368    brw->curbe.last_buf = calloc(1, 4096);
 369    brw->curbe.next_buf = calloc(1, 4096);
 370
 371    brw->state.dirty.mesa = ~0;
 372    brw->state.dirty.brw = ~0;
 373
 374    brw->emit_state_always = 0;
 375
 376    intel->batch.need_workaround_flush = true;
 377
 378    ctx->VertexProgram._MaintainTnlProgram = true;
 379    ctx->FragmentProgram._MaintainTexEnvProgram = true;
 380
 381    brw_draw_init( brw );
 382
 383    brw->precompile = driQueryOptionb(&intel->optionCache, "shader_precompile");
 384
 385    ctx->Const.NativeIntegers = true;
 386    ctx->Const.UniformBooleanTrue = 1;
 387    ctx->Const.UniformBufferOffsetAlignment = 16;
 388
 389    ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(&intel->optionCache, "force_glsl_extensions_warn");
 390
 391    ctx->Const.DisableGLSLLineContinuations = driQueryOptionb(&intel->optionCache, "disable_glsl_line_continuations");
 392
 393    ctx->Const.ContextFlags = 0;
 394    if ((flags & __DRI_CTX_FLAG_FORWARD_COMPATIBLE) != 0)
 395       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_FORWARD_COMPATIBLE_BIT;
 396
 397    if ((flags & __DRI_CTX_FLAG_DEBUG) != 0)
 398       ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_DEBUG_BIT;
 399
 400    brw_fs_alloc_reg_sets(brw);
 401
 402    if (INTEL_DEBUG & DEBUG_SHADER_TIME)
 403       brw_init_shader_time(brw);
 404
 405    _mesa_compute_version(ctx);
 406
 407    _mesa_initialize_dispatch_tables(ctx);
 408    _mesa_initialize_vbo_vtxfmt(ctx);
 409
 410    return true;
 411 }
 412