i965: Rename brw_format variable names to isl_format
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46
47 #include "vbo/vbo_context.h"
48
49 #include "drivers/common/driverfuncs.h"
50 #include "drivers/common/meta.h"
51 #include "utils.h"
52
53 #include "brw_context.h"
54 #include "brw_defines.h"
55 #include "brw_blorp.h"
56 #include "brw_draw.h"
57 #include "brw_state.h"
58
59 #include "intel_batchbuffer.h"
60 #include "intel_buffer_objects.h"
61 #include "intel_buffers.h"
62 #include "intel_fbo.h"
63 #include "intel_mipmap_tree.h"
64 #include "intel_pixel.h"
65 #include "intel_image.h"
66 #include "intel_tex.h"
67 #include "intel_tex_obj.h"
68
69 #include "swrast_setup/swrast_setup.h"
70 #include "tnl/tnl.h"
71 #include "tnl/t_pipeline.h"
72 #include "util/ralloc.h"
73 #include "util/debug.h"
74 #include "isl/isl.h"
75
76 /***************************************
77 * Mesa's Driver Functions
78 ***************************************/
79
80 const char *const brw_vendor_string = "Intel Open Source Technology Center";
81
82 static const char *
83 get_bsw_model(const struct intel_screen *screen)
84 {
85 switch (screen->eu_total) {
86 case 16:
87 return "405";
88 case 12:
89 return "400";
90 default:
91 return " ";
92 }
93 }
94
95 const char *
96 brw_get_renderer_string(const struct intel_screen *screen)
97 {
98 const char *chipset;
99 static char buffer[128];
100 char *bsw = NULL;
101
102 switch (screen->deviceID) {
103 #undef CHIPSET
104 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
105 #include "pci_ids/i965_pci_ids.h"
106 default:
107 chipset = "Unknown Intel Chipset";
108 break;
109 }
110
111 /* Braswell branding is funny, so we have to fix it up here */
112 if (screen->deviceID == 0x22B1) {
113 bsw = strdup(chipset);
114 char *needle = strstr(bsw, "XXX");
115 if (needle) {
116 memcpy(needle, get_bsw_model(screen), 3);
117 chipset = bsw;
118 }
119 }
120
121 (void) driGetRendererString(buffer, chipset, 0);
122 free(bsw);
123 return buffer;
124 }
125
126 static const GLubyte *
127 intel_get_string(struct gl_context * ctx, GLenum name)
128 {
129 const struct brw_context *const brw = brw_context(ctx);
130
131 switch (name) {
132 case GL_VENDOR:
133 return (GLubyte *) brw_vendor_string;
134
135 case GL_RENDERER:
136 return
137 (GLubyte *) brw_get_renderer_string(brw->screen);
138
139 default:
140 return NULL;
141 }
142 }
143
144 static void
145 intel_viewport(struct gl_context *ctx)
146 {
147 struct brw_context *brw = brw_context(ctx);
148 __DRIcontext *driContext = brw->driContext;
149
150 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
151 if (driContext->driDrawablePriv)
152 dri2InvalidateDrawable(driContext->driDrawablePriv);
153 if (driContext->driReadablePriv)
154 dri2InvalidateDrawable(driContext->driReadablePriv);
155 }
156 }
157
158 static void
159 intel_update_framebuffer(struct gl_context *ctx,
160 struct gl_framebuffer *fb)
161 {
162 struct brw_context *brw = brw_context(ctx);
163
164 /* Quantize the derived default number of samples
165 */
166 fb->DefaultGeometry._NumSamples =
167 intel_quantize_num_samples(brw->screen,
168 fb->DefaultGeometry.NumSamples);
169 }
170
171 static bool
172 intel_disable_rb_aux_buffer(struct brw_context *brw, const struct brw_bo *bo)
173 {
174 const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
175 bool found = false;
176
177 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
178 const struct intel_renderbuffer *irb =
179 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
180
181 if (irb && irb->mt->bo == bo) {
182 found = brw->draw_aux_buffer_disabled[i] = true;
183 }
184 }
185
186 return found;
187 }
188
189 /* On Gen9 color buffers may be compressed by the hardware (lossless
190 * compression). There are, however, format restrictions and care needs to be
191 * taken that the sampler engine is capable for re-interpreting a buffer with
192 * format different the buffer was originally written with.
193 *
194 * For example, SRGB formats are not compressible and the sampler engine isn't
195 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
196 * color buffer needs to be resolved so that the sampling surface can be
197 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
198 * set).
199 */
200 static bool
201 intel_texture_view_requires_resolve(struct brw_context *brw,
202 struct intel_texture_object *intel_tex)
203 {
204 if (brw->gen < 9 ||
205 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
206 return false;
207
208 const enum isl_format isl_format =
209 brw_isl_format_for_mesa_format(intel_tex->_Format);
210
211 if (isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format))
212 return false;
213
214 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
215 _mesa_get_format_name(intel_tex->_Format),
216 _mesa_get_format_name(intel_tex->mt->format));
217
218 if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
219 perf_debug("Sampling renderbuffer with non-compressible format - "
220 "turning off compression");
221
222 return true;
223 }
224
225 static void
226 intel_update_state(struct gl_context * ctx, GLuint new_state)
227 {
228 struct brw_context *brw = brw_context(ctx);
229 struct intel_texture_object *tex_obj;
230 struct intel_renderbuffer *depth_irb;
231
232 if (ctx->swrast_context)
233 _swrast_InvalidateState(ctx, new_state);
234 _vbo_InvalidateState(ctx, new_state);
235
236 brw->NewGLState |= new_state;
237
238 _mesa_unlock_context_textures(ctx);
239
240 /* Resolve the depth buffer's HiZ buffer. */
241 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
242 if (depth_irb)
243 intel_renderbuffer_resolve_hiz(brw, depth_irb);
244
245 memset(brw->draw_aux_buffer_disabled, 0,
246 sizeof(brw->draw_aux_buffer_disabled));
247
248 /* Resolve depth buffer and render cache of each enabled texture. */
249 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
250 for (int i = 0; i <= maxEnabledUnit; i++) {
251 if (!ctx->Texture.Unit[i]._Current)
252 continue;
253 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
254 if (!tex_obj || !tex_obj->mt)
255 continue;
256 if (intel_miptree_sample_with_hiz(brw, tex_obj->mt))
257 intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt);
258 else
259 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
260 /* Sampling engine understands lossless compression and resolving
261 * those surfaces should be skipped for performance reasons.
262 */
263 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
264 0 : INTEL_MIPTREE_IGNORE_CCS_E;
265 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags);
266 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
267
268 if (tex_obj->base.StencilSampling ||
269 tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
270 intel_update_r8stencil(brw, tex_obj->mt);
271 }
272 }
273
274 /* Resolve color for each active shader image. */
275 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
276 const struct gl_program *prog = ctx->_Shader->CurrentProgram[i];
277
278 if (unlikely(prog && prog->info.num_images)) {
279 for (unsigned j = 0; j < prog->info.num_images; j++) {
280 struct gl_image_unit *u =
281 &ctx->ImageUnits[prog->sh.ImageUnits[j]];
282 tex_obj = intel_texture_object(u->TexObj);
283
284 if (tex_obj && tex_obj->mt) {
285 /* Access to images is implemented using indirect messages
286 * against data port. Normal render target write understands
287 * lossless compression but unfortunately the typed/untyped
288 * read/write interface doesn't. Therefore even lossless
289 * compressed surfaces need to be resolved prior to accessing
290 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
291 */
292 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0);
293
294 if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
295 intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
296 perf_debug("Using renderbuffer as shader image - turning "
297 "off lossless compression");
298 }
299
300 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
301 }
302 }
303 }
304 }
305
306 /* Resolve color buffers for non-coherent framebuffer fetch. */
307 if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
308 ctx->FragmentProgram._Current &&
309 ctx->FragmentProgram._Current->info.outputs_read) {
310 const struct gl_framebuffer *fb = ctx->DrawBuffer;
311
312 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
313 const struct intel_renderbuffer *irb =
314 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
315
316 if (irb &&
317 intel_miptree_resolve_color(
318 brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count,
319 INTEL_MIPTREE_IGNORE_CCS_E))
320 brw_render_cache_set_check_flush(brw, irb->mt->bo);
321 }
322 }
323
324 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
325 * single-sampled color renderbuffers because the CCS buffer isn't
326 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
327 * enabled because otherwise the surface state will be programmed with the
328 * linear equivalent format anyway.
329 */
330 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
331 struct gl_framebuffer *fb = ctx->DrawBuffer;
332 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
333 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
334
335 if (rb == NULL)
336 continue;
337
338 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
339 struct intel_mipmap_tree *mt = irb->mt;
340
341 if (mt == NULL ||
342 mt->num_samples > 1 ||
343 _mesa_get_srgb_format_linear(mt->format) == mt->format)
344 continue;
345
346 /* Lossless compression is not supported for SRGB formats, it
347 * should be impossible to get here with such surfaces.
348 */
349 assert(!intel_miptree_is_lossless_compressed(brw, mt));
350 intel_miptree_all_slices_resolve_color(brw, mt, 0);
351 brw_render_cache_set_check_flush(brw, mt->bo);
352 }
353 }
354
355 _mesa_lock_context_textures(ctx);
356
357 if (new_state & _NEW_BUFFERS) {
358 intel_update_framebuffer(ctx, ctx->DrawBuffer);
359 if (ctx->DrawBuffer != ctx->ReadBuffer)
360 intel_update_framebuffer(ctx, ctx->ReadBuffer);
361 }
362 }
363
364 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
365
366 static void
367 intel_flush_front(struct gl_context *ctx)
368 {
369 struct brw_context *brw = brw_context(ctx);
370 __DRIcontext *driContext = brw->driContext;
371 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
372 __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
373
374 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
375 if (flushFront(dri_screen) && driDrawable &&
376 driDrawable->loaderPrivate) {
377
378 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
379 *
380 * This potentially resolves both front and back buffer. It
381 * is unnecessary to resolve the back, but harms nothing except
382 * performance. And no one cares about front-buffer render
383 * performance.
384 */
385 intel_resolve_for_dri2_flush(brw, driDrawable);
386 intel_batchbuffer_flush(brw);
387
388 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
389
390 /* We set the dirty bit in intel_prepare_render() if we're
391 * front buffer rendering once we get there.
392 */
393 brw->front_buffer_dirty = false;
394 }
395 }
396 }
397
398 static void
399 intel_glFlush(struct gl_context *ctx)
400 {
401 struct brw_context *brw = brw_context(ctx);
402
403 intel_batchbuffer_flush(brw);
404 intel_flush_front(ctx);
405
406 brw->need_flush_throttle = true;
407 }
408
409 static void
410 intel_finish(struct gl_context * ctx)
411 {
412 struct brw_context *brw = brw_context(ctx);
413
414 intel_glFlush(ctx);
415
416 if (brw->batch.last_bo)
417 brw_bo_wait_rendering(brw, brw->batch.last_bo);
418 }
419
420 static void
421 brw_init_driver_functions(struct brw_context *brw,
422 struct dd_function_table *functions)
423 {
424 _mesa_init_driver_functions(functions);
425
426 /* GLX uses DRI2 invalidate events to handle window resizing.
427 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
428 * which doesn't provide a mechanism for snooping the event queues.
429 *
430 * So EGL still relies on viewport hacks to handle window resizing.
431 * This should go away with DRI3000.
432 */
433 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
434 functions->Viewport = intel_viewport;
435
436 functions->Flush = intel_glFlush;
437 functions->Finish = intel_finish;
438 functions->GetString = intel_get_string;
439 functions->UpdateState = intel_update_state;
440
441 intelInitTextureFuncs(functions);
442 intelInitTextureImageFuncs(functions);
443 intelInitTextureSubImageFuncs(functions);
444 intelInitTextureCopyImageFuncs(functions);
445 intelInitCopyImageFuncs(functions);
446 intelInitClearFuncs(functions);
447 intelInitBufferFuncs(functions);
448 intelInitPixelFuncs(functions);
449 intelInitBufferObjectFuncs(functions);
450 brw_init_syncobj_functions(functions);
451 brw_init_object_purgeable_functions(functions);
452
453 brwInitFragProgFuncs( functions );
454 brw_init_common_queryobj_functions(functions);
455 if (brw->gen >= 8 || brw->is_haswell)
456 hsw_init_queryobj_functions(functions);
457 else if (brw->gen >= 6)
458 gen6_init_queryobj_functions(functions);
459 else
460 gen4_init_queryobj_functions(functions);
461 brw_init_compute_functions(functions);
462 if (brw->gen >= 7)
463 brw_init_conditional_render_functions(functions);
464
465 functions->QueryInternalFormat = brw_query_internal_format;
466
467 functions->NewTransformFeedback = brw_new_transform_feedback;
468 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
469 if (can_do_mi_math_and_lrr(brw->screen)) {
470 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
471 functions->EndTransformFeedback = hsw_end_transform_feedback;
472 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
473 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
474 } else if (brw->gen >= 7) {
475 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
476 functions->EndTransformFeedback = gen7_end_transform_feedback;
477 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
478 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
479 functions->GetTransformFeedbackVertexCount =
480 brw_get_transform_feedback_vertex_count;
481 } else {
482 functions->BeginTransformFeedback = brw_begin_transform_feedback;
483 functions->EndTransformFeedback = brw_end_transform_feedback;
484 functions->PauseTransformFeedback = brw_pause_transform_feedback;
485 functions->ResumeTransformFeedback = brw_resume_transform_feedback;
486 functions->GetTransformFeedbackVertexCount =
487 brw_get_transform_feedback_vertex_count;
488 }
489
490 if (brw->gen >= 6)
491 functions->GetSamplePosition = gen6_get_sample_position;
492 }
493
494 static void
495 brw_initialize_context_constants(struct brw_context *brw)
496 {
497 struct gl_context *ctx = &brw->ctx;
498 const struct brw_compiler *compiler = brw->screen->compiler;
499
500 const bool stage_exists[MESA_SHADER_STAGES] = {
501 [MESA_SHADER_VERTEX] = true,
502 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
503 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
504 [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
505 [MESA_SHADER_FRAGMENT] = true,
506 [MESA_SHADER_COMPUTE] =
507 ((ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE) &&
508 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
509 (ctx->API == API_OPENGLES2 &&
510 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
511 _mesa_extension_override_enables.ARB_compute_shader,
512 };
513
514 unsigned num_stages = 0;
515 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
516 if (stage_exists[i])
517 num_stages++;
518 }
519
520 unsigned max_samplers =
521 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
522
523 ctx->Const.MaxDualSourceDrawBuffers = 1;
524 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
525 ctx->Const.MaxCombinedShaderOutputResources =
526 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
527
528 /* The timestamp register we can read for glGetTimestamp() is
529 * sometimes only 32 bits, before scaling to nanoseconds (depending
530 * on kernel).
531 *
532 * Once scaled to nanoseconds the timestamp would roll over at a
533 * non-power-of-two, so an application couldn't use
534 * GL_QUERY_COUNTER_BITS to handle rollover correctly. Instead, we
535 * report 36 bits and truncate at that (rolling over 5 times as
536 * often as the HW counter), and when the 32-bit counter rolls
537 * over, it happens to also be at a rollover in the reported value
538 * from near (1<<36) to 0.
539 *
540 * The low 32 bits rolls over in ~343 seconds. Our 36-bit result
541 * rolls over every ~69 seconds.
542 */
543 ctx->Const.QueryCounterBits.Timestamp = 36;
544
545 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
546 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
547 if (brw->gen >= 7) {
548 ctx->Const.MaxRenderbufferSize = 16384;
549 ctx->Const.MaxTextureLevels = MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS);
550 ctx->Const.MaxCubeTextureLevels = 15; /* 16384 */
551 } else {
552 ctx->Const.MaxRenderbufferSize = 8192;
553 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
554 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
555 }
556 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
557 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
558 ctx->Const.MaxTextureMbytes = 1536;
559 ctx->Const.MaxTextureRectSize = 1 << 12;
560 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
561 ctx->Const.MaxTextureLodBias = 15.0;
562 ctx->Const.StripTextureBorder = true;
563 if (brw->gen >= 7) {
564 ctx->Const.MaxProgramTextureGatherComponents = 4;
565 ctx->Const.MinProgramTextureGatherOffset = -32;
566 ctx->Const.MaxProgramTextureGatherOffset = 31;
567 } else if (brw->gen == 6) {
568 ctx->Const.MaxProgramTextureGatherComponents = 1;
569 ctx->Const.MinProgramTextureGatherOffset = -8;
570 ctx->Const.MaxProgramTextureGatherOffset = 7;
571 }
572
573 ctx->Const.MaxUniformBlockSize = 65536;
574
575 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
576 struct gl_program_constants *prog = &ctx->Const.Program[i];
577
578 if (!stage_exists[i])
579 continue;
580
581 prog->MaxTextureImageUnits = max_samplers;
582
583 prog->MaxUniformBlocks = BRW_MAX_UBO;
584 prog->MaxCombinedUniformComponents =
585 prog->MaxUniformComponents +
586 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
587
588 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
589 prog->MaxAtomicBuffers = BRW_MAX_ABO;
590 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
591 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
592 }
593
594 ctx->Const.MaxTextureUnits =
595 MIN2(ctx->Const.MaxTextureCoordUnits,
596 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
597
598 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
599 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
600 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
601 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
602 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
603 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
604 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
605
606
607 /* Hardware only supports a limited number of transform feedback buffers.
608 * So we need to override the Mesa default (which is based only on software
609 * limits).
610 */
611 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
612
613 /* On Gen6, in the worst case, we use up one binding table entry per
614 * transform feedback component (see comments above the definition of
615 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
616 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
617 * BRW_MAX_SOL_BINDINGS.
618 *
619 * In "separate components" mode, we need to divide this value by
620 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
621 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
622 */
623 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
624 ctx->Const.MaxTransformFeedbackSeparateComponents =
625 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
626
627 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
628 !can_do_mi_math_and_lrr(brw->screen);
629
630 int max_samples;
631 const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
632 const int clamp_max_samples =
633 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
634
635 if (clamp_max_samples < 0) {
636 max_samples = msaa_modes[0];
637 } else {
638 /* Select the largest supported MSAA mode that does not exceed
639 * clamp_max_samples.
640 */
641 max_samples = 0;
642 for (int i = 0; msaa_modes[i] != 0; ++i) {
643 if (msaa_modes[i] <= clamp_max_samples) {
644 max_samples = msaa_modes[i];
645 break;
646 }
647 }
648 }
649
650 ctx->Const.MaxSamples = max_samples;
651 ctx->Const.MaxColorTextureSamples = max_samples;
652 ctx->Const.MaxDepthTextureSamples = max_samples;
653 ctx->Const.MaxIntegerSamples = max_samples;
654 ctx->Const.MaxImageSamples = 0;
655
656 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
657 * to map indices of rectangular grid to sample numbers within a pixel.
658 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
659 * extension implementation. For more details see the comment above
660 * gen6_set_sample_maps() definition.
661 */
662 gen6_set_sample_maps(ctx);
663
664 ctx->Const.MinLineWidth = 1.0;
665 ctx->Const.MinLineWidthAA = 1.0;
666 if (brw->gen >= 6) {
667 ctx->Const.MaxLineWidth = 7.375;
668 ctx->Const.MaxLineWidthAA = 7.375;
669 ctx->Const.LineWidthGranularity = 0.125;
670 } else {
671 ctx->Const.MaxLineWidth = 7.0;
672 ctx->Const.MaxLineWidthAA = 7.0;
673 ctx->Const.LineWidthGranularity = 0.5;
674 }
675
676 /* For non-antialiased lines, we have to round the line width to the
677 * nearest whole number. Make sure that we don't advertise a line
678 * width that, when rounded, will be beyond the actual hardware
679 * maximum.
680 */
681 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
682
683 ctx->Const.MinPointSize = 1.0;
684 ctx->Const.MinPointSizeAA = 1.0;
685 ctx->Const.MaxPointSize = 255.0;
686 ctx->Const.MaxPointSizeAA = 255.0;
687 ctx->Const.PointSizeGranularity = 1.0;
688
689 if (brw->gen >= 5 || brw->is_g4x)
690 ctx->Const.MaxClipPlanes = 8;
691
692 ctx->Const.GLSLTessLevelsAsInputs = true;
693 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8;
694 ctx->Const.LowerTESPatchVerticesIn = true;
695 ctx->Const.PrimitiveRestartForPatches = true;
696
697 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
698 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
699 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
700 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
701 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
702 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
703 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
704 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
705 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
706 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
707 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
708 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
709 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
710 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
711
712 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
713 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
714 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
715 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
716 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
717 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
718 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
719 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
720 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
721 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
722 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
723
724 /* Fragment shaders use real, 32-bit twos-complement integers for all
725 * integer types.
726 */
727 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
728 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
729 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
730 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
731 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
732
733 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
734 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
735 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
736 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
737 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
738
739 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
740 * but we're not sure how it's actually done for vertex order,
741 * that affect provoking vertex decision. Always use last vertex
742 * convention for quad primitive which works as expected for now.
743 */
744 if (brw->gen >= 6)
745 ctx->Const.QuadsFollowProvokingVertexConvention = false;
746
747 ctx->Const.NativeIntegers = true;
748 ctx->Const.VertexID_is_zero_based = true;
749
750 /* Regarding the CMP instruction, the Ivybridge PRM says:
751 *
752 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
753 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
754 * 0xFFFFFFFF) is assigned to dst."
755 *
756 * but PRMs for earlier generations say
757 *
758 * "In dword format, one GRF may store up to 8 results. When the register
759 * is used later as a vector of Booleans, as only LSB at each channel
760 * contains meaning [sic] data, software should make sure all higher bits
761 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
762 *
763 * We select the representation of a true boolean uniform to be ~0, and fix
764 * the results of Gen <= 5 CMP instruction's with -(result & 1).
765 */
766 ctx->Const.UniformBooleanTrue = ~0;
767
768 /* From the gen4 PRM, volume 4 page 127:
769 *
770 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
771 * the base address of the first element of the surface, computed in
772 * software by adding the surface base address to the byte offset of
773 * the element in the buffer."
774 *
775 * However, unaligned accesses are slower, so enforce buffer alignment.
776 */
777 ctx->Const.UniformBufferOffsetAlignment = 16;
778
779 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
780 * that we can safely have the CPU and GPU writing the same SSBO on
781 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
782 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
783 * be updating disjoint regions of the buffer simultaneously and that will
784 * break if the regions overlap the same cacheline.
785 */
786 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
787 ctx->Const.TextureBufferOffsetAlignment = 16;
788 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
789
790 if (brw->gen >= 6) {
791 ctx->Const.MaxVarying = 32;
792 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
793 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
794 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
795 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
796 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
797 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
798 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
799 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
800 }
801
802 /* We want the GLSL compiler to emit code that uses condition codes */
803 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
804 ctx->Const.ShaderCompilerOptions[i] =
805 brw->screen->compiler->glsl_compiler_options[i];
806 }
807
808 if (brw->gen >= 7) {
809 ctx->Const.MaxViewportWidth = 32768;
810 ctx->Const.MaxViewportHeight = 32768;
811 }
812
813 /* ARB_viewport_array, OES_viewport_array */
814 if (brw->gen >= 6) {
815 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
816 ctx->Const.ViewportSubpixelBits = 0;
817
818 /* Cast to float before negating because MaxViewportWidth is unsigned.
819 */
820 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
821 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
822 }
823
824 /* ARB_gpu_shader5 */
825 if (brw->gen >= 7)
826 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
827
828 /* ARB_framebuffer_no_attachments */
829 ctx->Const.MaxFramebufferWidth = 16384;
830 ctx->Const.MaxFramebufferHeight = 16384;
831 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
832 ctx->Const.MaxFramebufferSamples = max_samples;
833
834 /* OES_primitive_bounding_box */
835 ctx->Const.NoPrimitiveBoundingBoxOutput = true;
836 }
837
838 static void
839 brw_initialize_cs_context_constants(struct brw_context *brw)
840 {
841 struct gl_context *ctx = &brw->ctx;
842 const struct intel_screen *screen = brw->screen;
843 struct gen_device_info *devinfo = &brw->screen->devinfo;
844
845 /* FINISHME: Do this for all platforms that the kernel supports */
846 if (brw->is_cherryview &&
847 screen->subslice_total > 0 && screen->eu_total > 0) {
848 /* Logical CS threads = EUs per subslice * 7 threads per EU */
849 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
850
851 /* Fuse configurations may give more threads than expected, never less. */
852 if (max_cs_threads > devinfo->max_cs_threads)
853 devinfo->max_cs_threads = max_cs_threads;
854 }
855
856 /* Maximum number of scalar compute shader invocations that can be run in
857 * parallel in the same subslice assuming SIMD32 dispatch.
858 *
859 * We don't advertise more than 64 threads, because we are limited to 64 by
860 * our usage of thread_width_max in the gpgpu walker command. This only
861 * currently impacts Haswell, which otherwise might be able to advertise 70
862 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
863 * required the number of invocation needed for ARB_compute_shader.
864 */
865 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
866 const uint32_t max_invocations = 32 * max_threads;
867 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
868 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
869 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
870 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
871 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
872 }
873
874 /**
875 * Process driconf (drirc) options, setting appropriate context flags.
876 *
877 * intelInitExtensions still pokes at optionCache directly, in order to
878 * avoid advertising various extensions. No flags are set, so it makes
879 * sense to continue doing that there.
880 */
881 static void
882 brw_process_driconf_options(struct brw_context *brw)
883 {
884 struct gl_context *ctx = &brw->ctx;
885
886 driOptionCache *options = &brw->optionCache;
887 driParseConfigFiles(options, &brw->screen->optionCache,
888 brw->driContext->driScreenPriv->myNum, "i965");
889
890 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
891 switch (bo_reuse_mode) {
892 case DRI_CONF_BO_REUSE_DISABLED:
893 break;
894 case DRI_CONF_BO_REUSE_ALL:
895 brw_bufmgr_enable_reuse(brw->bufmgr);
896 break;
897 }
898
899 if (INTEL_DEBUG & DEBUG_NO_HIZ) {
900 brw->has_hiz = false;
901 /* On gen6, you can only do separate stencil with HIZ. */
902 if (brw->gen == 6)
903 brw->has_separate_stencil = false;
904 }
905
906 if (driQueryOptionb(options, "always_flush_batch")) {
907 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
908 brw->always_flush_batch = true;
909 }
910
911 if (driQueryOptionb(options, "always_flush_cache")) {
912 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
913 brw->always_flush_cache = true;
914 }
915
916 if (driQueryOptionb(options, "disable_throttling")) {
917 fprintf(stderr, "disabling flush throttling\n");
918 brw->disable_throttling = true;
919 }
920
921 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
922
923 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
924 brw->screen->compiler->precise_trig = true;
925
926 ctx->Const.ForceGLSLExtensionsWarn =
927 driQueryOptionb(options, "force_glsl_extensions_warn");
928
929 ctx->Const.ForceGLSLVersion =
930 driQueryOptioni(options, "force_glsl_version");
931
932 ctx->Const.DisableGLSLLineContinuations =
933 driQueryOptionb(options, "disable_glsl_line_continuations");
934
935 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
936 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
937
938 ctx->Const.AllowGLSLBuiltinVariableRedeclaration =
939 driQueryOptionb(options, "allow_glsl_builtin_variable_redeclaration");
940
941 ctx->Const.AllowHigherCompatVersion =
942 driQueryOptionb(options, "allow_higher_compat_version");
943
944 ctx->Const.ForceGLSLAbsSqrt =
945 driQueryOptionb(options, "force_glsl_abs_sqrt");
946
947 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
948
949 brw->dual_color_blend_by_location =
950 driQueryOptionb(options, "dual_color_blend_by_location");
951 }
952
953 GLboolean
954 brwCreateContext(gl_api api,
955 const struct gl_config *mesaVis,
956 __DRIcontext *driContextPriv,
957 unsigned major_version,
958 unsigned minor_version,
959 uint32_t flags,
960 bool notify_reset,
961 unsigned *dri_ctx_error,
962 void *sharedContextPrivate)
963 {
964 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
965 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
966 const struct gen_device_info *devinfo = &screen->devinfo;
967 struct dd_function_table functions;
968
969 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
970 * provides us with context reset notifications.
971 */
972 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
973 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
974
975 if (screen->has_context_reset_notification)
976 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
977
978 if (flags & ~allowed_flags) {
979 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
980 return false;
981 }
982
983 struct brw_context *brw = rzalloc(NULL, struct brw_context);
984 if (!brw) {
985 fprintf(stderr, "%s: failed to alloc context\n", __func__);
986 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
987 return false;
988 }
989
990 driContextPriv->driverPrivate = brw;
991 brw->driContext = driContextPriv;
992 brw->screen = screen;
993 brw->bufmgr = screen->bufmgr;
994
995 brw->gen = devinfo->gen;
996 brw->gt = devinfo->gt;
997 brw->is_g4x = devinfo->is_g4x;
998 brw->is_baytrail = devinfo->is_baytrail;
999 brw->is_haswell = devinfo->is_haswell;
1000 brw->is_cherryview = devinfo->is_cherryview;
1001 brw->is_broxton = devinfo->is_broxton;
1002 brw->has_llc = devinfo->has_llc;
1003 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
1004 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
1005 brw->has_pln = devinfo->has_pln;
1006 brw->has_compr4 = devinfo->has_compr4;
1007 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
1008 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
1009 brw->needs_unlit_centroid_workaround =
1010 devinfo->needs_unlit_centroid_workaround;
1011
1012 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
1013 brw->has_swizzling = screen->hw_has_swizzling;
1014
1015 isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling);
1016
1017 brw->vs.base.stage = MESA_SHADER_VERTEX;
1018 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
1019 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
1020 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
1021 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
1022 if (brw->gen >= 8) {
1023 gen8_init_vtable_surface_functions(brw);
1024 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
1025 } else if (brw->gen >= 7) {
1026 gen7_init_vtable_surface_functions(brw);
1027 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
1028 } else if (brw->gen >= 6) {
1029 gen6_init_vtable_surface_functions(brw);
1030 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
1031 } else {
1032 gen4_init_vtable_surface_functions(brw);
1033 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
1034 }
1035
1036 brw_init_driver_functions(brw, &functions);
1037
1038 if (notify_reset)
1039 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
1040
1041 struct gl_context *ctx = &brw->ctx;
1042
1043 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
1044 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1045 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
1046 intelDestroyContext(driContextPriv);
1047 return false;
1048 }
1049
1050 driContextSetFlags(ctx, flags);
1051
1052 /* Initialize the software rasterizer and helper modules.
1053 *
1054 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1055 * software fallbacks (which we have to support on legacy GL to do weird
1056 * glDrawPixels(), glBitmap(), and other functions).
1057 */
1058 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
1059 _swrast_CreateContext(ctx);
1060 }
1061
1062 _vbo_CreateContext(ctx);
1063 if (ctx->swrast_context) {
1064 _tnl_CreateContext(ctx);
1065 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
1066 _swsetup_CreateContext(ctx);
1067
1068 /* Configure swrast to match hardware characteristics: */
1069 _swrast_allow_pixel_fog(ctx, false);
1070 _swrast_allow_vertex_fog(ctx, true);
1071 }
1072
1073 _mesa_meta_init(ctx);
1074
1075 brw_process_driconf_options(brw);
1076
1077 if (INTEL_DEBUG & DEBUG_PERF)
1078 brw->perf_debug = true;
1079
1080 brw_initialize_cs_context_constants(brw);
1081 brw_initialize_context_constants(brw);
1082
1083 ctx->Const.ResetStrategy = notify_reset
1084 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
1085
1086 /* Reinitialize the context point state. It depends on ctx->Const values. */
1087 _mesa_init_point(ctx);
1088
1089 intel_fbo_init(brw);
1090
1091 intel_batchbuffer_init(&brw->batch, brw->bufmgr, brw->has_llc);
1092
1093 if (brw->gen >= 6) {
1094 /* Create a new hardware context. Using a hardware context means that
1095 * our GPU state will be saved/restored on context switch, allowing us
1096 * to assume that the GPU is in the same state we left it in.
1097 *
1098 * This is required for transform feedback buffer offsets, query objects,
1099 * and also allows us to reduce how much state we have to emit.
1100 */
1101 brw->hw_ctx = brw_create_hw_context(brw->bufmgr);
1102
1103 if (!brw->hw_ctx) {
1104 fprintf(stderr, "Failed to create hardware context.\n");
1105 intelDestroyContext(driContextPriv);
1106 return false;
1107 }
1108 }
1109
1110 if (brw_init_pipe_control(brw, devinfo)) {
1111 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1112 intelDestroyContext(driContextPriv);
1113 return false;
1114 }
1115
1116 brw_init_state(brw);
1117
1118 intelInitExtensions(ctx);
1119
1120 brw_init_surface_formats(brw);
1121
1122 brw_blorp_init(brw);
1123
1124 brw->urb.size = devinfo->urb.size;
1125
1126 if (brw->gen == 6)
1127 brw->urb.gs_present = false;
1128
1129 brw->prim_restart.in_progress = false;
1130 brw->prim_restart.enable_cut_index = false;
1131 brw->gs.enabled = false;
1132 brw->clip.viewport_count = 1;
1133
1134 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1135
1136 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
1137
1138 ctx->VertexProgram._MaintainTnlProgram = true;
1139 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1140
1141 brw_draw_init( brw );
1142
1143 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1144 /* Turn on some extra GL_ARB_debug_output generation. */
1145 brw->perf_debug = true;
1146 }
1147
1148 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) {
1149 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1150 ctx->Const.RobustAccess = GL_TRUE;
1151 }
1152
1153 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1154 brw_init_shader_time(brw);
1155
1156 _mesa_compute_version(ctx);
1157
1158 _mesa_initialize_dispatch_tables(ctx);
1159 _mesa_initialize_vbo_vtxfmt(ctx);
1160
1161 if (ctx->Extensions.INTEL_performance_query)
1162 brw_init_performance_queries(brw);
1163
1164 vbo_use_buffer_objects(ctx);
1165 vbo_always_unmap_buffers(ctx);
1166
1167 return true;
1168 }
1169
1170 void
1171 intelDestroyContext(__DRIcontext * driContextPriv)
1172 {
1173 struct brw_context *brw =
1174 (struct brw_context *) driContextPriv->driverPrivate;
1175 struct gl_context *ctx = &brw->ctx;
1176
1177 _mesa_meta_free(&brw->ctx);
1178
1179 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1180 /* Force a report. */
1181 brw->shader_time.report_time = 0;
1182
1183 brw_collect_and_report_shader_time(brw);
1184 brw_destroy_shader_time(brw);
1185 }
1186
1187 if (brw->gen >= 6)
1188 blorp_finish(&brw->blorp);
1189
1190 brw_destroy_state(brw);
1191 brw_draw_destroy(brw);
1192
1193 brw_bo_unreference(brw->curbe.curbe_bo);
1194 if (brw->vs.base.scratch_bo)
1195 brw_bo_unreference(brw->vs.base.scratch_bo);
1196 if (brw->tcs.base.scratch_bo)
1197 brw_bo_unreference(brw->tcs.base.scratch_bo);
1198 if (brw->tes.base.scratch_bo)
1199 brw_bo_unreference(brw->tes.base.scratch_bo);
1200 if (brw->gs.base.scratch_bo)
1201 brw_bo_unreference(brw->gs.base.scratch_bo);
1202 if (brw->wm.base.scratch_bo)
1203 brw_bo_unreference(brw->wm.base.scratch_bo);
1204
1205 brw_destroy_hw_context(brw->bufmgr, brw->hw_ctx);
1206
1207 if (ctx->swrast_context) {
1208 _swsetup_DestroyContext(&brw->ctx);
1209 _tnl_DestroyContext(&brw->ctx);
1210 }
1211 _vbo_DestroyContext(&brw->ctx);
1212
1213 if (ctx->swrast_context)
1214 _swrast_DestroyContext(&brw->ctx);
1215
1216 brw_fini_pipe_control(brw);
1217 intel_batchbuffer_free(&brw->batch);
1218
1219 brw_bo_unreference(brw->throttle_batch[1]);
1220 brw_bo_unreference(brw->throttle_batch[0]);
1221 brw->throttle_batch[1] = NULL;
1222 brw->throttle_batch[0] = NULL;
1223
1224 driDestroyOptionCache(&brw->optionCache);
1225
1226 /* free the Mesa context */
1227 _mesa_free_context_data(&brw->ctx);
1228
1229 ralloc_free(brw);
1230 driContextPriv->driverPrivate = NULL;
1231 }
1232
1233 GLboolean
1234 intelUnbindContext(__DRIcontext * driContextPriv)
1235 {
1236 /* Unset current context and dispath table */
1237 _mesa_make_current(NULL, NULL, NULL);
1238
1239 return true;
1240 }
1241
1242 /**
1243 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1244 * on window system framebuffers.
1245 *
1246 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1247 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1248 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1249 * for a visual where you're guaranteed to be capable, but it turns out that
1250 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1251 * incapable ones, because there's no difference between the two in resources
1252 * used. Applications thus get built that accidentally rely on the default
1253 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1254 * great...
1255 *
1256 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1257 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1258 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1259 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1260 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1261 * and get no sRGB encode (assuming that both kinds of visual are available).
1262 * Thus our choice to support sRGB by default on our visuals for desktop would
1263 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1264 *
1265 * Unfortunately, renderbuffer setup happens before a context is created. So
1266 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1267 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1268 * yet), we go turn that back off before anyone finds out.
1269 */
1270 static void
1271 intel_gles3_srgb_workaround(struct brw_context *brw,
1272 struct gl_framebuffer *fb)
1273 {
1274 struct gl_context *ctx = &brw->ctx;
1275
1276 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1277 return;
1278
1279 /* Some day when we support the sRGB capable bit on visuals available for
1280 * GLES, we'll need to respect that and not disable things here.
1281 */
1282 fb->Visual.sRGBCapable = false;
1283 for (int i = 0; i < BUFFER_COUNT; i++) {
1284 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1285 if (rb)
1286 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1287 }
1288 }
1289
1290 GLboolean
1291 intelMakeCurrent(__DRIcontext * driContextPriv,
1292 __DRIdrawable * driDrawPriv,
1293 __DRIdrawable * driReadPriv)
1294 {
1295 struct brw_context *brw;
1296 GET_CURRENT_CONTEXT(curCtx);
1297
1298 if (driContextPriv)
1299 brw = (struct brw_context *) driContextPriv->driverPrivate;
1300 else
1301 brw = NULL;
1302
1303 /* According to the glXMakeCurrent() man page: "Pending commands to
1304 * the previous context, if any, are flushed before it is released."
1305 * But only flush if we're actually changing contexts.
1306 */
1307 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1308 _mesa_flush(curCtx);
1309 }
1310
1311 if (driContextPriv) {
1312 struct gl_context *ctx = &brw->ctx;
1313 struct gl_framebuffer *fb, *readFb;
1314
1315 if (driDrawPriv == NULL) {
1316 fb = _mesa_get_incomplete_framebuffer();
1317 } else {
1318 fb = driDrawPriv->driverPrivate;
1319 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1320 }
1321
1322 if (driReadPriv == NULL) {
1323 readFb = _mesa_get_incomplete_framebuffer();
1324 } else {
1325 readFb = driReadPriv->driverPrivate;
1326 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1327 }
1328
1329 /* The sRGB workaround changes the renderbuffer's format. We must change
1330 * the format before the renderbuffer's miptree get's allocated, otherwise
1331 * the formats of the renderbuffer and its miptree will differ.
1332 */
1333 intel_gles3_srgb_workaround(brw, fb);
1334 intel_gles3_srgb_workaround(brw, readFb);
1335
1336 /* If the context viewport hasn't been initialized, force a call out to
1337 * the loader to get buffers so we have a drawable size for the initial
1338 * viewport. */
1339 if (!brw->ctx.ViewportInitialized)
1340 intel_prepare_render(brw);
1341
1342 _mesa_make_current(ctx, fb, readFb);
1343 } else {
1344 _mesa_make_current(NULL, NULL, NULL);
1345 }
1346
1347 return true;
1348 }
1349
1350 void
1351 intel_resolve_for_dri2_flush(struct brw_context *brw,
1352 __DRIdrawable *drawable)
1353 {
1354 if (brw->gen < 6) {
1355 /* MSAA and fast color clear are not supported, so don't waste time
1356 * checking whether a resolve is needed.
1357 */
1358 return;
1359 }
1360
1361 struct gl_framebuffer *fb = drawable->driverPrivate;
1362 struct intel_renderbuffer *rb;
1363
1364 /* Usually, only the back buffer will need to be downsampled. However,
1365 * the front buffer will also need it if the user has rendered into it.
1366 */
1367 static const gl_buffer_index buffers[2] = {
1368 BUFFER_BACK_LEFT,
1369 BUFFER_FRONT_LEFT,
1370 };
1371
1372 for (int i = 0; i < 2; ++i) {
1373 rb = intel_get_renderbuffer(fb, buffers[i]);
1374 if (rb == NULL || rb->mt == NULL)
1375 continue;
1376 if (rb->mt->num_samples <= 1) {
1377 assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
1378 rb->layer_count == 1);
1379 intel_miptree_resolve_color(brw, rb->mt, 0, 0, 1, 0);
1380 } else {
1381 intel_renderbuffer_downsample(brw, rb);
1382 }
1383 }
1384 }
1385
1386 static unsigned
1387 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1388 {
1389 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1390 }
1391
1392 static void
1393 intel_query_dri2_buffers(struct brw_context *brw,
1394 __DRIdrawable *drawable,
1395 __DRIbuffer **buffers,
1396 int *count);
1397
1398 static void
1399 intel_process_dri2_buffer(struct brw_context *brw,
1400 __DRIdrawable *drawable,
1401 __DRIbuffer *buffer,
1402 struct intel_renderbuffer *rb,
1403 const char *buffer_name);
1404
1405 static void
1406 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1407
1408 static void
1409 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1410 {
1411 struct gl_framebuffer *fb = drawable->driverPrivate;
1412 struct intel_renderbuffer *rb;
1413 __DRIbuffer *buffers = NULL;
1414 int count;
1415 const char *region_name;
1416
1417 /* Set this up front, so that in case our buffers get invalidated
1418 * while we're getting new buffers, we don't clobber the stamp and
1419 * thus ignore the invalidate. */
1420 drawable->lastStamp = drawable->dri2.stamp;
1421
1422 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1423 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1424
1425 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1426
1427 if (buffers == NULL)
1428 return;
1429
1430 for (int i = 0; i < count; i++) {
1431 switch (buffers[i].attachment) {
1432 case __DRI_BUFFER_FRONT_LEFT:
1433 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1434 region_name = "dri2 front buffer";
1435 break;
1436
1437 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1438 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1439 region_name = "dri2 fake front buffer";
1440 break;
1441
1442 case __DRI_BUFFER_BACK_LEFT:
1443 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1444 region_name = "dri2 back buffer";
1445 break;
1446
1447 case __DRI_BUFFER_DEPTH:
1448 case __DRI_BUFFER_HIZ:
1449 case __DRI_BUFFER_DEPTH_STENCIL:
1450 case __DRI_BUFFER_STENCIL:
1451 case __DRI_BUFFER_ACCUM:
1452 default:
1453 fprintf(stderr,
1454 "unhandled buffer attach event, attachment type %d\n",
1455 buffers[i].attachment);
1456 return;
1457 }
1458
1459 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1460 }
1461
1462 }
1463
1464 void
1465 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1466 {
1467 struct brw_context *brw = context->driverPrivate;
1468 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1469
1470 /* Set this up front, so that in case our buffers get invalidated
1471 * while we're getting new buffers, we don't clobber the stamp and
1472 * thus ignore the invalidate. */
1473 drawable->lastStamp = drawable->dri2.stamp;
1474
1475 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1476 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1477
1478 if (dri_screen->image.loader)
1479 intel_update_image_buffers(brw, drawable);
1480 else
1481 intel_update_dri2_buffers(brw, drawable);
1482
1483 driUpdateFramebufferSize(&brw->ctx, drawable);
1484 }
1485
1486 /**
1487 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1488 * state is required.
1489 */
1490 void
1491 intel_prepare_render(struct brw_context *brw)
1492 {
1493 struct gl_context *ctx = &brw->ctx;
1494 __DRIcontext *driContext = brw->driContext;
1495 __DRIdrawable *drawable;
1496
1497 drawable = driContext->driDrawablePriv;
1498 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1499 if (drawable->lastStamp != drawable->dri2.stamp)
1500 intel_update_renderbuffers(driContext, drawable);
1501 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1502 }
1503
1504 drawable = driContext->driReadablePriv;
1505 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1506 if (drawable->lastStamp != drawable->dri2.stamp)
1507 intel_update_renderbuffers(driContext, drawable);
1508 driContext->dri2.read_stamp = drawable->dri2.stamp;
1509 }
1510
1511 /* If we're currently rendering to the front buffer, the rendering
1512 * that will happen next will probably dirty the front buffer. So
1513 * mark it as dirty here.
1514 */
1515 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1516 brw->front_buffer_dirty = true;
1517 }
1518
1519 /**
1520 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1521 *
1522 * To determine which DRI buffers to request, examine the renderbuffers
1523 * attached to the drawable's framebuffer. Then request the buffers with
1524 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1525 *
1526 * This is called from intel_update_renderbuffers().
1527 *
1528 * \param drawable Drawable whose buffers are queried.
1529 * \param buffers [out] List of buffers returned by DRI2 query.
1530 * \param buffer_count [out] Number of buffers returned.
1531 *
1532 * \see intel_update_renderbuffers()
1533 * \see DRI2GetBuffers()
1534 * \see DRI2GetBuffersWithFormat()
1535 */
1536 static void
1537 intel_query_dri2_buffers(struct brw_context *brw,
1538 __DRIdrawable *drawable,
1539 __DRIbuffer **buffers,
1540 int *buffer_count)
1541 {
1542 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1543 struct gl_framebuffer *fb = drawable->driverPrivate;
1544 int i = 0;
1545 unsigned attachments[8];
1546
1547 struct intel_renderbuffer *front_rb;
1548 struct intel_renderbuffer *back_rb;
1549
1550 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1551 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1552
1553 memset(attachments, 0, sizeof(attachments));
1554 if ((_mesa_is_front_buffer_drawing(fb) ||
1555 _mesa_is_front_buffer_reading(fb) ||
1556 !back_rb) && front_rb) {
1557 /* If a fake front buffer is in use, then querying for
1558 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1559 * the real front buffer to the fake front buffer. So before doing the
1560 * query, we need to make sure all the pending drawing has landed in the
1561 * real front buffer.
1562 */
1563 intel_batchbuffer_flush(brw);
1564 intel_flush_front(&brw->ctx);
1565
1566 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1567 attachments[i++] = intel_bits_per_pixel(front_rb);
1568 } else if (front_rb && brw->front_buffer_dirty) {
1569 /* We have pending front buffer rendering, but we aren't querying for a
1570 * front buffer. If the front buffer we have is a fake front buffer,
1571 * the X server is going to throw it away when it processes the query.
1572 * So before doing the query, make sure all the pending drawing has
1573 * landed in the real front buffer.
1574 */
1575 intel_batchbuffer_flush(brw);
1576 intel_flush_front(&brw->ctx);
1577 }
1578
1579 if (back_rb) {
1580 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1581 attachments[i++] = intel_bits_per_pixel(back_rb);
1582 }
1583
1584 assert(i <= ARRAY_SIZE(attachments));
1585
1586 *buffers =
1587 dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1588 &drawable->w,
1589 &drawable->h,
1590 attachments, i / 2,
1591 buffer_count,
1592 drawable->loaderPrivate);
1593 }
1594
1595 /**
1596 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1597 *
1598 * This is called from intel_update_renderbuffers().
1599 *
1600 * \par Note:
1601 * DRI buffers whose attachment point is DRI2BufferStencil or
1602 * DRI2BufferDepthStencil are handled as special cases.
1603 *
1604 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1605 * that is passed to brw_bo_gem_create_from_name().
1606 *
1607 * \see intel_update_renderbuffers()
1608 */
1609 static void
1610 intel_process_dri2_buffer(struct brw_context *brw,
1611 __DRIdrawable *drawable,
1612 __DRIbuffer *buffer,
1613 struct intel_renderbuffer *rb,
1614 const char *buffer_name)
1615 {
1616 struct gl_framebuffer *fb = drawable->driverPrivate;
1617 struct brw_bo *bo;
1618
1619 if (!rb)
1620 return;
1621
1622 unsigned num_samples = rb->Base.Base.NumSamples;
1623
1624 /* We try to avoid closing and reopening the same BO name, because the first
1625 * use of a mapping of the buffer involves a bunch of page faulting which is
1626 * moderately expensive.
1627 */
1628 struct intel_mipmap_tree *last_mt;
1629 if (num_samples == 0)
1630 last_mt = rb->mt;
1631 else
1632 last_mt = rb->singlesample_mt;
1633
1634 uint32_t old_name = 0;
1635 if (last_mt) {
1636 /* The bo already has a name because the miptree was created by a
1637 * previous call to intel_process_dri2_buffer(). If a bo already has a
1638 * name, then brw_bo_flink() is a low-cost getter. It does not
1639 * create a new name.
1640 */
1641 brw_bo_flink(last_mt->bo, &old_name);
1642 }
1643
1644 if (old_name == buffer->name)
1645 return;
1646
1647 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1648 fprintf(stderr,
1649 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1650 buffer->name, buffer->attachment,
1651 buffer->cpp, buffer->pitch);
1652 }
1653
1654 bo = brw_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1655 buffer->name);
1656 if (!bo) {
1657 fprintf(stderr,
1658 "Failed to open BO for returned DRI2 buffer "
1659 "(%dx%d, %s, named %d).\n"
1660 "This is likely a bug in the X Server that will lead to a "
1661 "crash soon.\n",
1662 drawable->w, drawable->h, buffer_name, buffer->name);
1663 return;
1664 }
1665
1666 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1667 drawable->w, drawable->h,
1668 buffer->pitch);
1669
1670 if (_mesa_is_front_buffer_drawing(fb) &&
1671 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1672 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1673 rb->Base.Base.NumSamples > 1) {
1674 intel_renderbuffer_upsample(brw, rb);
1675 }
1676
1677 assert(rb->mt);
1678
1679 brw_bo_unreference(bo);
1680 }
1681
1682 /**
1683 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1684 *
1685 * To determine which DRI buffers to request, examine the renderbuffers
1686 * attached to the drawable's framebuffer. Then request the buffers from
1687 * the image loader
1688 *
1689 * This is called from intel_update_renderbuffers().
1690 *
1691 * \param drawable Drawable whose buffers are queried.
1692 * \param buffers [out] List of buffers returned by DRI2 query.
1693 * \param buffer_count [out] Number of buffers returned.
1694 *
1695 * \see intel_update_renderbuffers()
1696 */
1697
1698 static void
1699 intel_update_image_buffer(struct brw_context *intel,
1700 __DRIdrawable *drawable,
1701 struct intel_renderbuffer *rb,
1702 __DRIimage *buffer,
1703 enum __DRIimageBufferMask buffer_type)
1704 {
1705 struct gl_framebuffer *fb = drawable->driverPrivate;
1706
1707 if (!rb || !buffer->bo)
1708 return;
1709
1710 unsigned num_samples = rb->Base.Base.NumSamples;
1711
1712 /* Check and see if we're already bound to the right
1713 * buffer object
1714 */
1715 struct intel_mipmap_tree *last_mt;
1716 if (num_samples == 0)
1717 last_mt = rb->mt;
1718 else
1719 last_mt = rb->singlesample_mt;
1720
1721 if (last_mt && last_mt->bo == buffer->bo)
1722 return;
1723
1724 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1725 buffer->width, buffer->height,
1726 buffer->pitch);
1727
1728 if (_mesa_is_front_buffer_drawing(fb) &&
1729 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1730 rb->Base.Base.NumSamples > 1) {
1731 intel_renderbuffer_upsample(intel, rb);
1732 }
1733 }
1734
1735 static void
1736 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1737 {
1738 struct gl_framebuffer *fb = drawable->driverPrivate;
1739 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1740 struct intel_renderbuffer *front_rb;
1741 struct intel_renderbuffer *back_rb;
1742 struct __DRIimageList images;
1743 mesa_format format;
1744 uint32_t buffer_mask = 0;
1745 int ret;
1746
1747 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1748 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1749
1750 if (back_rb)
1751 format = intel_rb_format(back_rb);
1752 else if (front_rb)
1753 format = intel_rb_format(front_rb);
1754 else
1755 return;
1756
1757 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1758 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1759 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1760 }
1761
1762 if (back_rb)
1763 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1764
1765 ret = dri_screen->image.loader->getBuffers(drawable,
1766 driGLFormatToImageFormat(format),
1767 &drawable->dri2.stamp,
1768 drawable->loaderPrivate,
1769 buffer_mask,
1770 &images);
1771 if (!ret)
1772 return;
1773
1774 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1775 drawable->w = images.front->width;
1776 drawable->h = images.front->height;
1777 intel_update_image_buffer(brw,
1778 drawable,
1779 front_rb,
1780 images.front,
1781 __DRI_IMAGE_BUFFER_FRONT);
1782 }
1783
1784 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1785 drawable->w = images.back->width;
1786 drawable->h = images.back->height;
1787 intel_update_image_buffer(brw,
1788 drawable,
1789 back_rb,
1790 images.back,
1791 __DRI_IMAGE_BUFFER_BACK);
1792 }
1793 }