src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/imports.h"
  34 #include "main/api_noop.h"
  35 #include "main/macros.h"
  36 #include "main/simple_list.h"
  37 #include "brw_context.h"
  38 #include "brw_defines.h"
  39 #include "brw_draw.h"
  40 #include "brw_state.h"
  41 #include "intel_span.h"
  42 #include "tnl/t_pipeline.h"
  43 #include "glsl/ralloc.h"
  44
  45 /***************************************
  46  * Mesa's Driver Functions
  47  ***************************************/
  48
  49 static void brwInitDriverFunctions( struct dd_function_table *functions )
  50 {
  51    intelInitDriverFunctions( functions );
  52
  53    brwInitFragProgFuncs( functions );
  54    brw_init_queryobj_functions(functions);
  55 }
  56
  57 bool
  58 brwCreateContext(int api,
  59                  const struct gl_config *mesaVis,
  60                  __DRIcontext *driContextPriv,
  61                  void *sharedContextPrivate)
  62 {
  63    struct dd_function_table functions;
  64    struct brw_context *brw = rzalloc(NULL, struct brw_context);
  65    struct intel_context *intel = &brw->intel;
  66    struct gl_context *ctx = &intel->ctx;
  67    unsigned i;
  68
  69    if (!brw) {
  70       printf("%s: failed to alloc context\n", __FUNCTION__);
  71       return false;
  72    }
  73
  74    brwInitDriverFunctions( &functions );
  75
  76    if (!intelInitContext( intel, api, mesaVis, driContextPriv,
  77                           sharedContextPrivate, &functions )) {
  78       printf("%s: failed to init intel context\n", __FUNCTION__);
  79       FREE(brw);
  80       return false;
  81    }
  82
  83    brwInitVtbl( brw );
  84
  85    /* Initialize swrast, tnl driver tables: */
  86    intelInitSpanFuncs(ctx);
  87
  88    TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
  89
  90    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
  91    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
  92    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
  93    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
  94                                      ctx->Const.MaxTextureImageUnits);
  95    ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */
  96    ctx->Const.MaxCombinedTextureImageUnits =
  97       ctx->Const.MaxVertexTextureImageUnits +
  98       ctx->Const.MaxTextureImageUnits;
  99
 100    ctx->Const.MaxTextureLevels = 14; /* 8192 */
 101    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 102            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 103    ctx->Const.Max3DTextureLevels = 9;
 104    ctx->Const.MaxCubeTextureLevels = 12;
 105    /* minimum maximum.  Users are likely to run into memory problems
 106     * even at this size, since 64 * 2048 * 2048 * 4 = 1GB and we can't
 107     * address that much.
 108     */
 109    ctx->Const.MaxArrayTextureLayers = 64;
 110    ctx->Const.MaxTextureRectSize = (1<<12);
 111
 112    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 113
 114    /* if conformance mode is set, swrast can handle any size AA point */
 115    ctx->Const.MaxPointSizeAA = 255.0;
 116
 117    /* We want the GLSL compiler to emit code that uses condition codes */
 118    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 119       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
 120       ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = true;
 121       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
 122       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true;
 123       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true;
 124       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true;
 125
 126       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 127          (i == MESA_SHADER_FRAGMENT);
 128       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 129          (i == MESA_SHADER_FRAGMENT);
 130       ctx->ShaderCompilerOptions[i].LowerClipDistance = true;
 131    }
 132
 133    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 134    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 135    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 136    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 137    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 138    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 139    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 140    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 141    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 142    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 143    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 144    ctx->Const.VertexProgram.MaxEnvParams =
 145       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 146            ctx->Const.VertexProgram.MaxEnvParams);
 147
 148    ctx->Const.FragmentProgram.MaxNativeInstructions = (16 * 1024);
 149    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (16 * 1024);
 150    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (16 * 1024);
 151    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (16 * 1024);
 152    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 153    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 154    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 155    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 156    ctx->Const.FragmentProgram.MaxEnvParams =
 157       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 158            ctx->Const.FragmentProgram.MaxEnvParams);
 159
 160    /* Fragment shaders use real, 32-bit twos-complement integers for all
 161     * integer types.
 162     */
 163    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 164    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 165    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 166    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 167       = ctx->Const.FragmentProgram.LowInt;
 168
 169    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 170       but we're not sure how it's actually done for vertex order,
 171       that affect provoking vertex decision. Always use last vertex
 172       convention for quad primitive which works as expected for now. */
 173    if (intel->gen >= 6)
 174        ctx->Const.QuadsFollowProvokingVertexConvention = false;
 175
 176    if (intel->is_g4x || intel->gen >= 5) {
 177       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 178       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 179       brw->has_surface_tile_offset = true;
 180       if (intel->gen < 6)
 181           brw->has_compr4 = true;
 182       brw->has_aa_line_parameters = true;
 183       brw->has_pln = true;
 184   } else {
 185       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 186       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 187    }
 188
 189    /* WM maximum threads is number of EUs times number of threads per EU. */
 190    if (intel->gen >= 7) {
 191       if (intel->gt == 1) {
 192          brw->wm_max_threads = 86;
 193          brw->vs_max_threads = 36;
 194          brw->urb.size = 128;
 195          brw->urb.max_vs_entries = 512;
 196          brw->urb.max_gs_entries = 192;
 197       } else if (intel->gt == 2) {
 198          brw->wm_max_threads = 86;
 199          brw->vs_max_threads = 128;
 200          brw->urb.size = 256;
 201          brw->urb.max_vs_entries = 704;
 202          brw->urb.max_gs_entries = 320;
 203       } else {
 204          assert(!"Unknown gen7 device.");
 205       }
 206    } else if (intel->gen == 6) {
 207       if (intel->gt == 2) {
 208          /* This could possibly be 80, but is supposed to require
 209           * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
 210           * GPU reset to change.
 211           */
 212          brw->wm_max_threads = 40;
 213          brw->vs_max_threads = 60;
 214          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 215          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 216       } else {
 217          brw->wm_max_threads = 40;
 218          brw->vs_max_threads = 24;
 219          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 220          brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
 221       }
 222    } else if (intel->gen == 5) {
 223       brw->urb.size = 1024;
 224       brw->vs_max_threads = 72;
 225       brw->wm_max_threads = 12 * 6;
 226    } else if (intel->is_g4x) {
 227       brw->urb.size = 384;
 228       brw->vs_max_threads = 32;
 229       brw->wm_max_threads = 10 * 5;
 230    } else if (intel->gen < 6) {
 231       brw->urb.size = 256;
 232       brw->vs_max_threads = 16;
 233       brw->wm_max_threads = 8 * 4;
 234       brw->has_negative_rhw_bug = true;
 235    }
 236
 237    if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) {
 238       brw->vs_max_threads = 1;
 239       brw->wm_max_threads = 1;
 240    }
 241
 242    brw_init_state( brw );
 243
 244    brw->curbe.last_buf = calloc(1, 4096);
 245    brw->curbe.next_buf = calloc(1, 4096);
 246
 247    brw->state.dirty.mesa = ~0;
 248    brw->state.dirty.brw = ~0;
 249
 250    brw->emit_state_always = 0;
 251
 252    intel->batch.need_workaround_flush = true;
 253
 254    ctx->VertexProgram._MaintainTnlProgram = true;
 255    ctx->FragmentProgram._MaintainTexEnvProgram = true;
 256
 257    brw_draw_init( brw );
 258
 259    brw->new_vs_backend = (getenv("INTEL_OLD_VS") == NULL);
 260
 261    /* If we're using the new shader backend, we require integer uniforms
 262     * stored as actual integers.
 263     */
 264    if (brw->new_vs_backend) {
 265       ctx->Const.NativeIntegers = true;
 266       ctx->Const.UniformBooleanTrue = 1;
 267    }
 268
 269    return true;
 270 }
 271