i965: Get rid of intel_renderbuffer_resolve_*
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46
47 #include "vbo/vbo_context.h"
48
49 #include "drivers/common/driverfuncs.h"
50 #include "drivers/common/meta.h"
51 #include "utils.h"
52
53 #include "brw_context.h"
54 #include "brw_defines.h"
55 #include "brw_blorp.h"
56 #include "brw_draw.h"
57 #include "brw_state.h"
58
59 #include "intel_batchbuffer.h"
60 #include "intel_buffer_objects.h"
61 #include "intel_buffers.h"
62 #include "intel_fbo.h"
63 #include "intel_mipmap_tree.h"
64 #include "intel_pixel.h"
65 #include "intel_image.h"
66 #include "intel_tex.h"
67 #include "intel_tex_obj.h"
68
69 #include "swrast_setup/swrast_setup.h"
70 #include "tnl/tnl.h"
71 #include "tnl/t_pipeline.h"
72 #include "util/ralloc.h"
73 #include "util/debug.h"
74 #include "isl/isl.h"
75
76 /***************************************
77 * Mesa's Driver Functions
78 ***************************************/
79
80 const char *const brw_vendor_string = "Intel Open Source Technology Center";
81
82 static const char *
83 get_bsw_model(const struct intel_screen *screen)
84 {
85 switch (screen->eu_total) {
86 case 16:
87 return "405";
88 case 12:
89 return "400";
90 default:
91 return " ";
92 }
93 }
94
95 const char *
96 brw_get_renderer_string(const struct intel_screen *screen)
97 {
98 const char *chipset;
99 static char buffer[128];
100 char *bsw = NULL;
101
102 switch (screen->deviceID) {
103 #undef CHIPSET
104 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
105 #include "pci_ids/i965_pci_ids.h"
106 default:
107 chipset = "Unknown Intel Chipset";
108 break;
109 }
110
111 /* Braswell branding is funny, so we have to fix it up here */
112 if (screen->deviceID == 0x22B1) {
113 bsw = strdup(chipset);
114 char *needle = strstr(bsw, "XXX");
115 if (needle) {
116 memcpy(needle, get_bsw_model(screen), 3);
117 chipset = bsw;
118 }
119 }
120
121 (void) driGetRendererString(buffer, chipset, 0);
122 free(bsw);
123 return buffer;
124 }
125
126 static const GLubyte *
127 intel_get_string(struct gl_context * ctx, GLenum name)
128 {
129 const struct brw_context *const brw = brw_context(ctx);
130
131 switch (name) {
132 case GL_VENDOR:
133 return (GLubyte *) brw_vendor_string;
134
135 case GL_RENDERER:
136 return
137 (GLubyte *) brw_get_renderer_string(brw->screen);
138
139 default:
140 return NULL;
141 }
142 }
143
144 static void
145 intel_viewport(struct gl_context *ctx)
146 {
147 struct brw_context *brw = brw_context(ctx);
148 __DRIcontext *driContext = brw->driContext;
149
150 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
151 if (driContext->driDrawablePriv)
152 dri2InvalidateDrawable(driContext->driDrawablePriv);
153 if (driContext->driReadablePriv)
154 dri2InvalidateDrawable(driContext->driReadablePriv);
155 }
156 }
157
158 static void
159 intel_update_framebuffer(struct gl_context *ctx,
160 struct gl_framebuffer *fb)
161 {
162 struct brw_context *brw = brw_context(ctx);
163
164 /* Quantize the derived default number of samples
165 */
166 fb->DefaultGeometry._NumSamples =
167 intel_quantize_num_samples(brw->screen,
168 fb->DefaultGeometry.NumSamples);
169 }
170
171 static bool
172 intel_disable_rb_aux_buffer(struct brw_context *brw, const struct brw_bo *bo)
173 {
174 const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
175 bool found = false;
176
177 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
178 const struct intel_renderbuffer *irb =
179 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
180
181 if (irb && irb->mt->bo == bo) {
182 found = brw->draw_aux_buffer_disabled[i] = true;
183 }
184 }
185
186 return found;
187 }
188
189 /* On Gen9 color buffers may be compressed by the hardware (lossless
190 * compression). There are, however, format restrictions and care needs to be
191 * taken that the sampler engine is capable for re-interpreting a buffer with
192 * format different the buffer was originally written with.
193 *
194 * For example, SRGB formats are not compressible and the sampler engine isn't
195 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
196 * color buffer needs to be resolved so that the sampling surface can be
197 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
198 * set).
199 */
200 static bool
201 intel_texture_view_requires_resolve(struct brw_context *brw,
202 struct intel_texture_object *intel_tex)
203 {
204 if (brw->gen < 9 ||
205 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
206 return false;
207
208 const enum isl_format isl_format =
209 brw_isl_format_for_mesa_format(intel_tex->_Format);
210
211 if (isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format))
212 return false;
213
214 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
215 _mesa_get_format_name(intel_tex->_Format),
216 _mesa_get_format_name(intel_tex->mt->format));
217
218 if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
219 perf_debug("Sampling renderbuffer with non-compressible format - "
220 "turning off compression");
221
222 return true;
223 }
224
225 static void
226 intel_update_state(struct gl_context * ctx, GLuint new_state)
227 {
228 struct brw_context *brw = brw_context(ctx);
229 struct intel_texture_object *tex_obj;
230 struct intel_renderbuffer *depth_irb;
231
232 if (ctx->swrast_context)
233 _swrast_InvalidateState(ctx, new_state);
234 _vbo_InvalidateState(ctx, new_state);
235
236 brw->NewGLState |= new_state;
237
238 _mesa_unlock_context_textures(ctx);
239
240 /* Resolve the depth buffer's HiZ buffer. */
241 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
242 if (depth_irb && depth_irb->mt) {
243 intel_miptree_slice_resolve_hiz(brw, depth_irb->mt,
244 depth_irb->mt_level,
245 depth_irb->mt_layer);
246 }
247
248 memset(brw->draw_aux_buffer_disabled, 0,
249 sizeof(brw->draw_aux_buffer_disabled));
250
251 /* Resolve depth buffer and render cache of each enabled texture. */
252 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
253 for (int i = 0; i <= maxEnabledUnit; i++) {
254 if (!ctx->Texture.Unit[i]._Current)
255 continue;
256 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
257 if (!tex_obj || !tex_obj->mt)
258 continue;
259
260 /* We need inte_texture_object::_Format to be valid */
261 intel_finalize_mipmap_tree(brw, i);
262
263 if (intel_miptree_sample_with_hiz(brw, tex_obj->mt))
264 intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt);
265 else
266 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
267 /* Sampling engine understands lossless compression and resolving
268 * those surfaces should be skipped for performance reasons.
269 */
270 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
271 0 : INTEL_MIPTREE_IGNORE_CCS_E;
272 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags);
273 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
274
275 if (tex_obj->base.StencilSampling ||
276 tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
277 intel_update_r8stencil(brw, tex_obj->mt);
278 }
279 }
280
281 /* Resolve color for each active shader image. */
282 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
283 const struct gl_program *prog = ctx->_Shader->CurrentProgram[i];
284
285 if (unlikely(prog && prog->info.num_images)) {
286 for (unsigned j = 0; j < prog->info.num_images; j++) {
287 struct gl_image_unit *u =
288 &ctx->ImageUnits[prog->sh.ImageUnits[j]];
289 tex_obj = intel_texture_object(u->TexObj);
290
291 if (tex_obj && tex_obj->mt) {
292 /* Access to images is implemented using indirect messages
293 * against data port. Normal render target write understands
294 * lossless compression but unfortunately the typed/untyped
295 * read/write interface doesn't. Therefore even lossless
296 * compressed surfaces need to be resolved prior to accessing
297 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
298 */
299 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0);
300
301 if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
302 intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
303 perf_debug("Using renderbuffer as shader image - turning "
304 "off lossless compression");
305 }
306
307 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
308 }
309 }
310 }
311 }
312
313 /* Resolve color buffers for non-coherent framebuffer fetch. */
314 if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
315 ctx->FragmentProgram._Current &&
316 ctx->FragmentProgram._Current->info.outputs_read) {
317 const struct gl_framebuffer *fb = ctx->DrawBuffer;
318
319 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
320 const struct intel_renderbuffer *irb =
321 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
322
323 if (irb &&
324 intel_miptree_resolve_color(brw, irb->mt,
325 irb->mt_level, 1,
326 irb->mt_layer, irb->layer_count,
327 INTEL_MIPTREE_IGNORE_CCS_E))
328 brw_render_cache_set_check_flush(brw, irb->mt->bo);
329 }
330 }
331
332 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
333 * single-sampled color renderbuffers because the CCS buffer isn't
334 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
335 * enabled because otherwise the surface state will be programmed with the
336 * linear equivalent format anyway.
337 */
338 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
339 struct gl_framebuffer *fb = ctx->DrawBuffer;
340 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
341 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
342
343 if (rb == NULL)
344 continue;
345
346 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
347 struct intel_mipmap_tree *mt = irb->mt;
348
349 if (mt == NULL ||
350 mt->num_samples > 1 ||
351 _mesa_get_srgb_format_linear(mt->format) == mt->format)
352 continue;
353
354 /* Lossless compression is not supported for SRGB formats, it
355 * should be impossible to get here with such surfaces.
356 */
357 assert(!intel_miptree_is_lossless_compressed(brw, mt));
358 intel_miptree_all_slices_resolve_color(brw, mt, 0);
359 brw_render_cache_set_check_flush(brw, mt->bo);
360 }
361 }
362
363 _mesa_lock_context_textures(ctx);
364
365 if (new_state & _NEW_BUFFERS) {
366 intel_update_framebuffer(ctx, ctx->DrawBuffer);
367 if (ctx->DrawBuffer != ctx->ReadBuffer)
368 intel_update_framebuffer(ctx, ctx->ReadBuffer);
369 }
370 }
371
372 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
373
374 static void
375 intel_flush_front(struct gl_context *ctx)
376 {
377 struct brw_context *brw = brw_context(ctx);
378 __DRIcontext *driContext = brw->driContext;
379 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
380 __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
381
382 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
383 if (flushFront(dri_screen) && driDrawable &&
384 driDrawable->loaderPrivate) {
385
386 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
387 *
388 * This potentially resolves both front and back buffer. It
389 * is unnecessary to resolve the back, but harms nothing except
390 * performance. And no one cares about front-buffer render
391 * performance.
392 */
393 intel_resolve_for_dri2_flush(brw, driDrawable);
394 intel_batchbuffer_flush(brw);
395
396 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
397
398 /* We set the dirty bit in intel_prepare_render() if we're
399 * front buffer rendering once we get there.
400 */
401 brw->front_buffer_dirty = false;
402 }
403 }
404 }
405
406 static void
407 intel_glFlush(struct gl_context *ctx)
408 {
409 struct brw_context *brw = brw_context(ctx);
410
411 intel_batchbuffer_flush(brw);
412 intel_flush_front(ctx);
413
414 brw->need_flush_throttle = true;
415 }
416
417 static void
418 intel_finish(struct gl_context * ctx)
419 {
420 struct brw_context *brw = brw_context(ctx);
421
422 intel_glFlush(ctx);
423
424 if (brw->batch.last_bo)
425 brw_bo_wait_rendering(brw, brw->batch.last_bo);
426 }
427
428 static void
429 brw_init_driver_functions(struct brw_context *brw,
430 struct dd_function_table *functions)
431 {
432 _mesa_init_driver_functions(functions);
433
434 /* GLX uses DRI2 invalidate events to handle window resizing.
435 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
436 * which doesn't provide a mechanism for snooping the event queues.
437 *
438 * So EGL still relies on viewport hacks to handle window resizing.
439 * This should go away with DRI3000.
440 */
441 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
442 functions->Viewport = intel_viewport;
443
444 functions->Flush = intel_glFlush;
445 functions->Finish = intel_finish;
446 functions->GetString = intel_get_string;
447 functions->UpdateState = intel_update_state;
448
449 intelInitTextureFuncs(functions);
450 intelInitTextureImageFuncs(functions);
451 intelInitTextureSubImageFuncs(functions);
452 intelInitTextureCopyImageFuncs(functions);
453 intelInitCopyImageFuncs(functions);
454 intelInitClearFuncs(functions);
455 intelInitBufferFuncs(functions);
456 intelInitPixelFuncs(functions);
457 intelInitBufferObjectFuncs(functions);
458 brw_init_syncobj_functions(functions);
459 brw_init_object_purgeable_functions(functions);
460
461 brwInitFragProgFuncs( functions );
462 brw_init_common_queryobj_functions(functions);
463 if (brw->gen >= 8 || brw->is_haswell)
464 hsw_init_queryobj_functions(functions);
465 else if (brw->gen >= 6)
466 gen6_init_queryobj_functions(functions);
467 else
468 gen4_init_queryobj_functions(functions);
469 brw_init_compute_functions(functions);
470 if (brw->gen >= 7)
471 brw_init_conditional_render_functions(functions);
472
473 functions->QueryInternalFormat = brw_query_internal_format;
474
475 functions->NewTransformFeedback = brw_new_transform_feedback;
476 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
477 if (can_do_mi_math_and_lrr(brw->screen)) {
478 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
479 functions->EndTransformFeedback = hsw_end_transform_feedback;
480 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
481 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
482 } else if (brw->gen >= 7) {
483 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
484 functions->EndTransformFeedback = gen7_end_transform_feedback;
485 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
486 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
487 functions->GetTransformFeedbackVertexCount =
488 brw_get_transform_feedback_vertex_count;
489 } else {
490 functions->BeginTransformFeedback = brw_begin_transform_feedback;
491 functions->EndTransformFeedback = brw_end_transform_feedback;
492 functions->PauseTransformFeedback = brw_pause_transform_feedback;
493 functions->ResumeTransformFeedback = brw_resume_transform_feedback;
494 functions->GetTransformFeedbackVertexCount =
495 brw_get_transform_feedback_vertex_count;
496 }
497
498 if (brw->gen >= 6)
499 functions->GetSamplePosition = gen6_get_sample_position;
500 }
501
502 static void
503 brw_initialize_context_constants(struct brw_context *brw)
504 {
505 struct gl_context *ctx = &brw->ctx;
506 const struct brw_compiler *compiler = brw->screen->compiler;
507
508 const bool stage_exists[MESA_SHADER_STAGES] = {
509 [MESA_SHADER_VERTEX] = true,
510 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
511 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
512 [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
513 [MESA_SHADER_FRAGMENT] = true,
514 [MESA_SHADER_COMPUTE] =
515 ((ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE) &&
516 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
517 (ctx->API == API_OPENGLES2 &&
518 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
519 _mesa_extension_override_enables.ARB_compute_shader,
520 };
521
522 unsigned num_stages = 0;
523 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
524 if (stage_exists[i])
525 num_stages++;
526 }
527
528 unsigned max_samplers =
529 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
530
531 ctx->Const.MaxDualSourceDrawBuffers = 1;
532 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
533 ctx->Const.MaxCombinedShaderOutputResources =
534 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
535
536 /* The timestamp register we can read for glGetTimestamp() is
537 * sometimes only 32 bits, before scaling to nanoseconds (depending
538 * on kernel).
539 *
540 * Once scaled to nanoseconds the timestamp would roll over at a
541 * non-power-of-two, so an application couldn't use
542 * GL_QUERY_COUNTER_BITS to handle rollover correctly. Instead, we
543 * report 36 bits and truncate at that (rolling over 5 times as
544 * often as the HW counter), and when the 32-bit counter rolls
545 * over, it happens to also be at a rollover in the reported value
546 * from near (1<<36) to 0.
547 *
548 * The low 32 bits rolls over in ~343 seconds. Our 36-bit result
549 * rolls over every ~69 seconds.
550 */
551 ctx->Const.QueryCounterBits.Timestamp = 36;
552
553 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
554 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
555 if (brw->gen >= 7) {
556 ctx->Const.MaxRenderbufferSize = 16384;
557 ctx->Const.MaxTextureLevels = MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS);
558 ctx->Const.MaxCubeTextureLevels = 15; /* 16384 */
559 } else {
560 ctx->Const.MaxRenderbufferSize = 8192;
561 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
562 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
563 }
564 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
565 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
566 ctx->Const.MaxTextureMbytes = 1536;
567 ctx->Const.MaxTextureRectSize = 1 << 12;
568 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
569 ctx->Const.MaxTextureLodBias = 15.0;
570 ctx->Const.StripTextureBorder = true;
571 if (brw->gen >= 7) {
572 ctx->Const.MaxProgramTextureGatherComponents = 4;
573 ctx->Const.MinProgramTextureGatherOffset = -32;
574 ctx->Const.MaxProgramTextureGatherOffset = 31;
575 } else if (brw->gen == 6) {
576 ctx->Const.MaxProgramTextureGatherComponents = 1;
577 ctx->Const.MinProgramTextureGatherOffset = -8;
578 ctx->Const.MaxProgramTextureGatherOffset = 7;
579 }
580
581 ctx->Const.MaxUniformBlockSize = 65536;
582
583 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
584 struct gl_program_constants *prog = &ctx->Const.Program[i];
585
586 if (!stage_exists[i])
587 continue;
588
589 prog->MaxTextureImageUnits = max_samplers;
590
591 prog->MaxUniformBlocks = BRW_MAX_UBO;
592 prog->MaxCombinedUniformComponents =
593 prog->MaxUniformComponents +
594 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
595
596 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
597 prog->MaxAtomicBuffers = BRW_MAX_ABO;
598 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
599 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
600 }
601
602 ctx->Const.MaxTextureUnits =
603 MIN2(ctx->Const.MaxTextureCoordUnits,
604 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
605
606 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
607 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
608 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
609 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
610 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
611 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
612 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
613
614
615 /* Hardware only supports a limited number of transform feedback buffers.
616 * So we need to override the Mesa default (which is based only on software
617 * limits).
618 */
619 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
620
621 /* On Gen6, in the worst case, we use up one binding table entry per
622 * transform feedback component (see comments above the definition of
623 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
624 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
625 * BRW_MAX_SOL_BINDINGS.
626 *
627 * In "separate components" mode, we need to divide this value by
628 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
629 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
630 */
631 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
632 ctx->Const.MaxTransformFeedbackSeparateComponents =
633 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
634
635 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
636 !can_do_mi_math_and_lrr(brw->screen);
637
638 int max_samples;
639 const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
640 const int clamp_max_samples =
641 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
642
643 if (clamp_max_samples < 0) {
644 max_samples = msaa_modes[0];
645 } else {
646 /* Select the largest supported MSAA mode that does not exceed
647 * clamp_max_samples.
648 */
649 max_samples = 0;
650 for (int i = 0; msaa_modes[i] != 0; ++i) {
651 if (msaa_modes[i] <= clamp_max_samples) {
652 max_samples = msaa_modes[i];
653 break;
654 }
655 }
656 }
657
658 ctx->Const.MaxSamples = max_samples;
659 ctx->Const.MaxColorTextureSamples = max_samples;
660 ctx->Const.MaxDepthTextureSamples = max_samples;
661 ctx->Const.MaxIntegerSamples = max_samples;
662 ctx->Const.MaxImageSamples = 0;
663
664 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
665 * to map indices of rectangular grid to sample numbers within a pixel.
666 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
667 * extension implementation. For more details see the comment above
668 * gen6_set_sample_maps() definition.
669 */
670 gen6_set_sample_maps(ctx);
671
672 ctx->Const.MinLineWidth = 1.0;
673 ctx->Const.MinLineWidthAA = 1.0;
674 if (brw->gen >= 6) {
675 ctx->Const.MaxLineWidth = 7.375;
676 ctx->Const.MaxLineWidthAA = 7.375;
677 ctx->Const.LineWidthGranularity = 0.125;
678 } else {
679 ctx->Const.MaxLineWidth = 7.0;
680 ctx->Const.MaxLineWidthAA = 7.0;
681 ctx->Const.LineWidthGranularity = 0.5;
682 }
683
684 /* For non-antialiased lines, we have to round the line width to the
685 * nearest whole number. Make sure that we don't advertise a line
686 * width that, when rounded, will be beyond the actual hardware
687 * maximum.
688 */
689 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
690
691 ctx->Const.MinPointSize = 1.0;
692 ctx->Const.MinPointSizeAA = 1.0;
693 ctx->Const.MaxPointSize = 255.0;
694 ctx->Const.MaxPointSizeAA = 255.0;
695 ctx->Const.PointSizeGranularity = 1.0;
696
697 if (brw->gen >= 5 || brw->is_g4x)
698 ctx->Const.MaxClipPlanes = 8;
699
700 ctx->Const.GLSLTessLevelsAsInputs = true;
701 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8;
702 ctx->Const.LowerTESPatchVerticesIn = true;
703 ctx->Const.PrimitiveRestartForPatches = true;
704
705 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
706 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
707 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
708 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
709 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
710 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
711 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
712 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
713 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
714 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
715 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
716 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
717 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
718 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
719
720 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
721 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
722 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
723 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
724 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
725 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
726 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
727 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
728 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
729 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
730 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
731
732 /* Fragment shaders use real, 32-bit twos-complement integers for all
733 * integer types.
734 */
735 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
736 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
737 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
738 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
739 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
740
741 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
742 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
743 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
744 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
745 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
746
747 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
748 * but we're not sure how it's actually done for vertex order,
749 * that affect provoking vertex decision. Always use last vertex
750 * convention for quad primitive which works as expected for now.
751 */
752 if (brw->gen >= 6)
753 ctx->Const.QuadsFollowProvokingVertexConvention = false;
754
755 ctx->Const.NativeIntegers = true;
756 ctx->Const.VertexID_is_zero_based = true;
757
758 /* Regarding the CMP instruction, the Ivybridge PRM says:
759 *
760 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
761 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
762 * 0xFFFFFFFF) is assigned to dst."
763 *
764 * but PRMs for earlier generations say
765 *
766 * "In dword format, one GRF may store up to 8 results. When the register
767 * is used later as a vector of Booleans, as only LSB at each channel
768 * contains meaning [sic] data, software should make sure all higher bits
769 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
770 *
771 * We select the representation of a true boolean uniform to be ~0, and fix
772 * the results of Gen <= 5 CMP instruction's with -(result & 1).
773 */
774 ctx->Const.UniformBooleanTrue = ~0;
775
776 /* From the gen4 PRM, volume 4 page 127:
777 *
778 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
779 * the base address of the first element of the surface, computed in
780 * software by adding the surface base address to the byte offset of
781 * the element in the buffer."
782 *
783 * However, unaligned accesses are slower, so enforce buffer alignment.
784 */
785 ctx->Const.UniformBufferOffsetAlignment = 16;
786
787 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
788 * that we can safely have the CPU and GPU writing the same SSBO on
789 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
790 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
791 * be updating disjoint regions of the buffer simultaneously and that will
792 * break if the regions overlap the same cacheline.
793 */
794 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
795 ctx->Const.TextureBufferOffsetAlignment = 16;
796 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
797
798 if (brw->gen >= 6) {
799 ctx->Const.MaxVarying = 32;
800 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
801 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
802 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
803 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
804 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
805 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
806 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
807 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
808 }
809
810 /* We want the GLSL compiler to emit code that uses condition codes */
811 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
812 ctx->Const.ShaderCompilerOptions[i] =
813 brw->screen->compiler->glsl_compiler_options[i];
814 }
815
816 if (brw->gen >= 7) {
817 ctx->Const.MaxViewportWidth = 32768;
818 ctx->Const.MaxViewportHeight = 32768;
819 }
820
821 /* ARB_viewport_array, OES_viewport_array */
822 if (brw->gen >= 6) {
823 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
824 ctx->Const.ViewportSubpixelBits = 0;
825
826 /* Cast to float before negating because MaxViewportWidth is unsigned.
827 */
828 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
829 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
830 }
831
832 /* ARB_gpu_shader5 */
833 if (brw->gen >= 7)
834 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
835
836 /* ARB_framebuffer_no_attachments */
837 ctx->Const.MaxFramebufferWidth = 16384;
838 ctx->Const.MaxFramebufferHeight = 16384;
839 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
840 ctx->Const.MaxFramebufferSamples = max_samples;
841
842 /* OES_primitive_bounding_box */
843 ctx->Const.NoPrimitiveBoundingBoxOutput = true;
844 }
845
846 static void
847 brw_initialize_cs_context_constants(struct brw_context *brw)
848 {
849 struct gl_context *ctx = &brw->ctx;
850 const struct intel_screen *screen = brw->screen;
851 struct gen_device_info *devinfo = &brw->screen->devinfo;
852
853 /* FINISHME: Do this for all platforms that the kernel supports */
854 if (brw->is_cherryview &&
855 screen->subslice_total > 0 && screen->eu_total > 0) {
856 /* Logical CS threads = EUs per subslice * 7 threads per EU */
857 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
858
859 /* Fuse configurations may give more threads than expected, never less. */
860 if (max_cs_threads > devinfo->max_cs_threads)
861 devinfo->max_cs_threads = max_cs_threads;
862 }
863
864 /* Maximum number of scalar compute shader invocations that can be run in
865 * parallel in the same subslice assuming SIMD32 dispatch.
866 *
867 * We don't advertise more than 64 threads, because we are limited to 64 by
868 * our usage of thread_width_max in the gpgpu walker command. This only
869 * currently impacts Haswell, which otherwise might be able to advertise 70
870 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
871 * required the number of invocation needed for ARB_compute_shader.
872 */
873 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
874 const uint32_t max_invocations = 32 * max_threads;
875 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
876 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
877 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
878 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
879 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
880 }
881
882 /**
883 * Process driconf (drirc) options, setting appropriate context flags.
884 *
885 * intelInitExtensions still pokes at optionCache directly, in order to
886 * avoid advertising various extensions. No flags are set, so it makes
887 * sense to continue doing that there.
888 */
889 static void
890 brw_process_driconf_options(struct brw_context *brw)
891 {
892 struct gl_context *ctx = &brw->ctx;
893
894 driOptionCache *options = &brw->optionCache;
895 driParseConfigFiles(options, &brw->screen->optionCache,
896 brw->driContext->driScreenPriv->myNum, "i965");
897
898 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
899 switch (bo_reuse_mode) {
900 case DRI_CONF_BO_REUSE_DISABLED:
901 break;
902 case DRI_CONF_BO_REUSE_ALL:
903 brw_bufmgr_enable_reuse(brw->bufmgr);
904 break;
905 }
906
907 if (INTEL_DEBUG & DEBUG_NO_HIZ) {
908 brw->has_hiz = false;
909 /* On gen6, you can only do separate stencil with HIZ. */
910 if (brw->gen == 6)
911 brw->has_separate_stencil = false;
912 }
913
914 if (driQueryOptionb(options, "always_flush_batch")) {
915 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
916 brw->always_flush_batch = true;
917 }
918
919 if (driQueryOptionb(options, "always_flush_cache")) {
920 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
921 brw->always_flush_cache = true;
922 }
923
924 if (driQueryOptionb(options, "disable_throttling")) {
925 fprintf(stderr, "disabling flush throttling\n");
926 brw->disable_throttling = true;
927 }
928
929 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
930
931 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
932 brw->screen->compiler->precise_trig = true;
933
934 ctx->Const.ForceGLSLExtensionsWarn =
935 driQueryOptionb(options, "force_glsl_extensions_warn");
936
937 ctx->Const.ForceGLSLVersion =
938 driQueryOptioni(options, "force_glsl_version");
939
940 ctx->Const.DisableGLSLLineContinuations =
941 driQueryOptionb(options, "disable_glsl_line_continuations");
942
943 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
944 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
945
946 ctx->Const.AllowGLSLBuiltinVariableRedeclaration =
947 driQueryOptionb(options, "allow_glsl_builtin_variable_redeclaration");
948
949 ctx->Const.AllowHigherCompatVersion =
950 driQueryOptionb(options, "allow_higher_compat_version");
951
952 ctx->Const.ForceGLSLAbsSqrt =
953 driQueryOptionb(options, "force_glsl_abs_sqrt");
954
955 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
956
957 brw->dual_color_blend_by_location =
958 driQueryOptionb(options, "dual_color_blend_by_location");
959 }
960
961 GLboolean
962 brwCreateContext(gl_api api,
963 const struct gl_config *mesaVis,
964 __DRIcontext *driContextPriv,
965 unsigned major_version,
966 unsigned minor_version,
967 uint32_t flags,
968 bool notify_reset,
969 unsigned *dri_ctx_error,
970 void *sharedContextPrivate)
971 {
972 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
973 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
974 const struct gen_device_info *devinfo = &screen->devinfo;
975 struct dd_function_table functions;
976
977 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
978 * provides us with context reset notifications.
979 */
980 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
981 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
982
983 if (screen->has_context_reset_notification)
984 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
985
986 if (flags & ~allowed_flags) {
987 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
988 return false;
989 }
990
991 struct brw_context *brw = rzalloc(NULL, struct brw_context);
992 if (!brw) {
993 fprintf(stderr, "%s: failed to alloc context\n", __func__);
994 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
995 return false;
996 }
997
998 driContextPriv->driverPrivate = brw;
999 brw->driContext = driContextPriv;
1000 brw->screen = screen;
1001 brw->bufmgr = screen->bufmgr;
1002
1003 brw->gen = devinfo->gen;
1004 brw->gt = devinfo->gt;
1005 brw->is_g4x = devinfo->is_g4x;
1006 brw->is_baytrail = devinfo->is_baytrail;
1007 brw->is_haswell = devinfo->is_haswell;
1008 brw->is_cherryview = devinfo->is_cherryview;
1009 brw->is_broxton = devinfo->is_broxton;
1010 brw->has_llc = devinfo->has_llc;
1011 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
1012 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
1013 brw->has_pln = devinfo->has_pln;
1014 brw->has_compr4 = devinfo->has_compr4;
1015 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
1016 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
1017 brw->needs_unlit_centroid_workaround =
1018 devinfo->needs_unlit_centroid_workaround;
1019
1020 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
1021 brw->has_swizzling = screen->hw_has_swizzling;
1022
1023 isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling);
1024
1025 brw->vs.base.stage = MESA_SHADER_VERTEX;
1026 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
1027 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
1028 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
1029 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
1030 if (brw->gen >= 8) {
1031 gen8_init_vtable_surface_functions(brw);
1032 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
1033 } else if (brw->gen >= 7) {
1034 gen7_init_vtable_surface_functions(brw);
1035 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
1036 } else if (brw->gen >= 6) {
1037 gen6_init_vtable_surface_functions(brw);
1038 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
1039 } else {
1040 gen4_init_vtable_surface_functions(brw);
1041 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
1042 }
1043
1044 brw_init_driver_functions(brw, &functions);
1045
1046 if (notify_reset)
1047 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
1048
1049 struct gl_context *ctx = &brw->ctx;
1050
1051 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
1052 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1053 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
1054 intelDestroyContext(driContextPriv);
1055 return false;
1056 }
1057
1058 driContextSetFlags(ctx, flags);
1059
1060 /* Initialize the software rasterizer and helper modules.
1061 *
1062 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1063 * software fallbacks (which we have to support on legacy GL to do weird
1064 * glDrawPixels(), glBitmap(), and other functions).
1065 */
1066 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
1067 _swrast_CreateContext(ctx);
1068 }
1069
1070 _vbo_CreateContext(ctx);
1071 if (ctx->swrast_context) {
1072 _tnl_CreateContext(ctx);
1073 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
1074 _swsetup_CreateContext(ctx);
1075
1076 /* Configure swrast to match hardware characteristics: */
1077 _swrast_allow_pixel_fog(ctx, false);
1078 _swrast_allow_vertex_fog(ctx, true);
1079 }
1080
1081 _mesa_meta_init(ctx);
1082
1083 brw_process_driconf_options(brw);
1084
1085 if (INTEL_DEBUG & DEBUG_PERF)
1086 brw->perf_debug = true;
1087
1088 brw_initialize_cs_context_constants(brw);
1089 brw_initialize_context_constants(brw);
1090
1091 ctx->Const.ResetStrategy = notify_reset
1092 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
1093
1094 /* Reinitialize the context point state. It depends on ctx->Const values. */
1095 _mesa_init_point(ctx);
1096
1097 intel_fbo_init(brw);
1098
1099 intel_batchbuffer_init(&brw->batch, brw->bufmgr, brw->has_llc);
1100
1101 if (brw->gen >= 6) {
1102 /* Create a new hardware context. Using a hardware context means that
1103 * our GPU state will be saved/restored on context switch, allowing us
1104 * to assume that the GPU is in the same state we left it in.
1105 *
1106 * This is required for transform feedback buffer offsets, query objects,
1107 * and also allows us to reduce how much state we have to emit.
1108 */
1109 brw->hw_ctx = brw_create_hw_context(brw->bufmgr);
1110
1111 if (!brw->hw_ctx) {
1112 fprintf(stderr, "Failed to create hardware context.\n");
1113 intelDestroyContext(driContextPriv);
1114 return false;
1115 }
1116 }
1117
1118 if (brw_init_pipe_control(brw, devinfo)) {
1119 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1120 intelDestroyContext(driContextPriv);
1121 return false;
1122 }
1123
1124 brw_init_state(brw);
1125
1126 intelInitExtensions(ctx);
1127
1128 brw_init_surface_formats(brw);
1129
1130 brw_blorp_init(brw);
1131
1132 brw->urb.size = devinfo->urb.size;
1133
1134 if (brw->gen == 6)
1135 brw->urb.gs_present = false;
1136
1137 brw->prim_restart.in_progress = false;
1138 brw->prim_restart.enable_cut_index = false;
1139 brw->gs.enabled = false;
1140 brw->clip.viewport_count = 1;
1141
1142 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1143
1144 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
1145
1146 ctx->VertexProgram._MaintainTnlProgram = true;
1147 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1148
1149 brw_draw_init( brw );
1150
1151 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1152 /* Turn on some extra GL_ARB_debug_output generation. */
1153 brw->perf_debug = true;
1154 }
1155
1156 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) {
1157 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1158 ctx->Const.RobustAccess = GL_TRUE;
1159 }
1160
1161 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1162 brw_init_shader_time(brw);
1163
1164 _mesa_compute_version(ctx);
1165
1166 _mesa_initialize_dispatch_tables(ctx);
1167 _mesa_initialize_vbo_vtxfmt(ctx);
1168
1169 if (ctx->Extensions.INTEL_performance_query)
1170 brw_init_performance_queries(brw);
1171
1172 vbo_use_buffer_objects(ctx);
1173 vbo_always_unmap_buffers(ctx);
1174
1175 return true;
1176 }
1177
1178 void
1179 intelDestroyContext(__DRIcontext * driContextPriv)
1180 {
1181 struct brw_context *brw =
1182 (struct brw_context *) driContextPriv->driverPrivate;
1183 struct gl_context *ctx = &brw->ctx;
1184
1185 _mesa_meta_free(&brw->ctx);
1186
1187 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1188 /* Force a report. */
1189 brw->shader_time.report_time = 0;
1190
1191 brw_collect_and_report_shader_time(brw);
1192 brw_destroy_shader_time(brw);
1193 }
1194
1195 if (brw->gen >= 6)
1196 blorp_finish(&brw->blorp);
1197
1198 brw_destroy_state(brw);
1199 brw_draw_destroy(brw);
1200
1201 brw_bo_unreference(brw->curbe.curbe_bo);
1202 if (brw->vs.base.scratch_bo)
1203 brw_bo_unreference(brw->vs.base.scratch_bo);
1204 if (brw->tcs.base.scratch_bo)
1205 brw_bo_unreference(brw->tcs.base.scratch_bo);
1206 if (brw->tes.base.scratch_bo)
1207 brw_bo_unreference(brw->tes.base.scratch_bo);
1208 if (brw->gs.base.scratch_bo)
1209 brw_bo_unreference(brw->gs.base.scratch_bo);
1210 if (brw->wm.base.scratch_bo)
1211 brw_bo_unreference(brw->wm.base.scratch_bo);
1212
1213 brw_destroy_hw_context(brw->bufmgr, brw->hw_ctx);
1214
1215 if (ctx->swrast_context) {
1216 _swsetup_DestroyContext(&brw->ctx);
1217 _tnl_DestroyContext(&brw->ctx);
1218 }
1219 _vbo_DestroyContext(&brw->ctx);
1220
1221 if (ctx->swrast_context)
1222 _swrast_DestroyContext(&brw->ctx);
1223
1224 brw_fini_pipe_control(brw);
1225 intel_batchbuffer_free(&brw->batch);
1226
1227 brw_bo_unreference(brw->throttle_batch[1]);
1228 brw_bo_unreference(brw->throttle_batch[0]);
1229 brw->throttle_batch[1] = NULL;
1230 brw->throttle_batch[0] = NULL;
1231
1232 driDestroyOptionCache(&brw->optionCache);
1233
1234 /* free the Mesa context */
1235 _mesa_free_context_data(&brw->ctx);
1236
1237 ralloc_free(brw);
1238 driContextPriv->driverPrivate = NULL;
1239 }
1240
1241 GLboolean
1242 intelUnbindContext(__DRIcontext * driContextPriv)
1243 {
1244 /* Unset current context and dispath table */
1245 _mesa_make_current(NULL, NULL, NULL);
1246
1247 return true;
1248 }
1249
1250 /**
1251 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1252 * on window system framebuffers.
1253 *
1254 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1255 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1256 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1257 * for a visual where you're guaranteed to be capable, but it turns out that
1258 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1259 * incapable ones, because there's no difference between the two in resources
1260 * used. Applications thus get built that accidentally rely on the default
1261 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1262 * great...
1263 *
1264 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1265 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1266 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1267 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1268 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1269 * and get no sRGB encode (assuming that both kinds of visual are available).
1270 * Thus our choice to support sRGB by default on our visuals for desktop would
1271 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1272 *
1273 * Unfortunately, renderbuffer setup happens before a context is created. So
1274 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1275 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1276 * yet), we go turn that back off before anyone finds out.
1277 */
1278 static void
1279 intel_gles3_srgb_workaround(struct brw_context *brw,
1280 struct gl_framebuffer *fb)
1281 {
1282 struct gl_context *ctx = &brw->ctx;
1283
1284 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1285 return;
1286
1287 /* Some day when we support the sRGB capable bit on visuals available for
1288 * GLES, we'll need to respect that and not disable things here.
1289 */
1290 fb->Visual.sRGBCapable = false;
1291 for (int i = 0; i < BUFFER_COUNT; i++) {
1292 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1293 if (rb)
1294 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1295 }
1296 }
1297
1298 GLboolean
1299 intelMakeCurrent(__DRIcontext * driContextPriv,
1300 __DRIdrawable * driDrawPriv,
1301 __DRIdrawable * driReadPriv)
1302 {
1303 struct brw_context *brw;
1304 GET_CURRENT_CONTEXT(curCtx);
1305
1306 if (driContextPriv)
1307 brw = (struct brw_context *) driContextPriv->driverPrivate;
1308 else
1309 brw = NULL;
1310
1311 /* According to the glXMakeCurrent() man page: "Pending commands to
1312 * the previous context, if any, are flushed before it is released."
1313 * But only flush if we're actually changing contexts.
1314 */
1315 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1316 _mesa_flush(curCtx);
1317 }
1318
1319 if (driContextPriv) {
1320 struct gl_context *ctx = &brw->ctx;
1321 struct gl_framebuffer *fb, *readFb;
1322
1323 if (driDrawPriv == NULL) {
1324 fb = _mesa_get_incomplete_framebuffer();
1325 } else {
1326 fb = driDrawPriv->driverPrivate;
1327 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1328 }
1329
1330 if (driReadPriv == NULL) {
1331 readFb = _mesa_get_incomplete_framebuffer();
1332 } else {
1333 readFb = driReadPriv->driverPrivate;
1334 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1335 }
1336
1337 /* The sRGB workaround changes the renderbuffer's format. We must change
1338 * the format before the renderbuffer's miptree get's allocated, otherwise
1339 * the formats of the renderbuffer and its miptree will differ.
1340 */
1341 intel_gles3_srgb_workaround(brw, fb);
1342 intel_gles3_srgb_workaround(brw, readFb);
1343
1344 /* If the context viewport hasn't been initialized, force a call out to
1345 * the loader to get buffers so we have a drawable size for the initial
1346 * viewport. */
1347 if (!brw->ctx.ViewportInitialized)
1348 intel_prepare_render(brw);
1349
1350 _mesa_make_current(ctx, fb, readFb);
1351 } else {
1352 _mesa_make_current(NULL, NULL, NULL);
1353 }
1354
1355 return true;
1356 }
1357
1358 void
1359 intel_resolve_for_dri2_flush(struct brw_context *brw,
1360 __DRIdrawable *drawable)
1361 {
1362 if (brw->gen < 6) {
1363 /* MSAA and fast color clear are not supported, so don't waste time
1364 * checking whether a resolve is needed.
1365 */
1366 return;
1367 }
1368
1369 struct gl_framebuffer *fb = drawable->driverPrivate;
1370 struct intel_renderbuffer *rb;
1371
1372 /* Usually, only the back buffer will need to be downsampled. However,
1373 * the front buffer will also need it if the user has rendered into it.
1374 */
1375 static const gl_buffer_index buffers[2] = {
1376 BUFFER_BACK_LEFT,
1377 BUFFER_FRONT_LEFT,
1378 };
1379
1380 for (int i = 0; i < 2; ++i) {
1381 rb = intel_get_renderbuffer(fb, buffers[i]);
1382 if (rb == NULL || rb->mt == NULL)
1383 continue;
1384 if (rb->mt->num_samples <= 1) {
1385 assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
1386 rb->layer_count == 1);
1387 intel_miptree_resolve_color(brw, rb->mt, 0, 1, 0, 1, 0);
1388 } else {
1389 intel_renderbuffer_downsample(brw, rb);
1390 }
1391 }
1392 }
1393
1394 static unsigned
1395 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1396 {
1397 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1398 }
1399
1400 static void
1401 intel_query_dri2_buffers(struct brw_context *brw,
1402 __DRIdrawable *drawable,
1403 __DRIbuffer **buffers,
1404 int *count);
1405
1406 static void
1407 intel_process_dri2_buffer(struct brw_context *brw,
1408 __DRIdrawable *drawable,
1409 __DRIbuffer *buffer,
1410 struct intel_renderbuffer *rb,
1411 const char *buffer_name);
1412
1413 static void
1414 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1415
1416 static void
1417 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1418 {
1419 struct gl_framebuffer *fb = drawable->driverPrivate;
1420 struct intel_renderbuffer *rb;
1421 __DRIbuffer *buffers = NULL;
1422 int count;
1423 const char *region_name;
1424
1425 /* Set this up front, so that in case our buffers get invalidated
1426 * while we're getting new buffers, we don't clobber the stamp and
1427 * thus ignore the invalidate. */
1428 drawable->lastStamp = drawable->dri2.stamp;
1429
1430 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1431 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1432
1433 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1434
1435 if (buffers == NULL)
1436 return;
1437
1438 for (int i = 0; i < count; i++) {
1439 switch (buffers[i].attachment) {
1440 case __DRI_BUFFER_FRONT_LEFT:
1441 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1442 region_name = "dri2 front buffer";
1443 break;
1444
1445 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1446 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1447 region_name = "dri2 fake front buffer";
1448 break;
1449
1450 case __DRI_BUFFER_BACK_LEFT:
1451 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1452 region_name = "dri2 back buffer";
1453 break;
1454
1455 case __DRI_BUFFER_DEPTH:
1456 case __DRI_BUFFER_HIZ:
1457 case __DRI_BUFFER_DEPTH_STENCIL:
1458 case __DRI_BUFFER_STENCIL:
1459 case __DRI_BUFFER_ACCUM:
1460 default:
1461 fprintf(stderr,
1462 "unhandled buffer attach event, attachment type %d\n",
1463 buffers[i].attachment);
1464 return;
1465 }
1466
1467 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1468 }
1469
1470 }
1471
1472 void
1473 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1474 {
1475 struct brw_context *brw = context->driverPrivate;
1476 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1477
1478 /* Set this up front, so that in case our buffers get invalidated
1479 * while we're getting new buffers, we don't clobber the stamp and
1480 * thus ignore the invalidate. */
1481 drawable->lastStamp = drawable->dri2.stamp;
1482
1483 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1484 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1485
1486 if (dri_screen->image.loader)
1487 intel_update_image_buffers(brw, drawable);
1488 else
1489 intel_update_dri2_buffers(brw, drawable);
1490
1491 driUpdateFramebufferSize(&brw->ctx, drawable);
1492 }
1493
1494 /**
1495 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1496 * state is required.
1497 */
1498 void
1499 intel_prepare_render(struct brw_context *brw)
1500 {
1501 struct gl_context *ctx = &brw->ctx;
1502 __DRIcontext *driContext = brw->driContext;
1503 __DRIdrawable *drawable;
1504
1505 drawable = driContext->driDrawablePriv;
1506 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1507 if (drawable->lastStamp != drawable->dri2.stamp)
1508 intel_update_renderbuffers(driContext, drawable);
1509 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1510 }
1511
1512 drawable = driContext->driReadablePriv;
1513 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1514 if (drawable->lastStamp != drawable->dri2.stamp)
1515 intel_update_renderbuffers(driContext, drawable);
1516 driContext->dri2.read_stamp = drawable->dri2.stamp;
1517 }
1518
1519 /* If we're currently rendering to the front buffer, the rendering
1520 * that will happen next will probably dirty the front buffer. So
1521 * mark it as dirty here.
1522 */
1523 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1524 brw->front_buffer_dirty = true;
1525 }
1526
1527 /**
1528 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1529 *
1530 * To determine which DRI buffers to request, examine the renderbuffers
1531 * attached to the drawable's framebuffer. Then request the buffers with
1532 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1533 *
1534 * This is called from intel_update_renderbuffers().
1535 *
1536 * \param drawable Drawable whose buffers are queried.
1537 * \param buffers [out] List of buffers returned by DRI2 query.
1538 * \param buffer_count [out] Number of buffers returned.
1539 *
1540 * \see intel_update_renderbuffers()
1541 * \see DRI2GetBuffers()
1542 * \see DRI2GetBuffersWithFormat()
1543 */
1544 static void
1545 intel_query_dri2_buffers(struct brw_context *brw,
1546 __DRIdrawable *drawable,
1547 __DRIbuffer **buffers,
1548 int *buffer_count)
1549 {
1550 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1551 struct gl_framebuffer *fb = drawable->driverPrivate;
1552 int i = 0;
1553 unsigned attachments[8];
1554
1555 struct intel_renderbuffer *front_rb;
1556 struct intel_renderbuffer *back_rb;
1557
1558 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1559 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1560
1561 memset(attachments, 0, sizeof(attachments));
1562 if ((_mesa_is_front_buffer_drawing(fb) ||
1563 _mesa_is_front_buffer_reading(fb) ||
1564 !back_rb) && front_rb) {
1565 /* If a fake front buffer is in use, then querying for
1566 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1567 * the real front buffer to the fake front buffer. So before doing the
1568 * query, we need to make sure all the pending drawing has landed in the
1569 * real front buffer.
1570 */
1571 intel_batchbuffer_flush(brw);
1572 intel_flush_front(&brw->ctx);
1573
1574 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1575 attachments[i++] = intel_bits_per_pixel(front_rb);
1576 } else if (front_rb && brw->front_buffer_dirty) {
1577 /* We have pending front buffer rendering, but we aren't querying for a
1578 * front buffer. If the front buffer we have is a fake front buffer,
1579 * the X server is going to throw it away when it processes the query.
1580 * So before doing the query, make sure all the pending drawing has
1581 * landed in the real front buffer.
1582 */
1583 intel_batchbuffer_flush(brw);
1584 intel_flush_front(&brw->ctx);
1585 }
1586
1587 if (back_rb) {
1588 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1589 attachments[i++] = intel_bits_per_pixel(back_rb);
1590 }
1591
1592 assert(i <= ARRAY_SIZE(attachments));
1593
1594 *buffers =
1595 dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1596 &drawable->w,
1597 &drawable->h,
1598 attachments, i / 2,
1599 buffer_count,
1600 drawable->loaderPrivate);
1601 }
1602
1603 /**
1604 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1605 *
1606 * This is called from intel_update_renderbuffers().
1607 *
1608 * \par Note:
1609 * DRI buffers whose attachment point is DRI2BufferStencil or
1610 * DRI2BufferDepthStencil are handled as special cases.
1611 *
1612 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1613 * that is passed to brw_bo_gem_create_from_name().
1614 *
1615 * \see intel_update_renderbuffers()
1616 */
1617 static void
1618 intel_process_dri2_buffer(struct brw_context *brw,
1619 __DRIdrawable *drawable,
1620 __DRIbuffer *buffer,
1621 struct intel_renderbuffer *rb,
1622 const char *buffer_name)
1623 {
1624 struct gl_framebuffer *fb = drawable->driverPrivate;
1625 struct brw_bo *bo;
1626
1627 if (!rb)
1628 return;
1629
1630 unsigned num_samples = rb->Base.Base.NumSamples;
1631
1632 /* We try to avoid closing and reopening the same BO name, because the first
1633 * use of a mapping of the buffer involves a bunch of page faulting which is
1634 * moderately expensive.
1635 */
1636 struct intel_mipmap_tree *last_mt;
1637 if (num_samples == 0)
1638 last_mt = rb->mt;
1639 else
1640 last_mt = rb->singlesample_mt;
1641
1642 uint32_t old_name = 0;
1643 if (last_mt) {
1644 /* The bo already has a name because the miptree was created by a
1645 * previous call to intel_process_dri2_buffer(). If a bo already has a
1646 * name, then brw_bo_flink() is a low-cost getter. It does not
1647 * create a new name.
1648 */
1649 brw_bo_flink(last_mt->bo, &old_name);
1650 }
1651
1652 if (old_name == buffer->name)
1653 return;
1654
1655 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1656 fprintf(stderr,
1657 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1658 buffer->name, buffer->attachment,
1659 buffer->cpp, buffer->pitch);
1660 }
1661
1662 bo = brw_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1663 buffer->name);
1664 if (!bo) {
1665 fprintf(stderr,
1666 "Failed to open BO for returned DRI2 buffer "
1667 "(%dx%d, %s, named %d).\n"
1668 "This is likely a bug in the X Server that will lead to a "
1669 "crash soon.\n",
1670 drawable->w, drawable->h, buffer_name, buffer->name);
1671 return;
1672 }
1673
1674 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1675 drawable->w, drawable->h,
1676 buffer->pitch);
1677
1678 if (_mesa_is_front_buffer_drawing(fb) &&
1679 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1680 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1681 rb->Base.Base.NumSamples > 1) {
1682 intel_renderbuffer_upsample(brw, rb);
1683 }
1684
1685 assert(rb->mt);
1686
1687 brw_bo_unreference(bo);
1688 }
1689
1690 /**
1691 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1692 *
1693 * To determine which DRI buffers to request, examine the renderbuffers
1694 * attached to the drawable's framebuffer. Then request the buffers from
1695 * the image loader
1696 *
1697 * This is called from intel_update_renderbuffers().
1698 *
1699 * \param drawable Drawable whose buffers are queried.
1700 * \param buffers [out] List of buffers returned by DRI2 query.
1701 * \param buffer_count [out] Number of buffers returned.
1702 *
1703 * \see intel_update_renderbuffers()
1704 */
1705
1706 static void
1707 intel_update_image_buffer(struct brw_context *intel,
1708 __DRIdrawable *drawable,
1709 struct intel_renderbuffer *rb,
1710 __DRIimage *buffer,
1711 enum __DRIimageBufferMask buffer_type)
1712 {
1713 struct gl_framebuffer *fb = drawable->driverPrivate;
1714
1715 if (!rb || !buffer->bo)
1716 return;
1717
1718 unsigned num_samples = rb->Base.Base.NumSamples;
1719
1720 /* Check and see if we're already bound to the right
1721 * buffer object
1722 */
1723 struct intel_mipmap_tree *last_mt;
1724 if (num_samples == 0)
1725 last_mt = rb->mt;
1726 else
1727 last_mt = rb->singlesample_mt;
1728
1729 if (last_mt && last_mt->bo == buffer->bo)
1730 return;
1731
1732 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1733 buffer->width, buffer->height,
1734 buffer->pitch);
1735
1736 if (_mesa_is_front_buffer_drawing(fb) &&
1737 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1738 rb->Base.Base.NumSamples > 1) {
1739 intel_renderbuffer_upsample(intel, rb);
1740 }
1741 }
1742
1743 static void
1744 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1745 {
1746 struct gl_framebuffer *fb = drawable->driverPrivate;
1747 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1748 struct intel_renderbuffer *front_rb;
1749 struct intel_renderbuffer *back_rb;
1750 struct __DRIimageList images;
1751 mesa_format format;
1752 uint32_t buffer_mask = 0;
1753 int ret;
1754
1755 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1756 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1757
1758 if (back_rb)
1759 format = intel_rb_format(back_rb);
1760 else if (front_rb)
1761 format = intel_rb_format(front_rb);
1762 else
1763 return;
1764
1765 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1766 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1767 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1768 }
1769
1770 if (back_rb)
1771 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1772
1773 ret = dri_screen->image.loader->getBuffers(drawable,
1774 driGLFormatToImageFormat(format),
1775 &drawable->dri2.stamp,
1776 drawable->loaderPrivate,
1777 buffer_mask,
1778 &images);
1779 if (!ret)
1780 return;
1781
1782 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1783 drawable->w = images.front->width;
1784 drawable->h = images.front->height;
1785 intel_update_image_buffer(brw,
1786 drawable,
1787 front_rb,
1788 images.front,
1789 __DRI_IMAGE_BUFFER_FRONT);
1790 }
1791
1792 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1793 drawable->w = images.back->width;
1794 drawable->h = images.back->height;
1795 intel_update_image_buffer(brw,
1796 drawable,
1797 back_rb,
1798 images.back,
1799 __DRI_IMAGE_BUFFER_BACK);
1800 }
1801 }