i965: Use a uniform for gl_PatchVerticesIn in the TCS on Gen8+.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "main/api_exec.h"
35 #include "main/context.h"
36 #include "main/fbobject.h"
37 #include "main/extensions.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
40 #include "main/points.h"
41 #include "main/version.h"
42 #include "main/vtxfmt.h"
43 #include "main/texobj.h"
44 #include "main/framebuffer.h"
45
46 #include "vbo/vbo_context.h"
47
48 #include "drivers/common/driverfuncs.h"
49 #include "drivers/common/meta.h"
50 #include "utils.h"
51
52 #include "brw_context.h"
53 #include "brw_defines.h"
54 #include "brw_compiler.h"
55 #include "brw_draw.h"
56 #include "brw_state.h"
57
58 #include "intel_batchbuffer.h"
59 #include "intel_buffer_objects.h"
60 #include "intel_buffers.h"
61 #include "intel_fbo.h"
62 #include "intel_mipmap_tree.h"
63 #include "intel_pixel.h"
64 #include "intel_image.h"
65 #include "intel_tex.h"
66 #include "intel_tex_obj.h"
67
68 #include "swrast_setup/swrast_setup.h"
69 #include "tnl/tnl.h"
70 #include "tnl/t_pipeline.h"
71 #include "util/ralloc.h"
72 #include "util/debug.h"
73 #include "isl/isl.h"
74
75 /***************************************
76 * Mesa's Driver Functions
77 ***************************************/
78
79 const char *const brw_vendor_string = "Intel Open Source Technology Center";
80
81 static const char *
82 get_bsw_model(const struct intel_screen *intelScreen)
83 {
84 switch (intelScreen->eu_total) {
85 case 16:
86 return "405";
87 case 12:
88 return "400";
89 default:
90 return " ";
91 }
92 }
93
94 const char *
95 brw_get_renderer_string(const struct intel_screen *intelScreen)
96 {
97 const char *chipset;
98 static char buffer[128];
99 char *bsw = NULL;
100
101 switch (intelScreen->deviceID) {
102 #undef CHIPSET
103 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
104 #include "pci_ids/i965_pci_ids.h"
105 default:
106 chipset = "Unknown Intel Chipset";
107 break;
108 }
109
110 /* Braswell branding is funny, so we have to fix it up here */
111 if (intelScreen->deviceID == 0x22B1) {
112 bsw = strdup(chipset);
113 char *needle = strstr(bsw, "XXX");
114 if (needle) {
115 memcpy(needle, get_bsw_model(intelScreen), 3);
116 chipset = bsw;
117 }
118 }
119
120 (void) driGetRendererString(buffer, chipset, 0);
121 free(bsw);
122 return buffer;
123 }
124
125 static const GLubyte *
126 intel_get_string(struct gl_context * ctx, GLenum name)
127 {
128 const struct brw_context *const brw = brw_context(ctx);
129
130 switch (name) {
131 case GL_VENDOR:
132 return (GLubyte *) brw_vendor_string;
133
134 case GL_RENDERER:
135 return
136 (GLubyte *) brw_get_renderer_string(brw->intelScreen);
137
138 default:
139 return NULL;
140 }
141 }
142
143 static void
144 intel_viewport(struct gl_context *ctx)
145 {
146 struct brw_context *brw = brw_context(ctx);
147 __DRIcontext *driContext = brw->driContext;
148
149 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
150 if (driContext->driDrawablePriv)
151 dri2InvalidateDrawable(driContext->driDrawablePriv);
152 if (driContext->driReadablePriv)
153 dri2InvalidateDrawable(driContext->driReadablePriv);
154 }
155 }
156
157 static void
158 intel_update_framebuffer(struct gl_context *ctx,
159 struct gl_framebuffer *fb)
160 {
161 struct brw_context *brw = brw_context(ctx);
162
163 /* Quantize the derived default number of samples
164 */
165 fb->DefaultGeometry._NumSamples =
166 intel_quantize_num_samples(brw->intelScreen,
167 fb->DefaultGeometry.NumSamples);
168 }
169
170 /* On Gen9 color buffers may be compressed by the hardware (lossless
171 * compression). There are, however, format restrictions and care needs to be
172 * taken that the sampler engine is capable for re-interpreting a buffer with
173 * format different the buffer was originally written with.
174 *
175 * For example, SRGB formats are not compressible and the sampler engine isn't
176 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
177 * color buffer needs to be resolved so that the sampling surface can be
178 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
179 * set).
180 */
181 static bool
182 intel_texture_view_requires_resolve(struct brw_context *brw,
183 struct intel_texture_object *intel_tex)
184 {
185 if (brw->gen < 9 ||
186 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
187 return false;
188
189 const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format);
190
191 if (isl_format_supports_lossless_compression(brw->intelScreen->devinfo,
192 brw_format))
193 return false;
194
195 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
196 _mesa_get_format_name(intel_tex->_Format),
197 _mesa_get_format_name(intel_tex->mt->format));
198
199 return true;
200 }
201
202 static void
203 intel_update_state(struct gl_context * ctx, GLuint new_state)
204 {
205 struct brw_context *brw = brw_context(ctx);
206 struct intel_texture_object *tex_obj;
207 struct intel_renderbuffer *depth_irb;
208
209 if (ctx->swrast_context)
210 _swrast_InvalidateState(ctx, new_state);
211 _vbo_InvalidateState(ctx, new_state);
212
213 brw->NewGLState |= new_state;
214
215 _mesa_unlock_context_textures(ctx);
216
217 /* Resolve the depth buffer's HiZ buffer. */
218 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
219 if (depth_irb)
220 intel_renderbuffer_resolve_hiz(brw, depth_irb);
221
222 /* Resolve depth buffer and render cache of each enabled texture. */
223 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
224 for (int i = 0; i <= maxEnabledUnit; i++) {
225 if (!ctx->Texture.Unit[i]._Current)
226 continue;
227 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
228 if (!tex_obj || !tex_obj->mt)
229 continue;
230 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
231 /* Sampling engine understands lossless compression and resolving
232 * those surfaces should be skipped for performance reasons.
233 */
234 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
235 0 : INTEL_MIPTREE_IGNORE_CCS_E;
236 intel_miptree_resolve_color(brw, tex_obj->mt, flags);
237 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
238 }
239
240 /* Resolve color for each active shader image. */
241 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
242 const struct gl_shader *shader = ctx->_Shader->CurrentProgram[i] ?
243 ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL;
244
245 if (unlikely(shader && shader->NumImages)) {
246 for (unsigned j = 0; j < shader->NumImages; j++) {
247 struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]];
248 tex_obj = intel_texture_object(u->TexObj);
249
250 if (tex_obj && tex_obj->mt) {
251 /* Access to images is implemented using indirect messages
252 * against data port. Normal render target write understands
253 * lossless compression but unfortunately the typed/untyped
254 * read/write interface doesn't. Therefore the compressed
255 * surfaces need to be resolved prior to accessing them.
256 */
257 intel_miptree_resolve_color(brw, tex_obj->mt, 0);
258 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
259 }
260 }
261 }
262 }
263
264 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
265 * single-sampled color renderbuffers because the CCS buffer isn't
266 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
267 * enabled because otherwise the surface state will be programmed with the
268 * linear equivalent format anyway.
269 */
270 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
271 struct gl_framebuffer *fb = ctx->DrawBuffer;
272 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
273 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
274
275 if (rb == NULL)
276 continue;
277
278 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
279 struct intel_mipmap_tree *mt = irb->mt;
280
281 if (mt == NULL ||
282 mt->num_samples > 1 ||
283 _mesa_get_srgb_format_linear(mt->format) == mt->format)
284 continue;
285
286 /* Lossless compression is not supported for SRGB formats, it
287 * should be impossible to get here with such surfaces.
288 */
289 assert(!intel_miptree_is_lossless_compressed(brw, mt));
290 intel_miptree_resolve_color(brw, mt, 0);
291 brw_render_cache_set_check_flush(brw, mt->bo);
292 }
293 }
294
295 _mesa_lock_context_textures(ctx);
296
297 if (new_state & _NEW_BUFFERS) {
298 intel_update_framebuffer(ctx, ctx->DrawBuffer);
299 if (ctx->DrawBuffer != ctx->ReadBuffer)
300 intel_update_framebuffer(ctx, ctx->ReadBuffer);
301 }
302 }
303
304 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
305
306 static void
307 intel_flush_front(struct gl_context *ctx)
308 {
309 struct brw_context *brw = brw_context(ctx);
310 __DRIcontext *driContext = brw->driContext;
311 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
312 __DRIscreen *const screen = brw->intelScreen->driScrnPriv;
313
314 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
315 if (flushFront(screen) && driDrawable &&
316 driDrawable->loaderPrivate) {
317
318 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
319 *
320 * This potentially resolves both front and back buffer. It
321 * is unnecessary to resolve the back, but harms nothing except
322 * performance. And no one cares about front-buffer render
323 * performance.
324 */
325 intel_resolve_for_dri2_flush(brw, driDrawable);
326 intel_batchbuffer_flush(brw);
327
328 flushFront(screen)(driDrawable, driDrawable->loaderPrivate);
329
330 /* We set the dirty bit in intel_prepare_render() if we're
331 * front buffer rendering once we get there.
332 */
333 brw->front_buffer_dirty = false;
334 }
335 }
336 }
337
338 static void
339 intel_glFlush(struct gl_context *ctx)
340 {
341 struct brw_context *brw = brw_context(ctx);
342
343 intel_batchbuffer_flush(brw);
344 intel_flush_front(ctx);
345
346 brw->need_flush_throttle = true;
347 }
348
349 static void
350 intel_finish(struct gl_context * ctx)
351 {
352 struct brw_context *brw = brw_context(ctx);
353
354 intel_glFlush(ctx);
355
356 if (brw->batch.last_bo)
357 drm_intel_bo_wait_rendering(brw->batch.last_bo);
358 }
359
360 static void
361 brw_init_driver_functions(struct brw_context *brw,
362 struct dd_function_table *functions)
363 {
364 _mesa_init_driver_functions(functions);
365
366 /* GLX uses DRI2 invalidate events to handle window resizing.
367 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
368 * which doesn't provide a mechanism for snooping the event queues.
369 *
370 * So EGL still relies on viewport hacks to handle window resizing.
371 * This should go away with DRI3000.
372 */
373 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
374 functions->Viewport = intel_viewport;
375
376 functions->Flush = intel_glFlush;
377 functions->Finish = intel_finish;
378 functions->GetString = intel_get_string;
379 functions->UpdateState = intel_update_state;
380
381 intelInitTextureFuncs(functions);
382 intelInitTextureImageFuncs(functions);
383 intelInitTextureSubImageFuncs(functions);
384 intelInitTextureCopyImageFuncs(functions);
385 intelInitCopyImageFuncs(functions);
386 intelInitClearFuncs(functions);
387 intelInitBufferFuncs(functions);
388 intelInitPixelFuncs(functions);
389 intelInitBufferObjectFuncs(functions);
390 intel_init_syncobj_functions(functions);
391 brw_init_object_purgeable_functions(functions);
392
393 brwInitFragProgFuncs( functions );
394 brw_init_common_queryobj_functions(functions);
395 if (brw->gen >= 8 || brw->is_haswell)
396 hsw_init_queryobj_functions(functions);
397 else if (brw->gen >= 6)
398 gen6_init_queryobj_functions(functions);
399 else
400 gen4_init_queryobj_functions(functions);
401 brw_init_compute_functions(functions);
402 if (brw->gen >= 7)
403 brw_init_conditional_render_functions(functions);
404
405 functions->QueryInternalFormat = brw_query_internal_format;
406
407 functions->NewTransformFeedback = brw_new_transform_feedback;
408 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
409 if (brw->intelScreen->has_mi_math_and_lrr) {
410 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
411 functions->EndTransformFeedback = hsw_end_transform_feedback;
412 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
413 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
414 } else if (brw->gen >= 7) {
415 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
416 functions->EndTransformFeedback = gen7_end_transform_feedback;
417 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
418 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
419 functions->GetTransformFeedbackVertexCount =
420 brw_get_transform_feedback_vertex_count;
421 } else {
422 functions->BeginTransformFeedback = brw_begin_transform_feedback;
423 functions->EndTransformFeedback = brw_end_transform_feedback;
424 }
425
426 if (brw->gen >= 6)
427 functions->GetSamplePosition = gen6_get_sample_position;
428 }
429
430 static void
431 brw_initialize_context_constants(struct brw_context *brw)
432 {
433 struct gl_context *ctx = &brw->ctx;
434 const struct brw_compiler *compiler = brw->intelScreen->compiler;
435
436 const bool stage_exists[MESA_SHADER_STAGES] = {
437 [MESA_SHADER_VERTEX] = true,
438 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
439 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
440 [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
441 [MESA_SHADER_FRAGMENT] = true,
442 [MESA_SHADER_COMPUTE] =
443 (ctx->API == API_OPENGL_CORE &&
444 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
445 (ctx->API == API_OPENGLES2 &&
446 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
447 _mesa_extension_override_enables.ARB_compute_shader,
448 };
449
450 unsigned num_stages = 0;
451 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
452 if (stage_exists[i])
453 num_stages++;
454 }
455
456 unsigned max_samplers =
457 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
458
459 ctx->Const.MaxDualSourceDrawBuffers = 1;
460 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
461 ctx->Const.MaxCombinedShaderOutputResources =
462 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
463
464 ctx->Const.QueryCounterBits.Timestamp = 36;
465
466 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
467 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
468 ctx->Const.MaxRenderbufferSize = 8192;
469 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
470 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
471 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
472 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
473 ctx->Const.MaxTextureMbytes = 1536;
474 ctx->Const.MaxTextureRectSize = 1 << 12;
475 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
476 ctx->Const.StripTextureBorder = true;
477 if (brw->gen >= 7)
478 ctx->Const.MaxProgramTextureGatherComponents = 4;
479 else if (brw->gen == 6)
480 ctx->Const.MaxProgramTextureGatherComponents = 1;
481
482 ctx->Const.MaxUniformBlockSize = 65536;
483
484 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
485 struct gl_program_constants *prog = &ctx->Const.Program[i];
486
487 if (!stage_exists[i])
488 continue;
489
490 prog->MaxTextureImageUnits = max_samplers;
491
492 prog->MaxUniformBlocks = BRW_MAX_UBO;
493 prog->MaxCombinedUniformComponents =
494 prog->MaxUniformComponents +
495 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
496
497 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
498 prog->MaxAtomicBuffers = BRW_MAX_ABO;
499 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
500 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
501 }
502
503 ctx->Const.MaxTextureUnits =
504 MIN2(ctx->Const.MaxTextureCoordUnits,
505 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
506
507 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
508 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
509 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
510 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
511 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
512 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
513 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
514
515
516 /* Hardware only supports a limited number of transform feedback buffers.
517 * So we need to override the Mesa default (which is based only on software
518 * limits).
519 */
520 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
521
522 /* On Gen6, in the worst case, we use up one binding table entry per
523 * transform feedback component (see comments above the definition of
524 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
525 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
526 * BRW_MAX_SOL_BINDINGS.
527 *
528 * In "separate components" mode, we need to divide this value by
529 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
530 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
531 */
532 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
533 ctx->Const.MaxTransformFeedbackSeparateComponents =
534 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
535
536 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
537 !brw->intelScreen->has_mi_math_and_lrr;
538
539 int max_samples;
540 const int *msaa_modes = intel_supported_msaa_modes(brw->intelScreen);
541 const int clamp_max_samples =
542 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
543
544 if (clamp_max_samples < 0) {
545 max_samples = msaa_modes[0];
546 } else {
547 /* Select the largest supported MSAA mode that does not exceed
548 * clamp_max_samples.
549 */
550 max_samples = 0;
551 for (int i = 0; msaa_modes[i] != 0; ++i) {
552 if (msaa_modes[i] <= clamp_max_samples) {
553 max_samples = msaa_modes[i];
554 break;
555 }
556 }
557 }
558
559 ctx->Const.MaxSamples = max_samples;
560 ctx->Const.MaxColorTextureSamples = max_samples;
561 ctx->Const.MaxDepthTextureSamples = max_samples;
562 ctx->Const.MaxIntegerSamples = max_samples;
563 ctx->Const.MaxImageSamples = 0;
564
565 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
566 * to map indices of rectangular grid to sample numbers within a pixel.
567 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
568 * extension implementation. For more details see the comment above
569 * gen6_set_sample_maps() definition.
570 */
571 gen6_set_sample_maps(ctx);
572
573 ctx->Const.MinLineWidth = 1.0;
574 ctx->Const.MinLineWidthAA = 1.0;
575 if (brw->gen >= 6) {
576 ctx->Const.MaxLineWidth = 7.375;
577 ctx->Const.MaxLineWidthAA = 7.375;
578 ctx->Const.LineWidthGranularity = 0.125;
579 } else {
580 ctx->Const.MaxLineWidth = 7.0;
581 ctx->Const.MaxLineWidthAA = 7.0;
582 ctx->Const.LineWidthGranularity = 0.5;
583 }
584
585 /* For non-antialiased lines, we have to round the line width to the
586 * nearest whole number. Make sure that we don't advertise a line
587 * width that, when rounded, will be beyond the actual hardware
588 * maximum.
589 */
590 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
591
592 ctx->Const.MinPointSize = 1.0;
593 ctx->Const.MinPointSizeAA = 1.0;
594 ctx->Const.MaxPointSize = 255.0;
595 ctx->Const.MaxPointSizeAA = 255.0;
596 ctx->Const.PointSizeGranularity = 1.0;
597
598 if (brw->gen >= 5 || brw->is_g4x)
599 ctx->Const.MaxClipPlanes = 8;
600
601 ctx->Const.LowerTessLevel = true;
602 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8;
603 ctx->Const.LowerTESPatchVerticesIn = true;
604 ctx->Const.PrimitiveRestartForPatches = true;
605
606 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
607 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
608 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
609 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
610 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
611 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
612 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
613 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
614 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
615 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
616 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
617 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
618 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
619 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
620
621 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
622 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
623 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
624 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
625 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
626 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
627 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
628 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
629 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
630 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
631 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
632
633 /* Fragment shaders use real, 32-bit twos-complement integers for all
634 * integer types.
635 */
636 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
637 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
638 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
639 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
640 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
641
642 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
643 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
644 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
645 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
646 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
647
648 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
649 * but we're not sure how it's actually done for vertex order,
650 * that affect provoking vertex decision. Always use last vertex
651 * convention for quad primitive which works as expected for now.
652 */
653 if (brw->gen >= 6)
654 ctx->Const.QuadsFollowProvokingVertexConvention = false;
655
656 ctx->Const.NativeIntegers = true;
657 ctx->Const.VertexID_is_zero_based = true;
658
659 /* Regarding the CMP instruction, the Ivybridge PRM says:
660 *
661 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
662 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
663 * 0xFFFFFFFF) is assigned to dst."
664 *
665 * but PRMs for earlier generations say
666 *
667 * "In dword format, one GRF may store up to 8 results. When the register
668 * is used later as a vector of Booleans, as only LSB at each channel
669 * contains meaning [sic] data, software should make sure all higher bits
670 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
671 *
672 * We select the representation of a true boolean uniform to be ~0, and fix
673 * the results of Gen <= 5 CMP instruction's with -(result & 1).
674 */
675 ctx->Const.UniformBooleanTrue = ~0;
676
677 /* From the gen4 PRM, volume 4 page 127:
678 *
679 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
680 * the base address of the first element of the surface, computed in
681 * software by adding the surface base address to the byte offset of
682 * the element in the buffer."
683 *
684 * However, unaligned accesses are slower, so enforce buffer alignment.
685 */
686 ctx->Const.UniformBufferOffsetAlignment = 16;
687
688 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
689 * that we can safely have the CPU and GPU writing the same SSBO on
690 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
691 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
692 * be updating disjoint regions of the buffer simultaneously and that will
693 * break if the regions overlap the same cacheline.
694 */
695 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
696 ctx->Const.TextureBufferOffsetAlignment = 16;
697 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
698
699 if (brw->gen >= 6) {
700 ctx->Const.MaxVarying = 32;
701 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
702 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
703 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
704 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
705 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
706 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
707 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
708 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
709 }
710
711 /* We want the GLSL compiler to emit code that uses condition codes */
712 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
713 ctx->Const.ShaderCompilerOptions[i] =
714 brw->intelScreen->compiler->glsl_compiler_options[i];
715 }
716
717 if (brw->gen >= 7) {
718 ctx->Const.MaxViewportWidth = 32768;
719 ctx->Const.MaxViewportHeight = 32768;
720 }
721
722 /* ARB_viewport_array */
723 if (brw->gen >= 6 && ctx->API == API_OPENGL_CORE) {
724 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
725 ctx->Const.ViewportSubpixelBits = 0;
726
727 /* Cast to float before negating because MaxViewportWidth is unsigned.
728 */
729 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
730 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
731 }
732
733 /* ARB_gpu_shader5 */
734 if (brw->gen >= 7)
735 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
736
737 /* ARB_framebuffer_no_attachments */
738 ctx->Const.MaxFramebufferWidth = 16384;
739 ctx->Const.MaxFramebufferHeight = 16384;
740 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
741 ctx->Const.MaxFramebufferSamples = max_samples;
742 }
743
744 static void
745 brw_initialize_cs_context_constants(struct brw_context *brw, unsigned max_threads)
746 {
747 struct gl_context *ctx = &brw->ctx;
748 /* Maximum number of scalar compute shader invocations that can be run in
749 * parallel in the same subslice assuming SIMD32 dispatch.
750 */
751 const uint32_t max_invocations = 32 * max_threads;
752 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
753 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
754 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
755 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
756 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
757 }
758
759 /**
760 * Process driconf (drirc) options, setting appropriate context flags.
761 *
762 * intelInitExtensions still pokes at optionCache directly, in order to
763 * avoid advertising various extensions. No flags are set, so it makes
764 * sense to continue doing that there.
765 */
766 static void
767 brw_process_driconf_options(struct brw_context *brw)
768 {
769 struct gl_context *ctx = &brw->ctx;
770
771 driOptionCache *options = &brw->optionCache;
772 driParseConfigFiles(options, &brw->intelScreen->optionCache,
773 brw->driContext->driScreenPriv->myNum, "i965");
774
775 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
776 switch (bo_reuse_mode) {
777 case DRI_CONF_BO_REUSE_DISABLED:
778 break;
779 case DRI_CONF_BO_REUSE_ALL:
780 intel_bufmgr_gem_enable_reuse(brw->bufmgr);
781 break;
782 }
783
784 if (!driQueryOptionb(options, "hiz")) {
785 brw->has_hiz = false;
786 /* On gen6, you can only do separate stencil with HIZ. */
787 if (brw->gen == 6)
788 brw->has_separate_stencil = false;
789 }
790
791 if (driQueryOptionb(options, "always_flush_batch")) {
792 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
793 brw->always_flush_batch = true;
794 }
795
796 if (driQueryOptionb(options, "always_flush_cache")) {
797 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
798 brw->always_flush_cache = true;
799 }
800
801 if (driQueryOptionb(options, "disable_throttling")) {
802 fprintf(stderr, "disabling flush throttling\n");
803 brw->disable_throttling = true;
804 }
805
806 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
807
808 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
809 brw->intelScreen->compiler->precise_trig = true;
810
811 ctx->Const.ForceGLSLExtensionsWarn =
812 driQueryOptionb(options, "force_glsl_extensions_warn");
813
814 ctx->Const.DisableGLSLLineContinuations =
815 driQueryOptionb(options, "disable_glsl_line_continuations");
816
817 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
818 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
819
820 brw->dual_color_blend_by_location =
821 driQueryOptionb(options, "dual_color_blend_by_location");
822 }
823
824 GLboolean
825 brwCreateContext(gl_api api,
826 const struct gl_config *mesaVis,
827 __DRIcontext *driContextPriv,
828 unsigned major_version,
829 unsigned minor_version,
830 uint32_t flags,
831 bool notify_reset,
832 unsigned *dri_ctx_error,
833 void *sharedContextPrivate)
834 {
835 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
836 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
837 struct intel_screen *screen = sPriv->driverPrivate;
838 const struct brw_device_info *devinfo = screen->devinfo;
839 struct dd_function_table functions;
840
841 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
842 * provides us with context reset notifications.
843 */
844 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
845 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
846
847 if (screen->has_context_reset_notification)
848 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
849
850 if (flags & ~allowed_flags) {
851 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
852 return false;
853 }
854
855 struct brw_context *brw = rzalloc(NULL, struct brw_context);
856 if (!brw) {
857 fprintf(stderr, "%s: failed to alloc context\n", __func__);
858 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
859 return false;
860 }
861
862 driContextPriv->driverPrivate = brw;
863 brw->driContext = driContextPriv;
864 brw->intelScreen = screen;
865 brw->bufmgr = screen->bufmgr;
866
867 brw->gen = devinfo->gen;
868 brw->gt = devinfo->gt;
869 brw->is_g4x = devinfo->is_g4x;
870 brw->is_baytrail = devinfo->is_baytrail;
871 brw->is_haswell = devinfo->is_haswell;
872 brw->is_cherryview = devinfo->is_cherryview;
873 brw->is_broxton = devinfo->is_broxton;
874 brw->has_llc = devinfo->has_llc;
875 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
876 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
877 brw->has_pln = devinfo->has_pln;
878 brw->has_compr4 = devinfo->has_compr4;
879 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
880 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
881 brw->needs_unlit_centroid_workaround =
882 devinfo->needs_unlit_centroid_workaround;
883
884 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
885 brw->has_swizzling = screen->hw_has_swizzling;
886
887 brw->vs.base.stage = MESA_SHADER_VERTEX;
888 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
889 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
890 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
891 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
892 if (brw->gen >= 8) {
893 gen8_init_vtable_surface_functions(brw);
894 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
895 } else if (brw->gen >= 7) {
896 gen7_init_vtable_surface_functions(brw);
897 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
898 } else if (brw->gen >= 6) {
899 gen6_init_vtable_surface_functions(brw);
900 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
901 } else {
902 gen4_init_vtable_surface_functions(brw);
903 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
904 }
905
906 brw_init_driver_functions(brw, &functions);
907
908 if (notify_reset)
909 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
910
911 struct gl_context *ctx = &brw->ctx;
912
913 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
914 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
915 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
916 intelDestroyContext(driContextPriv);
917 return false;
918 }
919
920 driContextSetFlags(ctx, flags);
921
922 /* Initialize the software rasterizer and helper modules.
923 *
924 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
925 * software fallbacks (which we have to support on legacy GL to do weird
926 * glDrawPixels(), glBitmap(), and other functions).
927 */
928 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
929 _swrast_CreateContext(ctx);
930 }
931
932 _vbo_CreateContext(ctx);
933 if (ctx->swrast_context) {
934 _tnl_CreateContext(ctx);
935 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
936 _swsetup_CreateContext(ctx);
937
938 /* Configure swrast to match hardware characteristics: */
939 _swrast_allow_pixel_fog(ctx, false);
940 _swrast_allow_vertex_fog(ctx, true);
941 }
942
943 _mesa_meta_init(ctx);
944
945 brw_process_driconf_options(brw);
946
947 if (INTEL_DEBUG & DEBUG_PERF)
948 brw->perf_debug = true;
949
950 brw_initialize_cs_context_constants(brw, devinfo->max_cs_threads);
951 brw_initialize_context_constants(brw);
952
953 ctx->Const.ResetStrategy = notify_reset
954 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
955
956 /* Reinitialize the context point state. It depends on ctx->Const values. */
957 _mesa_init_point(ctx);
958
959 intel_fbo_init(brw);
960
961 intel_batchbuffer_init(brw);
962
963 if (brw->gen >= 6) {
964 /* Create a new hardware context. Using a hardware context means that
965 * our GPU state will be saved/restored on context switch, allowing us
966 * to assume that the GPU is in the same state we left it in.
967 *
968 * This is required for transform feedback buffer offsets, query objects,
969 * and also allows us to reduce how much state we have to emit.
970 */
971 brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr);
972
973 if (!brw->hw_ctx) {
974 fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
975 intelDestroyContext(driContextPriv);
976 return false;
977 }
978 }
979
980 if (brw_init_pipe_control(brw, devinfo)) {
981 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
982 intelDestroyContext(driContextPriv);
983 return false;
984 }
985
986 brw_init_state(brw);
987
988 intelInitExtensions(ctx);
989
990 brw_init_surface_formats(brw);
991
992 brw->max_vs_threads = devinfo->max_vs_threads;
993 brw->max_hs_threads = devinfo->max_hs_threads;
994 brw->max_ds_threads = devinfo->max_ds_threads;
995 brw->max_gs_threads = devinfo->max_gs_threads;
996 brw->max_wm_threads = devinfo->max_wm_threads;
997 /* FINISHME: Do this for all platforms that the kernel supports */
998 if (brw->is_cherryview &&
999 screen->subslice_total > 0 && screen->eu_total > 0) {
1000 /* Logical CS threads = EUs per subslice * 7 threads per EU */
1001 brw->max_cs_threads = screen->eu_total / screen->subslice_total * 7;
1002
1003 /* Fuse configurations may give more threads than expected, never less. */
1004 if (brw->max_cs_threads < devinfo->max_cs_threads)
1005 brw->max_cs_threads = devinfo->max_cs_threads;
1006 } else {
1007 brw->max_cs_threads = devinfo->max_cs_threads;
1008 }
1009 brw->urb.size = devinfo->urb.size;
1010 brw->urb.min_vs_entries = devinfo->urb.min_vs_entries;
1011 brw->urb.max_vs_entries = devinfo->urb.max_vs_entries;
1012 brw->urb.max_hs_entries = devinfo->urb.max_hs_entries;
1013 brw->urb.max_ds_entries = devinfo->urb.max_ds_entries;
1014 brw->urb.max_gs_entries = devinfo->urb.max_gs_entries;
1015
1016 /* Estimate the size of the mappable aperture into the GTT. There's an
1017 * ioctl to get the whole GTT size, but not one to get the mappable subset.
1018 * It turns out it's basically always 256MB, though some ancient hardware
1019 * was smaller.
1020 */
1021 uint32_t gtt_size = 256 * 1024 * 1024;
1022
1023 /* We don't want to map two objects such that a memcpy between them would
1024 * just fault one mapping in and then the other over and over forever. So
1025 * we would need to divide the GTT size by 2. Additionally, some GTT is
1026 * taken up by things like the framebuffer and the ringbuffer and such, so
1027 * be more conservative.
1028 */
1029 brw->max_gtt_map_object_size = gtt_size / 4;
1030
1031 if (brw->gen == 6)
1032 brw->urb.gs_present = false;
1033
1034 brw->prim_restart.in_progress = false;
1035 brw->prim_restart.enable_cut_index = false;
1036 brw->gs.enabled = false;
1037 brw->sf.viewport_transform_enable = true;
1038
1039 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1040
1041 brw->use_resource_streamer = screen->has_resource_streamer &&
1042 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1043 env_var_as_boolean("INTEL_USE_GATHER", false));
1044
1045 ctx->VertexProgram._MaintainTnlProgram = true;
1046 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1047
1048 brw_draw_init( brw );
1049
1050 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1051 /* Turn on some extra GL_ARB_debug_output generation. */
1052 brw->perf_debug = true;
1053 }
1054
1055 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0)
1056 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1057
1058 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1059 brw_init_shader_time(brw);
1060
1061 _mesa_compute_version(ctx);
1062
1063 _mesa_initialize_dispatch_tables(ctx);
1064 _mesa_initialize_vbo_vtxfmt(ctx);
1065
1066 if (ctx->Extensions.AMD_performance_monitor) {
1067 brw_init_performance_monitors(brw);
1068 }
1069
1070 vbo_use_buffer_objects(ctx);
1071 vbo_always_unmap_buffers(ctx);
1072
1073 return true;
1074 }
1075
1076 void
1077 intelDestroyContext(__DRIcontext * driContextPriv)
1078 {
1079 struct brw_context *brw =
1080 (struct brw_context *) driContextPriv->driverPrivate;
1081 struct gl_context *ctx = &brw->ctx;
1082
1083 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1084 if (INTEL_DEBUG & DEBUG_AUB) {
1085 intel_batchbuffer_flush(brw);
1086 aub_dump_bmp(&brw->ctx);
1087 }
1088
1089 _mesa_meta_free(&brw->ctx);
1090
1091 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1092 /* Force a report. */
1093 brw->shader_time.report_time = 0;
1094
1095 brw_collect_and_report_shader_time(brw);
1096 brw_destroy_shader_time(brw);
1097 }
1098
1099 brw_destroy_state(brw);
1100 brw_draw_destroy(brw);
1101
1102 drm_intel_bo_unreference(brw->curbe.curbe_bo);
1103 if (brw->vs.base.scratch_bo)
1104 drm_intel_bo_unreference(brw->vs.base.scratch_bo);
1105 if (brw->tcs.base.scratch_bo)
1106 drm_intel_bo_unreference(brw->tcs.base.scratch_bo);
1107 if (brw->tes.base.scratch_bo)
1108 drm_intel_bo_unreference(brw->tes.base.scratch_bo);
1109 if (brw->gs.base.scratch_bo)
1110 drm_intel_bo_unreference(brw->gs.base.scratch_bo);
1111 if (brw->wm.base.scratch_bo)
1112 drm_intel_bo_unreference(brw->wm.base.scratch_bo);
1113
1114 gen7_reset_hw_bt_pool_offsets(brw);
1115 drm_intel_bo_unreference(brw->hw_bt_pool.bo);
1116 brw->hw_bt_pool.bo = NULL;
1117
1118 drm_intel_gem_context_destroy(brw->hw_ctx);
1119
1120 if (ctx->swrast_context) {
1121 _swsetup_DestroyContext(&brw->ctx);
1122 _tnl_DestroyContext(&brw->ctx);
1123 }
1124 _vbo_DestroyContext(&brw->ctx);
1125
1126 if (ctx->swrast_context)
1127 _swrast_DestroyContext(&brw->ctx);
1128
1129 brw_fini_pipe_control(brw);
1130 intel_batchbuffer_free(brw);
1131
1132 drm_intel_bo_unreference(brw->throttle_batch[1]);
1133 drm_intel_bo_unreference(brw->throttle_batch[0]);
1134 brw->throttle_batch[1] = NULL;
1135 brw->throttle_batch[0] = NULL;
1136
1137 driDestroyOptionCache(&brw->optionCache);
1138
1139 /* free the Mesa context */
1140 _mesa_free_context_data(&brw->ctx);
1141
1142 ralloc_free(brw);
1143 driContextPriv->driverPrivate = NULL;
1144 }
1145
1146 GLboolean
1147 intelUnbindContext(__DRIcontext * driContextPriv)
1148 {
1149 /* Unset current context and dispath table */
1150 _mesa_make_current(NULL, NULL, NULL);
1151
1152 return true;
1153 }
1154
1155 /**
1156 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1157 * on window system framebuffers.
1158 *
1159 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1160 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1161 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1162 * for a visual where you're guaranteed to be capable, but it turns out that
1163 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1164 * incapable ones, because there's no difference between the two in resources
1165 * used. Applications thus get built that accidentally rely on the default
1166 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1167 * great...
1168 *
1169 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1170 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1171 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1172 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1173 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1174 * and get no sRGB encode (assuming that both kinds of visual are available).
1175 * Thus our choice to support sRGB by default on our visuals for desktop would
1176 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1177 *
1178 * Unfortunately, renderbuffer setup happens before a context is created. So
1179 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1180 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1181 * yet), we go turn that back off before anyone finds out.
1182 */
1183 static void
1184 intel_gles3_srgb_workaround(struct brw_context *brw,
1185 struct gl_framebuffer *fb)
1186 {
1187 struct gl_context *ctx = &brw->ctx;
1188
1189 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1190 return;
1191
1192 /* Some day when we support the sRGB capable bit on visuals available for
1193 * GLES, we'll need to respect that and not disable things here.
1194 */
1195 fb->Visual.sRGBCapable = false;
1196 for (int i = 0; i < BUFFER_COUNT; i++) {
1197 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1198 if (rb)
1199 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1200 }
1201 }
1202
1203 GLboolean
1204 intelMakeCurrent(__DRIcontext * driContextPriv,
1205 __DRIdrawable * driDrawPriv,
1206 __DRIdrawable * driReadPriv)
1207 {
1208 struct brw_context *brw;
1209 GET_CURRENT_CONTEXT(curCtx);
1210
1211 if (driContextPriv)
1212 brw = (struct brw_context *) driContextPriv->driverPrivate;
1213 else
1214 brw = NULL;
1215
1216 /* According to the glXMakeCurrent() man page: "Pending commands to
1217 * the previous context, if any, are flushed before it is released."
1218 * But only flush if we're actually changing contexts.
1219 */
1220 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1221 _mesa_flush(curCtx);
1222 }
1223
1224 if (driContextPriv) {
1225 struct gl_context *ctx = &brw->ctx;
1226 struct gl_framebuffer *fb, *readFb;
1227
1228 if (driDrawPriv == NULL) {
1229 fb = _mesa_get_incomplete_framebuffer();
1230 } else {
1231 fb = driDrawPriv->driverPrivate;
1232 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1233 }
1234
1235 if (driReadPriv == NULL) {
1236 readFb = _mesa_get_incomplete_framebuffer();
1237 } else {
1238 readFb = driReadPriv->driverPrivate;
1239 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1240 }
1241
1242 /* The sRGB workaround changes the renderbuffer's format. We must change
1243 * the format before the renderbuffer's miptree get's allocated, otherwise
1244 * the formats of the renderbuffer and its miptree will differ.
1245 */
1246 intel_gles3_srgb_workaround(brw, fb);
1247 intel_gles3_srgb_workaround(brw, readFb);
1248
1249 /* If the context viewport hasn't been initialized, force a call out to
1250 * the loader to get buffers so we have a drawable size for the initial
1251 * viewport. */
1252 if (!brw->ctx.ViewportInitialized)
1253 intel_prepare_render(brw);
1254
1255 _mesa_make_current(ctx, fb, readFb);
1256 } else {
1257 _mesa_make_current(NULL, NULL, NULL);
1258 }
1259
1260 return true;
1261 }
1262
1263 void
1264 intel_resolve_for_dri2_flush(struct brw_context *brw,
1265 __DRIdrawable *drawable)
1266 {
1267 if (brw->gen < 6) {
1268 /* MSAA and fast color clear are not supported, so don't waste time
1269 * checking whether a resolve is needed.
1270 */
1271 return;
1272 }
1273
1274 struct gl_framebuffer *fb = drawable->driverPrivate;
1275 struct intel_renderbuffer *rb;
1276
1277 /* Usually, only the back buffer will need to be downsampled. However,
1278 * the front buffer will also need it if the user has rendered into it.
1279 */
1280 static const gl_buffer_index buffers[2] = {
1281 BUFFER_BACK_LEFT,
1282 BUFFER_FRONT_LEFT,
1283 };
1284
1285 for (int i = 0; i < 2; ++i) {
1286 rb = intel_get_renderbuffer(fb, buffers[i]);
1287 if (rb == NULL || rb->mt == NULL)
1288 continue;
1289 if (rb->mt->num_samples <= 1)
1290 intel_miptree_resolve_color(brw, rb->mt, 0);
1291 else
1292 intel_renderbuffer_downsample(brw, rb);
1293 }
1294 }
1295
1296 static unsigned
1297 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1298 {
1299 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1300 }
1301
1302 static void
1303 intel_query_dri2_buffers(struct brw_context *brw,
1304 __DRIdrawable *drawable,
1305 __DRIbuffer **buffers,
1306 int *count);
1307
1308 static void
1309 intel_process_dri2_buffer(struct brw_context *brw,
1310 __DRIdrawable *drawable,
1311 __DRIbuffer *buffer,
1312 struct intel_renderbuffer *rb,
1313 const char *buffer_name);
1314
1315 static void
1316 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1317
1318 static void
1319 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1320 {
1321 struct gl_framebuffer *fb = drawable->driverPrivate;
1322 struct intel_renderbuffer *rb;
1323 __DRIbuffer *buffers = NULL;
1324 int i, count;
1325 const char *region_name;
1326
1327 /* Set this up front, so that in case our buffers get invalidated
1328 * while we're getting new buffers, we don't clobber the stamp and
1329 * thus ignore the invalidate. */
1330 drawable->lastStamp = drawable->dri2.stamp;
1331
1332 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1333 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1334
1335 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1336
1337 if (buffers == NULL)
1338 return;
1339
1340 for (i = 0; i < count; i++) {
1341 switch (buffers[i].attachment) {
1342 case __DRI_BUFFER_FRONT_LEFT:
1343 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1344 region_name = "dri2 front buffer";
1345 break;
1346
1347 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1348 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1349 region_name = "dri2 fake front buffer";
1350 break;
1351
1352 case __DRI_BUFFER_BACK_LEFT:
1353 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1354 region_name = "dri2 back buffer";
1355 break;
1356
1357 case __DRI_BUFFER_DEPTH:
1358 case __DRI_BUFFER_HIZ:
1359 case __DRI_BUFFER_DEPTH_STENCIL:
1360 case __DRI_BUFFER_STENCIL:
1361 case __DRI_BUFFER_ACCUM:
1362 default:
1363 fprintf(stderr,
1364 "unhandled buffer attach event, attachment type %d\n",
1365 buffers[i].attachment);
1366 return;
1367 }
1368
1369 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1370 }
1371
1372 }
1373
1374 void
1375 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1376 {
1377 struct brw_context *brw = context->driverPrivate;
1378 __DRIscreen *screen = brw->intelScreen->driScrnPriv;
1379
1380 /* Set this up front, so that in case our buffers get invalidated
1381 * while we're getting new buffers, we don't clobber the stamp and
1382 * thus ignore the invalidate. */
1383 drawable->lastStamp = drawable->dri2.stamp;
1384
1385 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1386 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1387
1388 if (screen->image.loader)
1389 intel_update_image_buffers(brw, drawable);
1390 else
1391 intel_update_dri2_buffers(brw, drawable);
1392
1393 driUpdateFramebufferSize(&brw->ctx, drawable);
1394 }
1395
1396 /**
1397 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1398 * state is required.
1399 */
1400 void
1401 intel_prepare_render(struct brw_context *brw)
1402 {
1403 struct gl_context *ctx = &brw->ctx;
1404 __DRIcontext *driContext = brw->driContext;
1405 __DRIdrawable *drawable;
1406
1407 drawable = driContext->driDrawablePriv;
1408 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1409 if (drawable->lastStamp != drawable->dri2.stamp)
1410 intel_update_renderbuffers(driContext, drawable);
1411 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1412 }
1413
1414 drawable = driContext->driReadablePriv;
1415 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1416 if (drawable->lastStamp != drawable->dri2.stamp)
1417 intel_update_renderbuffers(driContext, drawable);
1418 driContext->dri2.read_stamp = drawable->dri2.stamp;
1419 }
1420
1421 /* If we're currently rendering to the front buffer, the rendering
1422 * that will happen next will probably dirty the front buffer. So
1423 * mark it as dirty here.
1424 */
1425 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1426 brw->front_buffer_dirty = true;
1427 }
1428
1429 /**
1430 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1431 *
1432 * To determine which DRI buffers to request, examine the renderbuffers
1433 * attached to the drawable's framebuffer. Then request the buffers with
1434 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1435 *
1436 * This is called from intel_update_renderbuffers().
1437 *
1438 * \param drawable Drawable whose buffers are queried.
1439 * \param buffers [out] List of buffers returned by DRI2 query.
1440 * \param buffer_count [out] Number of buffers returned.
1441 *
1442 * \see intel_update_renderbuffers()
1443 * \see DRI2GetBuffers()
1444 * \see DRI2GetBuffersWithFormat()
1445 */
1446 static void
1447 intel_query_dri2_buffers(struct brw_context *brw,
1448 __DRIdrawable *drawable,
1449 __DRIbuffer **buffers,
1450 int *buffer_count)
1451 {
1452 __DRIscreen *screen = brw->intelScreen->driScrnPriv;
1453 struct gl_framebuffer *fb = drawable->driverPrivate;
1454 int i = 0;
1455 unsigned attachments[8];
1456
1457 struct intel_renderbuffer *front_rb;
1458 struct intel_renderbuffer *back_rb;
1459
1460 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1461 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1462
1463 memset(attachments, 0, sizeof(attachments));
1464 if ((_mesa_is_front_buffer_drawing(fb) ||
1465 _mesa_is_front_buffer_reading(fb) ||
1466 !back_rb) && front_rb) {
1467 /* If a fake front buffer is in use, then querying for
1468 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1469 * the real front buffer to the fake front buffer. So before doing the
1470 * query, we need to make sure all the pending drawing has landed in the
1471 * real front buffer.
1472 */
1473 intel_batchbuffer_flush(brw);
1474 intel_flush_front(&brw->ctx);
1475
1476 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1477 attachments[i++] = intel_bits_per_pixel(front_rb);
1478 } else if (front_rb && brw->front_buffer_dirty) {
1479 /* We have pending front buffer rendering, but we aren't querying for a
1480 * front buffer. If the front buffer we have is a fake front buffer,
1481 * the X server is going to throw it away when it processes the query.
1482 * So before doing the query, make sure all the pending drawing has
1483 * landed in the real front buffer.
1484 */
1485 intel_batchbuffer_flush(brw);
1486 intel_flush_front(&brw->ctx);
1487 }
1488
1489 if (back_rb) {
1490 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1491 attachments[i++] = intel_bits_per_pixel(back_rb);
1492 }
1493
1494 assert(i <= ARRAY_SIZE(attachments));
1495
1496 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1497 &drawable->w,
1498 &drawable->h,
1499 attachments, i / 2,
1500 buffer_count,
1501 drawable->loaderPrivate);
1502 }
1503
1504 /**
1505 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1506 *
1507 * This is called from intel_update_renderbuffers().
1508 *
1509 * \par Note:
1510 * DRI buffers whose attachment point is DRI2BufferStencil or
1511 * DRI2BufferDepthStencil are handled as special cases.
1512 *
1513 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1514 * that is passed to drm_intel_bo_gem_create_from_name().
1515 *
1516 * \see intel_update_renderbuffers()
1517 */
1518 static void
1519 intel_process_dri2_buffer(struct brw_context *brw,
1520 __DRIdrawable *drawable,
1521 __DRIbuffer *buffer,
1522 struct intel_renderbuffer *rb,
1523 const char *buffer_name)
1524 {
1525 struct gl_framebuffer *fb = drawable->driverPrivate;
1526 drm_intel_bo *bo;
1527
1528 if (!rb)
1529 return;
1530
1531 unsigned num_samples = rb->Base.Base.NumSamples;
1532
1533 /* We try to avoid closing and reopening the same BO name, because the first
1534 * use of a mapping of the buffer involves a bunch of page faulting which is
1535 * moderately expensive.
1536 */
1537 struct intel_mipmap_tree *last_mt;
1538 if (num_samples == 0)
1539 last_mt = rb->mt;
1540 else
1541 last_mt = rb->singlesample_mt;
1542
1543 uint32_t old_name = 0;
1544 if (last_mt) {
1545 /* The bo already has a name because the miptree was created by a
1546 * previous call to intel_process_dri2_buffer(). If a bo already has a
1547 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1548 * create a new name.
1549 */
1550 drm_intel_bo_flink(last_mt->bo, &old_name);
1551 }
1552
1553 if (old_name == buffer->name)
1554 return;
1555
1556 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1557 fprintf(stderr,
1558 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1559 buffer->name, buffer->attachment,
1560 buffer->cpp, buffer->pitch);
1561 }
1562
1563 bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1564 buffer->name);
1565 if (!bo) {
1566 fprintf(stderr,
1567 "Failed to open BO for returned DRI2 buffer "
1568 "(%dx%d, %s, named %d).\n"
1569 "This is likely a bug in the X Server that will lead to a "
1570 "crash soon.\n",
1571 drawable->w, drawable->h, buffer_name, buffer->name);
1572 return;
1573 }
1574
1575 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1576 drawable->w, drawable->h,
1577 buffer->pitch);
1578
1579 if (_mesa_is_front_buffer_drawing(fb) &&
1580 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1581 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1582 rb->Base.Base.NumSamples > 1) {
1583 intel_renderbuffer_upsample(brw, rb);
1584 }
1585
1586 assert(rb->mt);
1587
1588 drm_intel_bo_unreference(bo);
1589 }
1590
1591 /**
1592 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1593 *
1594 * To determine which DRI buffers to request, examine the renderbuffers
1595 * attached to the drawable's framebuffer. Then request the buffers from
1596 * the image loader
1597 *
1598 * This is called from intel_update_renderbuffers().
1599 *
1600 * \param drawable Drawable whose buffers are queried.
1601 * \param buffers [out] List of buffers returned by DRI2 query.
1602 * \param buffer_count [out] Number of buffers returned.
1603 *
1604 * \see intel_update_renderbuffers()
1605 */
1606
1607 static void
1608 intel_update_image_buffer(struct brw_context *intel,
1609 __DRIdrawable *drawable,
1610 struct intel_renderbuffer *rb,
1611 __DRIimage *buffer,
1612 enum __DRIimageBufferMask buffer_type)
1613 {
1614 struct gl_framebuffer *fb = drawable->driverPrivate;
1615
1616 if (!rb || !buffer->bo)
1617 return;
1618
1619 unsigned num_samples = rb->Base.Base.NumSamples;
1620
1621 /* Check and see if we're already bound to the right
1622 * buffer object
1623 */
1624 struct intel_mipmap_tree *last_mt;
1625 if (num_samples == 0)
1626 last_mt = rb->mt;
1627 else
1628 last_mt = rb->singlesample_mt;
1629
1630 if (last_mt && last_mt->bo == buffer->bo)
1631 return;
1632
1633 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1634 buffer->width, buffer->height,
1635 buffer->pitch);
1636
1637 if (_mesa_is_front_buffer_drawing(fb) &&
1638 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1639 rb->Base.Base.NumSamples > 1) {
1640 intel_renderbuffer_upsample(intel, rb);
1641 }
1642 }
1643
1644 static void
1645 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1646 {
1647 struct gl_framebuffer *fb = drawable->driverPrivate;
1648 __DRIscreen *screen = brw->intelScreen->driScrnPriv;
1649 struct intel_renderbuffer *front_rb;
1650 struct intel_renderbuffer *back_rb;
1651 struct __DRIimageList images;
1652 unsigned int format;
1653 uint32_t buffer_mask = 0;
1654 int ret;
1655
1656 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1657 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1658
1659 if (back_rb)
1660 format = intel_rb_format(back_rb);
1661 else if (front_rb)
1662 format = intel_rb_format(front_rb);
1663 else
1664 return;
1665
1666 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1667 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1668 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1669 }
1670
1671 if (back_rb)
1672 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1673
1674 ret = screen->image.loader->getBuffers(drawable,
1675 driGLFormatToImageFormat(format),
1676 &drawable->dri2.stamp,
1677 drawable->loaderPrivate,
1678 buffer_mask,
1679 &images);
1680 if (!ret)
1681 return;
1682
1683 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1684 drawable->w = images.front->width;
1685 drawable->h = images.front->height;
1686 intel_update_image_buffer(brw,
1687 drawable,
1688 front_rb,
1689 images.front,
1690 __DRI_IMAGE_BUFFER_FRONT);
1691 }
1692 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1693 drawable->w = images.back->width;
1694 drawable->h = images.back->height;
1695 intel_update_image_buffer(brw,
1696 drawable,
1697 back_rb,
1698 images.back,
1699 __DRI_IMAGE_BUFFER_BACK);
1700 }
1701 }