mesa: use gl_program for CurrentProgram rather than gl_shader_program
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46
47 #include "vbo/vbo_context.h"
48
49 #include "drivers/common/driverfuncs.h"
50 #include "drivers/common/meta.h"
51 #include "utils.h"
52
53 #include "brw_context.h"
54 #include "brw_defines.h"
55 #include "brw_blorp.h"
56 #include "brw_compiler.h"
57 #include "brw_draw.h"
58 #include "brw_state.h"
59
60 #include "intel_batchbuffer.h"
61 #include "intel_buffer_objects.h"
62 #include "intel_buffers.h"
63 #include "intel_fbo.h"
64 #include "intel_mipmap_tree.h"
65 #include "intel_pixel.h"
66 #include "intel_image.h"
67 #include "intel_tex.h"
68 #include "intel_tex_obj.h"
69
70 #include "swrast_setup/swrast_setup.h"
71 #include "tnl/tnl.h"
72 #include "tnl/t_pipeline.h"
73 #include "util/ralloc.h"
74 #include "util/debug.h"
75 #include "isl/isl.h"
76
77 /***************************************
78 * Mesa's Driver Functions
79 ***************************************/
80
81 const char *const brw_vendor_string = "Intel Open Source Technology Center";
82
83 static const char *
84 get_bsw_model(const struct intel_screen *screen)
85 {
86 switch (screen->eu_total) {
87 case 16:
88 return "405";
89 case 12:
90 return "400";
91 default:
92 return " ";
93 }
94 }
95
96 const char *
97 brw_get_renderer_string(const struct intel_screen *screen)
98 {
99 const char *chipset;
100 static char buffer[128];
101 char *bsw = NULL;
102
103 switch (screen->deviceID) {
104 #undef CHIPSET
105 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
106 #include "pci_ids/i965_pci_ids.h"
107 default:
108 chipset = "Unknown Intel Chipset";
109 break;
110 }
111
112 /* Braswell branding is funny, so we have to fix it up here */
113 if (screen->deviceID == 0x22B1) {
114 bsw = strdup(chipset);
115 char *needle = strstr(bsw, "XXX");
116 if (needle) {
117 memcpy(needle, get_bsw_model(screen), 3);
118 chipset = bsw;
119 }
120 }
121
122 (void) driGetRendererString(buffer, chipset, 0);
123 free(bsw);
124 return buffer;
125 }
126
127 static const GLubyte *
128 intel_get_string(struct gl_context * ctx, GLenum name)
129 {
130 const struct brw_context *const brw = brw_context(ctx);
131
132 switch (name) {
133 case GL_VENDOR:
134 return (GLubyte *) brw_vendor_string;
135
136 case GL_RENDERER:
137 return
138 (GLubyte *) brw_get_renderer_string(brw->screen);
139
140 default:
141 return NULL;
142 }
143 }
144
145 static void
146 intel_viewport(struct gl_context *ctx)
147 {
148 struct brw_context *brw = brw_context(ctx);
149 __DRIcontext *driContext = brw->driContext;
150
151 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
152 if (driContext->driDrawablePriv)
153 dri2InvalidateDrawable(driContext->driDrawablePriv);
154 if (driContext->driReadablePriv)
155 dri2InvalidateDrawable(driContext->driReadablePriv);
156 }
157 }
158
159 static void
160 intel_update_framebuffer(struct gl_context *ctx,
161 struct gl_framebuffer *fb)
162 {
163 struct brw_context *brw = brw_context(ctx);
164
165 /* Quantize the derived default number of samples
166 */
167 fb->DefaultGeometry._NumSamples =
168 intel_quantize_num_samples(brw->screen,
169 fb->DefaultGeometry.NumSamples);
170 }
171
172 static bool
173 intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo)
174 {
175 const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
176 bool found = false;
177
178 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
179 const struct intel_renderbuffer *irb =
180 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
181
182 if (irb && irb->mt->bo == bo) {
183 found = brw->draw_aux_buffer_disabled[i] = true;
184 }
185 }
186
187 return found;
188 }
189
190 /* On Gen9 color buffers may be compressed by the hardware (lossless
191 * compression). There are, however, format restrictions and care needs to be
192 * taken that the sampler engine is capable for re-interpreting a buffer with
193 * format different the buffer was originally written with.
194 *
195 * For example, SRGB formats are not compressible and the sampler engine isn't
196 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
197 * color buffer needs to be resolved so that the sampling surface can be
198 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
199 * set).
200 */
201 static bool
202 intel_texture_view_requires_resolve(struct brw_context *brw,
203 struct intel_texture_object *intel_tex)
204 {
205 if (brw->gen < 9 ||
206 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
207 return false;
208
209 const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format);
210
211 if (isl_format_supports_lossless_compression(&brw->screen->devinfo,
212 brw_format))
213 return false;
214
215 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
216 _mesa_get_format_name(intel_tex->_Format),
217 _mesa_get_format_name(intel_tex->mt->format));
218
219 if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
220 perf_debug("Sampling renderbuffer with non-compressible format - "
221 "turning off compression");
222
223 return true;
224 }
225
226 static void
227 intel_update_state(struct gl_context * ctx, GLuint new_state)
228 {
229 struct brw_context *brw = brw_context(ctx);
230 struct intel_texture_object *tex_obj;
231 struct intel_renderbuffer *depth_irb;
232
233 if (ctx->swrast_context)
234 _swrast_InvalidateState(ctx, new_state);
235 _vbo_InvalidateState(ctx, new_state);
236
237 brw->NewGLState |= new_state;
238
239 _mesa_unlock_context_textures(ctx);
240
241 /* Resolve the depth buffer's HiZ buffer. */
242 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
243 if (depth_irb)
244 intel_renderbuffer_resolve_hiz(brw, depth_irb);
245
246 memset(brw->draw_aux_buffer_disabled, 0,
247 sizeof(brw->draw_aux_buffer_disabled));
248
249 /* Resolve depth buffer and render cache of each enabled texture. */
250 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
251 for (int i = 0; i <= maxEnabledUnit; i++) {
252 if (!ctx->Texture.Unit[i]._Current)
253 continue;
254 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
255 if (!tex_obj || !tex_obj->mt)
256 continue;
257 if (intel_miptree_sample_with_hiz(brw, tex_obj->mt))
258 intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt);
259 else
260 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
261 /* Sampling engine understands lossless compression and resolving
262 * those surfaces should be skipped for performance reasons.
263 */
264 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
265 0 : INTEL_MIPTREE_IGNORE_CCS_E;
266 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags);
267 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
268
269 if (tex_obj->base.StencilSampling ||
270 tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
271 intel_update_r8stencil(brw, tex_obj->mt);
272 }
273 }
274
275 /* Resolve color for each active shader image. */
276 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
277 const struct gl_program *prog = ctx->_Shader->CurrentProgram[i];
278
279 if (unlikely(prog && prog->info.num_images)) {
280 for (unsigned j = 0; j < prog->info.num_images; j++) {
281 struct gl_image_unit *u =
282 &ctx->ImageUnits[prog->sh.ImageUnits[j]];
283 tex_obj = intel_texture_object(u->TexObj);
284
285 if (tex_obj && tex_obj->mt) {
286 /* Access to images is implemented using indirect messages
287 * against data port. Normal render target write understands
288 * lossless compression but unfortunately the typed/untyped
289 * read/write interface doesn't. Therefore even lossless
290 * compressed surfaces need to be resolved prior to accessing
291 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
292 */
293 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0);
294
295 if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
296 intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
297 perf_debug("Using renderbuffer as shader image - turning "
298 "off lossless compression");
299 }
300
301 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
302 }
303 }
304 }
305 }
306
307 /* Resolve color buffers for non-coherent framebuffer fetch. */
308 if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
309 ctx->FragmentProgram._Current &&
310 ctx->FragmentProgram._Current->info.outputs_read) {
311 const struct gl_framebuffer *fb = ctx->DrawBuffer;
312
313 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
314 const struct intel_renderbuffer *irb =
315 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
316
317 if (irb &&
318 intel_miptree_resolve_color(
319 brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count,
320 INTEL_MIPTREE_IGNORE_CCS_E))
321 brw_render_cache_set_check_flush(brw, irb->mt->bo);
322 }
323 }
324
325 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
326 * single-sampled color renderbuffers because the CCS buffer isn't
327 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
328 * enabled because otherwise the surface state will be programmed with the
329 * linear equivalent format anyway.
330 */
331 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
332 struct gl_framebuffer *fb = ctx->DrawBuffer;
333 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
334 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
335
336 if (rb == NULL)
337 continue;
338
339 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
340 struct intel_mipmap_tree *mt = irb->mt;
341
342 if (mt == NULL ||
343 mt->num_samples > 1 ||
344 _mesa_get_srgb_format_linear(mt->format) == mt->format)
345 continue;
346
347 /* Lossless compression is not supported for SRGB formats, it
348 * should be impossible to get here with such surfaces.
349 */
350 assert(!intel_miptree_is_lossless_compressed(brw, mt));
351 intel_miptree_all_slices_resolve_color(brw, mt, 0);
352 brw_render_cache_set_check_flush(brw, mt->bo);
353 }
354 }
355
356 _mesa_lock_context_textures(ctx);
357
358 if (new_state & _NEW_BUFFERS) {
359 intel_update_framebuffer(ctx, ctx->DrawBuffer);
360 if (ctx->DrawBuffer != ctx->ReadBuffer)
361 intel_update_framebuffer(ctx, ctx->ReadBuffer);
362 }
363 }
364
365 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
366
367 static void
368 intel_flush_front(struct gl_context *ctx)
369 {
370 struct brw_context *brw = brw_context(ctx);
371 __DRIcontext *driContext = brw->driContext;
372 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
373 __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
374
375 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
376 if (flushFront(dri_screen) && driDrawable &&
377 driDrawable->loaderPrivate) {
378
379 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
380 *
381 * This potentially resolves both front and back buffer. It
382 * is unnecessary to resolve the back, but harms nothing except
383 * performance. And no one cares about front-buffer render
384 * performance.
385 */
386 intel_resolve_for_dri2_flush(brw, driDrawable);
387 intel_batchbuffer_flush(brw);
388
389 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
390
391 /* We set the dirty bit in intel_prepare_render() if we're
392 * front buffer rendering once we get there.
393 */
394 brw->front_buffer_dirty = false;
395 }
396 }
397 }
398
399 static void
400 intel_glFlush(struct gl_context *ctx)
401 {
402 struct brw_context *brw = brw_context(ctx);
403
404 intel_batchbuffer_flush(brw);
405 intel_flush_front(ctx);
406
407 brw->need_flush_throttle = true;
408 }
409
410 static void
411 intel_finish(struct gl_context * ctx)
412 {
413 struct brw_context *brw = brw_context(ctx);
414
415 intel_glFlush(ctx);
416
417 if (brw->batch.last_bo)
418 drm_intel_bo_wait_rendering(brw->batch.last_bo);
419 }
420
421 static void
422 brw_init_driver_functions(struct brw_context *brw,
423 struct dd_function_table *functions)
424 {
425 _mesa_init_driver_functions(functions);
426
427 /* GLX uses DRI2 invalidate events to handle window resizing.
428 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
429 * which doesn't provide a mechanism for snooping the event queues.
430 *
431 * So EGL still relies on viewport hacks to handle window resizing.
432 * This should go away with DRI3000.
433 */
434 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
435 functions->Viewport = intel_viewport;
436
437 functions->Flush = intel_glFlush;
438 functions->Finish = intel_finish;
439 functions->GetString = intel_get_string;
440 functions->UpdateState = intel_update_state;
441
442 intelInitTextureFuncs(functions);
443 intelInitTextureImageFuncs(functions);
444 intelInitTextureSubImageFuncs(functions);
445 intelInitTextureCopyImageFuncs(functions);
446 intelInitCopyImageFuncs(functions);
447 intelInitClearFuncs(functions);
448 intelInitBufferFuncs(functions);
449 intelInitPixelFuncs(functions);
450 intelInitBufferObjectFuncs(functions);
451 brw_init_syncobj_functions(functions);
452 brw_init_object_purgeable_functions(functions);
453
454 brwInitFragProgFuncs( functions );
455 brw_init_common_queryobj_functions(functions);
456 if (brw->gen >= 8 || brw->is_haswell)
457 hsw_init_queryobj_functions(functions);
458 else if (brw->gen >= 6)
459 gen6_init_queryobj_functions(functions);
460 else
461 gen4_init_queryobj_functions(functions);
462 brw_init_compute_functions(functions);
463 if (brw->gen >= 7)
464 brw_init_conditional_render_functions(functions);
465
466 functions->QueryInternalFormat = brw_query_internal_format;
467
468 functions->NewTransformFeedback = brw_new_transform_feedback;
469 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
470 if (can_do_mi_math_and_lrr(brw->screen)) {
471 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
472 functions->EndTransformFeedback = hsw_end_transform_feedback;
473 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
474 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
475 } else if (brw->gen >= 7) {
476 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
477 functions->EndTransformFeedback = gen7_end_transform_feedback;
478 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
479 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
480 functions->GetTransformFeedbackVertexCount =
481 brw_get_transform_feedback_vertex_count;
482 } else {
483 functions->BeginTransformFeedback = brw_begin_transform_feedback;
484 functions->EndTransformFeedback = brw_end_transform_feedback;
485 }
486
487 if (brw->gen >= 6)
488 functions->GetSamplePosition = gen6_get_sample_position;
489 }
490
491 static void
492 brw_initialize_context_constants(struct brw_context *brw)
493 {
494 struct gl_context *ctx = &brw->ctx;
495 const struct brw_compiler *compiler = brw->screen->compiler;
496
497 const bool stage_exists[MESA_SHADER_STAGES] = {
498 [MESA_SHADER_VERTEX] = true,
499 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
500 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
501 [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
502 [MESA_SHADER_FRAGMENT] = true,
503 [MESA_SHADER_COMPUTE] =
504 ((ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE) &&
505 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
506 (ctx->API == API_OPENGLES2 &&
507 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
508 _mesa_extension_override_enables.ARB_compute_shader,
509 };
510
511 unsigned num_stages = 0;
512 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
513 if (stage_exists[i])
514 num_stages++;
515 }
516
517 unsigned max_samplers =
518 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
519
520 ctx->Const.MaxDualSourceDrawBuffers = 1;
521 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
522 ctx->Const.MaxCombinedShaderOutputResources =
523 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
524
525 ctx->Const.QueryCounterBits.Timestamp = 36;
526
527 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
528 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
529 if (brw->gen >= 7) {
530 ctx->Const.MaxRenderbufferSize = 16384;
531 ctx->Const.MaxTextureLevels = MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS);
532 ctx->Const.MaxCubeTextureLevels = 15; /* 16384 */
533 } else {
534 ctx->Const.MaxRenderbufferSize = 8192;
535 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
536 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
537 }
538 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
539 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
540 ctx->Const.MaxTextureMbytes = 1536;
541 ctx->Const.MaxTextureRectSize = 1 << 12;
542 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
543 ctx->Const.MaxTextureLodBias = 15.0;
544 ctx->Const.StripTextureBorder = true;
545 if (brw->gen >= 7) {
546 ctx->Const.MaxProgramTextureGatherComponents = 4;
547 ctx->Const.MinProgramTextureGatherOffset = -32;
548 ctx->Const.MaxProgramTextureGatherOffset = 31;
549 } else if (brw->gen == 6) {
550 ctx->Const.MaxProgramTextureGatherComponents = 1;
551 ctx->Const.MinProgramTextureGatherOffset = -8;
552 ctx->Const.MaxProgramTextureGatherOffset = 7;
553 }
554
555 ctx->Const.MaxUniformBlockSize = 65536;
556
557 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
558 struct gl_program_constants *prog = &ctx->Const.Program[i];
559
560 if (!stage_exists[i])
561 continue;
562
563 prog->MaxTextureImageUnits = max_samplers;
564
565 prog->MaxUniformBlocks = BRW_MAX_UBO;
566 prog->MaxCombinedUniformComponents =
567 prog->MaxUniformComponents +
568 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
569
570 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
571 prog->MaxAtomicBuffers = BRW_MAX_ABO;
572 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
573 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
574 }
575
576 ctx->Const.MaxTextureUnits =
577 MIN2(ctx->Const.MaxTextureCoordUnits,
578 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
579
580 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
581 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
582 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
583 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
584 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
585 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
586 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
587
588
589 /* Hardware only supports a limited number of transform feedback buffers.
590 * So we need to override the Mesa default (which is based only on software
591 * limits).
592 */
593 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
594
595 /* On Gen6, in the worst case, we use up one binding table entry per
596 * transform feedback component (see comments above the definition of
597 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
598 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
599 * BRW_MAX_SOL_BINDINGS.
600 *
601 * In "separate components" mode, we need to divide this value by
602 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
603 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
604 */
605 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
606 ctx->Const.MaxTransformFeedbackSeparateComponents =
607 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
608
609 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
610 !can_do_mi_math_and_lrr(brw->screen);
611
612 int max_samples;
613 const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
614 const int clamp_max_samples =
615 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
616
617 if (clamp_max_samples < 0) {
618 max_samples = msaa_modes[0];
619 } else {
620 /* Select the largest supported MSAA mode that does not exceed
621 * clamp_max_samples.
622 */
623 max_samples = 0;
624 for (int i = 0; msaa_modes[i] != 0; ++i) {
625 if (msaa_modes[i] <= clamp_max_samples) {
626 max_samples = msaa_modes[i];
627 break;
628 }
629 }
630 }
631
632 ctx->Const.MaxSamples = max_samples;
633 ctx->Const.MaxColorTextureSamples = max_samples;
634 ctx->Const.MaxDepthTextureSamples = max_samples;
635 ctx->Const.MaxIntegerSamples = max_samples;
636 ctx->Const.MaxImageSamples = 0;
637
638 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
639 * to map indices of rectangular grid to sample numbers within a pixel.
640 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
641 * extension implementation. For more details see the comment above
642 * gen6_set_sample_maps() definition.
643 */
644 gen6_set_sample_maps(ctx);
645
646 ctx->Const.MinLineWidth = 1.0;
647 ctx->Const.MinLineWidthAA = 1.0;
648 if (brw->gen >= 6) {
649 ctx->Const.MaxLineWidth = 7.375;
650 ctx->Const.MaxLineWidthAA = 7.375;
651 ctx->Const.LineWidthGranularity = 0.125;
652 } else {
653 ctx->Const.MaxLineWidth = 7.0;
654 ctx->Const.MaxLineWidthAA = 7.0;
655 ctx->Const.LineWidthGranularity = 0.5;
656 }
657
658 /* For non-antialiased lines, we have to round the line width to the
659 * nearest whole number. Make sure that we don't advertise a line
660 * width that, when rounded, will be beyond the actual hardware
661 * maximum.
662 */
663 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
664
665 ctx->Const.MinPointSize = 1.0;
666 ctx->Const.MinPointSizeAA = 1.0;
667 ctx->Const.MaxPointSize = 255.0;
668 ctx->Const.MaxPointSizeAA = 255.0;
669 ctx->Const.PointSizeGranularity = 1.0;
670
671 if (brw->gen >= 5 || brw->is_g4x)
672 ctx->Const.MaxClipPlanes = 8;
673
674 ctx->Const.GLSLTessLevelsAsInputs = true;
675 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8;
676 ctx->Const.LowerTESPatchVerticesIn = true;
677 ctx->Const.PrimitiveRestartForPatches = true;
678
679 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
680 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
681 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
682 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
683 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
684 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
685 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
686 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
687 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
688 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
689 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
690 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
691 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
692 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
693
694 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
695 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
696 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
697 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
698 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
699 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
700 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
701 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
702 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
703 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
704 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
705
706 /* Fragment shaders use real, 32-bit twos-complement integers for all
707 * integer types.
708 */
709 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
710 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
711 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
712 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
713 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
714
715 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
716 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
717 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
718 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
719 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
720
721 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
722 * but we're not sure how it's actually done for vertex order,
723 * that affect provoking vertex decision. Always use last vertex
724 * convention for quad primitive which works as expected for now.
725 */
726 if (brw->gen >= 6)
727 ctx->Const.QuadsFollowProvokingVertexConvention = false;
728
729 ctx->Const.NativeIntegers = true;
730 ctx->Const.VertexID_is_zero_based = true;
731
732 /* Regarding the CMP instruction, the Ivybridge PRM says:
733 *
734 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
735 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
736 * 0xFFFFFFFF) is assigned to dst."
737 *
738 * but PRMs for earlier generations say
739 *
740 * "In dword format, one GRF may store up to 8 results. When the register
741 * is used later as a vector of Booleans, as only LSB at each channel
742 * contains meaning [sic] data, software should make sure all higher bits
743 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
744 *
745 * We select the representation of a true boolean uniform to be ~0, and fix
746 * the results of Gen <= 5 CMP instruction's with -(result & 1).
747 */
748 ctx->Const.UniformBooleanTrue = ~0;
749
750 /* From the gen4 PRM, volume 4 page 127:
751 *
752 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
753 * the base address of the first element of the surface, computed in
754 * software by adding the surface base address to the byte offset of
755 * the element in the buffer."
756 *
757 * However, unaligned accesses are slower, so enforce buffer alignment.
758 */
759 ctx->Const.UniformBufferOffsetAlignment = 16;
760
761 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
762 * that we can safely have the CPU and GPU writing the same SSBO on
763 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
764 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
765 * be updating disjoint regions of the buffer simultaneously and that will
766 * break if the regions overlap the same cacheline.
767 */
768 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
769 ctx->Const.TextureBufferOffsetAlignment = 16;
770 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
771
772 if (brw->gen >= 6) {
773 ctx->Const.MaxVarying = 32;
774 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
775 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
776 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
777 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
778 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
779 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
780 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
781 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
782 }
783
784 /* We want the GLSL compiler to emit code that uses condition codes */
785 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
786 ctx->Const.ShaderCompilerOptions[i] =
787 brw->screen->compiler->glsl_compiler_options[i];
788 }
789
790 if (brw->gen >= 7) {
791 ctx->Const.MaxViewportWidth = 32768;
792 ctx->Const.MaxViewportHeight = 32768;
793 }
794
795 /* ARB_viewport_array, OES_viewport_array */
796 if (brw->gen >= 6) {
797 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
798 ctx->Const.ViewportSubpixelBits = 0;
799
800 /* Cast to float before negating because MaxViewportWidth is unsigned.
801 */
802 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
803 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
804 }
805
806 /* ARB_gpu_shader5 */
807 if (brw->gen >= 7)
808 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
809
810 /* ARB_framebuffer_no_attachments */
811 ctx->Const.MaxFramebufferWidth = 16384;
812 ctx->Const.MaxFramebufferHeight = 16384;
813 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
814 ctx->Const.MaxFramebufferSamples = max_samples;
815
816 /* OES_primitive_bounding_box */
817 ctx->Const.NoPrimitiveBoundingBoxOutput = true;
818 }
819
820 static void
821 brw_initialize_cs_context_constants(struct brw_context *brw)
822 {
823 struct gl_context *ctx = &brw->ctx;
824 const struct intel_screen *screen = brw->screen;
825 struct gen_device_info *devinfo = &brw->screen->devinfo;
826
827 /* FINISHME: Do this for all platforms that the kernel supports */
828 if (brw->is_cherryview &&
829 screen->subslice_total > 0 && screen->eu_total > 0) {
830 /* Logical CS threads = EUs per subslice * 7 threads per EU */
831 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
832
833 /* Fuse configurations may give more threads than expected, never less. */
834 if (max_cs_threads > devinfo->max_cs_threads)
835 devinfo->max_cs_threads = max_cs_threads;
836 }
837
838 /* Maximum number of scalar compute shader invocations that can be run in
839 * parallel in the same subslice assuming SIMD32 dispatch.
840 *
841 * We don't advertise more than 64 threads, because we are limited to 64 by
842 * our usage of thread_width_max in the gpgpu walker command. This only
843 * currently impacts Haswell, which otherwise might be able to advertise 70
844 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
845 * required the number of invocation needed for ARB_compute_shader.
846 */
847 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
848 const uint32_t max_invocations = 32 * max_threads;
849 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
850 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
851 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
852 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
853 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
854 }
855
856 /**
857 * Process driconf (drirc) options, setting appropriate context flags.
858 *
859 * intelInitExtensions still pokes at optionCache directly, in order to
860 * avoid advertising various extensions. No flags are set, so it makes
861 * sense to continue doing that there.
862 */
863 static void
864 brw_process_driconf_options(struct brw_context *brw)
865 {
866 struct gl_context *ctx = &brw->ctx;
867
868 driOptionCache *options = &brw->optionCache;
869 driParseConfigFiles(options, &brw->screen->optionCache,
870 brw->driContext->driScreenPriv->myNum, "i965");
871
872 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
873 switch (bo_reuse_mode) {
874 case DRI_CONF_BO_REUSE_DISABLED:
875 break;
876 case DRI_CONF_BO_REUSE_ALL:
877 intel_bufmgr_gem_enable_reuse(brw->bufmgr);
878 break;
879 }
880
881 if (!driQueryOptionb(options, "hiz")) {
882 brw->has_hiz = false;
883 /* On gen6, you can only do separate stencil with HIZ. */
884 if (brw->gen == 6)
885 brw->has_separate_stencil = false;
886 }
887
888 if (driQueryOptionb(options, "always_flush_batch")) {
889 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
890 brw->always_flush_batch = true;
891 }
892
893 if (driQueryOptionb(options, "always_flush_cache")) {
894 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
895 brw->always_flush_cache = true;
896 }
897
898 if (driQueryOptionb(options, "disable_throttling")) {
899 fprintf(stderr, "disabling flush throttling\n");
900 brw->disable_throttling = true;
901 }
902
903 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
904
905 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
906 brw->screen->compiler->precise_trig = true;
907
908 ctx->Const.ForceGLSLExtensionsWarn =
909 driQueryOptionb(options, "force_glsl_extensions_warn");
910
911 ctx->Const.DisableGLSLLineContinuations =
912 driQueryOptionb(options, "disable_glsl_line_continuations");
913
914 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
915 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
916
917 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
918
919 brw->dual_color_blend_by_location =
920 driQueryOptionb(options, "dual_color_blend_by_location");
921 }
922
923 GLboolean
924 brwCreateContext(gl_api api,
925 const struct gl_config *mesaVis,
926 __DRIcontext *driContextPriv,
927 unsigned major_version,
928 unsigned minor_version,
929 uint32_t flags,
930 bool notify_reset,
931 unsigned *dri_ctx_error,
932 void *sharedContextPrivate)
933 {
934 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
935 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
936 const struct gen_device_info *devinfo = &screen->devinfo;
937 struct dd_function_table functions;
938
939 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
940 * provides us with context reset notifications.
941 */
942 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
943 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
944
945 if (screen->has_context_reset_notification)
946 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
947
948 if (flags & ~allowed_flags) {
949 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
950 return false;
951 }
952
953 struct brw_context *brw = rzalloc(NULL, struct brw_context);
954 if (!brw) {
955 fprintf(stderr, "%s: failed to alloc context\n", __func__);
956 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
957 return false;
958 }
959
960 driContextPriv->driverPrivate = brw;
961 brw->driContext = driContextPriv;
962 brw->screen = screen;
963 brw->bufmgr = screen->bufmgr;
964
965 brw->gen = devinfo->gen;
966 brw->gt = devinfo->gt;
967 brw->is_g4x = devinfo->is_g4x;
968 brw->is_baytrail = devinfo->is_baytrail;
969 brw->is_haswell = devinfo->is_haswell;
970 brw->is_cherryview = devinfo->is_cherryview;
971 brw->is_broxton = devinfo->is_broxton;
972 brw->has_llc = devinfo->has_llc;
973 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
974 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
975 brw->has_pln = devinfo->has_pln;
976 brw->has_compr4 = devinfo->has_compr4;
977 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
978 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
979 brw->needs_unlit_centroid_workaround =
980 devinfo->needs_unlit_centroid_workaround;
981
982 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
983 brw->has_swizzling = screen->hw_has_swizzling;
984
985 isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling);
986
987 brw->vs.base.stage = MESA_SHADER_VERTEX;
988 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
989 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
990 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
991 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
992 if (brw->gen >= 8) {
993 gen8_init_vtable_surface_functions(brw);
994 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
995 } else if (brw->gen >= 7) {
996 gen7_init_vtable_surface_functions(brw);
997 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
998 } else if (brw->gen >= 6) {
999 gen6_init_vtable_surface_functions(brw);
1000 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
1001 } else {
1002 gen4_init_vtable_surface_functions(brw);
1003 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
1004 }
1005
1006 brw_init_driver_functions(brw, &functions);
1007
1008 if (notify_reset)
1009 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
1010
1011 struct gl_context *ctx = &brw->ctx;
1012
1013 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
1014 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1015 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
1016 intelDestroyContext(driContextPriv);
1017 return false;
1018 }
1019
1020 driContextSetFlags(ctx, flags);
1021
1022 /* Initialize the software rasterizer and helper modules.
1023 *
1024 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1025 * software fallbacks (which we have to support on legacy GL to do weird
1026 * glDrawPixels(), glBitmap(), and other functions).
1027 */
1028 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
1029 _swrast_CreateContext(ctx);
1030 }
1031
1032 _vbo_CreateContext(ctx);
1033 if (ctx->swrast_context) {
1034 _tnl_CreateContext(ctx);
1035 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
1036 _swsetup_CreateContext(ctx);
1037
1038 /* Configure swrast to match hardware characteristics: */
1039 _swrast_allow_pixel_fog(ctx, false);
1040 _swrast_allow_vertex_fog(ctx, true);
1041 }
1042
1043 _mesa_meta_init(ctx);
1044
1045 brw_process_driconf_options(brw);
1046
1047 if (INTEL_DEBUG & DEBUG_PERF)
1048 brw->perf_debug = true;
1049
1050 brw_initialize_cs_context_constants(brw);
1051 brw_initialize_context_constants(brw);
1052
1053 ctx->Const.ResetStrategy = notify_reset
1054 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
1055
1056 /* Reinitialize the context point state. It depends on ctx->Const values. */
1057 _mesa_init_point(ctx);
1058
1059 intel_fbo_init(brw);
1060
1061 intel_batchbuffer_init(&brw->batch, brw->bufmgr, brw->has_llc);
1062
1063 if (brw->gen >= 6) {
1064 /* Create a new hardware context. Using a hardware context means that
1065 * our GPU state will be saved/restored on context switch, allowing us
1066 * to assume that the GPU is in the same state we left it in.
1067 *
1068 * This is required for transform feedback buffer offsets, query objects,
1069 * and also allows us to reduce how much state we have to emit.
1070 */
1071 brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr);
1072
1073 if (!brw->hw_ctx) {
1074 fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
1075 intelDestroyContext(driContextPriv);
1076 return false;
1077 }
1078 }
1079
1080 if (brw_init_pipe_control(brw, devinfo)) {
1081 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1082 intelDestroyContext(driContextPriv);
1083 return false;
1084 }
1085
1086 brw_init_state(brw);
1087
1088 intelInitExtensions(ctx);
1089
1090 brw_init_surface_formats(brw);
1091
1092 if (brw->gen >= 6)
1093 brw_blorp_init(brw);
1094
1095 brw->urb.size = devinfo->urb.size;
1096
1097 if (brw->gen == 6)
1098 brw->urb.gs_present = false;
1099
1100 brw->prim_restart.in_progress = false;
1101 brw->prim_restart.enable_cut_index = false;
1102 brw->gs.enabled = false;
1103 brw->sf.viewport_transform_enable = true;
1104 brw->clip.viewport_count = 1;
1105
1106 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1107
1108 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
1109
1110 brw->use_resource_streamer = screen->has_resource_streamer &&
1111 (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1112 env_var_as_boolean("INTEL_USE_GATHER", false));
1113
1114 ctx->VertexProgram._MaintainTnlProgram = true;
1115 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1116
1117 brw_draw_init( brw );
1118
1119 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1120 /* Turn on some extra GL_ARB_debug_output generation. */
1121 brw->perf_debug = true;
1122 }
1123
1124 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) {
1125 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1126 ctx->Const.RobustAccess = GL_TRUE;
1127 }
1128
1129 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1130 brw_init_shader_time(brw);
1131
1132 _mesa_compute_version(ctx);
1133
1134 _mesa_initialize_dispatch_tables(ctx);
1135 _mesa_initialize_vbo_vtxfmt(ctx);
1136
1137 vbo_use_buffer_objects(ctx);
1138 vbo_always_unmap_buffers(ctx);
1139
1140 return true;
1141 }
1142
1143 void
1144 intelDestroyContext(__DRIcontext * driContextPriv)
1145 {
1146 struct brw_context *brw =
1147 (struct brw_context *) driContextPriv->driverPrivate;
1148 struct gl_context *ctx = &brw->ctx;
1149
1150 /* Dump a final BMP in case the application doesn't call SwapBuffers */
1151 if (INTEL_DEBUG & DEBUG_AUB) {
1152 intel_batchbuffer_flush(brw);
1153 aub_dump_bmp(&brw->ctx);
1154 }
1155
1156 _mesa_meta_free(&brw->ctx);
1157
1158 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1159 /* Force a report. */
1160 brw->shader_time.report_time = 0;
1161
1162 brw_collect_and_report_shader_time(brw);
1163 brw_destroy_shader_time(brw);
1164 }
1165
1166 if (brw->gen >= 6)
1167 blorp_finish(&brw->blorp);
1168
1169 brw_destroy_state(brw);
1170 brw_draw_destroy(brw);
1171
1172 drm_intel_bo_unreference(brw->curbe.curbe_bo);
1173 if (brw->vs.base.scratch_bo)
1174 drm_intel_bo_unreference(brw->vs.base.scratch_bo);
1175 if (brw->tcs.base.scratch_bo)
1176 drm_intel_bo_unreference(brw->tcs.base.scratch_bo);
1177 if (brw->tes.base.scratch_bo)
1178 drm_intel_bo_unreference(brw->tes.base.scratch_bo);
1179 if (brw->gs.base.scratch_bo)
1180 drm_intel_bo_unreference(brw->gs.base.scratch_bo);
1181 if (brw->wm.base.scratch_bo)
1182 drm_intel_bo_unreference(brw->wm.base.scratch_bo);
1183
1184 gen7_reset_hw_bt_pool_offsets(brw);
1185 drm_intel_bo_unreference(brw->hw_bt_pool.bo);
1186 brw->hw_bt_pool.bo = NULL;
1187
1188 drm_intel_gem_context_destroy(brw->hw_ctx);
1189
1190 if (ctx->swrast_context) {
1191 _swsetup_DestroyContext(&brw->ctx);
1192 _tnl_DestroyContext(&brw->ctx);
1193 }
1194 _vbo_DestroyContext(&brw->ctx);
1195
1196 if (ctx->swrast_context)
1197 _swrast_DestroyContext(&brw->ctx);
1198
1199 brw_fini_pipe_control(brw);
1200 intel_batchbuffer_free(&brw->batch);
1201
1202 drm_intel_bo_unreference(brw->throttle_batch[1]);
1203 drm_intel_bo_unreference(brw->throttle_batch[0]);
1204 brw->throttle_batch[1] = NULL;
1205 brw->throttle_batch[0] = NULL;
1206
1207 driDestroyOptionCache(&brw->optionCache);
1208
1209 /* free the Mesa context */
1210 _mesa_free_context_data(&brw->ctx);
1211
1212 ralloc_free(brw);
1213 driContextPriv->driverPrivate = NULL;
1214 }
1215
1216 GLboolean
1217 intelUnbindContext(__DRIcontext * driContextPriv)
1218 {
1219 /* Unset current context and dispath table */
1220 _mesa_make_current(NULL, NULL, NULL);
1221
1222 return true;
1223 }
1224
1225 /**
1226 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1227 * on window system framebuffers.
1228 *
1229 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1230 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1231 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1232 * for a visual where you're guaranteed to be capable, but it turns out that
1233 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1234 * incapable ones, because there's no difference between the two in resources
1235 * used. Applications thus get built that accidentally rely on the default
1236 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1237 * great...
1238 *
1239 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1240 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1241 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1242 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1243 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1244 * and get no sRGB encode (assuming that both kinds of visual are available).
1245 * Thus our choice to support sRGB by default on our visuals for desktop would
1246 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1247 *
1248 * Unfortunately, renderbuffer setup happens before a context is created. So
1249 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1250 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1251 * yet), we go turn that back off before anyone finds out.
1252 */
1253 static void
1254 intel_gles3_srgb_workaround(struct brw_context *brw,
1255 struct gl_framebuffer *fb)
1256 {
1257 struct gl_context *ctx = &brw->ctx;
1258
1259 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1260 return;
1261
1262 /* Some day when we support the sRGB capable bit on visuals available for
1263 * GLES, we'll need to respect that and not disable things here.
1264 */
1265 fb->Visual.sRGBCapable = false;
1266 for (int i = 0; i < BUFFER_COUNT; i++) {
1267 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1268 if (rb)
1269 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1270 }
1271 }
1272
1273 GLboolean
1274 intelMakeCurrent(__DRIcontext * driContextPriv,
1275 __DRIdrawable * driDrawPriv,
1276 __DRIdrawable * driReadPriv)
1277 {
1278 struct brw_context *brw;
1279 GET_CURRENT_CONTEXT(curCtx);
1280
1281 if (driContextPriv)
1282 brw = (struct brw_context *) driContextPriv->driverPrivate;
1283 else
1284 brw = NULL;
1285
1286 /* According to the glXMakeCurrent() man page: "Pending commands to
1287 * the previous context, if any, are flushed before it is released."
1288 * But only flush if we're actually changing contexts.
1289 */
1290 if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1291 _mesa_flush(curCtx);
1292 }
1293
1294 if (driContextPriv) {
1295 struct gl_context *ctx = &brw->ctx;
1296 struct gl_framebuffer *fb, *readFb;
1297
1298 if (driDrawPriv == NULL) {
1299 fb = _mesa_get_incomplete_framebuffer();
1300 } else {
1301 fb = driDrawPriv->driverPrivate;
1302 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1303 }
1304
1305 if (driReadPriv == NULL) {
1306 readFb = _mesa_get_incomplete_framebuffer();
1307 } else {
1308 readFb = driReadPriv->driverPrivate;
1309 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1310 }
1311
1312 /* The sRGB workaround changes the renderbuffer's format. We must change
1313 * the format before the renderbuffer's miptree get's allocated, otherwise
1314 * the formats of the renderbuffer and its miptree will differ.
1315 */
1316 intel_gles3_srgb_workaround(brw, fb);
1317 intel_gles3_srgb_workaround(brw, readFb);
1318
1319 /* If the context viewport hasn't been initialized, force a call out to
1320 * the loader to get buffers so we have a drawable size for the initial
1321 * viewport. */
1322 if (!brw->ctx.ViewportInitialized)
1323 intel_prepare_render(brw);
1324
1325 _mesa_make_current(ctx, fb, readFb);
1326 } else {
1327 _mesa_make_current(NULL, NULL, NULL);
1328 }
1329
1330 return true;
1331 }
1332
1333 void
1334 intel_resolve_for_dri2_flush(struct brw_context *brw,
1335 __DRIdrawable *drawable)
1336 {
1337 if (brw->gen < 6) {
1338 /* MSAA and fast color clear are not supported, so don't waste time
1339 * checking whether a resolve is needed.
1340 */
1341 return;
1342 }
1343
1344 struct gl_framebuffer *fb = drawable->driverPrivate;
1345 struct intel_renderbuffer *rb;
1346
1347 /* Usually, only the back buffer will need to be downsampled. However,
1348 * the front buffer will also need it if the user has rendered into it.
1349 */
1350 static const gl_buffer_index buffers[2] = {
1351 BUFFER_BACK_LEFT,
1352 BUFFER_FRONT_LEFT,
1353 };
1354
1355 for (int i = 0; i < 2; ++i) {
1356 rb = intel_get_renderbuffer(fb, buffers[i]);
1357 if (rb == NULL || rb->mt == NULL)
1358 continue;
1359 if (rb->mt->num_samples <= 1) {
1360 assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
1361 rb->layer_count == 1);
1362 intel_miptree_resolve_color(brw, rb->mt, 0, 0, 1, 0);
1363 } else {
1364 intel_renderbuffer_downsample(brw, rb);
1365 }
1366 }
1367 }
1368
1369 static unsigned
1370 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1371 {
1372 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1373 }
1374
1375 static void
1376 intel_query_dri2_buffers(struct brw_context *brw,
1377 __DRIdrawable *drawable,
1378 __DRIbuffer **buffers,
1379 int *count);
1380
1381 static void
1382 intel_process_dri2_buffer(struct brw_context *brw,
1383 __DRIdrawable *drawable,
1384 __DRIbuffer *buffer,
1385 struct intel_renderbuffer *rb,
1386 const char *buffer_name);
1387
1388 static void
1389 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1390
1391 static void
1392 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1393 {
1394 struct gl_framebuffer *fb = drawable->driverPrivate;
1395 struct intel_renderbuffer *rb;
1396 __DRIbuffer *buffers = NULL;
1397 int i, count;
1398 const char *region_name;
1399
1400 /* Set this up front, so that in case our buffers get invalidated
1401 * while we're getting new buffers, we don't clobber the stamp and
1402 * thus ignore the invalidate. */
1403 drawable->lastStamp = drawable->dri2.stamp;
1404
1405 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1406 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1407
1408 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1409
1410 if (buffers == NULL)
1411 return;
1412
1413 for (i = 0; i < count; i++) {
1414 switch (buffers[i].attachment) {
1415 case __DRI_BUFFER_FRONT_LEFT:
1416 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1417 region_name = "dri2 front buffer";
1418 break;
1419
1420 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1421 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1422 region_name = "dri2 fake front buffer";
1423 break;
1424
1425 case __DRI_BUFFER_BACK_LEFT:
1426 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1427 region_name = "dri2 back buffer";
1428 break;
1429
1430 case __DRI_BUFFER_DEPTH:
1431 case __DRI_BUFFER_HIZ:
1432 case __DRI_BUFFER_DEPTH_STENCIL:
1433 case __DRI_BUFFER_STENCIL:
1434 case __DRI_BUFFER_ACCUM:
1435 default:
1436 fprintf(stderr,
1437 "unhandled buffer attach event, attachment type %d\n",
1438 buffers[i].attachment);
1439 return;
1440 }
1441
1442 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1443 }
1444
1445 }
1446
1447 void
1448 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1449 {
1450 struct brw_context *brw = context->driverPrivate;
1451 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1452
1453 /* Set this up front, so that in case our buffers get invalidated
1454 * while we're getting new buffers, we don't clobber the stamp and
1455 * thus ignore the invalidate. */
1456 drawable->lastStamp = drawable->dri2.stamp;
1457
1458 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1459 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1460
1461 if (dri_screen->image.loader)
1462 intel_update_image_buffers(brw, drawable);
1463 else
1464 intel_update_dri2_buffers(brw, drawable);
1465
1466 driUpdateFramebufferSize(&brw->ctx, drawable);
1467 }
1468
1469 /**
1470 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1471 * state is required.
1472 */
1473 void
1474 intel_prepare_render(struct brw_context *brw)
1475 {
1476 struct gl_context *ctx = &brw->ctx;
1477 __DRIcontext *driContext = brw->driContext;
1478 __DRIdrawable *drawable;
1479
1480 drawable = driContext->driDrawablePriv;
1481 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1482 if (drawable->lastStamp != drawable->dri2.stamp)
1483 intel_update_renderbuffers(driContext, drawable);
1484 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1485 }
1486
1487 drawable = driContext->driReadablePriv;
1488 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1489 if (drawable->lastStamp != drawable->dri2.stamp)
1490 intel_update_renderbuffers(driContext, drawable);
1491 driContext->dri2.read_stamp = drawable->dri2.stamp;
1492 }
1493
1494 /* If we're currently rendering to the front buffer, the rendering
1495 * that will happen next will probably dirty the front buffer. So
1496 * mark it as dirty here.
1497 */
1498 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1499 brw->front_buffer_dirty = true;
1500 }
1501
1502 /**
1503 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1504 *
1505 * To determine which DRI buffers to request, examine the renderbuffers
1506 * attached to the drawable's framebuffer. Then request the buffers with
1507 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1508 *
1509 * This is called from intel_update_renderbuffers().
1510 *
1511 * \param drawable Drawable whose buffers are queried.
1512 * \param buffers [out] List of buffers returned by DRI2 query.
1513 * \param buffer_count [out] Number of buffers returned.
1514 *
1515 * \see intel_update_renderbuffers()
1516 * \see DRI2GetBuffers()
1517 * \see DRI2GetBuffersWithFormat()
1518 */
1519 static void
1520 intel_query_dri2_buffers(struct brw_context *brw,
1521 __DRIdrawable *drawable,
1522 __DRIbuffer **buffers,
1523 int *buffer_count)
1524 {
1525 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1526 struct gl_framebuffer *fb = drawable->driverPrivate;
1527 int i = 0;
1528 unsigned attachments[8];
1529
1530 struct intel_renderbuffer *front_rb;
1531 struct intel_renderbuffer *back_rb;
1532
1533 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1534 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1535
1536 memset(attachments, 0, sizeof(attachments));
1537 if ((_mesa_is_front_buffer_drawing(fb) ||
1538 _mesa_is_front_buffer_reading(fb) ||
1539 !back_rb) && front_rb) {
1540 /* If a fake front buffer is in use, then querying for
1541 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1542 * the real front buffer to the fake front buffer. So before doing the
1543 * query, we need to make sure all the pending drawing has landed in the
1544 * real front buffer.
1545 */
1546 intel_batchbuffer_flush(brw);
1547 intel_flush_front(&brw->ctx);
1548
1549 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1550 attachments[i++] = intel_bits_per_pixel(front_rb);
1551 } else if (front_rb && brw->front_buffer_dirty) {
1552 /* We have pending front buffer rendering, but we aren't querying for a
1553 * front buffer. If the front buffer we have is a fake front buffer,
1554 * the X server is going to throw it away when it processes the query.
1555 * So before doing the query, make sure all the pending drawing has
1556 * landed in the real front buffer.
1557 */
1558 intel_batchbuffer_flush(brw);
1559 intel_flush_front(&brw->ctx);
1560 }
1561
1562 if (back_rb) {
1563 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1564 attachments[i++] = intel_bits_per_pixel(back_rb);
1565 }
1566
1567 assert(i <= ARRAY_SIZE(attachments));
1568
1569 *buffers =
1570 dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1571 &drawable->w,
1572 &drawable->h,
1573 attachments, i / 2,
1574 buffer_count,
1575 drawable->loaderPrivate);
1576 }
1577
1578 /**
1579 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1580 *
1581 * This is called from intel_update_renderbuffers().
1582 *
1583 * \par Note:
1584 * DRI buffers whose attachment point is DRI2BufferStencil or
1585 * DRI2BufferDepthStencil are handled as special cases.
1586 *
1587 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1588 * that is passed to drm_intel_bo_gem_create_from_name().
1589 *
1590 * \see intel_update_renderbuffers()
1591 */
1592 static void
1593 intel_process_dri2_buffer(struct brw_context *brw,
1594 __DRIdrawable *drawable,
1595 __DRIbuffer *buffer,
1596 struct intel_renderbuffer *rb,
1597 const char *buffer_name)
1598 {
1599 struct gl_framebuffer *fb = drawable->driverPrivate;
1600 drm_intel_bo *bo;
1601
1602 if (!rb)
1603 return;
1604
1605 unsigned num_samples = rb->Base.Base.NumSamples;
1606
1607 /* We try to avoid closing and reopening the same BO name, because the first
1608 * use of a mapping of the buffer involves a bunch of page faulting which is
1609 * moderately expensive.
1610 */
1611 struct intel_mipmap_tree *last_mt;
1612 if (num_samples == 0)
1613 last_mt = rb->mt;
1614 else
1615 last_mt = rb->singlesample_mt;
1616
1617 uint32_t old_name = 0;
1618 if (last_mt) {
1619 /* The bo already has a name because the miptree was created by a
1620 * previous call to intel_process_dri2_buffer(). If a bo already has a
1621 * name, then drm_intel_bo_flink() is a low-cost getter. It does not
1622 * create a new name.
1623 */
1624 drm_intel_bo_flink(last_mt->bo, &old_name);
1625 }
1626
1627 if (old_name == buffer->name)
1628 return;
1629
1630 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1631 fprintf(stderr,
1632 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1633 buffer->name, buffer->attachment,
1634 buffer->cpp, buffer->pitch);
1635 }
1636
1637 bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1638 buffer->name);
1639 if (!bo) {
1640 fprintf(stderr,
1641 "Failed to open BO for returned DRI2 buffer "
1642 "(%dx%d, %s, named %d).\n"
1643 "This is likely a bug in the X Server that will lead to a "
1644 "crash soon.\n",
1645 drawable->w, drawable->h, buffer_name, buffer->name);
1646 return;
1647 }
1648
1649 intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1650 drawable->w, drawable->h,
1651 buffer->pitch);
1652
1653 if (_mesa_is_front_buffer_drawing(fb) &&
1654 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1655 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1656 rb->Base.Base.NumSamples > 1) {
1657 intel_renderbuffer_upsample(brw, rb);
1658 }
1659
1660 assert(rb->mt);
1661
1662 drm_intel_bo_unreference(bo);
1663 }
1664
1665 /**
1666 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1667 *
1668 * To determine which DRI buffers to request, examine the renderbuffers
1669 * attached to the drawable's framebuffer. Then request the buffers from
1670 * the image loader
1671 *
1672 * This is called from intel_update_renderbuffers().
1673 *
1674 * \param drawable Drawable whose buffers are queried.
1675 * \param buffers [out] List of buffers returned by DRI2 query.
1676 * \param buffer_count [out] Number of buffers returned.
1677 *
1678 * \see intel_update_renderbuffers()
1679 */
1680
1681 static void
1682 intel_update_image_buffer(struct brw_context *intel,
1683 __DRIdrawable *drawable,
1684 struct intel_renderbuffer *rb,
1685 __DRIimage *buffer,
1686 enum __DRIimageBufferMask buffer_type)
1687 {
1688 struct gl_framebuffer *fb = drawable->driverPrivate;
1689
1690 if (!rb || !buffer->bo)
1691 return;
1692
1693 unsigned num_samples = rb->Base.Base.NumSamples;
1694
1695 /* Check and see if we're already bound to the right
1696 * buffer object
1697 */
1698 struct intel_mipmap_tree *last_mt;
1699 if (num_samples == 0)
1700 last_mt = rb->mt;
1701 else
1702 last_mt = rb->singlesample_mt;
1703
1704 if (last_mt && last_mt->bo == buffer->bo)
1705 return;
1706
1707 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1708 buffer->width, buffer->height,
1709 buffer->pitch);
1710
1711 if (_mesa_is_front_buffer_drawing(fb) &&
1712 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1713 rb->Base.Base.NumSamples > 1) {
1714 intel_renderbuffer_upsample(intel, rb);
1715 }
1716 }
1717
1718 static void
1719 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1720 {
1721 struct gl_framebuffer *fb = drawable->driverPrivate;
1722 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1723 struct intel_renderbuffer *front_rb;
1724 struct intel_renderbuffer *back_rb;
1725 struct __DRIimageList images;
1726 unsigned int format;
1727 uint32_t buffer_mask = 0;
1728 int ret;
1729
1730 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1731 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1732
1733 if (back_rb)
1734 format = intel_rb_format(back_rb);
1735 else if (front_rb)
1736 format = intel_rb_format(front_rb);
1737 else
1738 return;
1739
1740 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1741 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1742 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1743 }
1744
1745 if (back_rb)
1746 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1747
1748 ret = dri_screen->image.loader->getBuffers(drawable,
1749 driGLFormatToImageFormat(format),
1750 &drawable->dri2.stamp,
1751 drawable->loaderPrivate,
1752 buffer_mask,
1753 &images);
1754 if (!ret)
1755 return;
1756
1757 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1758 drawable->w = images.front->width;
1759 drawable->h = images.front->height;
1760 intel_update_image_buffer(brw,
1761 drawable,
1762 front_rb,
1763 images.front,
1764 __DRI_IMAGE_BUFFER_FRONT);
1765 }
1766 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1767 drawable->w = images.back->width;
1768 drawable->h = images.back->height;
1769 intel_update_image_buffer(brw,
1770 drawable,
1771 back_rb,
1772 images.back,
1773 __DRI_IMAGE_BUFFER_BACK);
1774 }
1775 }