621b6f8990b2661ffac0e772a45cd3ab0f35be81
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
35
36 #include "intel_context.h"
37 #include "brw_structs.h"
38 #include "main/imports.h"
39
40
41 /* Glossary:
42 *
43 * URB - uniform resource buffer. A mid-sized buffer which is
44 * partitioned between the fixed function units and used for passing
45 * values (vertices, primitives, constants) between them.
46 *
47 * CURBE - constant URB entry. An urb region (entry) used to hold
48 * constant values which the fixed function units can be instructed to
49 * preload into the GRF when spawning a thread.
50 *
51 * VUE - vertex URB entry. An urb entry holding a vertex and usually
52 * a vertex header. The header contains control information and
53 * things like primitive type, Begin/end flags and clip codes.
54 *
55 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
56 * unit holding rasterization and interpolation parameters.
57 *
58 * GRF - general register file. One of several register files
59 * addressable by programmed threads. The inputs (r0, payload, curbe,
60 * urb) of the thread are preloaded to this area before the thread is
61 * spawned. The registers are individually 8 dwords wide and suitable
62 * for general usage. Registers holding thread input values are not
63 * special and may be overwritten.
64 *
65 * MRF - message register file. Threads communicate (and terminate)
66 * by sending messages. Message parameters are placed in contiguous
67 * MRF registers. All program output is via these messages. URB
68 * entries are populated by sending a message to the shared URB
69 * function containing the new data, together with a control word,
70 * often an unmodified copy of R0.
71 *
72 * R0 - GRF register 0. Typically holds control information used when
73 * sending messages to other threads.
74 *
75 * EU or GEN4 EU: The name of the programmable subsystem of the
76 * i965 hardware. Threads are executed by the EU, the registers
77 * described above are part of the EU architecture.
78 *
79 * Fixed function units:
80 *
81 * CS - Command streamer. Notional first unit, little software
82 * interaction. Holds the URB entries used for constant data, ie the
83 * CURBEs.
84 *
85 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
86 * this unit is responsible for pulling vertices out of vertex buffers
87 * in vram and injecting them into the processing pipe as VUEs. If
88 * enabled, it first passes them to a VS thread which is a good place
89 * for the driver to implement any active vertex shader.
90 *
91 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
92 * enabled, incoming strips etc are passed to GS threads in individual
93 * line/triangle/point units. The GS thread may perform arbitary
94 * computation and emit whatever primtives with whatever vertices it
95 * chooses. This makes GS an excellent place to implement GL's
96 * unfilled polygon modes, though of course it is capable of much
97 * more. Additionally, GS is used to translate away primitives not
98 * handled by latter units, including Quads and Lineloops.
99 *
100 * CS - Clipper. Mesa's clipping algorithms are imported to run on
101 * this unit. The fixed function part performs cliptesting against
102 * the 6 fixed clipplanes and makes descisions on whether or not the
103 * incoming primitive needs to be passed to a thread for clipping.
104 * User clip planes are handled via cooperation with the VS thread.
105 *
106 * SF - Strips Fans or Setup: Triangles are prepared for
107 * rasterization. Interpolation coefficients are calculated.
108 * Flatshading and two-side lighting usually performed here.
109 *
110 * WM - Windower. Interpolation of vertex attributes performed here.
111 * Fragment shader implemented here. SIMD aspects of EU taken full
112 * advantage of, as pixels are processed in blocks of 16.
113 *
114 * CC - Color Calculator. No EU threads associated with this unit.
115 * Handles blending and (presumably) depth and stencil testing.
116 */
117
118
119 #define BRW_MAX_CURBE (32*16)
120
121 struct brw_context;
122
123 enum brw_state_id {
124 BRW_STATE_URB_FENCE,
125 BRW_STATE_FRAGMENT_PROGRAM,
126 BRW_STATE_VERTEX_PROGRAM,
127 BRW_STATE_INPUT_DIMENSIONS,
128 BRW_STATE_CURBE_OFFSETS,
129 BRW_STATE_REDUCED_PRIMITIVE,
130 BRW_STATE_PRIMITIVE,
131 BRW_STATE_CONTEXT,
132 BRW_STATE_WM_INPUT_DIMENSIONS,
133 BRW_STATE_PSP,
134 BRW_STATE_WM_SURFACES,
135 BRW_STATE_VS_BINDING_TABLE,
136 BRW_STATE_GS_BINDING_TABLE,
137 BRW_STATE_PS_BINDING_TABLE,
138 BRW_STATE_INDICES,
139 BRW_STATE_VERTICES,
140 BRW_STATE_BATCH,
141 BRW_STATE_NR_WM_SURFACES,
142 BRW_STATE_NR_VS_SURFACES,
143 BRW_STATE_INDEX_BUFFER,
144 BRW_STATE_VS_CONSTBUF,
145 BRW_STATE_WM_CONSTBUF
146 };
147
148 #define BRW_NEW_URB_FENCE (1 << BRW_STATE_URB_FENCE)
149 #define BRW_NEW_FRAGMENT_PROGRAM (1 << BRW_STATE_FRAGMENT_PROGRAM)
150 #define BRW_NEW_VERTEX_PROGRAM (1 << BRW_STATE_VERTEX_PROGRAM)
151 #define BRW_NEW_INPUT_DIMENSIONS (1 << BRW_STATE_INPUT_DIMENSIONS)
152 #define BRW_NEW_CURBE_OFFSETS (1 << BRW_STATE_CURBE_OFFSETS)
153 #define BRW_NEW_REDUCED_PRIMITIVE (1 << BRW_STATE_REDUCED_PRIMITIVE)
154 #define BRW_NEW_PRIMITIVE (1 << BRW_STATE_PRIMITIVE)
155 #define BRW_NEW_CONTEXT (1 << BRW_STATE_CONTEXT)
156 #define BRW_NEW_WM_INPUT_DIMENSIONS (1 << BRW_STATE_WM_INPUT_DIMENSIONS)
157 #define BRW_NEW_PSP (1 << BRW_STATE_PSP)
158 #define BRW_NEW_WM_SURFACES (1 << BRW_STATE_WM_SURFACES)
159 #define BRW_NEW_VS_BINDING_TABLE (1 << BRW_STATE_VS_BINDING_TABLE)
160 #define BRW_NEW_GS_BINDING_TABLE (1 << BRW_STATE_GS_BINDING_TABLE)
161 #define BRW_NEW_PS_BINDING_TABLE (1 << BRW_STATE_PS_BINDING_TABLE)
162 #define BRW_NEW_INDICES (1 << BRW_STATE_INDICES)
163 #define BRW_NEW_VERTICES (1 << BRW_STATE_VERTICES)
164 /**
165 * Used for any batch entry with a relocated pointer that will be used
166 * by any 3D rendering.
167 */
168 #define BRW_NEW_BATCH (1 << BRW_STATE_BATCH)
169 /** \see brw.state.depth_region */
170 #define BRW_NEW_NR_WM_SURFACES (1 << BRW_STATE_NR_WM_SURFACES)
171 #define BRW_NEW_NR_VS_SURFACES (1 << BRW_STATE_NR_VS_SURFACES)
172 #define BRW_NEW_INDEX_BUFFER (1 << BRW_STATE_INDEX_BUFFER)
173 #define BRW_NEW_VS_CONSTBUF (1 << BRW_STATE_VS_CONSTBUF)
174 #define BRW_NEW_WM_CONSTBUF (1 << BRW_STATE_WM_CONSTBUF)
175
176 struct brw_state_flags {
177 /** State update flags signalled by mesa internals */
178 GLuint mesa;
179 /**
180 * State update flags signalled as the result of brw_tracked_state updates
181 */
182 GLuint brw;
183 /** State update flags signalled by brw_state_cache.c searches */
184 GLuint cache;
185 };
186
187
188 /** Subclass of Mesa vertex program */
189 struct brw_vertex_program {
190 struct gl_vertex_program program;
191 GLuint id;
192 GLboolean use_const_buffer;
193 };
194
195
196 /** Subclass of Mesa fragment program */
197 struct brw_fragment_program {
198 struct gl_fragment_program program;
199 GLuint id; /**< serial no. to identify frag progs, never re-used */
200
201 /** for debugging, which texture units are referenced */
202 GLbitfield tex_units_used;
203 };
204
205 struct brw_shader {
206 struct gl_shader base;
207
208 /** Shader IR transformed for native compile, at link time. */
209 struct exec_list *ir;
210 };
211
212 struct brw_shader_program {
213 struct gl_shader_program base;
214 };
215
216 enum param_conversion {
217 PARAM_NO_CONVERT,
218 PARAM_CONVERT_F2I,
219 PARAM_CONVERT_F2U,
220 PARAM_CONVERT_F2B,
221 };
222
223 /* Data about a particular attempt to compile a program. Note that
224 * there can be many of these, each in a different GL state
225 * corresponding to a different brw_wm_prog_key struct, with different
226 * compiled programs:
227 */
228 struct brw_wm_prog_data {
229 GLuint curb_read_length;
230 GLuint urb_read_length;
231
232 GLuint first_curbe_grf;
233 GLuint first_curbe_grf_16;
234 GLuint reg_blocks;
235 GLuint reg_blocks_16;
236 GLuint total_scratch;
237
238 GLuint nr_params; /**< number of float params/constants */
239 GLuint nr_pull_params;
240 GLboolean error;
241 int dispatch_width;
242 uint32_t prog_offset_16;
243
244 /* Pointer to tracked values (only valid once
245 * _mesa_load_state_parameters has been called at runtime).
246 */
247 const float *param[MAX_UNIFORMS * 4]; /* should be: BRW_MAX_CURBE */
248 enum param_conversion param_convert[MAX_UNIFORMS * 4];
249 const float *pull_param[MAX_UNIFORMS * 4];
250 enum param_conversion pull_param_convert[MAX_UNIFORMS * 4];
251 };
252
253 struct brw_sf_prog_data {
254 GLuint urb_read_length;
255 GLuint total_grf;
256
257 /* Each vertex may have upto 12 attributes, 4 components each,
258 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
259 * rows.
260 *
261 * Actually we use 4 for each, so call it 12 rows.
262 */
263 GLuint urb_entry_size;
264 };
265
266 struct brw_clip_prog_data {
267 GLuint curb_read_length; /* user planes? */
268 GLuint clip_mode;
269 GLuint urb_read_length;
270 GLuint total_grf;
271 };
272
273 struct brw_gs_prog_data {
274 GLuint urb_read_length;
275 GLuint total_grf;
276 };
277
278 struct brw_vs_prog_data {
279 GLuint curb_read_length;
280 GLuint urb_read_length;
281 GLuint total_grf;
282 GLbitfield64 outputs_written;
283 GLuint nr_params; /**< number of float params/constants */
284
285 GLuint inputs_read;
286
287 /* Used for calculating urb partitions:
288 */
289 GLuint urb_entry_size;
290 };
291
292
293 /* Size == 0 if output either not written, or always [0,0,0,1]
294 */
295 struct brw_vs_ouput_sizes {
296 GLubyte output_size[VERT_RESULT_MAX];
297 };
298
299
300 /** Number of texture sampler units */
301 #define BRW_MAX_TEX_UNIT 16
302
303 /** Max number of render targets in a shader */
304 #define BRW_MAX_DRAW_BUFFERS 8
305
306 /**
307 * Size of our surface binding table for the WM.
308 * This contains pointers to the drawing surfaces and current texture
309 * objects and shader constant buffers (+2).
310 */
311 #define BRW_WM_MAX_SURF (BRW_MAX_DRAW_BUFFERS + BRW_MAX_TEX_UNIT + 1)
312
313 /**
314 * Helpers to convert drawing buffers, textures and constant buffers
315 * to surface binding table indexes, for WM.
316 */
317 #define SURF_INDEX_DRAW(d) (d)
318 #define SURF_INDEX_FRAG_CONST_BUFFER (BRW_MAX_DRAW_BUFFERS)
319 #define SURF_INDEX_TEXTURE(t) (BRW_MAX_DRAW_BUFFERS + 1 + (t))
320
321 /**
322 * Size of surface binding table for the VS.
323 * Only one constant buffer for now.
324 */
325 #define BRW_VS_MAX_SURF 1
326
327 /**
328 * Only a VS constant buffer
329 */
330 #define SURF_INDEX_VERT_CONST_BUFFER 0
331
332
333 enum brw_cache_id {
334 BRW_BLEND_STATE,
335 BRW_DEPTH_STENCIL_STATE,
336 BRW_COLOR_CALC_STATE,
337 BRW_CC_VP,
338 BRW_CC_UNIT,
339 BRW_WM_PROG,
340 BRW_SAMPLER,
341 BRW_WM_UNIT,
342 BRW_SF_PROG,
343 BRW_SF_VP,
344 BRW_SF_UNIT, /* scissor state on gen6 */
345 BRW_VS_UNIT,
346 BRW_VS_PROG,
347 BRW_GS_UNIT,
348 BRW_GS_PROG,
349 BRW_CLIP_VP,
350 BRW_CLIP_UNIT,
351 BRW_CLIP_PROG,
352
353 BRW_MAX_CACHE
354 };
355
356 struct brw_cache_item {
357 /**
358 * Effectively part of the key, cache_id identifies what kind of state
359 * buffer is involved, and also which brw->state.dirty.cache flag should
360 * be set when this cache item is chosen.
361 */
362 enum brw_cache_id cache_id;
363 /** 32-bit hash of the key data */
364 GLuint hash;
365 GLuint key_size; /* for variable-sized keys */
366 const void *key;
367
368 drm_intel_bo *bo;
369
370 struct brw_cache_item *next;
371 };
372
373
374
375 struct brw_cache {
376 struct brw_context *brw;
377
378 struct brw_cache_item **items;
379 GLuint size, n_items;
380
381 char *name[BRW_MAX_CACHE];
382
383 /* Record of the last BOs chosen for each cache_id. Used to set
384 * brw->state.dirty.cache when a new cache item is chosen.
385 */
386 drm_intel_bo *last_bo[BRW_MAX_CACHE];
387 };
388
389
390 /* Considered adding a member to this struct to document which flags
391 * an update might raise so that ordering of the state atoms can be
392 * checked or derived at runtime. Dropped the idea in favor of having
393 * a debug mode where the state is monitored for flags which are
394 * raised that have already been tested against.
395 */
396 struct brw_tracked_state {
397 struct brw_state_flags dirty;
398 void (*prepare)( struct brw_context *brw );
399 void (*emit)( struct brw_context *brw );
400 };
401
402 /* Flags for brw->state.cache.
403 */
404 #define CACHE_NEW_BLEND_STATE (1<<BRW_BLEND_STATE)
405 #define CACHE_NEW_DEPTH_STENCIL_STATE (1<<BRW_DEPTH_STENCIL_STATE)
406 #define CACHE_NEW_COLOR_CALC_STATE (1<<BRW_COLOR_CALC_STATE)
407 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
408 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
409 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
410 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
411 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
412 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
413 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
414 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
415 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
416 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
417 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
418 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
419 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
420 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
421 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
422
423 struct brw_cached_batch_item {
424 struct header *header;
425 GLuint sz;
426 struct brw_cached_batch_item *next;
427 };
428
429
430
431 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
432 * be easier if C allowed arrays of packed elements?
433 */
434 #define ATTRIB_BIT_DWORDS ((VERT_ATTRIB_MAX+31)/32)
435
436 struct brw_vertex_buffer {
437 /** Buffer object containing the uploaded vertex data */
438 drm_intel_bo *bo;
439 uint32_t offset;
440 /** Byte stride between elements in the uploaded array */
441 GLuint stride;
442 };
443 struct brw_vertex_element {
444 const struct gl_client_array *glarray;
445
446 int buffer;
447
448 /** The corresponding Mesa vertex attribute */
449 gl_vert_attrib attrib;
450 /** Size of a complete element */
451 GLuint element_size;
452 /** Offset of the first element within the buffer object */
453 unsigned int offset;
454 };
455
456
457
458 struct brw_vertex_info {
459 GLuint sizes[ATTRIB_BIT_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
460 };
461
462 struct brw_query_object {
463 struct gl_query_object Base;
464
465 /** Last query BO associated with this query. */
466 drm_intel_bo *bo;
467 /** First index in bo with query data for this object. */
468 int first_index;
469 /** Last index in bo with query data for this object. */
470 int last_index;
471 };
472
473
474 /**
475 * brw_context is derived from intel_context.
476 */
477 struct brw_context
478 {
479 struct intel_context intel; /**< base class, must be first field */
480 GLuint primitive;
481
482 GLboolean emit_state_always;
483 GLboolean has_surface_tile_offset;
484 GLboolean has_compr4;
485 GLboolean has_negative_rhw_bug;
486 GLboolean has_aa_line_parameters;
487 GLboolean has_pln;
488
489 struct {
490 struct brw_state_flags dirty;
491 /**
492 * List of buffers accumulated in brw_validate_state to receive
493 * drm_intel_bo_check_aperture treatment before exec, so we can
494 * know if we should flush the batch and try again before
495 * emitting primitives.
496 *
497 * This can be a fixed number as we only have a limited number of
498 * objects referenced from the batchbuffer in a primitive emit,
499 * consisting of the vertex buffers, pipelined state pointers,
500 * the CURBE, the depth buffer, and a query BO.
501 */
502 drm_intel_bo *validated_bos[VERT_ATTRIB_MAX + BRW_WM_MAX_SURF + 16];
503 int validated_bo_count;
504 } state;
505
506 struct brw_cache cache;
507 struct brw_cached_batch_item *cached_batch_items;
508
509 struct {
510 struct brw_vertex_element inputs[VERT_ATTRIB_MAX];
511 struct brw_vertex_buffer buffers[VERT_ATTRIB_MAX];
512 struct {
513 uint32_t handle;
514 uint32_t offset;
515 uint32_t stride;
516 } current_buffers[VERT_ATTRIB_MAX];
517
518 struct brw_vertex_element *enabled[VERT_ATTRIB_MAX];
519 GLuint nr_enabled;
520 GLuint nr_buffers, nr_current_buffers;
521
522 /* Summary of size and varying of active arrays, so we can check
523 * for changes to this state:
524 */
525 struct brw_vertex_info info;
526 unsigned int min_index, max_index;
527
528 /* Offset from start of vertex buffer so we can avoid redefining
529 * the same VB packed over and over again.
530 */
531 unsigned int start_vertex_bias;
532 } vb;
533
534 struct {
535 /**
536 * Index buffer for this draw_prims call.
537 *
538 * Updates are signaled by BRW_NEW_INDICES.
539 */
540 const struct _mesa_index_buffer *ib;
541
542 /* Updates are signaled by BRW_NEW_INDEX_BUFFER. */
543 drm_intel_bo *bo;
544 GLuint type;
545
546 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
547 * avoid re-uploading the IB packet over and over if we're actually
548 * referencing the same index buffer.
549 */
550 unsigned int start_vertex_offset;
551 } ib;
552
553 /* Active vertex program:
554 */
555 const struct gl_vertex_program *vertex_program;
556 const struct gl_fragment_program *fragment_program;
557
558 /* hw-dependent 3DSTATE_VF_STATISTICS opcode */
559 uint32_t CMD_VF_STATISTICS;
560 /* hw-dependent 3DSTATE_PIPELINE_SELECT opcode */
561 uint32_t CMD_PIPELINE_SELECT;
562 int vs_max_threads;
563 int wm_max_threads;
564
565 /* BRW_NEW_URB_ALLOCATIONS:
566 */
567 struct {
568 GLuint vsize; /* vertex size plus header in urb registers */
569 GLuint csize; /* constant buffer size in urb registers */
570 GLuint sfsize; /* setup data size in urb registers */
571
572 GLboolean constrained;
573
574 GLuint max_vs_entries; /* Maximum number of VS entries */
575 GLuint max_gs_entries; /* Maximum number of GS entries */
576
577 GLuint nr_vs_entries;
578 GLuint nr_gs_entries;
579 GLuint nr_clip_entries;
580 GLuint nr_sf_entries;
581 GLuint nr_cs_entries;
582
583 /* gen6:
584 * The length of each URB entry owned by the VS (or GS), as
585 * a number of 1024-bit (128-byte) rows. Should be >= 1.
586 *
587 * gen7: Same meaning, but in 512-bit (64-byte) rows.
588 */
589 GLuint vs_size;
590 GLuint gs_size;
591
592 GLuint vs_start;
593 GLuint gs_start;
594 GLuint clip_start;
595 GLuint sf_start;
596 GLuint cs_start;
597 GLuint size; /* Hardware URB size, in KB. */
598 } urb;
599
600
601 /* BRW_NEW_CURBE_OFFSETS:
602 */
603 struct {
604 GLuint wm_start; /**< pos of first wm const in CURBE buffer */
605 GLuint wm_size; /**< number of float[4] consts, multiple of 16 */
606 GLuint clip_start;
607 GLuint clip_size;
608 GLuint vs_start;
609 GLuint vs_size;
610 GLuint total_size;
611
612 drm_intel_bo *curbe_bo;
613 /** Offset within curbe_bo of space for current curbe entry */
614 GLuint curbe_offset;
615 /** Offset within curbe_bo of space for next curbe entry */
616 GLuint curbe_next_offset;
617
618 /**
619 * Copy of the last set of CURBEs uploaded. Frequently we'll end up
620 * in brw_curbe.c with the same set of constant data to be uploaded,
621 * so we'd rather not upload new constants in that case (it can cause
622 * a pipeline bubble since only up to 4 can be pipelined at a time).
623 */
624 GLfloat *last_buf;
625 /**
626 * Allocation for where to calculate the next set of CURBEs.
627 * It's a hot enough path that malloc/free of that data matters.
628 */
629 GLfloat *next_buf;
630 GLuint last_bufsz;
631 } curbe;
632
633 struct {
634 struct brw_vs_prog_data *prog_data;
635 int8_t *constant_map; /* variable array following prog_data */
636
637 drm_intel_bo *prog_bo;
638 drm_intel_bo *const_bo;
639 uint32_t state_offset;
640
641 /** Binding table of pointers to surf_bo entries */
642 uint32_t bind_bo_offset;
643 uint32_t surf_offset[BRW_VS_MAX_SURF];
644 GLuint nr_surfaces;
645
646 uint32_t push_const_offset; /* Offset in the batchbuffer */
647 int push_const_size; /* in 256-bit register increments */
648 } vs;
649
650 struct {
651 struct brw_gs_prog_data *prog_data;
652
653 GLboolean prog_active;
654 uint32_t state_offset;
655 drm_intel_bo *prog_bo;
656 } gs;
657
658 struct {
659 struct brw_clip_prog_data *prog_data;
660
661 drm_intel_bo *prog_bo;
662
663 /* Offset in the batch to the CLIP state on pre-gen6. */
664 uint32_t state_offset;
665
666 /* As of gen6, this is the offset in the batch to the CLIP VP,
667 * instead of vp_bo.
668 */
669 uint32_t vp_offset;
670 } clip;
671
672
673 struct {
674 struct brw_sf_prog_data *prog_data;
675
676 drm_intel_bo *prog_bo;
677 uint32_t state_offset;
678 uint32_t vp_offset;
679 } sf;
680
681 struct {
682 struct brw_wm_prog_data *prog_data;
683 struct brw_wm_compile *compile_data;
684
685 /** Input sizes, calculated from active vertex program.
686 * One bit per fragment program input attribute.
687 */
688 GLbitfield input_size_masks[4];
689
690 /** offsets in the batch to sampler default colors (texture border color)
691 */
692 uint32_t sdc_offset[BRW_MAX_TEX_UNIT];
693
694 GLuint render_surf;
695 GLuint nr_surfaces;
696
697 GLuint max_threads;
698 drm_intel_bo *scratch_bo;
699
700 GLuint sampler_count;
701 uint32_t sampler_offset;
702
703 /** Binding table of pointers to surf_bo entries */
704 uint32_t bind_bo_offset;
705 uint32_t surf_offset[BRW_WM_MAX_SURF];
706 uint32_t state_offset; /* offset in batchbuffer to pre-gen6 WM state */
707
708 drm_intel_bo *prog_bo;
709 drm_intel_bo *const_bo; /* pull constant buffer. */
710 /**
711 * This is offset in the batch to the push constants on gen6.
712 *
713 * Pre-gen6, push constants live in the CURBE.
714 */
715 uint32_t push_const_offset;
716 } wm;
717
718
719 struct {
720 /* gen4 */
721 drm_intel_bo *prog_bo;
722
723 uint32_t state_offset;
724 uint32_t blend_state_offset;
725 uint32_t depth_stencil_state_offset;
726 uint32_t vp_offset;
727 } cc;
728
729 struct {
730 struct brw_query_object *obj;
731 drm_intel_bo *bo;
732 int index;
733 GLboolean active;
734 } query;
735 /* Used to give every program string a unique id
736 */
737 GLuint program_id;
738
739 int num_prepare_atoms, num_emit_atoms;
740 struct brw_tracked_state prepare_atoms[64], emit_atoms[64];
741 };
742
743
744 #define BRW_PACKCOLOR8888(r,g,b,a) ((r<<24) | (g<<16) | (b<<8) | a)
745
746 struct brw_instruction_info {
747 char *name;
748 int nsrc;
749 int ndst;
750 GLboolean is_arith;
751 };
752 extern const struct brw_instruction_info brw_opcodes[128];
753
754 /*======================================================================
755 * brw_vtbl.c
756 */
757 void brwInitVtbl( struct brw_context *brw );
758
759 /*======================================================================
760 * brw_context.c
761 */
762 GLboolean brwCreateContext( int api,
763 const struct gl_config *mesaVis,
764 __DRIcontext *driContextPriv,
765 void *sharedContextPrivate);
766
767 /*======================================================================
768 * brw_queryobj.c
769 */
770 void brw_init_queryobj_functions(struct dd_function_table *functions);
771 void brw_prepare_query_begin(struct brw_context *brw);
772 void brw_emit_query_begin(struct brw_context *brw);
773 void brw_emit_query_end(struct brw_context *brw);
774
775 /*======================================================================
776 * brw_state_dump.c
777 */
778 void brw_debug_batch(struct intel_context *intel);
779
780 /*======================================================================
781 * brw_tex.c
782 */
783 void brw_validate_textures( struct brw_context *brw );
784
785
786 /*======================================================================
787 * brw_program.c
788 */
789 void brwInitFragProgFuncs( struct dd_function_table *functions );
790
791
792 /* brw_urb.c
793 */
794 void brw_upload_urb_fence(struct brw_context *brw);
795
796 /* brw_curbe.c
797 */
798 void brw_upload_cs_urb_state(struct brw_context *brw);
799
800 /* brw_disasm.c */
801 int brw_disasm (FILE *file, struct brw_instruction *inst, int gen);
802
803 /*======================================================================
804 * Inline conversion functions. These are better-typed than the
805 * macros used previously:
806 */
807 static INLINE struct brw_context *
808 brw_context( struct gl_context *ctx )
809 {
810 return (struct brw_context *)ctx;
811 }
812
813 static INLINE struct brw_vertex_program *
814 brw_vertex_program(struct gl_vertex_program *p)
815 {
816 return (struct brw_vertex_program *) p;
817 }
818
819 static INLINE const struct brw_vertex_program *
820 brw_vertex_program_const(const struct gl_vertex_program *p)
821 {
822 return (const struct brw_vertex_program *) p;
823 }
824
825 static INLINE struct brw_fragment_program *
826 brw_fragment_program(struct gl_fragment_program *p)
827 {
828 return (struct brw_fragment_program *) p;
829 }
830
831 static INLINE const struct brw_fragment_program *
832 brw_fragment_program_const(const struct gl_fragment_program *p)
833 {
834 return (const struct brw_fragment_program *) p;
835 }
836
837 static inline
838 float convert_param(enum param_conversion conversion, float param)
839 {
840 union {
841 float f;
842 uint32_t u;
843 int32_t i;
844 } fi;
845
846 switch (conversion) {
847 case PARAM_NO_CONVERT:
848 return param;
849 case PARAM_CONVERT_F2I:
850 fi.i = param;
851 return fi.f;
852 case PARAM_CONVERT_F2U:
853 fi.u = param;
854 return fi.f;
855 case PARAM_CONVERT_F2B:
856 if (param != 0.0)
857 fi.i = 1;
858 else
859 fi.i = 0;
860 return fi.f;
861 default:
862 return param;
863 }
864 }
865
866 /**
867 * Pre-gen6, the register file of the EUs was shared between threads,
868 * and each thread used some subset allocated on a 16-register block
869 * granularity. The unit states wanted these block counts.
870 */
871 static inline int
872 brw_register_blocks(int reg_count)
873 {
874 return ALIGN(reg_count, 16) / 16 - 1;
875 }
876
877 GLboolean brw_do_cubemap_normalize(struct exec_list *instructions);
878
879 #endif