i965: Rename max_vs_handles to max_vs_entries for consistency.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
35
36 #include "intel_context.h"
37 #include "brw_structs.h"
38 #include "main/imports.h"
39
40
41 /* Glossary:
42 *
43 * URB - uniform resource buffer. A mid-sized buffer which is
44 * partitioned between the fixed function units and used for passing
45 * values (vertices, primitives, constants) between them.
46 *
47 * CURBE - constant URB entry. An urb region (entry) used to hold
48 * constant values which the fixed function units can be instructed to
49 * preload into the GRF when spawning a thread.
50 *
51 * VUE - vertex URB entry. An urb entry holding a vertex and usually
52 * a vertex header. The header contains control information and
53 * things like primitive type, Begin/end flags and clip codes.
54 *
55 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
56 * unit holding rasterization and interpolation parameters.
57 *
58 * GRF - general register file. One of several register files
59 * addressable by programmed threads. The inputs (r0, payload, curbe,
60 * urb) of the thread are preloaded to this area before the thread is
61 * spawned. The registers are individually 8 dwords wide and suitable
62 * for general usage. Registers holding thread input values are not
63 * special and may be overwritten.
64 *
65 * MRF - message register file. Threads communicate (and terminate)
66 * by sending messages. Message parameters are placed in contiguous
67 * MRF registers. All program output is via these messages. URB
68 * entries are populated by sending a message to the shared URB
69 * function containing the new data, together with a control word,
70 * often an unmodified copy of R0.
71 *
72 * R0 - GRF register 0. Typically holds control information used when
73 * sending messages to other threads.
74 *
75 * EU or GEN4 EU: The name of the programmable subsystem of the
76 * i965 hardware. Threads are executed by the EU, the registers
77 * described above are part of the EU architecture.
78 *
79 * Fixed function units:
80 *
81 * CS - Command streamer. Notional first unit, little software
82 * interaction. Holds the URB entries used for constant data, ie the
83 * CURBEs.
84 *
85 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
86 * this unit is responsible for pulling vertices out of vertex buffers
87 * in vram and injecting them into the processing pipe as VUEs. If
88 * enabled, it first passes them to a VS thread which is a good place
89 * for the driver to implement any active vertex shader.
90 *
91 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
92 * enabled, incoming strips etc are passed to GS threads in individual
93 * line/triangle/point units. The GS thread may perform arbitary
94 * computation and emit whatever primtives with whatever vertices it
95 * chooses. This makes GS an excellent place to implement GL's
96 * unfilled polygon modes, though of course it is capable of much
97 * more. Additionally, GS is used to translate away primitives not
98 * handled by latter units, including Quads and Lineloops.
99 *
100 * CS - Clipper. Mesa's clipping algorithms are imported to run on
101 * this unit. The fixed function part performs cliptesting against
102 * the 6 fixed clipplanes and makes descisions on whether or not the
103 * incoming primitive needs to be passed to a thread for clipping.
104 * User clip planes are handled via cooperation with the VS thread.
105 *
106 * SF - Strips Fans or Setup: Triangles are prepared for
107 * rasterization. Interpolation coefficients are calculated.
108 * Flatshading and two-side lighting usually performed here.
109 *
110 * WM - Windower. Interpolation of vertex attributes performed here.
111 * Fragment shader implemented here. SIMD aspects of EU taken full
112 * advantage of, as pixels are processed in blocks of 16.
113 *
114 * CC - Color Calculator. No EU threads associated with this unit.
115 * Handles blending and (presumably) depth and stencil testing.
116 */
117
118
119 #define BRW_MAX_CURBE (32*16)
120
121 struct brw_context;
122
123 enum brw_state_id {
124 BRW_STATE_URB_FENCE,
125 BRW_STATE_FRAGMENT_PROGRAM,
126 BRW_STATE_VERTEX_PROGRAM,
127 BRW_STATE_INPUT_DIMENSIONS,
128 BRW_STATE_CURBE_OFFSETS,
129 BRW_STATE_REDUCED_PRIMITIVE,
130 BRW_STATE_PRIMITIVE,
131 BRW_STATE_CONTEXT,
132 BRW_STATE_WM_INPUT_DIMENSIONS,
133 BRW_STATE_PSP,
134 BRW_STATE_WM_SURFACES,
135 BRW_STATE_BINDING_TABLE,
136 BRW_STATE_INDICES,
137 BRW_STATE_VERTICES,
138 BRW_STATE_BATCH,
139 BRW_STATE_DEPTH_BUFFER,
140 BRW_STATE_NR_WM_SURFACES,
141 BRW_STATE_NR_VS_SURFACES,
142 BRW_STATE_INDEX_BUFFER,
143 BRW_STATE_VS_CONSTBUF,
144 BRW_STATE_WM_CONSTBUF
145 };
146
147 #define BRW_NEW_URB_FENCE (1 << BRW_STATE_URB_FENCE)
148 #define BRW_NEW_FRAGMENT_PROGRAM (1 << BRW_STATE_FRAGMENT_PROGRAM)
149 #define BRW_NEW_VERTEX_PROGRAM (1 << BRW_STATE_VERTEX_PROGRAM)
150 #define BRW_NEW_INPUT_DIMENSIONS (1 << BRW_STATE_INPUT_DIMENSIONS)
151 #define BRW_NEW_CURBE_OFFSETS (1 << BRW_STATE_CURBE_OFFSETS)
152 #define BRW_NEW_REDUCED_PRIMITIVE (1 << BRW_STATE_REDUCED_PRIMITIVE)
153 #define BRW_NEW_PRIMITIVE (1 << BRW_STATE_PRIMITIVE)
154 #define BRW_NEW_CONTEXT (1 << BRW_STATE_CONTEXT)
155 #define BRW_NEW_WM_INPUT_DIMENSIONS (1 << BRW_STATE_WM_INPUT_DIMENSIONS)
156 #define BRW_NEW_PSP (1 << BRW_STATE_PSP)
157 #define BRW_NEW_WM_SURFACES (1 << BRW_STATE_WM_SURFACES)
158 #define BRW_NEW_BINDING_TABLE (1 << BRW_STATE_BINDING_TABLE)
159 #define BRW_NEW_INDICES (1 << BRW_STATE_INDICES)
160 #define BRW_NEW_VERTICES (1 << BRW_STATE_VERTICES)
161 /**
162 * Used for any batch entry with a relocated pointer that will be used
163 * by any 3D rendering.
164 */
165 #define BRW_NEW_BATCH (1 << BRW_STATE_BATCH)
166 /** \see brw.state.depth_region */
167 #define BRW_NEW_DEPTH_BUFFER (1 << BRW_STATE_DEPTH_BUFFER)
168 #define BRW_NEW_NR_WM_SURFACES (1 << BRW_STATE_NR_WM_SURFACES)
169 #define BRW_NEW_NR_VS_SURFACES (1 << BRW_STATE_NR_VS_SURFACES)
170 #define BRW_NEW_INDEX_BUFFER (1 << BRW_STATE_INDEX_BUFFER)
171 #define BRW_NEW_VS_CONSTBUF (1 << BRW_STATE_VS_CONSTBUF)
172 #define BRW_NEW_WM_CONSTBUF (1 << BRW_STATE_WM_CONSTBUF)
173
174 struct brw_state_flags {
175 /** State update flags signalled by mesa internals */
176 GLuint mesa;
177 /**
178 * State update flags signalled as the result of brw_tracked_state updates
179 */
180 GLuint brw;
181 /** State update flags signalled by brw_state_cache.c searches */
182 GLuint cache;
183 };
184
185
186 /** Subclass of Mesa vertex program */
187 struct brw_vertex_program {
188 struct gl_vertex_program program;
189 GLuint id;
190 GLboolean use_const_buffer;
191 };
192
193
194 /** Subclass of Mesa fragment program */
195 struct brw_fragment_program {
196 struct gl_fragment_program program;
197 GLuint id; /**< serial no. to identify frag progs, never re-used */
198
199 /** for debugging, which texture units are referenced */
200 GLbitfield tex_units_used;
201 };
202
203 struct brw_shader {
204 struct gl_shader base;
205
206 /** Shader IR transformed for native compile, at link time. */
207 struct exec_list *ir;
208 };
209
210 struct brw_shader_program {
211 struct gl_shader_program base;
212 };
213
214 enum param_conversion {
215 PARAM_NO_CONVERT,
216 PARAM_CONVERT_F2I,
217 PARAM_CONVERT_F2U,
218 PARAM_CONVERT_F2B,
219 };
220
221 /* Data about a particular attempt to compile a program. Note that
222 * there can be many of these, each in a different GL state
223 * corresponding to a different brw_wm_prog_key struct, with different
224 * compiled programs:
225 */
226 struct brw_wm_prog_data {
227 GLuint curb_read_length;
228 GLuint urb_read_length;
229
230 GLuint first_curbe_grf;
231 GLuint first_curbe_grf_16;
232 GLuint total_grf;
233 GLuint total_grf_16;
234 GLuint total_scratch;
235
236 GLuint nr_params; /**< number of float params/constants */
237 GLuint nr_pull_params;
238 GLboolean error;
239 int dispatch_width;
240 uint32_t prog_offset_16;
241
242 /* Pointer to tracked values (only valid once
243 * _mesa_load_state_parameters has been called at runtime).
244 */
245 const float *param[MAX_UNIFORMS * 4]; /* should be: BRW_MAX_CURBE */
246 enum param_conversion param_convert[MAX_UNIFORMS * 4];
247 const float *pull_param[MAX_UNIFORMS * 4];
248 enum param_conversion pull_param_convert[MAX_UNIFORMS * 4];
249 };
250
251 struct brw_sf_prog_data {
252 GLuint urb_read_length;
253 GLuint total_grf;
254
255 /* Each vertex may have upto 12 attributes, 4 components each,
256 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
257 * rows.
258 *
259 * Actually we use 4 for each, so call it 12 rows.
260 */
261 GLuint urb_entry_size;
262 };
263
264 struct brw_clip_prog_data {
265 GLuint curb_read_length; /* user planes? */
266 GLuint clip_mode;
267 GLuint urb_read_length;
268 GLuint total_grf;
269 };
270
271 struct brw_gs_prog_data {
272 GLuint urb_read_length;
273 GLuint total_grf;
274 };
275
276 struct brw_vs_prog_data {
277 GLuint curb_read_length;
278 GLuint urb_read_length;
279 GLuint total_grf;
280 GLbitfield64 outputs_written;
281 GLuint nr_params; /**< number of float params/constants */
282
283 GLuint inputs_read;
284
285 /* Used for calculating urb partitions:
286 */
287 GLuint urb_entry_size;
288 };
289
290
291 /* Size == 0 if output either not written, or always [0,0,0,1]
292 */
293 struct brw_vs_ouput_sizes {
294 GLubyte output_size[VERT_RESULT_MAX];
295 };
296
297
298 /** Number of texture sampler units */
299 #define BRW_MAX_TEX_UNIT 16
300
301 /** Max number of render targets in a shader */
302 #define BRW_MAX_DRAW_BUFFERS 8
303
304 /**
305 * Size of our surface binding table for the WM.
306 * This contains pointers to the drawing surfaces and current texture
307 * objects and shader constant buffers (+2).
308 */
309 #define BRW_WM_MAX_SURF (BRW_MAX_DRAW_BUFFERS + BRW_MAX_TEX_UNIT + 1)
310
311 /**
312 * Helpers to convert drawing buffers, textures and constant buffers
313 * to surface binding table indexes, for WM.
314 */
315 #define SURF_INDEX_DRAW(d) (d)
316 #define SURF_INDEX_FRAG_CONST_BUFFER (BRW_MAX_DRAW_BUFFERS)
317 #define SURF_INDEX_TEXTURE(t) (BRW_MAX_DRAW_BUFFERS + 1 + (t))
318
319 /**
320 * Size of surface binding table for the VS.
321 * Only one constant buffer for now.
322 */
323 #define BRW_VS_MAX_SURF 1
324
325 /**
326 * Only a VS constant buffer
327 */
328 #define SURF_INDEX_VERT_CONST_BUFFER 0
329
330
331 enum brw_cache_id {
332 BRW_BLEND_STATE,
333 BRW_DEPTH_STENCIL_STATE,
334 BRW_COLOR_CALC_STATE,
335 BRW_CC_VP,
336 BRW_CC_UNIT,
337 BRW_WM_PROG,
338 BRW_SAMPLER,
339 BRW_WM_UNIT,
340 BRW_SF_PROG,
341 BRW_SF_VP,
342 BRW_SF_UNIT, /* scissor state on gen6 */
343 BRW_VS_UNIT,
344 BRW_VS_PROG,
345 BRW_GS_UNIT,
346 BRW_GS_PROG,
347 BRW_CLIP_VP,
348 BRW_CLIP_UNIT,
349 BRW_CLIP_PROG,
350
351 BRW_MAX_CACHE
352 };
353
354 struct brw_cache_item {
355 /**
356 * Effectively part of the key, cache_id identifies what kind of state
357 * buffer is involved, and also which brw->state.dirty.cache flag should
358 * be set when this cache item is chosen.
359 */
360 enum brw_cache_id cache_id;
361 /** 32-bit hash of the key data */
362 GLuint hash;
363 GLuint key_size; /* for variable-sized keys */
364 const void *key;
365
366 drm_intel_bo *bo;
367
368 struct brw_cache_item *next;
369 };
370
371
372
373 struct brw_cache {
374 struct brw_context *brw;
375
376 struct brw_cache_item **items;
377 GLuint size, n_items;
378
379 char *name[BRW_MAX_CACHE];
380
381 /* Record of the last BOs chosen for each cache_id. Used to set
382 * brw->state.dirty.cache when a new cache item is chosen.
383 */
384 drm_intel_bo *last_bo[BRW_MAX_CACHE];
385 };
386
387
388 /* Considered adding a member to this struct to document which flags
389 * an update might raise so that ordering of the state atoms can be
390 * checked or derived at runtime. Dropped the idea in favor of having
391 * a debug mode where the state is monitored for flags which are
392 * raised that have already been tested against.
393 */
394 struct brw_tracked_state {
395 struct brw_state_flags dirty;
396 void (*prepare)( struct brw_context *brw );
397 void (*emit)( struct brw_context *brw );
398 };
399
400 /* Flags for brw->state.cache.
401 */
402 #define CACHE_NEW_BLEND_STATE (1<<BRW_BLEND_STATE)
403 #define CACHE_NEW_DEPTH_STENCIL_STATE (1<<BRW_DEPTH_STENCIL_STATE)
404 #define CACHE_NEW_COLOR_CALC_STATE (1<<BRW_COLOR_CALC_STATE)
405 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
406 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
407 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
408 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
409 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
410 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
411 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
412 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
413 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
414 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
415 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
416 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
417 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
418 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
419 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
420
421 struct brw_cached_batch_item {
422 struct header *header;
423 GLuint sz;
424 struct brw_cached_batch_item *next;
425 };
426
427
428
429 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
430 * be easier if C allowed arrays of packed elements?
431 */
432 #define ATTRIB_BIT_DWORDS ((VERT_ATTRIB_MAX+31)/32)
433
434 struct brw_vertex_buffer {
435 /** Buffer object containing the uploaded vertex data */
436 drm_intel_bo *bo;
437 uint32_t offset;
438 /** Byte stride between elements in the uploaded array */
439 GLuint stride;
440 };
441 struct brw_vertex_element {
442 const struct gl_client_array *glarray;
443
444 int buffer;
445
446 /** The corresponding Mesa vertex attribute */
447 gl_vert_attrib attrib;
448 /** Size of a complete element */
449 GLuint element_size;
450 /** Offset of the first element within the buffer object */
451 unsigned int offset;
452 };
453
454
455
456 struct brw_vertex_info {
457 GLuint sizes[ATTRIB_BIT_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
458 };
459
460 struct brw_query_object {
461 struct gl_query_object Base;
462
463 /** Last query BO associated with this query. */
464 drm_intel_bo *bo;
465 /** First index in bo with query data for this object. */
466 int first_index;
467 /** Last index in bo with query data for this object. */
468 int last_index;
469 };
470
471
472 /**
473 * brw_context is derived from intel_context.
474 */
475 struct brw_context
476 {
477 struct intel_context intel; /**< base class, must be first field */
478 GLuint primitive;
479
480 GLboolean emit_state_always;
481 GLboolean has_surface_tile_offset;
482 GLboolean has_compr4;
483 GLboolean has_negative_rhw_bug;
484 GLboolean has_aa_line_parameters;
485 GLboolean has_pln;
486
487 struct {
488 struct brw_state_flags dirty;
489
490 /**
491 * \name Cached region pointers
492 *
493 * When the draw buffer is updated, often the depth buffer is not
494 * changed. Caching the pointer to the buffer's region allows us to
495 * detect when the buffer has in fact changed, and allows us to avoid
496 * updating the buffer's GPU state when it has not.
497 *
498 * The original of each cached pointer is an instance of
499 * \c intel_renderbuffer.region.
500 *
501 * \see brw_set_draw_region()
502 *
503 * \{
504 */
505
506 /** \see struct brw_tracked_state brw_depthbuffer */
507 struct intel_region *depth_region;
508
509 /** \} */
510
511 /**
512 * List of buffers accumulated in brw_validate_state to receive
513 * drm_intel_bo_check_aperture treatment before exec, so we can
514 * know if we should flush the batch and try again before
515 * emitting primitives.
516 *
517 * This can be a fixed number as we only have a limited number of
518 * objects referenced from the batchbuffer in a primitive emit,
519 * consisting of the vertex buffers, pipelined state pointers,
520 * the CURBE, the depth buffer, and a query BO.
521 */
522 drm_intel_bo *validated_bos[VERT_ATTRIB_MAX + BRW_WM_MAX_SURF + 16];
523 int validated_bo_count;
524 } state;
525
526 struct brw_cache cache;
527 struct brw_cached_batch_item *cached_batch_items;
528
529 struct {
530 struct brw_vertex_element inputs[VERT_ATTRIB_MAX];
531 struct brw_vertex_buffer buffers[VERT_ATTRIB_MAX];
532 struct {
533 uint32_t handle;
534 uint32_t offset;
535 uint32_t stride;
536 } current_buffers[VERT_ATTRIB_MAX];
537
538 struct brw_vertex_element *enabled[VERT_ATTRIB_MAX];
539 GLuint nr_enabled;
540 GLuint nr_buffers, nr_current_buffers;
541
542 /* Summary of size and varying of active arrays, so we can check
543 * for changes to this state:
544 */
545 struct brw_vertex_info info;
546 unsigned int min_index, max_index;
547
548 /* Offset from start of vertex buffer so we can avoid redefining
549 * the same VB packed over and over again.
550 */
551 unsigned int start_vertex_bias;
552 } vb;
553
554 struct {
555 /**
556 * Index buffer for this draw_prims call.
557 *
558 * Updates are signaled by BRW_NEW_INDICES.
559 */
560 const struct _mesa_index_buffer *ib;
561
562 /* Updates are signaled by BRW_NEW_INDEX_BUFFER. */
563 drm_intel_bo *bo;
564 GLuint type;
565
566 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
567 * avoid re-uploading the IB packet over and over if we're actually
568 * referencing the same index buffer.
569 */
570 unsigned int start_vertex_offset;
571 } ib;
572
573 /* Active vertex program:
574 */
575 const struct gl_vertex_program *vertex_program;
576 const struct gl_fragment_program *fragment_program;
577
578 /* hw-dependent 3DSTATE_VF_STATISTICS opcode */
579 uint32_t CMD_VF_STATISTICS;
580 /* hw-dependent 3DSTATE_PIPELINE_SELECT opcode */
581 uint32_t CMD_PIPELINE_SELECT;
582 int vs_max_threads;
583 int wm_max_threads;
584
585 /* BRW_NEW_URB_ALLOCATIONS:
586 */
587 struct {
588 GLuint vsize; /* vertex size plus header in urb registers */
589 GLuint csize; /* constant buffer size in urb registers */
590 GLuint sfsize; /* setup data size in urb registers */
591
592 GLboolean constrained;
593
594 GLuint max_vs_entries; /* Maximum number of VS entries */
595 GLuint max_gs_entries; /* Maximum number of GS entries */
596
597 GLuint nr_vs_entries;
598 GLuint nr_gs_entries;
599 GLuint nr_clip_entries;
600 GLuint nr_sf_entries;
601 GLuint nr_cs_entries;
602
603 /* gen6:
604 * The length of each URB entry owned by the VS (or GS), as
605 * a number of 1024-bit (128-byte) rows. Should be >= 1.
606 */
607 GLuint vs_size;
608 GLuint gs_size;
609
610 GLuint vs_start;
611 GLuint gs_start;
612 GLuint clip_start;
613 GLuint sf_start;
614 GLuint cs_start;
615 GLuint size; /* Hardware URB size, in KB. */
616 } urb;
617
618
619 /* BRW_NEW_CURBE_OFFSETS:
620 */
621 struct {
622 GLuint wm_start; /**< pos of first wm const in CURBE buffer */
623 GLuint wm_size; /**< number of float[4] consts, multiple of 16 */
624 GLuint clip_start;
625 GLuint clip_size;
626 GLuint vs_start;
627 GLuint vs_size;
628 GLuint total_size;
629
630 drm_intel_bo *curbe_bo;
631 /** Offset within curbe_bo of space for current curbe entry */
632 GLuint curbe_offset;
633 /** Offset within curbe_bo of space for next curbe entry */
634 GLuint curbe_next_offset;
635
636 /**
637 * Copy of the last set of CURBEs uploaded. Frequently we'll end up
638 * in brw_curbe.c with the same set of constant data to be uploaded,
639 * so we'd rather not upload new constants in that case (it can cause
640 * a pipeline bubble since only up to 4 can be pipelined at a time).
641 */
642 GLfloat *last_buf;
643 /**
644 * Allocation for where to calculate the next set of CURBEs.
645 * It's a hot enough path that malloc/free of that data matters.
646 */
647 GLfloat *next_buf;
648 GLuint last_bufsz;
649 } curbe;
650
651 struct {
652 struct brw_vs_prog_data *prog_data;
653 int8_t *constant_map; /* variable array following prog_data */
654
655 drm_intel_bo *prog_bo;
656 drm_intel_bo *const_bo;
657 uint32_t state_offset;
658
659 /** Binding table of pointers to surf_bo entries */
660 uint32_t bind_bo_offset;
661 uint32_t surf_offset[BRW_VS_MAX_SURF];
662 GLuint nr_surfaces;
663
664 uint32_t push_const_offset; /* Offset in the batchbuffer */
665 int push_const_size; /* in 256-bit register increments */
666 } vs;
667
668 struct {
669 struct brw_gs_prog_data *prog_data;
670
671 GLboolean prog_active;
672 uint32_t state_offset;
673 drm_intel_bo *prog_bo;
674 } gs;
675
676 struct {
677 struct brw_clip_prog_data *prog_data;
678
679 drm_intel_bo *prog_bo;
680
681 /* Offset in the batch to the CLIP state on pre-gen6. */
682 uint32_t state_offset;
683
684 /* As of gen6, this is the offset in the batch to the CLIP VP,
685 * instead of vp_bo.
686 */
687 uint32_t vp_offset;
688 } clip;
689
690
691 struct {
692 struct brw_sf_prog_data *prog_data;
693
694 drm_intel_bo *prog_bo;
695 uint32_t state_offset;
696 uint32_t vp_offset;
697 } sf;
698
699 struct {
700 struct brw_wm_prog_data *prog_data;
701 struct brw_wm_compile *compile_data;
702
703 /** Input sizes, calculated from active vertex program.
704 * One bit per fragment program input attribute.
705 */
706 GLbitfield input_size_masks[4];
707
708 /** offsets in the batch to sampler default colors (texture border color)
709 */
710 uint32_t sdc_offset[BRW_MAX_TEX_UNIT];
711
712 GLuint render_surf;
713 GLuint nr_surfaces;
714
715 GLuint max_threads;
716 drm_intel_bo *scratch_bo;
717
718 GLuint sampler_count;
719 uint32_t sampler_offset;
720
721 /** Binding table of pointers to surf_bo entries */
722 uint32_t bind_bo_offset;
723 uint32_t surf_offset[BRW_WM_MAX_SURF];
724 uint32_t state_offset; /* offset in batchbuffer to pre-gen6 WM state */
725
726 drm_intel_bo *prog_bo;
727 drm_intel_bo *const_bo; /* pull constant buffer. */
728 /**
729 * This is offset in the batch to the push constants on gen6.
730 *
731 * Pre-gen6, push constants live in the CURBE.
732 */
733 uint32_t push_const_offset;
734 } wm;
735
736
737 struct {
738 /* gen4 */
739 drm_intel_bo *prog_bo;
740
741 uint32_t state_offset;
742 uint32_t blend_state_offset;
743 uint32_t depth_stencil_state_offset;
744 uint32_t vp_offset;
745 } cc;
746
747 struct {
748 struct brw_query_object *obj;
749 drm_intel_bo *bo;
750 int index;
751 GLboolean active;
752 } query;
753 /* Used to give every program string a unique id
754 */
755 GLuint program_id;
756
757 int num_prepare_atoms, num_emit_atoms;
758 struct brw_tracked_state prepare_atoms[64], emit_atoms[64];
759 };
760
761
762 #define BRW_PACKCOLOR8888(r,g,b,a) ((r<<24) | (g<<16) | (b<<8) | a)
763
764 struct brw_instruction_info {
765 char *name;
766 int nsrc;
767 int ndst;
768 GLboolean is_arith;
769 };
770 extern const struct brw_instruction_info brw_opcodes[128];
771
772 /*======================================================================
773 * brw_vtbl.c
774 */
775 void brwInitVtbl( struct brw_context *brw );
776
777 /*======================================================================
778 * brw_context.c
779 */
780 GLboolean brwCreateContext( int api,
781 const struct gl_config *mesaVis,
782 __DRIcontext *driContextPriv,
783 void *sharedContextPrivate);
784
785 /*======================================================================
786 * brw_queryobj.c
787 */
788 void brw_init_queryobj_functions(struct dd_function_table *functions);
789 void brw_prepare_query_begin(struct brw_context *brw);
790 void brw_emit_query_begin(struct brw_context *brw);
791 void brw_emit_query_end(struct brw_context *brw);
792
793 /*======================================================================
794 * brw_state_dump.c
795 */
796 void brw_debug_batch(struct intel_context *intel);
797
798 /*======================================================================
799 * brw_tex.c
800 */
801 void brw_validate_textures( struct brw_context *brw );
802
803
804 /*======================================================================
805 * brw_program.c
806 */
807 void brwInitFragProgFuncs( struct dd_function_table *functions );
808
809
810 /* brw_urb.c
811 */
812 void brw_upload_urb_fence(struct brw_context *brw);
813
814 /* brw_curbe.c
815 */
816 void brw_upload_cs_urb_state(struct brw_context *brw);
817
818 /* brw_disasm.c */
819 int brw_disasm (FILE *file, struct brw_instruction *inst, int gen);
820
821 /*======================================================================
822 * Inline conversion functions. These are better-typed than the
823 * macros used previously:
824 */
825 static INLINE struct brw_context *
826 brw_context( struct gl_context *ctx )
827 {
828 return (struct brw_context *)ctx;
829 }
830
831 static INLINE struct brw_vertex_program *
832 brw_vertex_program(struct gl_vertex_program *p)
833 {
834 return (struct brw_vertex_program *) p;
835 }
836
837 static INLINE const struct brw_vertex_program *
838 brw_vertex_program_const(const struct gl_vertex_program *p)
839 {
840 return (const struct brw_vertex_program *) p;
841 }
842
843 static INLINE struct brw_fragment_program *
844 brw_fragment_program(struct gl_fragment_program *p)
845 {
846 return (struct brw_fragment_program *) p;
847 }
848
849 static INLINE const struct brw_fragment_program *
850 brw_fragment_program_const(const struct gl_fragment_program *p)
851 {
852 return (const struct brw_fragment_program *) p;
853 }
854
855 static inline
856 float convert_param(enum param_conversion conversion, float param)
857 {
858 union {
859 float f;
860 uint32_t u;
861 int32_t i;
862 } fi;
863
864 switch (conversion) {
865 case PARAM_NO_CONVERT:
866 return param;
867 case PARAM_CONVERT_F2I:
868 fi.i = param;
869 return fi.f;
870 case PARAM_CONVERT_F2U:
871 fi.u = param;
872 return fi.f;
873 case PARAM_CONVERT_F2B:
874 if (param != 0.0)
875 fi.i = 1;
876 else
877 fi.i = 0;
878 return fi.f;
879 default:
880 return param;
881 }
882 }
883
884 GLboolean brw_do_cubemap_normalize(struct exec_list *instructions);
885
886 #endif