2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
36 #include "intel_context.h"
37 #include "brw_structs.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
47 * URB - uniform resource buffer. A mid-sized buffer which is
48 * partitioned between the fixed function units and used for passing
49 * values (vertices, primitives, constants) between them.
51 * CURBE - constant URB entry. An urb region (entry) used to hold
52 * constant values which the fixed function units can be instructed to
53 * preload into the GRF when spawning a thread.
55 * VUE - vertex URB entry. An urb entry holding a vertex and usually
56 * a vertex header. The header contains control information and
57 * things like primitive type, Begin/end flags and clip codes.
59 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
60 * unit holding rasterization and interpolation parameters.
62 * GRF - general register file. One of several register files
63 * addressable by programmed threads. The inputs (r0, payload, curbe,
64 * urb) of the thread are preloaded to this area before the thread is
65 * spawned. The registers are individually 8 dwords wide and suitable
66 * for general usage. Registers holding thread input values are not
67 * special and may be overwritten.
69 * MRF - message register file. Threads communicate (and terminate)
70 * by sending messages. Message parameters are placed in contiguous
71 * MRF registers. All program output is via these messages. URB
72 * entries are populated by sending a message to the shared URB
73 * function containing the new data, together with a control word,
74 * often an unmodified copy of R0.
76 * R0 - GRF register 0. Typically holds control information used when
77 * sending messages to other threads.
79 * EU or GEN4 EU: The name of the programmable subsystem of the
80 * i965 hardware. Threads are executed by the EU, the registers
81 * described above are part of the EU architecture.
83 * Fixed function units:
85 * CS - Command streamer. Notional first unit, little software
86 * interaction. Holds the URB entries used for constant data, ie the
89 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
90 * this unit is responsible for pulling vertices out of vertex buffers
91 * in vram and injecting them into the processing pipe as VUEs. If
92 * enabled, it first passes them to a VS thread which is a good place
93 * for the driver to implement any active vertex shader.
95 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
96 * enabled, incoming strips etc are passed to GS threads in individual
97 * line/triangle/point units. The GS thread may perform arbitary
98 * computation and emit whatever primtives with whatever vertices it
99 * chooses. This makes GS an excellent place to implement GL's
100 * unfilled polygon modes, though of course it is capable of much
101 * more. Additionally, GS is used to translate away primitives not
102 * handled by latter units, including Quads and Lineloops.
104 * CS - Clipper. Mesa's clipping algorithms are imported to run on
105 * this unit. The fixed function part performs cliptesting against
106 * the 6 fixed clipplanes and makes descisions on whether or not the
107 * incoming primitive needs to be passed to a thread for clipping.
108 * User clip planes are handled via cooperation with the VS thread.
110 * SF - Strips Fans or Setup: Triangles are prepared for
111 * rasterization. Interpolation coefficients are calculated.
112 * Flatshading and two-side lighting usually performed here.
114 * WM - Windower. Interpolation of vertex attributes performed here.
115 * Fragment shader implemented here. SIMD aspects of EU taken full
116 * advantage of, as pixels are processed in blocks of 16.
118 * CC - Color Calculator. No EU threads associated with this unit.
119 * Handles blending and (presumably) depth and stencil testing.
123 #define BRW_MAX_CURBE (32*16)
126 struct brw_instruction
;
127 struct brw_vs_prog_key
;
128 struct brw_vec4_prog_key
;
129 struct brw_wm_prog_key
;
130 struct brw_wm_prog_data
;
134 BRW_STATE_FRAGMENT_PROGRAM
,
135 BRW_STATE_GEOMETRY_PROGRAM
,
136 BRW_STATE_VERTEX_PROGRAM
,
137 BRW_STATE_CURBE_OFFSETS
,
138 BRW_STATE_REDUCED_PRIMITIVE
,
143 BRW_STATE_VS_BINDING_TABLE
,
144 BRW_STATE_GS_BINDING_TABLE
,
145 BRW_STATE_PS_BINDING_TABLE
,
149 BRW_STATE_INDEX_BUFFER
,
150 BRW_STATE_VS_CONSTBUF
,
151 BRW_STATE_PROGRAM_CACHE
,
152 BRW_STATE_STATE_BASE_ADDRESS
,
153 BRW_STATE_VUE_MAP_VS
,
154 BRW_STATE_VUE_MAP_GEOM_OUT
,
155 BRW_STATE_TRANSFORM_FEEDBACK
,
156 BRW_STATE_RASTERIZER_DISCARD
,
158 BRW_STATE_UNIFORM_BUFFER
,
159 BRW_STATE_META_IN_PROGRESS
,
160 BRW_STATE_INTERPOLATION_MAP
,
161 BRW_STATE_PUSH_CONSTANT_ALLOCATION
,
165 #define BRW_NEW_URB_FENCE (1 << BRW_STATE_URB_FENCE)
166 #define BRW_NEW_FRAGMENT_PROGRAM (1 << BRW_STATE_FRAGMENT_PROGRAM)
167 #define BRW_NEW_GEOMETRY_PROGRAM (1 << BRW_STATE_GEOMETRY_PROGRAM)
168 #define BRW_NEW_VERTEX_PROGRAM (1 << BRW_STATE_VERTEX_PROGRAM)
169 #define BRW_NEW_CURBE_OFFSETS (1 << BRW_STATE_CURBE_OFFSETS)
170 #define BRW_NEW_REDUCED_PRIMITIVE (1 << BRW_STATE_REDUCED_PRIMITIVE)
171 #define BRW_NEW_PRIMITIVE (1 << BRW_STATE_PRIMITIVE)
172 #define BRW_NEW_CONTEXT (1 << BRW_STATE_CONTEXT)
173 #define BRW_NEW_PSP (1 << BRW_STATE_PSP)
174 #define BRW_NEW_SURFACES (1 << BRW_STATE_SURFACES)
175 #define BRW_NEW_VS_BINDING_TABLE (1 << BRW_STATE_VS_BINDING_TABLE)
176 #define BRW_NEW_GS_BINDING_TABLE (1 << BRW_STATE_GS_BINDING_TABLE)
177 #define BRW_NEW_PS_BINDING_TABLE (1 << BRW_STATE_PS_BINDING_TABLE)
178 #define BRW_NEW_INDICES (1 << BRW_STATE_INDICES)
179 #define BRW_NEW_VERTICES (1 << BRW_STATE_VERTICES)
181 * Used for any batch entry with a relocated pointer that will be used
182 * by any 3D rendering.
184 #define BRW_NEW_BATCH (1 << BRW_STATE_BATCH)
185 /** \see brw.state.depth_region */
186 #define BRW_NEW_INDEX_BUFFER (1 << BRW_STATE_INDEX_BUFFER)
187 #define BRW_NEW_VS_CONSTBUF (1 << BRW_STATE_VS_CONSTBUF)
188 #define BRW_NEW_PROGRAM_CACHE (1 << BRW_STATE_PROGRAM_CACHE)
189 #define BRW_NEW_STATE_BASE_ADDRESS (1 << BRW_STATE_STATE_BASE_ADDRESS)
190 #define BRW_NEW_VUE_MAP_VS (1 << BRW_STATE_VUE_MAP_VS)
191 #define BRW_NEW_VUE_MAP_GEOM_OUT (1 << BRW_STATE_VUE_MAP_GEOM_OUT)
192 #define BRW_NEW_TRANSFORM_FEEDBACK (1 << BRW_STATE_TRANSFORM_FEEDBACK)
193 #define BRW_NEW_RASTERIZER_DISCARD (1 << BRW_STATE_RASTERIZER_DISCARD)
194 #define BRW_NEW_STATS_WM (1 << BRW_STATE_STATS_WM)
195 #define BRW_NEW_UNIFORM_BUFFER (1 << BRW_STATE_UNIFORM_BUFFER)
196 #define BRW_NEW_META_IN_PROGRESS (1 << BRW_STATE_META_IN_PROGRESS)
197 #define BRW_NEW_INTERPOLATION_MAP (1 << BRW_STATE_INTERPOLATION_MAP)
198 #define BRW_NEW_PUSH_CONSTANT_ALLOCATION (1 << BRW_STATE_PUSH_CONSTANT_ALLOCATION)
200 struct brw_state_flags
{
201 /** State update flags signalled by mesa internals */
204 * State update flags signalled as the result of brw_tracked_state updates
207 /** State update flags signalled by brw_state_cache.c searches */
211 #define AUB_TRACE_TYPE_MASK 0x0000ff00
212 #define AUB_TRACE_TYPE_NOTYPE (0 << 8)
213 #define AUB_TRACE_TYPE_BATCH (1 << 8)
214 #define AUB_TRACE_TYPE_VERTEX_BUFFER (5 << 8)
215 #define AUB_TRACE_TYPE_2D_MAP (6 << 8)
216 #define AUB_TRACE_TYPE_CUBE_MAP (7 << 8)
217 #define AUB_TRACE_TYPE_VOLUME_MAP (9 << 8)
218 #define AUB_TRACE_TYPE_1D_MAP (10 << 8)
219 #define AUB_TRACE_TYPE_CONSTANT_BUFFER (11 << 8)
220 #define AUB_TRACE_TYPE_CONSTANT_URB (12 << 8)
221 #define AUB_TRACE_TYPE_INDEX_BUFFER (13 << 8)
222 #define AUB_TRACE_TYPE_GENERAL (14 << 8)
223 #define AUB_TRACE_TYPE_SURFACE (15 << 8)
226 * state_struct_type enum values are encoded with the top 16 bits representing
227 * the type to be delivered to the .aub file, and the bottom 16 bits
228 * representing the subtype. This macro performs the encoding.
230 #define ENCODE_SS_TYPE(type, subtype) (((type) << 16) | (subtype))
232 enum state_struct_type
{
233 AUB_TRACE_VS_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 1),
234 AUB_TRACE_GS_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 2),
235 AUB_TRACE_CLIP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 3),
236 AUB_TRACE_SF_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 4),
237 AUB_TRACE_WM_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 5),
238 AUB_TRACE_CC_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 6),
239 AUB_TRACE_CLIP_VP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 7),
240 AUB_TRACE_SF_VP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 8),
241 AUB_TRACE_CC_VP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x9),
242 AUB_TRACE_SAMPLER_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xa),
243 AUB_TRACE_KERNEL_INSTRUCTIONS
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xb),
244 AUB_TRACE_SCRATCH_SPACE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xc),
245 AUB_TRACE_SAMPLER_DEFAULT_COLOR
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xd),
247 AUB_TRACE_SCISSOR_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x15),
248 AUB_TRACE_BLEND_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x16),
249 AUB_TRACE_DEPTH_STENCIL_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x17),
251 AUB_TRACE_VERTEX_BUFFER
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_VERTEX_BUFFER
, 0),
252 AUB_TRACE_BINDING_TABLE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE
, 0x100),
253 AUB_TRACE_SURFACE_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE
, 0x200),
254 AUB_TRACE_VS_CONSTANTS
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER
, 0),
255 AUB_TRACE_WM_CONSTANTS
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER
, 1),
259 * Decode a state_struct_type value to determine the type that should be
260 * stored in the .aub file.
262 static inline uint32_t AUB_TRACE_TYPE(enum state_struct_type ss_type
)
264 return (ss_type
& 0xFFFF0000) >> 16;
268 * Decode a state_struct_type value to determine the subtype that should be
269 * stored in the .aub file.
271 static inline uint32_t AUB_TRACE_SUBTYPE(enum state_struct_type ss_type
)
273 return ss_type
& 0xFFFF;
276 /** Subclass of Mesa vertex program */
277 struct brw_vertex_program
{
278 struct gl_vertex_program program
;
283 /** Subclass of Mesa geometry program */
284 struct brw_geometry_program
{
285 struct gl_geometry_program program
;
286 unsigned id
; /**< serial no. to identify geom progs, never re-used */
290 /** Subclass of Mesa fragment program */
291 struct brw_fragment_program
{
292 struct gl_fragment_program program
;
293 GLuint id
; /**< serial no. to identify frag progs, never re-used */
297 struct gl_shader base
;
301 /** Shader IR transformed for native compile, at link time. */
302 struct exec_list
*ir
;
305 /* Data about a particular attempt to compile a program. Note that
306 * there can be many of these, each in a different GL state
307 * corresponding to a different brw_wm_prog_key struct, with different
310 * Note: brw_wm_prog_data_compare() must be updated when adding fields to this
313 struct brw_wm_prog_data
{
314 GLuint curb_read_length
;
315 GLuint urb_read_length
;
317 GLuint first_curbe_grf
;
318 GLuint first_curbe_grf_16
;
320 GLuint reg_blocks_16
;
321 GLuint total_scratch
;
323 unsigned binding_table_size
;
325 GLuint nr_params
; /**< number of float params/constants */
326 GLuint nr_pull_params
;
329 uint32_t prog_offset_16
;
332 * Mask of which interpolation modes are required by the fragment shader.
333 * Used in hardware setup on gen6+.
335 uint32_t barycentric_interp_modes
;
337 /* Pointers to tracked values (only valid once
338 * _mesa_load_state_parameters has been called at runtime).
340 * These must be the last fields of the struct (see
341 * brw_wm_prog_data_compare()).
344 const float **pull_param
;
348 * Enum representing the i965-specific vertex results that don't correspond
349 * exactly to any element of gl_varying_slot. The values of this enum are
350 * assigned such that they don't conflict with gl_varying_slot.
354 BRW_VARYING_SLOT_NDC
= VARYING_SLOT_MAX
,
355 BRW_VARYING_SLOT_PAD
,
357 * Technically this is not a varying but just a placeholder that
358 * compile_sf_prog() inserts into its VUE map to cause the gl_PointCoord
359 * builtin variable to be compiled correctly. see compile_sf_prog() for
362 BRW_VARYING_SLOT_PNTC
,
363 BRW_VARYING_SLOT_COUNT
368 * Data structure recording the relationship between the gl_varying_slot enum
369 * and "slots" within the vertex URB entry (VUE). A "slot" is defined as a
370 * single octaword within the VUE (128 bits).
372 * Note that each BRW register contains 256 bits (2 octawords), so when
373 * accessing the VUE in URB_NOSWIZZLE mode, each register corresponds to two
374 * consecutive VUE slots. When accessing the VUE in URB_INTERLEAVED mode (as
375 * in a vertex shader), each register corresponds to a single VUE slot, since
376 * it contains data for two separate vertices.
380 * Bitfield representing all varying slots that are (a) stored in this VUE
381 * map, and (b) actually written by the shader. Does not include any of
382 * the additional varying slots defined in brw_varying_slot.
384 GLbitfield64 slots_valid
;
387 * Map from gl_varying_slot value to VUE slot. For gl_varying_slots that are
388 * not stored in a slot (because they are not written, or because
389 * additional processing is applied before storing them in the VUE), the
392 signed char varying_to_slot
[BRW_VARYING_SLOT_COUNT
];
395 * Map from VUE slot to gl_varying_slot value. For slots that do not
396 * directly correspond to a gl_varying_slot, the value comes from
399 * For slots that are not in use, the value is BRW_VARYING_SLOT_COUNT (this
400 * simplifies code that uses the value stored in slot_to_varying to
401 * create a bit mask).
403 signed char slot_to_varying
[BRW_VARYING_SLOT_COUNT
];
406 * Total number of VUE slots in use
412 * Convert a VUE slot number into a byte offset within the VUE.
414 static inline GLuint
brw_vue_slot_to_offset(GLuint slot
)
420 * Convert a vertex output (brw_varying_slot) into a byte offset within the
423 static inline GLuint
brw_varying_to_offset(struct brw_vue_map
*vue_map
,
426 return brw_vue_slot_to_offset(vue_map
->varying_to_slot
[varying
]);
429 void brw_compute_vue_map(struct brw_context
*brw
, struct brw_vue_map
*vue_map
,
430 GLbitfield64 slots_valid
, bool userclip_active
);
434 * Mapping of VUE map slots to interpolation modes.
436 struct interpolation_mode_map
{
437 unsigned char mode
[BRW_VARYING_SLOT_COUNT
];
440 static inline bool brw_any_flat_varyings(struct interpolation_mode_map
*map
)
442 for (int i
= 0; i
< BRW_VARYING_SLOT_COUNT
; i
++)
443 if (map
->mode
[i
] == INTERP_QUALIFIER_FLAT
)
449 static inline bool brw_any_noperspective_varyings(struct interpolation_mode_map
*map
)
451 for (int i
= 0; i
< BRW_VARYING_SLOT_COUNT
; i
++)
452 if (map
->mode
[i
] == INTERP_QUALIFIER_NOPERSPECTIVE
)
459 struct brw_sf_prog_data
{
460 GLuint urb_read_length
;
463 /* Each vertex may have upto 12 attributes, 4 components each,
464 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
467 * Actually we use 4 for each, so call it 12 rows.
469 GLuint urb_entry_size
;
472 struct brw_clip_prog_data
{
473 GLuint curb_read_length
; /* user planes? */
475 GLuint urb_read_length
;
479 struct brw_ff_gs_prog_data
{
480 GLuint urb_read_length
;
484 * Gen6 transform feedback: Amount by which the streaming vertex buffer
485 * indices should be incremented each time the GS is invoked.
487 unsigned svbi_postincrement_value
;
491 /* Note: brw_vec4_prog_data_compare() must be updated when adding fields to
494 struct brw_vec4_prog_data
{
495 struct brw_vue_map vue_map
;
498 * Register where the thread expects to find input data from the URB
499 * (typically uniforms, followed by per-vertex inputs).
501 unsigned dispatch_grf_start_reg
;
503 GLuint curb_read_length
;
504 GLuint urb_read_length
;
506 GLuint nr_params
; /**< number of float params/constants */
507 GLuint nr_pull_params
; /**< number of dwords referenced by pull_param[] */
508 GLuint total_scratch
;
510 /* Used for calculating urb partitions. In the VS, this is the size of the
511 * URB entry used for both input and output to the thread. In the GS, this
512 * is the size of the URB entry used for output.
514 GLuint urb_entry_size
;
516 unsigned binding_table_size
;
518 /* These pointers must appear last. See brw_vec4_prog_data_compare(). */
520 const float **pull_param
;
524 /* Note: brw_vs_prog_data_compare() must be updated when adding fields to this
527 struct brw_vs_prog_data
{
528 struct brw_vec4_prog_data base
;
530 GLbitfield64 inputs_read
;
536 /* Note: brw_gs_prog_data_compare() must be updated when adding fields to
539 struct brw_gs_prog_data
541 struct brw_vec4_prog_data base
;
544 * Size of an output vertex, measured in HWORDS (32 bytes).
546 unsigned output_vertex_size_hwords
;
548 unsigned output_topology
;
551 /** Number of texture sampler units */
552 #define BRW_MAX_TEX_UNIT 16
554 /** Max number of render targets in a shader */
555 #define BRW_MAX_DRAW_BUFFERS 8
558 * Max number of binding table entries used for stream output.
560 * From the OpenGL 3.0 spec, table 6.44 (Transform Feedback State), the
561 * minimum value of MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS is 64.
563 * On Gen6, the size of transform feedback data is limited not by the number
564 * of components but by the number of binding table entries we set aside. We
565 * use one binding table entry for a float, one entry for a vector, and one
566 * entry per matrix column. Since the only way we can communicate our
567 * transform feedback capabilities to the client is via
568 * MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS, we need to plan for the
569 * worst case, in which all the varyings are floats, so we use up one binding
570 * table entry per component. Therefore we need to set aside at least 64
571 * binding table entries for use by transform feedback.
573 * Note: since we don't currently pack varyings, it is currently impossible
574 * for the client to actually use up all of these binding table entries--if
575 * all of their varyings were floats, they would run out of varying slots and
576 * fail to link. But that's a bug, so it seems prudent to go ahead and
577 * allocate the number of binding table entries we will need once the bug is
580 #define BRW_MAX_SOL_BINDINGS 64
582 /** Maximum number of actual buffers used for stream output */
583 #define BRW_MAX_SOL_BUFFERS 4
585 #define BRW_MAX_WM_UBOS 12
586 #define BRW_MAX_VS_UBOS 12
589 * Helpers to create Surface Binding Table indexes for draw buffers,
590 * textures, and constant buffers.
592 * Shader threads access surfaces via numeric handles, rather than directly
593 * using pointers. The binding table maps these numeric handles to the
594 * address of the actual buffer.
596 * For example, a shader might ask to sample from "surface 7." In this case,
597 * bind[7] would contain a pointer to a texture.
599 * Currently, our WM binding tables are (arbitrarily) programmed as follows:
601 * +-------------------------------+
602 * | 0 | Draw buffer 0 |
605 * | 7 | Draw buffer 7 |
606 * |-----|-------------------------|
607 * | 8 | WM Pull Constant Buffer |
608 * |-----|-------------------------|
612 * | 24 | Texture 15 |
613 * |-----|-------------------------|
618 * +-------------------------------+
620 * Our VS (and Gen7 GS) binding tables are programmed as follows:
622 * +-----+-------------------------+
623 * | 0 | Pull Constant Buffer |
624 * +-----+-------------------------+
628 * | 16 | Texture 15 |
629 * +-----+-------------------------+
634 * +-------------------------------+
636 * Our (gen6) GS binding tables are programmed as follows:
638 * +-----+-------------------------+
639 * | 0 | SOL Binding 0 |
642 * | 63 | SOL Binding 63 |
643 * +-----+-------------------------+
645 #define SURF_INDEX_DRAW(d) (d)
646 #define SURF_INDEX_FRAG_CONST_BUFFER (BRW_MAX_DRAW_BUFFERS + 1)
647 #define SURF_INDEX_TEXTURE(t) (BRW_MAX_DRAW_BUFFERS + 2 + (t))
648 #define SURF_INDEX_WM_UBO(u) (SURF_INDEX_TEXTURE(BRW_MAX_TEX_UNIT) + u)
649 #define SURF_INDEX_WM_SHADER_TIME (SURF_INDEX_WM_UBO(12))
650 /** Maximum size of the binding table. */
651 #define BRW_MAX_WM_SURFACES (SURF_INDEX_WM_SHADER_TIME + 1)
653 #define SURF_INDEX_VEC4_CONST_BUFFER (0)
654 #define SURF_INDEX_VEC4_TEXTURE(t) (SURF_INDEX_VEC4_CONST_BUFFER + 1 + (t))
655 #define SURF_INDEX_VEC4_UBO(u) (SURF_INDEX_VEC4_TEXTURE(BRW_MAX_TEX_UNIT) + u)
656 #define SURF_INDEX_VEC4_SHADER_TIME (SURF_INDEX_VEC4_UBO(12))
657 #define BRW_MAX_VEC4_SURFACES (SURF_INDEX_VEC4_SHADER_TIME + 1)
659 #define SURF_INDEX_GEN6_SOL_BINDING(t) (t)
660 #define BRW_MAX_GEN6_GS_SURFACES SURF_INDEX_GEN6_SOL_BINDING(BRW_MAX_SOL_BINDINGS)
663 * Stride in bytes between shader_time entries.
665 * We separate entries by a cacheline to reduce traffic between EUs writing to
668 #define SHADER_TIME_STRIDE 64
675 BRW_BLORP_CONST_COLOR_PROG
,
680 BRW_SF_UNIT
, /* scissor state on gen6 */
693 struct brw_cache_item
{
695 * Effectively part of the key, cache_id identifies what kind of state
696 * buffer is involved, and also which brw->state.dirty.cache flag should
697 * be set when this cache item is chosen.
699 enum brw_cache_id cache_id
;
700 /** 32-bit hash of the key data */
702 GLuint key_size
; /* for variable-sized keys */
709 struct brw_cache_item
*next
;
713 typedef bool (*cache_aux_compare_func
)(const void *a
, const void *b
,
714 int aux_size
, const void *key
);
715 typedef void (*cache_aux_free_func
)(const void *aux
);
718 struct brw_context
*brw
;
720 struct brw_cache_item
**items
;
722 GLuint size
, n_items
;
724 uint32_t next_offset
;
728 * Optional functions used in determining whether the prog_data for a new
729 * cache item matches an existing cache item (in case there's relevant data
730 * outside of the prog_data). If NULL, a plain memcmp is done.
732 cache_aux_compare_func aux_compare
[BRW_MAX_CACHE
];
733 /** Optional functions for freeing other pointers attached to a prog_data. */
734 cache_aux_free_func aux_free
[BRW_MAX_CACHE
];
738 /* Considered adding a member to this struct to document which flags
739 * an update might raise so that ordering of the state atoms can be
740 * checked or derived at runtime. Dropped the idea in favor of having
741 * a debug mode where the state is monitored for flags which are
742 * raised that have already been tested against.
744 struct brw_tracked_state
{
745 struct brw_state_flags dirty
;
746 void (*emit
)( struct brw_context
*brw
);
749 enum shader_time_shader_type
{
762 /* Flags for brw->state.cache.
764 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
765 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
766 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
767 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
768 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
769 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
770 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
771 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
772 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
773 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
774 #define CACHE_NEW_FF_GS_UNIT (1<<BRW_FF_GS_UNIT)
775 #define CACHE_NEW_FF_GS_PROG (1<<BRW_FF_GS_PROG)
776 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
777 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
778 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
779 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
781 struct brw_cached_batch_item
{
782 struct header
*header
;
784 struct brw_cached_batch_item
*next
;
789 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
790 * be easier if C allowed arrays of packed elements?
792 #define ATTRIB_BIT_DWORDS ((VERT_ATTRIB_MAX+31)/32)
794 struct brw_vertex_buffer
{
795 /** Buffer object containing the uploaded vertex data */
798 /** Byte stride between elements in the uploaded array */
802 struct brw_vertex_element
{
803 const struct gl_client_array
*glarray
;
807 /** The corresponding Mesa vertex attribute */
808 gl_vert_attrib attrib
;
809 /** Offset of the first element within the buffer object */
813 struct brw_query_object
{
814 struct gl_query_object Base
;
816 /** Last query BO associated with this query. */
819 /** Last index in bo with query data for this object. */
825 * Data shared between brw_context::vs and brw_context::gs
827 struct brw_stage_state
829 drm_intel_bo
*scratch_bo
;
830 drm_intel_bo
*const_bo
;
831 /** Offset in the program cache to the program */
832 uint32_t prog_offset
;
833 uint32_t state_offset
;
835 uint32_t push_const_offset
; /* Offset in the batchbuffer */
836 int push_const_size
; /* in 256-bit register increments */
838 uint32_t bind_bo_offset
;
839 uint32_t surf_offset
[BRW_MAX_VEC4_SURFACES
];
841 /** SAMPLER_STATE count and table offset */
842 uint32_t sampler_count
;
843 uint32_t sampler_offset
;
845 /** Offsets in the batch to sampler default colors (texture border color) */
846 uint32_t sdc_offset
[BRW_MAX_TEX_UNIT
];
851 * brw_context is derived from gl_context.
855 struct gl_context ctx
; /**< base class, must be first field */
859 void (*destroy
) (struct brw_context
* brw
);
860 void (*finish_batch
) (struct brw_context
* brw
);
861 void (*new_batch
) (struct brw_context
* brw
);
863 void (*update_texture_surface
)(struct gl_context
*ctx
,
865 uint32_t *binding_table
,
866 unsigned surf_index
);
867 void (*update_renderbuffer_surface
)(struct brw_context
*brw
,
868 struct gl_renderbuffer
*rb
,
871 void (*update_null_renderbuffer_surface
)(struct brw_context
*brw
,
873 void (*create_constant_surface
)(struct brw_context
*brw
,
877 uint32_t *out_offset
,
880 /** Upload a SAMPLER_STATE table. */
881 void (*upload_sampler_state_table
)(struct brw_context
*brw
,
882 struct gl_program
*prog
,
883 uint32_t sampler_count
,
884 uint32_t *sst_offset
,
885 uint32_t *sdc_offset
);
888 * Send the appropriate state packets to configure depth, stencil, and
889 * HiZ buffers (i965+ only)
891 void (*emit_depth_stencil_hiz
)(struct brw_context
*brw
,
892 struct intel_mipmap_tree
*depth_mt
,
893 uint32_t depth_offset
,
894 uint32_t depthbuffer_format
,
895 uint32_t depth_surface_type
,
896 struct intel_mipmap_tree
*stencil_mt
,
897 bool hiz
, bool separate_stencil
,
898 uint32_t width
, uint32_t height
,
899 uint32_t tile_x
, uint32_t tile_y
);
905 drm_intel_context
*hw_ctx
;
907 struct intel_batchbuffer batch
;
914 uint32_t buffer_offset
;
919 * Set if rendering has occured to the drawable's front buffer.
921 * This is used in the DRI2 case to detect that glFlush should also copy
922 * the contents of the fake front buffer to the real front buffer.
924 bool front_buffer_dirty
;
927 * Track whether front-buffer rendering is currently enabled
929 * A separate flag is used to track this in order to support MRT more
932 bool is_front_buffer_rendering
;
935 * Track whether front-buffer is the current read target.
937 * This is closely associated with is_front_buffer_rendering, but may
938 * be set separately. The DRI2 fake front buffer must be referenced
941 bool is_front_buffer_reading
;
943 /** Framerate throttling: @{ */
944 drm_intel_bo
*first_post_swapbuffers_batch
;
955 bool always_flush_batch
;
956 bool always_flush_cache
;
957 bool disable_throttling
;
960 driOptionCache optionCache
;
963 GLuint primitive
; /**< Hardware primitive, such as _3DPRIM_TRILIST. */
965 GLenum reduced_primitive
;
968 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
969 * variable is set, this is the flag indicating to do expensive work that
970 * might lead to a perf_debug() call.
974 uint32_t max_gtt_map_object_size
;
976 bool emit_state_always
;
986 bool has_separate_stencil
;
987 bool must_use_separate_stencil
;
990 bool has_surface_tile_offset
;
992 bool has_negative_rhw_bug
;
993 bool has_aa_line_parameters
;
997 * Some versions of Gen hardware don't do centroid interpolation correctly
998 * on unlit pixels, causing incorrect values for derivatives near triangle
999 * edges. Enabling this flag causes the fragment shader to use
1000 * non-centroid interpolation for unlit pixels, at the expense of two extra
1001 * fragment shader instructions.
1003 bool needs_unlit_centroid_workaround
;
1007 struct brw_state_flags dirty
;
1010 struct brw_cache cache
;
1011 struct brw_cached_batch_item
*cached_batch_items
;
1013 /* Whether a meta-operation is in progress. */
1014 bool meta_in_progress
;
1017 struct brw_vertex_element inputs
[VERT_ATTRIB_MAX
];
1018 struct brw_vertex_buffer buffers
[VERT_ATTRIB_MAX
];
1020 struct brw_vertex_element
*enabled
[VERT_ATTRIB_MAX
];
1024 /* Summary of size and varying of active arrays, so we can check
1025 * for changes to this state:
1027 unsigned int min_index
, max_index
;
1029 /* Offset from start of vertex buffer so we can avoid redefining
1030 * the same VB packed over and over again.
1032 unsigned int start_vertex_bias
;
1037 * Index buffer for this draw_prims call.
1039 * Updates are signaled by BRW_NEW_INDICES.
1041 const struct _mesa_index_buffer
*ib
;
1043 /* Updates are signaled by BRW_NEW_INDEX_BUFFER. */
1047 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
1048 * avoid re-uploading the IB packet over and over if we're actually
1049 * referencing the same index buffer.
1051 unsigned int start_vertex_offset
;
1054 /* Active vertex program:
1056 const struct gl_vertex_program
*vertex_program
;
1057 const struct gl_geometry_program
*geometry_program
;
1058 const struct gl_fragment_program
*fragment_program
;
1060 /* hw-dependent 3DSTATE_VF_STATISTICS opcode */
1061 uint32_t CMD_VF_STATISTICS
;
1062 /* hw-dependent 3DSTATE_PIPELINE_SELECT opcode */
1063 uint32_t CMD_PIPELINE_SELECT
;
1066 * Platform specific constants containing the maximum number of threads
1067 * for each pipeline stage.
1073 /* BRW_NEW_URB_ALLOCATIONS:
1076 GLuint vsize
; /* vertex size plus header in urb registers */
1077 GLuint csize
; /* constant buffer size in urb registers */
1078 GLuint sfsize
; /* setup data size in urb registers */
1082 GLuint max_vs_entries
; /* Maximum number of VS entries */
1083 GLuint max_gs_entries
; /* Maximum number of GS entries */
1085 GLuint nr_vs_entries
;
1086 GLuint nr_gs_entries
;
1087 GLuint nr_clip_entries
;
1088 GLuint nr_sf_entries
;
1089 GLuint nr_cs_entries
;
1096 GLuint size
; /* Hardware URB size, in KB. */
1098 /* gen6: True if the most recently sent _3DSTATE_URB message allocated
1099 * URB space for the GS.
1101 bool gen6_gs_previously_active
;
1105 /* BRW_NEW_CURBE_OFFSETS:
1108 GLuint wm_start
; /**< pos of first wm const in CURBE buffer */
1109 GLuint wm_size
; /**< number of float[4] consts, multiple of 16 */
1116 drm_intel_bo
*curbe_bo
;
1117 /** Offset within curbe_bo of space for current curbe entry */
1118 GLuint curbe_offset
;
1119 /** Offset within curbe_bo of space for next curbe entry */
1120 GLuint curbe_next_offset
;
1123 * Copy of the last set of CURBEs uploaded. Frequently we'll end up
1124 * in brw_curbe.c with the same set of constant data to be uploaded,
1125 * so we'd rather not upload new constants in that case (it can cause
1126 * a pipeline bubble since only up to 4 can be pipelined at a time).
1130 * Allocation for where to calculate the next set of CURBEs.
1131 * It's a hot enough path that malloc/free of that data matters.
1138 * Layout of vertex data exiting the vertex shader.
1140 * BRW_NEW_VUE_MAP_VS is flagged when this VUE map changes.
1142 struct brw_vue_map vue_map_vs
;
1145 * Layout of vertex data exiting the geometry portion of the pipleine.
1146 * This comes from the geometry shader if one exists, otherwise from the
1149 * BRW_NEW_VUE_MAP_GEOM_OUT is flagged when the VUE map changes.
1151 struct brw_vue_map vue_map_geom_out
;
1154 * Data structures used by all vec4 program compiles (not specific to any
1155 * particular program).
1158 struct ra_regs
*regs
;
1161 * Array of the ra classes for the unaligned contiguous register
1167 * Mapping for register-allocated objects in *regs to the first
1168 * GRF for that object.
1170 uint8_t *ra_reg_to_grf
;
1174 struct brw_stage_state base
;
1175 struct brw_vs_prog_data
*prog_data
;
1179 struct brw_stage_state base
;
1180 struct brw_gs_prog_data
*prog_data
;
1184 struct brw_ff_gs_prog_data
*prog_data
;
1187 /** Offset in the program cache to the CLIP program pre-gen6 */
1188 uint32_t prog_offset
;
1189 uint32_t state_offset
;
1191 uint32_t bind_bo_offset
;
1192 uint32_t surf_offset
[BRW_MAX_GEN6_GS_SURFACES
];
1196 struct brw_clip_prog_data
*prog_data
;
1198 /** Offset in the program cache to the CLIP program pre-gen6 */
1199 uint32_t prog_offset
;
1201 /* Offset in the batch to the CLIP state on pre-gen6. */
1202 uint32_t state_offset
;
1204 /* As of gen6, this is the offset in the batch to the CLIP VP,
1212 struct brw_sf_prog_data
*prog_data
;
1214 /** Offset in the program cache to the CLIP program pre-gen6 */
1215 uint32_t prog_offset
;
1216 uint32_t state_offset
;
1221 struct brw_wm_prog_data
*prog_data
;
1225 drm_intel_bo
*scratch_bo
;
1228 * Buffer object used in place of multisampled null render targets on
1229 * Gen6. See brw_update_null_renderbuffer_surface().
1231 drm_intel_bo
*multisampled_null_render_target_bo
;
1233 /** Offset in the program cache to the WM program */
1234 uint32_t prog_offset
;
1236 uint32_t state_offset
; /* offset in batchbuffer to pre-gen6 WM state */
1238 drm_intel_bo
*const_bo
; /* pull constant buffer. */
1240 * This is offset in the batch to the push constants on gen6.
1242 * Pre-gen6, push constants live in the CURBE.
1244 uint32_t push_const_offset
;
1246 /** Binding table of pointers to surf_bo entries */
1247 uint32_t bind_bo_offset
;
1248 uint32_t surf_offset
[BRW_MAX_WM_SURFACES
];
1250 /** SAMPLER_STATE count and table offset */
1251 uint32_t sampler_count
;
1252 uint32_t sampler_offset
;
1254 /** Offsets in the batch to sampler default colors (texture border color)
1256 uint32_t sdc_offset
[BRW_MAX_TEX_UNIT
];
1259 struct ra_regs
*regs
;
1261 /** Array of the ra classes for the unaligned contiguous
1262 * register block sizes used.
1267 * Mapping for register-allocated objects in *regs to the first
1268 * GRF for that object.
1270 uint8_t *ra_reg_to_grf
;
1273 * ra class for the aligned pairs we use for PLN, which doesn't
1274 * appear in *classes.
1276 int aligned_pairs_class
;
1282 uint32_t state_offset
;
1283 uint32_t blend_state_offset
;
1284 uint32_t depth_stencil_state_offset
;
1289 struct brw_query_object
*obj
;
1294 const struct brw_tracked_state
**atoms
;
1296 /* If (INTEL_DEBUG & DEBUG_BATCH) */
1300 enum state_struct_type type
;
1301 } *state_batch_list
;
1302 int state_batch_count
;
1304 uint32_t render_target_format
[MESA_FORMAT_COUNT
];
1305 bool format_supported_as_render_target
[MESA_FORMAT_COUNT
];
1307 /* Interpolation modes, one byte per vue slot.
1308 * Used Gen4/5 by the clip|sf|wm stages. Ignored on Gen6+.
1310 struct interpolation_mode_map interpolation_mode
;
1312 /* PrimitiveRestart */
1315 bool enable_cut_index
;
1318 /** Computed depth/stencil/hiz state from the current attached
1319 * renderbuffers, valid only during the drawing state upload loop after
1320 * brw_workaround_depthstencil_alignment().
1323 struct intel_mipmap_tree
*depth_mt
;
1324 struct intel_mipmap_tree
*stencil_mt
;
1326 /* Inter-tile (page-aligned) byte offsets. */
1327 uint32_t depth_offset
, hiz_offset
, stencil_offset
;
1328 /* Intra-tile x,y offsets for drawing to depth/stencil/hiz */
1329 uint32_t tile_x
, tile_y
;
1332 uint32_t num_instances
;
1337 struct gl_shader_program
**shader_programs
;
1338 struct gl_program
**programs
;
1339 enum shader_time_shader_type
*types
;
1340 uint64_t *cumulative
;
1346 __DRIcontext
*driContext
;
1347 struct intel_screen
*intelScreen
;
1348 void (*saved_viewport
)(struct gl_context
*ctx
,
1349 GLint x
, GLint y
, GLsizei width
, GLsizei height
);
1352 /*======================================================================
1355 void brwInitVtbl( struct brw_context
*brw
);
1357 /*======================================================================
1360 bool brwCreateContext(int api
,
1361 const struct gl_config
*mesaVis
,
1362 __DRIcontext
*driContextPriv
,
1363 unsigned major_version
,
1364 unsigned minor_version
,
1367 void *sharedContextPrivate
);
1369 /*======================================================================
1372 void brw_get_depthstencil_tile_masks(struct intel_mipmap_tree
*depth_mt
,
1373 uint32_t depth_level
,
1374 uint32_t depth_layer
,
1375 struct intel_mipmap_tree
*stencil_mt
,
1376 uint32_t *out_tile_mask_x
,
1377 uint32_t *out_tile_mask_y
);
1378 void brw_workaround_depthstencil_alignment(struct brw_context
*brw
,
1379 GLbitfield clear_mask
);
1381 /* brw_object_purgeable.c */
1382 void brw_init_object_purgeable_functions(struct dd_function_table
*functions
);
1384 /*======================================================================
1387 void brw_init_common_queryobj_functions(struct dd_function_table
*functions
);
1388 void gen4_init_queryobj_functions(struct dd_function_table
*functions
);
1389 void brw_emit_query_begin(struct brw_context
*brw
);
1390 void brw_emit_query_end(struct brw_context
*brw
);
1392 /** gen6_queryobj.c */
1393 void gen6_init_queryobj_functions(struct dd_function_table
*functions
);
1395 /*======================================================================
1398 void brw_debug_batch(struct brw_context
*brw
);
1399 void brw_annotate_aub(struct brw_context
*brw
);
1401 /*======================================================================
1404 void brw_validate_textures( struct brw_context
*brw
);
1407 /*======================================================================
1410 void brwInitFragProgFuncs( struct dd_function_table
*functions
);
1412 int brw_get_scratch_size(int size
);
1413 void brw_get_scratch_bo(struct brw_context
*brw
,
1414 drm_intel_bo
**scratch_bo
, int size
);
1415 void brw_init_shader_time(struct brw_context
*brw
);
1416 int brw_get_shader_time_index(struct brw_context
*brw
,
1417 struct gl_shader_program
*shader_prog
,
1418 struct gl_program
*prog
,
1419 enum shader_time_shader_type type
);
1420 void brw_collect_and_report_shader_time(struct brw_context
*brw
);
1421 void brw_destroy_shader_time(struct brw_context
*brw
);
1425 void brw_upload_urb_fence(struct brw_context
*brw
);
1429 void brw_upload_cs_urb_state(struct brw_context
*brw
);
1431 /* brw_fs_reg_allocate.cpp
1433 void brw_fs_alloc_reg_sets(struct brw_context
*brw
);
1435 /* brw_vec4_reg_allocate.cpp */
1436 void brw_vec4_alloc_reg_set(struct brw_context
*brw
);
1439 int brw_disasm (FILE *file
, struct brw_instruction
*inst
, int gen
);
1442 gl_clip_plane
*brw_select_clip_planes(struct gl_context
*ctx
);
1444 /* brw_draw_upload.c */
1445 unsigned brw_get_vertex_surface_type(struct brw_context
*brw
,
1446 const struct gl_client_array
*glarray
);
1447 unsigned brw_get_index_type(GLenum type
);
1449 /* brw_wm_surface_state.c */
1450 void brw_init_surface_formats(struct brw_context
*brw
);
1452 brw_update_sol_surface(struct brw_context
*brw
,
1453 struct gl_buffer_object
*buffer_obj
,
1454 uint32_t *out_offset
, unsigned num_vector_components
,
1455 unsigned stride_dwords
, unsigned offset_dwords
);
1456 void brw_upload_ubo_surfaces(struct brw_context
*brw
,
1457 struct gl_shader
*shader
,
1458 uint32_t *surf_offsets
);
1460 /* brw_surface_formats.c */
1461 bool brw_is_hiz_depth_format(struct brw_context
*ctx
, gl_format format
);
1462 bool brw_render_target_supported(struct brw_context
*brw
,
1463 struct gl_renderbuffer
*rb
);
1467 brw_begin_transform_feedback(struct gl_context
*ctx
, GLenum mode
,
1468 struct gl_transform_feedback_object
*obj
);
1470 brw_end_transform_feedback(struct gl_context
*ctx
,
1471 struct gl_transform_feedback_object
*obj
);
1473 /* gen7_sol_state.c */
1475 gen7_begin_transform_feedback(struct gl_context
*ctx
, GLenum mode
,
1476 struct gl_transform_feedback_object
*obj
);
1478 gen7_end_transform_feedback(struct gl_context
*ctx
,
1479 struct gl_transform_feedback_object
*obj
);
1481 /* brw_blorp_blit.cpp */
1483 brw_blorp_framebuffer(struct brw_context
*brw
,
1484 GLint srcX0
, GLint srcY0
, GLint srcX1
, GLint srcY1
,
1485 GLint dstX0
, GLint dstY0
, GLint dstX1
, GLint dstY1
,
1486 GLbitfield mask
, GLenum filter
);
1489 brw_blorp_copytexsubimage(struct brw_context
*brw
,
1490 struct gl_renderbuffer
*src_rb
,
1491 struct gl_texture_image
*dst_image
,
1493 int srcX0
, int srcY0
,
1494 int dstX0
, int dstY0
,
1495 int width
, int height
);
1497 /* gen6_multisample_state.c */
1499 gen6_emit_3dstate_multisample(struct brw_context
*brw
,
1500 unsigned num_samples
);
1502 gen6_emit_3dstate_sample_mask(struct brw_context
*brw
,
1503 unsigned num_samples
, float coverage
,
1504 bool coverage_invert
, unsigned sample_mask
);
1506 gen6_get_sample_position(struct gl_context
*ctx
,
1507 struct gl_framebuffer
*fb
,
1513 gen7_emit_push_constant_state(struct brw_context
*brw
, unsigned vs_size
,
1514 unsigned gs_size
, unsigned fs_size
);
1517 gen7_emit_urb_state(struct brw_context
*brw
,
1518 unsigned nr_vs_entries
, unsigned vs_size
,
1519 unsigned vs_start
, unsigned nr_gs_entries
,
1520 unsigned gs_size
, unsigned gs_start
);
1524 /*======================================================================
1525 * Inline conversion functions. These are better-typed than the
1526 * macros used previously:
1528 static INLINE
struct brw_context
*
1529 brw_context( struct gl_context
*ctx
)
1531 return (struct brw_context
*)ctx
;
1534 static INLINE
struct brw_vertex_program
*
1535 brw_vertex_program(struct gl_vertex_program
*p
)
1537 return (struct brw_vertex_program
*) p
;
1540 static INLINE
const struct brw_vertex_program
*
1541 brw_vertex_program_const(const struct gl_vertex_program
*p
)
1543 return (const struct brw_vertex_program
*) p
;
1546 static INLINE
struct brw_fragment_program
*
1547 brw_fragment_program(struct gl_fragment_program
*p
)
1549 return (struct brw_fragment_program
*) p
;
1552 static INLINE
const struct brw_fragment_program
*
1553 brw_fragment_program_const(const struct gl_fragment_program
*p
)
1555 return (const struct brw_fragment_program
*) p
;
1559 * Pre-gen6, the register file of the EUs was shared between threads,
1560 * and each thread used some subset allocated on a 16-register block
1561 * granularity. The unit states wanted these block counts.
1564 brw_register_blocks(int reg_count
)
1566 return ALIGN(reg_count
, 16) / 16 - 1;
1569 static inline uint32_t
1570 brw_program_reloc(struct brw_context
*brw
, uint32_t state_offset
,
1571 uint32_t prog_offset
)
1573 if (brw
->gen
>= 5) {
1574 /* Using state base address. */
1578 drm_intel_bo_emit_reloc(brw
->batch
.bo
,
1582 I915_GEM_DOMAIN_INSTRUCTION
, 0);
1584 return brw
->cache
.bo
->offset
+ prog_offset
;
1587 bool brw_do_cubemap_normalize(struct exec_list
*instructions
);
1588 bool brw_lower_texture_gradients(struct brw_context
*brw
,
1589 struct exec_list
*instructions
);
1591 struct opcode_desc
{
1597 extern const struct opcode_desc opcode_descs
[128];
1600 brw_emit_depthbuffer(struct brw_context
*brw
);
1603 brw_emit_depth_stencil_hiz(struct brw_context
*brw
,
1604 struct intel_mipmap_tree
*depth_mt
,
1605 uint32_t depth_offset
, uint32_t depthbuffer_format
,
1606 uint32_t depth_surface_type
,
1607 struct intel_mipmap_tree
*stencil_mt
,
1608 bool hiz
, bool separate_stencil
,
1609 uint32_t width
, uint32_t height
,
1610 uint32_t tile_x
, uint32_t tile_y
);
1613 gen7_emit_depth_stencil_hiz(struct brw_context
*brw
,
1614 struct intel_mipmap_tree
*depth_mt
,
1615 uint32_t depth_offset
, uint32_t depthbuffer_format
,
1616 uint32_t depth_surface_type
,
1617 struct intel_mipmap_tree
*stencil_mt
,
1618 bool hiz
, bool separate_stencil
,
1619 uint32_t width
, uint32_t height
,
1620 uint32_t tile_x
, uint32_t tile_y
);
1622 extern const GLuint prim_to_hw_prim
[GL_POLYGON
+1];
1625 brw_setup_vec4_key_clip_info(struct brw_context
*brw
,
1626 struct brw_vec4_prog_key
*key
,
1627 bool program_uses_clip_distance
);