i965/gen6: Move the blend state to state streaming.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
35
36 #include "intel_context.h"
37 #include "brw_structs.h"
38 #include "main/imports.h"
39
40
41 /* Glossary:
42 *
43 * URB - uniform resource buffer. A mid-sized buffer which is
44 * partitioned between the fixed function units and used for passing
45 * values (vertices, primitives, constants) between them.
46 *
47 * CURBE - constant URB entry. An urb region (entry) used to hold
48 * constant values which the fixed function units can be instructed to
49 * preload into the GRF when spawning a thread.
50 *
51 * VUE - vertex URB entry. An urb entry holding a vertex and usually
52 * a vertex header. The header contains control information and
53 * things like primitive type, Begin/end flags and clip codes.
54 *
55 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
56 * unit holding rasterization and interpolation parameters.
57 *
58 * GRF - general register file. One of several register files
59 * addressable by programmed threads. The inputs (r0, payload, curbe,
60 * urb) of the thread are preloaded to this area before the thread is
61 * spawned. The registers are individually 8 dwords wide and suitable
62 * for general usage. Registers holding thread input values are not
63 * special and may be overwritten.
64 *
65 * MRF - message register file. Threads communicate (and terminate)
66 * by sending messages. Message parameters are placed in contiguous
67 * MRF registers. All program output is via these messages. URB
68 * entries are populated by sending a message to the shared URB
69 * function containing the new data, together with a control word,
70 * often an unmodified copy of R0.
71 *
72 * R0 - GRF register 0. Typically holds control information used when
73 * sending messages to other threads.
74 *
75 * EU or GEN4 EU: The name of the programmable subsystem of the
76 * i965 hardware. Threads are executed by the EU, the registers
77 * described above are part of the EU architecture.
78 *
79 * Fixed function units:
80 *
81 * CS - Command streamer. Notional first unit, little software
82 * interaction. Holds the URB entries used for constant data, ie the
83 * CURBEs.
84 *
85 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
86 * this unit is responsible for pulling vertices out of vertex buffers
87 * in vram and injecting them into the processing pipe as VUEs. If
88 * enabled, it first passes them to a VS thread which is a good place
89 * for the driver to implement any active vertex shader.
90 *
91 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
92 * enabled, incoming strips etc are passed to GS threads in individual
93 * line/triangle/point units. The GS thread may perform arbitary
94 * computation and emit whatever primtives with whatever vertices it
95 * chooses. This makes GS an excellent place to implement GL's
96 * unfilled polygon modes, though of course it is capable of much
97 * more. Additionally, GS is used to translate away primitives not
98 * handled by latter units, including Quads and Lineloops.
99 *
100 * CS - Clipper. Mesa's clipping algorithms are imported to run on
101 * this unit. The fixed function part performs cliptesting against
102 * the 6 fixed clipplanes and makes descisions on whether or not the
103 * incoming primitive needs to be passed to a thread for clipping.
104 * User clip planes are handled via cooperation with the VS thread.
105 *
106 * SF - Strips Fans or Setup: Triangles are prepared for
107 * rasterization. Interpolation coefficients are calculated.
108 * Flatshading and two-side lighting usually performed here.
109 *
110 * WM - Windower. Interpolation of vertex attributes performed here.
111 * Fragment shader implemented here. SIMD aspects of EU taken full
112 * advantage of, as pixels are processed in blocks of 16.
113 *
114 * CC - Color Calculator. No EU threads associated with this unit.
115 * Handles blending and (presumably) depth and stencil testing.
116 */
117
118
119 #define BRW_MAX_CURBE (32*16)
120
121 struct brw_context;
122
123 #define BRW_NEW_URB_FENCE 0x1
124 #define BRW_NEW_FRAGMENT_PROGRAM 0x2
125 #define BRW_NEW_VERTEX_PROGRAM 0x4
126 #define BRW_NEW_INPUT_DIMENSIONS 0x8
127 #define BRW_NEW_CURBE_OFFSETS 0x10
128 #define BRW_NEW_REDUCED_PRIMITIVE 0x20
129 #define BRW_NEW_PRIMITIVE 0x40
130 #define BRW_NEW_CONTEXT 0x80
131 #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100
132 #define BRW_NEW_PSP 0x800
133 #define BRW_NEW_WM_SURFACES 0x1000
134 #define BRW_NEW_BINDING_TABLE 0x2000
135 #define BRW_NEW_INDICES 0x4000
136 #define BRW_NEW_VERTICES 0x8000
137 /**
138 * Used for any batch entry with a relocated pointer that will be used
139 * by any 3D rendering.
140 */
141 #define BRW_NEW_BATCH 0x10000
142 /** \see brw.state.depth_region */
143 #define BRW_NEW_DEPTH_BUFFER 0x20000
144 #define BRW_NEW_NR_WM_SURFACES 0x40000
145 #define BRW_NEW_NR_VS_SURFACES 0x80000
146 #define BRW_NEW_INDEX_BUFFER 0x100000
147 #define BRW_NEW_VS_CONSTBUF 0x200000
148 #define BRW_NEW_WM_CONSTBUF 0x400000
149
150 struct brw_state_flags {
151 /** State update flags signalled by mesa internals */
152 GLuint mesa;
153 /**
154 * State update flags signalled as the result of brw_tracked_state updates
155 */
156 GLuint brw;
157 /** State update flags signalled by brw_state_cache.c searches */
158 GLuint cache;
159 };
160
161
162 /** Subclass of Mesa vertex program */
163 struct brw_vertex_program {
164 struct gl_vertex_program program;
165 GLuint id;
166 GLboolean use_const_buffer;
167 };
168
169
170 /** Subclass of Mesa fragment program */
171 struct brw_fragment_program {
172 struct gl_fragment_program program;
173 GLuint id; /**< serial no. to identify frag progs, never re-used */
174
175 /** for debugging, which texture units are referenced */
176 GLbitfield tex_units_used;
177 };
178
179 struct brw_shader {
180 struct gl_shader base;
181
182 /** Shader IR transformed for native compile, at link time. */
183 struct exec_list *ir;
184 };
185
186 struct brw_shader_program {
187 struct gl_shader_program base;
188 };
189
190 enum param_conversion {
191 PARAM_NO_CONVERT,
192 PARAM_CONVERT_F2I,
193 PARAM_CONVERT_F2U,
194 PARAM_CONVERT_F2B,
195 };
196
197 /* Data about a particular attempt to compile a program. Note that
198 * there can be many of these, each in a different GL state
199 * corresponding to a different brw_wm_prog_key struct, with different
200 * compiled programs:
201 */
202 struct brw_wm_prog_data {
203 GLuint curb_read_length;
204 GLuint urb_read_length;
205
206 GLuint first_curbe_grf;
207 GLuint first_curbe_grf_16;
208 GLuint total_grf;
209 GLuint total_grf_16;
210 GLuint total_scratch;
211
212 GLuint nr_params; /**< number of float params/constants */
213 GLuint nr_pull_params;
214 GLboolean error;
215 int dispatch_width;
216 uint32_t prog_offset_16;
217
218 /* Pointer to tracked values (only valid once
219 * _mesa_load_state_parameters has been called at runtime).
220 */
221 const float *param[MAX_UNIFORMS * 4]; /* should be: BRW_MAX_CURBE */
222 enum param_conversion param_convert[MAX_UNIFORMS * 4];
223 const float *pull_param[MAX_UNIFORMS * 4];
224 enum param_conversion pull_param_convert[MAX_UNIFORMS * 4];
225 };
226
227 struct brw_sf_prog_data {
228 GLuint urb_read_length;
229 GLuint total_grf;
230
231 /* Each vertex may have upto 12 attributes, 4 components each,
232 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
233 * rows.
234 *
235 * Actually we use 4 for each, so call it 12 rows.
236 */
237 GLuint urb_entry_size;
238 };
239
240 struct brw_clip_prog_data {
241 GLuint curb_read_length; /* user planes? */
242 GLuint clip_mode;
243 GLuint urb_read_length;
244 GLuint total_grf;
245 };
246
247 struct brw_gs_prog_data {
248 GLuint urb_read_length;
249 GLuint total_grf;
250 };
251
252 struct brw_vs_prog_data {
253 GLuint curb_read_length;
254 GLuint urb_read_length;
255 GLuint total_grf;
256 GLbitfield64 outputs_written;
257 GLuint nr_params; /**< number of float params/constants */
258
259 GLuint inputs_read;
260
261 /* Used for calculating urb partitions:
262 */
263 GLuint urb_entry_size;
264 };
265
266
267 /* Size == 0 if output either not written, or always [0,0,0,1]
268 */
269 struct brw_vs_ouput_sizes {
270 GLubyte output_size[VERT_RESULT_MAX];
271 };
272
273
274 /** Number of texture sampler units */
275 #define BRW_MAX_TEX_UNIT 16
276
277 /** Max number of render targets in a shader */
278 #define BRW_MAX_DRAW_BUFFERS 8
279
280 /**
281 * Size of our surface binding table for the WM.
282 * This contains pointers to the drawing surfaces and current texture
283 * objects and shader constant buffers (+2).
284 */
285 #define BRW_WM_MAX_SURF (BRW_MAX_DRAW_BUFFERS + BRW_MAX_TEX_UNIT + 1)
286
287 /**
288 * Helpers to convert drawing buffers, textures and constant buffers
289 * to surface binding table indexes, for WM.
290 */
291 #define SURF_INDEX_DRAW(d) (d)
292 #define SURF_INDEX_FRAG_CONST_BUFFER (BRW_MAX_DRAW_BUFFERS)
293 #define SURF_INDEX_TEXTURE(t) (BRW_MAX_DRAW_BUFFERS + 1 + (t))
294
295 /**
296 * Size of surface binding table for the VS.
297 * Only one constant buffer for now.
298 */
299 #define BRW_VS_MAX_SURF 1
300
301 /**
302 * Only a VS constant buffer
303 */
304 #define SURF_INDEX_VERT_CONST_BUFFER 0
305
306
307 enum brw_cache_id {
308 BRW_BLEND_STATE,
309 BRW_DEPTH_STENCIL_STATE,
310 BRW_COLOR_CALC_STATE,
311 BRW_CC_VP,
312 BRW_CC_UNIT,
313 BRW_WM_PROG,
314 BRW_SAMPLER_DEFAULT_COLOR,
315 BRW_SAMPLER,
316 BRW_WM_UNIT,
317 BRW_SF_PROG,
318 BRW_SF_VP,
319 BRW_SF_UNIT, /* scissor state on gen6 */
320 BRW_VS_UNIT,
321 BRW_VS_PROG,
322 BRW_GS_UNIT,
323 BRW_GS_PROG,
324 BRW_CLIP_VP,
325 BRW_CLIP_UNIT,
326 BRW_CLIP_PROG,
327
328 BRW_MAX_CACHE
329 };
330
331 struct brw_cache_item {
332 /**
333 * Effectively part of the key, cache_id identifies what kind of state
334 * buffer is involved, and also which brw->state.dirty.cache flag should
335 * be set when this cache item is chosen.
336 */
337 enum brw_cache_id cache_id;
338 /** 32-bit hash of the key data */
339 GLuint hash;
340 GLuint key_size; /* for variable-sized keys */
341 const void *key;
342 drm_intel_bo **reloc_bufs;
343 GLuint nr_reloc_bufs;
344
345 drm_intel_bo *bo;
346
347 struct brw_cache_item *next;
348 };
349
350
351
352 struct brw_cache {
353 struct brw_context *brw;
354
355 struct brw_cache_item **items;
356 GLuint size, n_items;
357
358 char *name[BRW_MAX_CACHE];
359
360 /* Record of the last BOs chosen for each cache_id. Used to set
361 * brw->state.dirty.cache when a new cache item is chosen.
362 */
363 drm_intel_bo *last_bo[BRW_MAX_CACHE];
364 };
365
366
367 /* Considered adding a member to this struct to document which flags
368 * an update might raise so that ordering of the state atoms can be
369 * checked or derived at runtime. Dropped the idea in favor of having
370 * a debug mode where the state is monitored for flags which are
371 * raised that have already been tested against.
372 */
373 struct brw_tracked_state {
374 struct brw_state_flags dirty;
375 void (*prepare)( struct brw_context *brw );
376 void (*emit)( struct brw_context *brw );
377 };
378
379 /* Flags for brw->state.cache.
380 */
381 #define CACHE_NEW_BLEND_STATE (1<<BRW_BLEND_STATE)
382 #define CACHE_NEW_DEPTH_STENCIL_STATE (1<<BRW_DEPTH_STENCIL_STATE)
383 #define CACHE_NEW_COLOR_CALC_STATE (1<<BRW_COLOR_CALC_STATE)
384 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
385 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
386 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
387 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR (1<<BRW_SAMPLER_DEFAULT_COLOR)
388 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
389 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
390 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
391 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
392 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
393 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
394 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
395 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
396 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
397 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
398 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
399 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
400
401 struct brw_cached_batch_item {
402 struct header *header;
403 GLuint sz;
404 struct brw_cached_batch_item *next;
405 };
406
407
408
409 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
410 * be easier if C allowed arrays of packed elements?
411 */
412 #define ATTRIB_BIT_DWORDS ((VERT_ATTRIB_MAX+31)/32)
413
414 struct brw_vertex_buffer {
415 /** Buffer object containing the uploaded vertex data */
416 drm_intel_bo *bo;
417 uint32_t offset;
418 /** Byte stride between elements in the uploaded array */
419 GLuint stride;
420 };
421 struct brw_vertex_element {
422 const struct gl_client_array *glarray;
423
424 int buffer;
425
426 /** The corresponding Mesa vertex attribute */
427 gl_vert_attrib attrib;
428 /** Size of a complete element */
429 GLuint element_size;
430 /** Offset of the first element within the buffer object */
431 unsigned int offset;
432 };
433
434
435
436 struct brw_vertex_info {
437 GLuint sizes[ATTRIB_BIT_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
438 };
439
440 struct brw_query_object {
441 struct gl_query_object Base;
442
443 /** Last query BO associated with this query. */
444 drm_intel_bo *bo;
445 /** First index in bo with query data for this object. */
446 int first_index;
447 /** Last index in bo with query data for this object. */
448 int last_index;
449 };
450
451
452 /**
453 * brw_context is derived from intel_context.
454 */
455 struct brw_context
456 {
457 struct intel_context intel; /**< base class, must be first field */
458 GLuint primitive;
459
460 GLboolean emit_state_always;
461 GLboolean has_surface_tile_offset;
462 GLboolean has_compr4;
463 GLboolean has_negative_rhw_bug;
464 GLboolean has_aa_line_parameters;
465 GLboolean has_pln;
466
467 struct {
468 struct brw_state_flags dirty;
469
470 /**
471 * \name Cached region pointers
472 *
473 * When the draw buffer is updated, often the depth buffer is not
474 * changed. Caching the pointer to the buffer's region allows us to
475 * detect when the buffer has in fact changed, and allows us to avoid
476 * updating the buffer's GPU state when it has not.
477 *
478 * The original of each cached pointer is an instance of
479 * \c intel_renderbuffer.region.
480 *
481 * \see brw_set_draw_region()
482 *
483 * \{
484 */
485
486 /** \see struct brw_tracked_state brw_depthbuffer */
487 struct intel_region *depth_region;
488
489 /** \} */
490
491 /**
492 * List of buffers accumulated in brw_validate_state to receive
493 * drm_intel_bo_check_aperture treatment before exec, so we can
494 * know if we should flush the batch and try again before
495 * emitting primitives.
496 *
497 * This can be a fixed number as we only have a limited number of
498 * objects referenced from the batchbuffer in a primitive emit,
499 * consisting of the vertex buffers, pipelined state pointers,
500 * the CURBE, the depth buffer, and a query BO.
501 */
502 drm_intel_bo *validated_bos[VERT_ATTRIB_MAX + BRW_WM_MAX_SURF + 16];
503 int validated_bo_count;
504 } state;
505
506 struct brw_cache cache;
507 struct brw_cached_batch_item *cached_batch_items;
508
509 struct {
510 struct brw_vertex_element inputs[VERT_ATTRIB_MAX];
511 struct brw_vertex_buffer buffers[VERT_ATTRIB_MAX];
512 struct {
513 uint32_t handle;
514 uint32_t offset;
515 uint32_t stride;
516 } current_buffers[VERT_ATTRIB_MAX];
517
518 struct brw_vertex_element *enabled[VERT_ATTRIB_MAX];
519 GLuint nr_enabled;
520 GLuint nr_buffers, nr_current_buffers;
521
522 /* Summary of size and varying of active arrays, so we can check
523 * for changes to this state:
524 */
525 struct brw_vertex_info info;
526 unsigned int min_index, max_index;
527
528 /* Offset from start of vertex buffer so we can avoid redefining
529 * the same VB packed over and over again.
530 */
531 unsigned int start_vertex_bias;
532 } vb;
533
534 struct {
535 /**
536 * Index buffer for this draw_prims call.
537 *
538 * Updates are signaled by BRW_NEW_INDICES.
539 */
540 const struct _mesa_index_buffer *ib;
541
542 /* Updates are signaled by BRW_NEW_INDEX_BUFFER. */
543 drm_intel_bo *bo;
544 GLuint type;
545
546 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
547 * avoid re-uploading the IB packet over and over if we're actually
548 * referencing the same index buffer.
549 */
550 unsigned int start_vertex_offset;
551 } ib;
552
553 /* Active vertex program:
554 */
555 const struct gl_vertex_program *vertex_program;
556 const struct gl_fragment_program *fragment_program;
557
558 /* hw-dependent 3DSTATE_VF_STATISTICS opcode */
559 uint32_t CMD_VF_STATISTICS;
560 /* hw-dependent 3DSTATE_PIPELINE_SELECT opcode */
561 uint32_t CMD_PIPELINE_SELECT;
562 int vs_max_threads;
563 int wm_max_threads;
564
565 /* BRW_NEW_URB_ALLOCATIONS:
566 */
567 struct {
568 GLuint vsize; /* vertex size plus header in urb registers */
569 GLuint csize; /* constant buffer size in urb registers */
570 GLuint sfsize; /* setup data size in urb registers */
571
572 GLboolean constrained;
573
574 GLuint max_vs_handles; /* Maximum number of VS handles */
575 GLuint max_gs_handles; /* Maximum number of GS handles */
576
577 GLuint nr_vs_entries;
578 GLuint nr_gs_entries;
579 GLuint nr_clip_entries;
580 GLuint nr_sf_entries;
581 GLuint nr_cs_entries;
582
583 /* gen6:
584 * The length of each URB entry owned by the VS (or GS), as
585 * a number of 1024-bit (128-byte) rows. Should be >= 1.
586 */
587 GLuint vs_size;
588 GLuint gs_size;
589
590 GLuint vs_start;
591 GLuint gs_start;
592 GLuint clip_start;
593 GLuint sf_start;
594 GLuint cs_start;
595 GLuint size; /* Hardware URB size, in KB. */
596 } urb;
597
598
599 /* BRW_NEW_CURBE_OFFSETS:
600 */
601 struct {
602 GLuint wm_start; /**< pos of first wm const in CURBE buffer */
603 GLuint wm_size; /**< number of float[4] consts, multiple of 16 */
604 GLuint clip_start;
605 GLuint clip_size;
606 GLuint vs_start;
607 GLuint vs_size;
608 GLuint total_size;
609
610 drm_intel_bo *curbe_bo;
611 /** Offset within curbe_bo of space for current curbe entry */
612 GLuint curbe_offset;
613 /** Offset within curbe_bo of space for next curbe entry */
614 GLuint curbe_next_offset;
615
616 /**
617 * Copy of the last set of CURBEs uploaded. Frequently we'll end up
618 * in brw_curbe.c with the same set of constant data to be uploaded,
619 * so we'd rather not upload new constants in that case (it can cause
620 * a pipeline bubble since only up to 4 can be pipelined at a time).
621 */
622 GLfloat *last_buf;
623 /**
624 * Allocation for where to calculate the next set of CURBEs.
625 * It's a hot enough path that malloc/free of that data matters.
626 */
627 GLfloat *next_buf;
628 GLuint last_bufsz;
629 } curbe;
630
631 struct {
632 struct brw_vs_prog_data *prog_data;
633 int8_t *constant_map; /* variable array following prog_data */
634
635 drm_intel_bo *prog_bo;
636 drm_intel_bo *state_bo;
637 drm_intel_bo *const_bo;
638
639 /** Binding table of pointers to surf_bo entries */
640 uint32_t bind_bo_offset;
641 uint32_t surf_offset[BRW_VS_MAX_SURF];
642 GLuint nr_surfaces;
643
644 uint32_t push_const_offset; /* Offset in the batchbuffer */
645 int push_const_size; /* in 256-bit register increments */
646 } vs;
647
648 struct {
649 struct brw_gs_prog_data *prog_data;
650
651 GLboolean prog_active;
652 drm_intel_bo *prog_bo;
653 drm_intel_bo *state_bo;
654 } gs;
655
656 struct {
657 struct brw_clip_prog_data *prog_data;
658
659 drm_intel_bo *prog_bo;
660 drm_intel_bo *state_bo;
661
662 /* As of gen6, this is the offset in the batch to the CLIP VP,
663 * instead of vp_bo.
664 */
665 uint32_t vp_offset;
666 } clip;
667
668
669 struct {
670 struct brw_sf_prog_data *prog_data;
671
672 drm_intel_bo *prog_bo;
673 drm_intel_bo *state_bo;
674 uint32_t state_offset;
675 uint32_t vp_offset;
676 } sf;
677
678 struct {
679 struct brw_wm_prog_data *prog_data;
680 struct brw_wm_compile *compile_data;
681
682 /** Input sizes, calculated from active vertex program.
683 * One bit per fragment program input attribute.
684 */
685 GLbitfield input_size_masks[4];
686
687 /** Array of surface default colors (texture border color) */
688 drm_intel_bo *sdc_bo[BRW_MAX_TEX_UNIT];
689
690 GLuint render_surf;
691 GLuint nr_surfaces;
692
693 GLuint max_threads;
694 drm_intel_bo *scratch_bo;
695
696 GLuint sampler_count;
697 drm_intel_bo *sampler_bo;
698
699 /** Binding table of pointers to surf_bo entries */
700 uint32_t bind_bo_offset;
701 uint32_t surf_offset[BRW_WM_MAX_SURF];
702
703 drm_intel_bo *prog_bo;
704 drm_intel_bo *state_bo;
705 drm_intel_bo *const_bo; /* pull constant buffer. */
706 /**
707 * This is offset in the batch to the push constants on gen6.
708 *
709 * Pre-gen6, push constants live in the CURBE.
710 */
711 uint32_t push_const_offset;
712 } wm;
713
714
715 struct {
716 /* gen4 */
717 drm_intel_bo *prog_bo;
718
719 /* gen6 */
720 drm_intel_bo *depth_stencil_state_bo;
721
722 uint32_t state_offset;
723 uint32_t blend_state_offset;
724 uint32_t vp_offset;
725 } cc;
726
727 struct {
728 struct brw_query_object *obj;
729 drm_intel_bo *bo;
730 int index;
731 GLboolean active;
732 } query;
733 /* Used to give every program string a unique id
734 */
735 GLuint program_id;
736
737 int num_prepare_atoms, num_emit_atoms;
738 struct brw_tracked_state prepare_atoms[64], emit_atoms[64];
739 };
740
741
742 #define BRW_PACKCOLOR8888(r,g,b,a) ((r<<24) | (g<<16) | (b<<8) | a)
743
744 struct brw_instruction_info {
745 char *name;
746 int nsrc;
747 int ndst;
748 GLboolean is_arith;
749 };
750 extern const struct brw_instruction_info brw_opcodes[128];
751
752 /*======================================================================
753 * brw_vtbl.c
754 */
755 void brwInitVtbl( struct brw_context *brw );
756
757 /*======================================================================
758 * brw_context.c
759 */
760 GLboolean brwCreateContext( int api,
761 const struct gl_config *mesaVis,
762 __DRIcontext *driContextPriv,
763 void *sharedContextPrivate);
764
765 /*======================================================================
766 * brw_queryobj.c
767 */
768 void brw_init_queryobj_functions(struct dd_function_table *functions);
769 void brw_prepare_query_begin(struct brw_context *brw);
770 void brw_emit_query_begin(struct brw_context *brw);
771 void brw_emit_query_end(struct brw_context *brw);
772
773 /*======================================================================
774 * brw_state_dump.c
775 */
776 void brw_debug_batch(struct intel_context *intel);
777
778 /*======================================================================
779 * brw_tex.c
780 */
781 void brw_validate_textures( struct brw_context *brw );
782
783
784 /*======================================================================
785 * brw_program.c
786 */
787 void brwInitFragProgFuncs( struct dd_function_table *functions );
788
789
790 /* brw_urb.c
791 */
792 void brw_upload_urb_fence(struct brw_context *brw);
793
794 /* brw_curbe.c
795 */
796 void brw_upload_cs_urb_state(struct brw_context *brw);
797
798 /* brw_disasm.c */
799 int brw_disasm (FILE *file, struct brw_instruction *inst, int gen);
800
801 /*======================================================================
802 * Inline conversion functions. These are better-typed than the
803 * macros used previously:
804 */
805 static INLINE struct brw_context *
806 brw_context( struct gl_context *ctx )
807 {
808 return (struct brw_context *)ctx;
809 }
810
811 static INLINE struct brw_vertex_program *
812 brw_vertex_program(struct gl_vertex_program *p)
813 {
814 return (struct brw_vertex_program *) p;
815 }
816
817 static INLINE const struct brw_vertex_program *
818 brw_vertex_program_const(const struct gl_vertex_program *p)
819 {
820 return (const struct brw_vertex_program *) p;
821 }
822
823 static INLINE struct brw_fragment_program *
824 brw_fragment_program(struct gl_fragment_program *p)
825 {
826 return (struct brw_fragment_program *) p;
827 }
828
829 static INLINE const struct brw_fragment_program *
830 brw_fragment_program_const(const struct gl_fragment_program *p)
831 {
832 return (const struct brw_fragment_program *) p;
833 }
834
835 static inline
836 float convert_param(enum param_conversion conversion, float param)
837 {
838 union {
839 float f;
840 uint32_t u;
841 int32_t i;
842 } fi;
843
844 switch (conversion) {
845 case PARAM_NO_CONVERT:
846 return param;
847 case PARAM_CONVERT_F2I:
848 fi.i = param;
849 return fi.f;
850 case PARAM_CONVERT_F2U:
851 fi.u = param;
852 return fi.f;
853 case PARAM_CONVERT_F2B:
854 if (param != 0.0)
855 fi.i = 1;
856 else
857 fi.i = 0;
858 return fi.f;
859 default:
860 return param;
861 }
862 }
863
864 GLboolean brw_do_cubemap_normalize(struct exec_list *instructions);
865
866 #endif