2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
36 #include "intel_context.h"
37 #include "brw_structs.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
47 * URB - uniform resource buffer. A mid-sized buffer which is
48 * partitioned between the fixed function units and used for passing
49 * values (vertices, primitives, constants) between them.
51 * CURBE - constant URB entry. An urb region (entry) used to hold
52 * constant values which the fixed function units can be instructed to
53 * preload into the GRF when spawning a thread.
55 * VUE - vertex URB entry. An urb entry holding a vertex and usually
56 * a vertex header. The header contains control information and
57 * things like primitive type, Begin/end flags and clip codes.
59 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
60 * unit holding rasterization and interpolation parameters.
62 * GRF - general register file. One of several register files
63 * addressable by programmed threads. The inputs (r0, payload, curbe,
64 * urb) of the thread are preloaded to this area before the thread is
65 * spawned. The registers are individually 8 dwords wide and suitable
66 * for general usage. Registers holding thread input values are not
67 * special and may be overwritten.
69 * MRF - message register file. Threads communicate (and terminate)
70 * by sending messages. Message parameters are placed in contiguous
71 * MRF registers. All program output is via these messages. URB
72 * entries are populated by sending a message to the shared URB
73 * function containing the new data, together with a control word,
74 * often an unmodified copy of R0.
76 * R0 - GRF register 0. Typically holds control information used when
77 * sending messages to other threads.
79 * EU or GEN4 EU: The name of the programmable subsystem of the
80 * i965 hardware. Threads are executed by the EU, the registers
81 * described above are part of the EU architecture.
83 * Fixed function units:
85 * CS - Command streamer. Notional first unit, little software
86 * interaction. Holds the URB entries used for constant data, ie the
89 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
90 * this unit is responsible for pulling vertices out of vertex buffers
91 * in vram and injecting them into the processing pipe as VUEs. If
92 * enabled, it first passes them to a VS thread which is a good place
93 * for the driver to implement any active vertex shader.
95 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
96 * enabled, incoming strips etc are passed to GS threads in individual
97 * line/triangle/point units. The GS thread may perform arbitary
98 * computation and emit whatever primtives with whatever vertices it
99 * chooses. This makes GS an excellent place to implement GL's
100 * unfilled polygon modes, though of course it is capable of much
101 * more. Additionally, GS is used to translate away primitives not
102 * handled by latter units, including Quads and Lineloops.
104 * CS - Clipper. Mesa's clipping algorithms are imported to run on
105 * this unit. The fixed function part performs cliptesting against
106 * the 6 fixed clipplanes and makes descisions on whether or not the
107 * incoming primitive needs to be passed to a thread for clipping.
108 * User clip planes are handled via cooperation with the VS thread.
110 * SF - Strips Fans or Setup: Triangles are prepared for
111 * rasterization. Interpolation coefficients are calculated.
112 * Flatshading and two-side lighting usually performed here.
114 * WM - Windower. Interpolation of vertex attributes performed here.
115 * Fragment shader implemented here. SIMD aspects of EU taken full
116 * advantage of, as pixels are processed in blocks of 16.
118 * CC - Color Calculator. No EU threads associated with this unit.
119 * Handles blending and (presumably) depth and stencil testing.
123 #define BRW_MAX_CURBE (32*16)
126 struct brw_instruction
;
127 struct brw_vs_prog_key
;
128 struct brw_vec4_prog_key
;
129 struct brw_wm_prog_key
;
130 struct brw_wm_prog_data
;
134 BRW_STATE_FRAGMENT_PROGRAM
,
135 BRW_STATE_GEOMETRY_PROGRAM
,
136 BRW_STATE_VERTEX_PROGRAM
,
137 BRW_STATE_CURBE_OFFSETS
,
138 BRW_STATE_REDUCED_PRIMITIVE
,
143 BRW_STATE_VS_BINDING_TABLE
,
144 BRW_STATE_GS_BINDING_TABLE
,
145 BRW_STATE_PS_BINDING_TABLE
,
149 BRW_STATE_INDEX_BUFFER
,
150 BRW_STATE_VS_CONSTBUF
,
151 BRW_STATE_GS_CONSTBUF
,
152 BRW_STATE_PROGRAM_CACHE
,
153 BRW_STATE_STATE_BASE_ADDRESS
,
154 BRW_STATE_VUE_MAP_VS
,
155 BRW_STATE_VUE_MAP_GEOM_OUT
,
156 BRW_STATE_TRANSFORM_FEEDBACK
,
157 BRW_STATE_RASTERIZER_DISCARD
,
159 BRW_STATE_UNIFORM_BUFFER
,
160 BRW_STATE_META_IN_PROGRESS
,
161 BRW_STATE_INTERPOLATION_MAP
,
162 BRW_STATE_PUSH_CONSTANT_ALLOCATION
,
166 #define BRW_NEW_URB_FENCE (1 << BRW_STATE_URB_FENCE)
167 #define BRW_NEW_FRAGMENT_PROGRAM (1 << BRW_STATE_FRAGMENT_PROGRAM)
168 #define BRW_NEW_GEOMETRY_PROGRAM (1 << BRW_STATE_GEOMETRY_PROGRAM)
169 #define BRW_NEW_VERTEX_PROGRAM (1 << BRW_STATE_VERTEX_PROGRAM)
170 #define BRW_NEW_CURBE_OFFSETS (1 << BRW_STATE_CURBE_OFFSETS)
171 #define BRW_NEW_REDUCED_PRIMITIVE (1 << BRW_STATE_REDUCED_PRIMITIVE)
172 #define BRW_NEW_PRIMITIVE (1 << BRW_STATE_PRIMITIVE)
173 #define BRW_NEW_CONTEXT (1 << BRW_STATE_CONTEXT)
174 #define BRW_NEW_PSP (1 << BRW_STATE_PSP)
175 #define BRW_NEW_SURFACES (1 << BRW_STATE_SURFACES)
176 #define BRW_NEW_VS_BINDING_TABLE (1 << BRW_STATE_VS_BINDING_TABLE)
177 #define BRW_NEW_GS_BINDING_TABLE (1 << BRW_STATE_GS_BINDING_TABLE)
178 #define BRW_NEW_PS_BINDING_TABLE (1 << BRW_STATE_PS_BINDING_TABLE)
179 #define BRW_NEW_INDICES (1 << BRW_STATE_INDICES)
180 #define BRW_NEW_VERTICES (1 << BRW_STATE_VERTICES)
182 * Used for any batch entry with a relocated pointer that will be used
183 * by any 3D rendering.
185 #define BRW_NEW_BATCH (1 << BRW_STATE_BATCH)
186 /** \see brw.state.depth_region */
187 #define BRW_NEW_INDEX_BUFFER (1 << BRW_STATE_INDEX_BUFFER)
188 #define BRW_NEW_VS_CONSTBUF (1 << BRW_STATE_VS_CONSTBUF)
189 #define BRW_NEW_GS_CONSTBUF (1 << BRW_STATE_GS_CONSTBUF)
190 #define BRW_NEW_PROGRAM_CACHE (1 << BRW_STATE_PROGRAM_CACHE)
191 #define BRW_NEW_STATE_BASE_ADDRESS (1 << BRW_STATE_STATE_BASE_ADDRESS)
192 #define BRW_NEW_VUE_MAP_VS (1 << BRW_STATE_VUE_MAP_VS)
193 #define BRW_NEW_VUE_MAP_GEOM_OUT (1 << BRW_STATE_VUE_MAP_GEOM_OUT)
194 #define BRW_NEW_TRANSFORM_FEEDBACK (1 << BRW_STATE_TRANSFORM_FEEDBACK)
195 #define BRW_NEW_RASTERIZER_DISCARD (1 << BRW_STATE_RASTERIZER_DISCARD)
196 #define BRW_NEW_STATS_WM (1 << BRW_STATE_STATS_WM)
197 #define BRW_NEW_UNIFORM_BUFFER (1 << BRW_STATE_UNIFORM_BUFFER)
198 #define BRW_NEW_META_IN_PROGRESS (1 << BRW_STATE_META_IN_PROGRESS)
199 #define BRW_NEW_INTERPOLATION_MAP (1 << BRW_STATE_INTERPOLATION_MAP)
200 #define BRW_NEW_PUSH_CONSTANT_ALLOCATION (1 << BRW_STATE_PUSH_CONSTANT_ALLOCATION)
202 struct brw_state_flags
{
203 /** State update flags signalled by mesa internals */
206 * State update flags signalled as the result of brw_tracked_state updates
209 /** State update flags signalled by brw_state_cache.c searches */
213 #define AUB_TRACE_TYPE_MASK 0x0000ff00
214 #define AUB_TRACE_TYPE_NOTYPE (0 << 8)
215 #define AUB_TRACE_TYPE_BATCH (1 << 8)
216 #define AUB_TRACE_TYPE_VERTEX_BUFFER (5 << 8)
217 #define AUB_TRACE_TYPE_2D_MAP (6 << 8)
218 #define AUB_TRACE_TYPE_CUBE_MAP (7 << 8)
219 #define AUB_TRACE_TYPE_VOLUME_MAP (9 << 8)
220 #define AUB_TRACE_TYPE_1D_MAP (10 << 8)
221 #define AUB_TRACE_TYPE_CONSTANT_BUFFER (11 << 8)
222 #define AUB_TRACE_TYPE_CONSTANT_URB (12 << 8)
223 #define AUB_TRACE_TYPE_INDEX_BUFFER (13 << 8)
224 #define AUB_TRACE_TYPE_GENERAL (14 << 8)
225 #define AUB_TRACE_TYPE_SURFACE (15 << 8)
228 * state_struct_type enum values are encoded with the top 16 bits representing
229 * the type to be delivered to the .aub file, and the bottom 16 bits
230 * representing the subtype. This macro performs the encoding.
232 #define ENCODE_SS_TYPE(type, subtype) (((type) << 16) | (subtype))
234 enum state_struct_type
{
235 AUB_TRACE_VS_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 1),
236 AUB_TRACE_GS_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 2),
237 AUB_TRACE_CLIP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 3),
238 AUB_TRACE_SF_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 4),
239 AUB_TRACE_WM_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 5),
240 AUB_TRACE_CC_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 6),
241 AUB_TRACE_CLIP_VP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 7),
242 AUB_TRACE_SF_VP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 8),
243 AUB_TRACE_CC_VP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x9),
244 AUB_TRACE_SAMPLER_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xa),
245 AUB_TRACE_KERNEL_INSTRUCTIONS
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xb),
246 AUB_TRACE_SCRATCH_SPACE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xc),
247 AUB_TRACE_SAMPLER_DEFAULT_COLOR
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xd),
249 AUB_TRACE_SCISSOR_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x15),
250 AUB_TRACE_BLEND_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x16),
251 AUB_TRACE_DEPTH_STENCIL_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x17),
253 AUB_TRACE_VERTEX_BUFFER
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_VERTEX_BUFFER
, 0),
254 AUB_TRACE_BINDING_TABLE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE
, 0x100),
255 AUB_TRACE_SURFACE_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE
, 0x200),
256 AUB_TRACE_VS_CONSTANTS
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER
, 0),
257 AUB_TRACE_WM_CONSTANTS
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER
, 1),
261 * Decode a state_struct_type value to determine the type that should be
262 * stored in the .aub file.
264 static inline uint32_t AUB_TRACE_TYPE(enum state_struct_type ss_type
)
266 return (ss_type
& 0xFFFF0000) >> 16;
270 * Decode a state_struct_type value to determine the subtype that should be
271 * stored in the .aub file.
273 static inline uint32_t AUB_TRACE_SUBTYPE(enum state_struct_type ss_type
)
275 return ss_type
& 0xFFFF;
278 /** Subclass of Mesa vertex program */
279 struct brw_vertex_program
{
280 struct gl_vertex_program program
;
285 /** Subclass of Mesa geometry program */
286 struct brw_geometry_program
{
287 struct gl_geometry_program program
;
288 unsigned id
; /**< serial no. to identify geom progs, never re-used */
292 /** Subclass of Mesa fragment program */
293 struct brw_fragment_program
{
294 struct gl_fragment_program program
;
295 GLuint id
; /**< serial no. to identify frag progs, never re-used */
299 struct gl_shader base
;
303 /** Shader IR transformed for native compile, at link time. */
304 struct exec_list
*ir
;
307 /* Data about a particular attempt to compile a program. Note that
308 * there can be many of these, each in a different GL state
309 * corresponding to a different brw_wm_prog_key struct, with different
312 * Note: brw_wm_prog_data_compare() must be updated when adding fields to this
315 struct brw_wm_prog_data
{
316 GLuint curb_read_length
;
317 GLuint urb_read_length
;
319 GLuint first_curbe_grf
;
320 GLuint first_curbe_grf_16
;
322 GLuint reg_blocks_16
;
323 GLuint total_scratch
;
325 unsigned binding_table_size
;
327 GLuint nr_params
; /**< number of float params/constants */
328 GLuint nr_pull_params
;
331 uint32_t prog_offset_16
;
334 * Mask of which interpolation modes are required by the fragment shader.
335 * Used in hardware setup on gen6+.
337 uint32_t barycentric_interp_modes
;
339 /* Pointers to tracked values (only valid once
340 * _mesa_load_state_parameters has been called at runtime).
342 * These must be the last fields of the struct (see
343 * brw_wm_prog_data_compare()).
346 const float **pull_param
;
350 * Enum representing the i965-specific vertex results that don't correspond
351 * exactly to any element of gl_varying_slot. The values of this enum are
352 * assigned such that they don't conflict with gl_varying_slot.
356 BRW_VARYING_SLOT_NDC
= VARYING_SLOT_MAX
,
357 BRW_VARYING_SLOT_PAD
,
359 * Technically this is not a varying but just a placeholder that
360 * compile_sf_prog() inserts into its VUE map to cause the gl_PointCoord
361 * builtin variable to be compiled correctly. see compile_sf_prog() for
364 BRW_VARYING_SLOT_PNTC
,
365 BRW_VARYING_SLOT_COUNT
370 * Data structure recording the relationship between the gl_varying_slot enum
371 * and "slots" within the vertex URB entry (VUE). A "slot" is defined as a
372 * single octaword within the VUE (128 bits).
374 * Note that each BRW register contains 256 bits (2 octawords), so when
375 * accessing the VUE in URB_NOSWIZZLE mode, each register corresponds to two
376 * consecutive VUE slots. When accessing the VUE in URB_INTERLEAVED mode (as
377 * in a vertex shader), each register corresponds to a single VUE slot, since
378 * it contains data for two separate vertices.
382 * Bitfield representing all varying slots that are (a) stored in this VUE
383 * map, and (b) actually written by the shader. Does not include any of
384 * the additional varying slots defined in brw_varying_slot.
386 GLbitfield64 slots_valid
;
389 * Map from gl_varying_slot value to VUE slot. For gl_varying_slots that are
390 * not stored in a slot (because they are not written, or because
391 * additional processing is applied before storing them in the VUE), the
394 signed char varying_to_slot
[BRW_VARYING_SLOT_COUNT
];
397 * Map from VUE slot to gl_varying_slot value. For slots that do not
398 * directly correspond to a gl_varying_slot, the value comes from
401 * For slots that are not in use, the value is BRW_VARYING_SLOT_COUNT (this
402 * simplifies code that uses the value stored in slot_to_varying to
403 * create a bit mask).
405 signed char slot_to_varying
[BRW_VARYING_SLOT_COUNT
];
408 * Total number of VUE slots in use
414 * Convert a VUE slot number into a byte offset within the VUE.
416 static inline GLuint
brw_vue_slot_to_offset(GLuint slot
)
422 * Convert a vertex output (brw_varying_slot) into a byte offset within the
425 static inline GLuint
brw_varying_to_offset(struct brw_vue_map
*vue_map
,
428 return brw_vue_slot_to_offset(vue_map
->varying_to_slot
[varying
]);
431 void brw_compute_vue_map(struct brw_context
*brw
, struct brw_vue_map
*vue_map
,
432 GLbitfield64 slots_valid
, bool userclip_active
);
436 * Mapping of VUE map slots to interpolation modes.
438 struct interpolation_mode_map
{
439 unsigned char mode
[BRW_VARYING_SLOT_COUNT
];
442 static inline bool brw_any_flat_varyings(struct interpolation_mode_map
*map
)
444 for (int i
= 0; i
< BRW_VARYING_SLOT_COUNT
; i
++)
445 if (map
->mode
[i
] == INTERP_QUALIFIER_FLAT
)
451 static inline bool brw_any_noperspective_varyings(struct interpolation_mode_map
*map
)
453 for (int i
= 0; i
< BRW_VARYING_SLOT_COUNT
; i
++)
454 if (map
->mode
[i
] == INTERP_QUALIFIER_NOPERSPECTIVE
)
461 struct brw_sf_prog_data
{
462 GLuint urb_read_length
;
465 /* Each vertex may have upto 12 attributes, 4 components each,
466 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
469 * Actually we use 4 for each, so call it 12 rows.
471 GLuint urb_entry_size
;
474 struct brw_clip_prog_data
{
475 GLuint curb_read_length
; /* user planes? */
477 GLuint urb_read_length
;
481 struct brw_ff_gs_prog_data
{
482 GLuint urb_read_length
;
486 * Gen6 transform feedback: Amount by which the streaming vertex buffer
487 * indices should be incremented each time the GS is invoked.
489 unsigned svbi_postincrement_value
;
493 /* Note: brw_vec4_prog_data_compare() must be updated when adding fields to
496 struct brw_vec4_prog_data
{
497 struct brw_vue_map vue_map
;
500 * Register where the thread expects to find input data from the URB
501 * (typically uniforms, followed by per-vertex inputs).
503 unsigned dispatch_grf_start_reg
;
505 GLuint curb_read_length
;
506 GLuint urb_read_length
;
508 GLuint nr_params
; /**< number of float params/constants */
509 GLuint nr_pull_params
; /**< number of dwords referenced by pull_param[] */
510 GLuint total_scratch
;
512 /* Used for calculating urb partitions. In the VS, this is the size of the
513 * URB entry used for both input and output to the thread. In the GS, this
514 * is the size of the URB entry used for output.
516 GLuint urb_entry_size
;
518 unsigned binding_table_size
;
520 /* These pointers must appear last. See brw_vec4_prog_data_compare(). */
522 const float **pull_param
;
526 /* Note: brw_vs_prog_data_compare() must be updated when adding fields to this
529 struct brw_vs_prog_data
{
530 struct brw_vec4_prog_data base
;
532 GLbitfield64 inputs_read
;
538 /* Note: brw_gs_prog_data_compare() must be updated when adding fields to
541 struct brw_gs_prog_data
543 struct brw_vec4_prog_data base
;
546 * Size of an output vertex, measured in HWORDS (32 bytes).
548 unsigned output_vertex_size_hwords
;
550 unsigned output_topology
;
553 /** Number of texture sampler units */
554 #define BRW_MAX_TEX_UNIT 16
556 /** Max number of render targets in a shader */
557 #define BRW_MAX_DRAW_BUFFERS 8
560 * Max number of binding table entries used for stream output.
562 * From the OpenGL 3.0 spec, table 6.44 (Transform Feedback State), the
563 * minimum value of MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS is 64.
565 * On Gen6, the size of transform feedback data is limited not by the number
566 * of components but by the number of binding table entries we set aside. We
567 * use one binding table entry for a float, one entry for a vector, and one
568 * entry per matrix column. Since the only way we can communicate our
569 * transform feedback capabilities to the client is via
570 * MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS, we need to plan for the
571 * worst case, in which all the varyings are floats, so we use up one binding
572 * table entry per component. Therefore we need to set aside at least 64
573 * binding table entries for use by transform feedback.
575 * Note: since we don't currently pack varyings, it is currently impossible
576 * for the client to actually use up all of these binding table entries--if
577 * all of their varyings were floats, they would run out of varying slots and
578 * fail to link. But that's a bug, so it seems prudent to go ahead and
579 * allocate the number of binding table entries we will need once the bug is
582 #define BRW_MAX_SOL_BINDINGS 64
584 /** Maximum number of actual buffers used for stream output */
585 #define BRW_MAX_SOL_BUFFERS 4
587 #define BRW_MAX_WM_UBOS 12
588 #define BRW_MAX_VS_UBOS 12
591 * Helpers to create Surface Binding Table indexes for draw buffers,
592 * textures, and constant buffers.
594 * Shader threads access surfaces via numeric handles, rather than directly
595 * using pointers. The binding table maps these numeric handles to the
596 * address of the actual buffer.
598 * For example, a shader might ask to sample from "surface 7." In this case,
599 * bind[7] would contain a pointer to a texture.
601 * Currently, our WM binding tables are (arbitrarily) programmed as follows:
603 * +-------------------------------+
604 * | 0 | Draw buffer 0 |
607 * | 7 | Draw buffer 7 |
608 * |-----|-------------------------|
609 * | 8 | WM Pull Constant Buffer |
610 * |-----|-------------------------|
614 * | 24 | Texture 15 |
615 * |-----|-------------------------|
620 * +-------------------------------+
622 * Our VS (and Gen7 GS) binding tables are programmed as follows:
624 * +-----+-------------------------+
625 * | 0 | Pull Constant Buffer |
626 * +-----+-------------------------+
630 * | 16 | Texture 15 |
631 * +-----+-------------------------+
636 * +-------------------------------+
638 * Our (gen6) GS binding tables are programmed as follows:
640 * +-----+-------------------------+
641 * | 0 | SOL Binding 0 |
644 * | 63 | SOL Binding 63 |
645 * +-----+-------------------------+
647 #define SURF_INDEX_DRAW(d) (d)
648 #define SURF_INDEX_FRAG_CONST_BUFFER (BRW_MAX_DRAW_BUFFERS + 1)
649 #define SURF_INDEX_TEXTURE(t) (BRW_MAX_DRAW_BUFFERS + 2 + (t))
650 #define SURF_INDEX_WM_UBO(u) (SURF_INDEX_TEXTURE(BRW_MAX_TEX_UNIT) + u)
651 #define SURF_INDEX_WM_SHADER_TIME (SURF_INDEX_WM_UBO(12))
652 /** Maximum size of the binding table. */
653 #define BRW_MAX_WM_SURFACES (SURF_INDEX_WM_SHADER_TIME + 1)
655 #define SURF_INDEX_VEC4_CONST_BUFFER (0)
656 #define SURF_INDEX_VEC4_TEXTURE(t) (SURF_INDEX_VEC4_CONST_BUFFER + 1 + (t))
657 #define SURF_INDEX_VEC4_UBO(u) (SURF_INDEX_VEC4_TEXTURE(BRW_MAX_TEX_UNIT) + u)
658 #define SURF_INDEX_VEC4_SHADER_TIME (SURF_INDEX_VEC4_UBO(12))
659 #define BRW_MAX_VEC4_SURFACES (SURF_INDEX_VEC4_SHADER_TIME + 1)
661 #define SURF_INDEX_GEN6_SOL_BINDING(t) (t)
662 #define BRW_MAX_GEN6_GS_SURFACES SURF_INDEX_GEN6_SOL_BINDING(BRW_MAX_SOL_BINDINGS)
665 * Stride in bytes between shader_time entries.
667 * We separate entries by a cacheline to reduce traffic between EUs writing to
670 #define SHADER_TIME_STRIDE 64
677 BRW_BLORP_CONST_COLOR_PROG
,
682 BRW_SF_UNIT
, /* scissor state on gen6 */
695 struct brw_cache_item
{
697 * Effectively part of the key, cache_id identifies what kind of state
698 * buffer is involved, and also which brw->state.dirty.cache flag should
699 * be set when this cache item is chosen.
701 enum brw_cache_id cache_id
;
702 /** 32-bit hash of the key data */
704 GLuint key_size
; /* for variable-sized keys */
711 struct brw_cache_item
*next
;
715 typedef bool (*cache_aux_compare_func
)(const void *a
, const void *b
,
716 int aux_size
, const void *key
);
717 typedef void (*cache_aux_free_func
)(const void *aux
);
720 struct brw_context
*brw
;
722 struct brw_cache_item
**items
;
724 GLuint size
, n_items
;
726 uint32_t next_offset
;
730 * Optional functions used in determining whether the prog_data for a new
731 * cache item matches an existing cache item (in case there's relevant data
732 * outside of the prog_data). If NULL, a plain memcmp is done.
734 cache_aux_compare_func aux_compare
[BRW_MAX_CACHE
];
735 /** Optional functions for freeing other pointers attached to a prog_data. */
736 cache_aux_free_func aux_free
[BRW_MAX_CACHE
];
740 /* Considered adding a member to this struct to document which flags
741 * an update might raise so that ordering of the state atoms can be
742 * checked or derived at runtime. Dropped the idea in favor of having
743 * a debug mode where the state is monitored for flags which are
744 * raised that have already been tested against.
746 struct brw_tracked_state
{
747 struct brw_state_flags dirty
;
748 void (*emit
)( struct brw_context
*brw
);
751 enum shader_time_shader_type
{
764 /* Flags for brw->state.cache.
766 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
767 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
768 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
769 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
770 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
771 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
772 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
773 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
774 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
775 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
776 #define CACHE_NEW_FF_GS_UNIT (1<<BRW_FF_GS_UNIT)
777 #define CACHE_NEW_FF_GS_PROG (1<<BRW_FF_GS_PROG)
778 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
779 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
780 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
781 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
783 struct brw_cached_batch_item
{
784 struct header
*header
;
786 struct brw_cached_batch_item
*next
;
791 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
792 * be easier if C allowed arrays of packed elements?
794 #define ATTRIB_BIT_DWORDS ((VERT_ATTRIB_MAX+31)/32)
796 struct brw_vertex_buffer
{
797 /** Buffer object containing the uploaded vertex data */
800 /** Byte stride between elements in the uploaded array */
804 struct brw_vertex_element
{
805 const struct gl_client_array
*glarray
;
809 /** The corresponding Mesa vertex attribute */
810 gl_vert_attrib attrib
;
811 /** Offset of the first element within the buffer object */
815 struct brw_query_object
{
816 struct gl_query_object Base
;
818 /** Last query BO associated with this query. */
821 /** Last index in bo with query data for this object. */
827 * Data shared between brw_context::vs and brw_context::gs
829 struct brw_stage_state
831 drm_intel_bo
*scratch_bo
;
832 drm_intel_bo
*const_bo
;
833 /** Offset in the program cache to the program */
834 uint32_t prog_offset
;
835 uint32_t state_offset
;
837 uint32_t push_const_offset
; /* Offset in the batchbuffer */
838 int push_const_size
; /* in 256-bit register increments */
840 uint32_t bind_bo_offset
;
841 uint32_t surf_offset
[BRW_MAX_VEC4_SURFACES
];
843 /** SAMPLER_STATE count and table offset */
844 uint32_t sampler_count
;
845 uint32_t sampler_offset
;
847 /** Offsets in the batch to sampler default colors (texture border color) */
848 uint32_t sdc_offset
[BRW_MAX_TEX_UNIT
];
853 * brw_context is derived from gl_context.
857 struct gl_context ctx
; /**< base class, must be first field */
861 void (*destroy
) (struct brw_context
* brw
);
862 void (*finish_batch
) (struct brw_context
* brw
);
863 void (*new_batch
) (struct brw_context
* brw
);
865 void (*update_texture_surface
)(struct gl_context
*ctx
,
867 uint32_t *surf_offset
);
868 void (*update_renderbuffer_surface
)(struct brw_context
*brw
,
869 struct gl_renderbuffer
*rb
,
872 void (*update_null_renderbuffer_surface
)(struct brw_context
*brw
,
874 void (*create_constant_surface
)(struct brw_context
*brw
,
878 uint32_t *out_offset
,
881 /** Upload a SAMPLER_STATE table. */
882 void (*upload_sampler_state_table
)(struct brw_context
*brw
,
883 struct gl_program
*prog
,
884 uint32_t sampler_count
,
885 uint32_t *sst_offset
,
886 uint32_t *sdc_offset
);
889 * Send the appropriate state packets to configure depth, stencil, and
890 * HiZ buffers (i965+ only)
892 void (*emit_depth_stencil_hiz
)(struct brw_context
*brw
,
893 struct intel_mipmap_tree
*depth_mt
,
894 uint32_t depth_offset
,
895 uint32_t depthbuffer_format
,
896 uint32_t depth_surface_type
,
897 struct intel_mipmap_tree
*stencil_mt
,
898 bool hiz
, bool separate_stencil
,
899 uint32_t width
, uint32_t height
,
900 uint32_t tile_x
, uint32_t tile_y
);
906 drm_intel_context
*hw_ctx
;
908 struct intel_batchbuffer batch
;
915 uint32_t buffer_offset
;
920 * Set if rendering has occured to the drawable's front buffer.
922 * This is used in the DRI2 case to detect that glFlush should also copy
923 * the contents of the fake front buffer to the real front buffer.
925 bool front_buffer_dirty
;
928 * Track whether front-buffer rendering is currently enabled
930 * A separate flag is used to track this in order to support MRT more
933 bool is_front_buffer_rendering
;
936 * Track whether front-buffer is the current read target.
938 * This is closely associated with is_front_buffer_rendering, but may
939 * be set separately. The DRI2 fake front buffer must be referenced
942 bool is_front_buffer_reading
;
944 /** Framerate throttling: @{ */
945 drm_intel_bo
*first_post_swapbuffers_batch
;
956 bool always_flush_batch
;
957 bool always_flush_cache
;
958 bool disable_throttling
;
961 driOptionCache optionCache
;
964 GLuint primitive
; /**< Hardware primitive, such as _3DPRIM_TRILIST. */
966 GLenum reduced_primitive
;
969 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
970 * variable is set, this is the flag indicating to do expensive work that
971 * might lead to a perf_debug() call.
975 uint32_t max_gtt_map_object_size
;
977 bool emit_state_always
;
987 bool has_separate_stencil
;
988 bool must_use_separate_stencil
;
991 bool has_surface_tile_offset
;
993 bool has_negative_rhw_bug
;
994 bool has_aa_line_parameters
;
998 * Some versions of Gen hardware don't do centroid interpolation correctly
999 * on unlit pixels, causing incorrect values for derivatives near triangle
1000 * edges. Enabling this flag causes the fragment shader to use
1001 * non-centroid interpolation for unlit pixels, at the expense of two extra
1002 * fragment shader instructions.
1004 bool needs_unlit_centroid_workaround
;
1008 struct brw_state_flags dirty
;
1011 struct brw_cache cache
;
1012 struct brw_cached_batch_item
*cached_batch_items
;
1014 /* Whether a meta-operation is in progress. */
1015 bool meta_in_progress
;
1018 struct brw_vertex_element inputs
[VERT_ATTRIB_MAX
];
1019 struct brw_vertex_buffer buffers
[VERT_ATTRIB_MAX
];
1021 struct brw_vertex_element
*enabled
[VERT_ATTRIB_MAX
];
1025 /* Summary of size and varying of active arrays, so we can check
1026 * for changes to this state:
1028 unsigned int min_index
, max_index
;
1030 /* Offset from start of vertex buffer so we can avoid redefining
1031 * the same VB packed over and over again.
1033 unsigned int start_vertex_bias
;
1038 * Index buffer for this draw_prims call.
1040 * Updates are signaled by BRW_NEW_INDICES.
1042 const struct _mesa_index_buffer
*ib
;
1044 /* Updates are signaled by BRW_NEW_INDEX_BUFFER. */
1048 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
1049 * avoid re-uploading the IB packet over and over if we're actually
1050 * referencing the same index buffer.
1052 unsigned int start_vertex_offset
;
1055 /* Active vertex program:
1057 const struct gl_vertex_program
*vertex_program
;
1058 const struct gl_geometry_program
*geometry_program
;
1059 const struct gl_fragment_program
*fragment_program
;
1061 /* hw-dependent 3DSTATE_VF_STATISTICS opcode */
1062 uint32_t CMD_VF_STATISTICS
;
1063 /* hw-dependent 3DSTATE_PIPELINE_SELECT opcode */
1064 uint32_t CMD_PIPELINE_SELECT
;
1067 * Platform specific constants containing the maximum number of threads
1068 * for each pipeline stage.
1074 /* BRW_NEW_URB_ALLOCATIONS:
1077 GLuint vsize
; /* vertex size plus header in urb registers */
1078 GLuint csize
; /* constant buffer size in urb registers */
1079 GLuint sfsize
; /* setup data size in urb registers */
1083 GLuint max_vs_entries
; /* Maximum number of VS entries */
1084 GLuint max_gs_entries
; /* Maximum number of GS entries */
1086 GLuint nr_vs_entries
;
1087 GLuint nr_gs_entries
;
1088 GLuint nr_clip_entries
;
1089 GLuint nr_sf_entries
;
1090 GLuint nr_cs_entries
;
1097 GLuint size
; /* Hardware URB size, in KB. */
1099 /* gen6: True if the most recently sent _3DSTATE_URB message allocated
1100 * URB space for the GS.
1102 bool gen6_gs_previously_active
;
1106 /* BRW_NEW_CURBE_OFFSETS:
1109 GLuint wm_start
; /**< pos of first wm const in CURBE buffer */
1110 GLuint wm_size
; /**< number of float[4] consts, multiple of 16 */
1117 drm_intel_bo
*curbe_bo
;
1118 /** Offset within curbe_bo of space for current curbe entry */
1119 GLuint curbe_offset
;
1120 /** Offset within curbe_bo of space for next curbe entry */
1121 GLuint curbe_next_offset
;
1124 * Copy of the last set of CURBEs uploaded. Frequently we'll end up
1125 * in brw_curbe.c with the same set of constant data to be uploaded,
1126 * so we'd rather not upload new constants in that case (it can cause
1127 * a pipeline bubble since only up to 4 can be pipelined at a time).
1131 * Allocation for where to calculate the next set of CURBEs.
1132 * It's a hot enough path that malloc/free of that data matters.
1139 * Layout of vertex data exiting the vertex shader.
1141 * BRW_NEW_VUE_MAP_VS is flagged when this VUE map changes.
1143 struct brw_vue_map vue_map_vs
;
1146 * Layout of vertex data exiting the geometry portion of the pipleine.
1147 * This comes from the geometry shader if one exists, otherwise from the
1150 * BRW_NEW_VUE_MAP_GEOM_OUT is flagged when the VUE map changes.
1152 struct brw_vue_map vue_map_geom_out
;
1155 * Data structures used by all vec4 program compiles (not specific to any
1156 * particular program).
1159 struct ra_regs
*regs
;
1162 * Array of the ra classes for the unaligned contiguous register
1168 * Mapping for register-allocated objects in *regs to the first
1169 * GRF for that object.
1171 uint8_t *ra_reg_to_grf
;
1175 struct brw_stage_state base
;
1176 struct brw_vs_prog_data
*prog_data
;
1180 struct brw_stage_state base
;
1181 struct brw_gs_prog_data
*prog_data
;
1185 struct brw_ff_gs_prog_data
*prog_data
;
1188 /** Offset in the program cache to the CLIP program pre-gen6 */
1189 uint32_t prog_offset
;
1190 uint32_t state_offset
;
1192 uint32_t bind_bo_offset
;
1193 uint32_t surf_offset
[BRW_MAX_GEN6_GS_SURFACES
];
1197 struct brw_clip_prog_data
*prog_data
;
1199 /** Offset in the program cache to the CLIP program pre-gen6 */
1200 uint32_t prog_offset
;
1202 /* Offset in the batch to the CLIP state on pre-gen6. */
1203 uint32_t state_offset
;
1205 /* As of gen6, this is the offset in the batch to the CLIP VP,
1213 struct brw_sf_prog_data
*prog_data
;
1215 /** Offset in the program cache to the CLIP program pre-gen6 */
1216 uint32_t prog_offset
;
1217 uint32_t state_offset
;
1222 struct brw_wm_prog_data
*prog_data
;
1226 drm_intel_bo
*scratch_bo
;
1229 * Buffer object used in place of multisampled null render targets on
1230 * Gen6. See brw_update_null_renderbuffer_surface().
1232 drm_intel_bo
*multisampled_null_render_target_bo
;
1234 /** Offset in the program cache to the WM program */
1235 uint32_t prog_offset
;
1237 uint32_t state_offset
; /* offset in batchbuffer to pre-gen6 WM state */
1239 drm_intel_bo
*const_bo
; /* pull constant buffer. */
1241 * This is offset in the batch to the push constants on gen6.
1243 * Pre-gen6, push constants live in the CURBE.
1245 uint32_t push_const_offset
;
1247 /** Binding table of pointers to surf_bo entries */
1248 uint32_t bind_bo_offset
;
1249 uint32_t surf_offset
[BRW_MAX_WM_SURFACES
];
1251 /** SAMPLER_STATE count and table offset */
1252 uint32_t sampler_count
;
1253 uint32_t sampler_offset
;
1255 /** Offsets in the batch to sampler default colors (texture border color)
1257 uint32_t sdc_offset
[BRW_MAX_TEX_UNIT
];
1260 struct ra_regs
*regs
;
1262 /** Array of the ra classes for the unaligned contiguous
1263 * register block sizes used.
1268 * Mapping for register-allocated objects in *regs to the first
1269 * GRF for that object.
1271 uint8_t *ra_reg_to_grf
;
1274 * ra class for the aligned pairs we use for PLN, which doesn't
1275 * appear in *classes.
1277 int aligned_pairs_class
;
1283 uint32_t state_offset
;
1284 uint32_t blend_state_offset
;
1285 uint32_t depth_stencil_state_offset
;
1290 struct brw_query_object
*obj
;
1295 const struct brw_tracked_state
**atoms
;
1297 /* If (INTEL_DEBUG & DEBUG_BATCH) */
1301 enum state_struct_type type
;
1302 } *state_batch_list
;
1303 int state_batch_count
;
1305 uint32_t render_target_format
[MESA_FORMAT_COUNT
];
1306 bool format_supported_as_render_target
[MESA_FORMAT_COUNT
];
1308 /* Interpolation modes, one byte per vue slot.
1309 * Used Gen4/5 by the clip|sf|wm stages. Ignored on Gen6+.
1311 struct interpolation_mode_map interpolation_mode
;
1313 /* PrimitiveRestart */
1316 bool enable_cut_index
;
1319 /** Computed depth/stencil/hiz state from the current attached
1320 * renderbuffers, valid only during the drawing state upload loop after
1321 * brw_workaround_depthstencil_alignment().
1324 struct intel_mipmap_tree
*depth_mt
;
1325 struct intel_mipmap_tree
*stencil_mt
;
1327 /* Inter-tile (page-aligned) byte offsets. */
1328 uint32_t depth_offset
, hiz_offset
, stencil_offset
;
1329 /* Intra-tile x,y offsets for drawing to depth/stencil/hiz */
1330 uint32_t tile_x
, tile_y
;
1333 uint32_t num_instances
;
1338 struct gl_shader_program
**shader_programs
;
1339 struct gl_program
**programs
;
1340 enum shader_time_shader_type
*types
;
1341 uint64_t *cumulative
;
1347 __DRIcontext
*driContext
;
1348 struct intel_screen
*intelScreen
;
1349 void (*saved_viewport
)(struct gl_context
*ctx
,
1350 GLint x
, GLint y
, GLsizei width
, GLsizei height
);
1353 /*======================================================================
1356 void brwInitVtbl( struct brw_context
*brw
);
1358 /*======================================================================
1361 bool brwCreateContext(int api
,
1362 const struct gl_config
*mesaVis
,
1363 __DRIcontext
*driContextPriv
,
1364 unsigned major_version
,
1365 unsigned minor_version
,
1368 void *sharedContextPrivate
);
1370 /*======================================================================
1373 void brw_get_depthstencil_tile_masks(struct intel_mipmap_tree
*depth_mt
,
1374 uint32_t depth_level
,
1375 uint32_t depth_layer
,
1376 struct intel_mipmap_tree
*stencil_mt
,
1377 uint32_t *out_tile_mask_x
,
1378 uint32_t *out_tile_mask_y
);
1379 void brw_workaround_depthstencil_alignment(struct brw_context
*brw
,
1380 GLbitfield clear_mask
);
1382 /* brw_object_purgeable.c */
1383 void brw_init_object_purgeable_functions(struct dd_function_table
*functions
);
1385 /*======================================================================
1388 void brw_init_common_queryobj_functions(struct dd_function_table
*functions
);
1389 void gen4_init_queryobj_functions(struct dd_function_table
*functions
);
1390 void brw_emit_query_begin(struct brw_context
*brw
);
1391 void brw_emit_query_end(struct brw_context
*brw
);
1393 /** gen6_queryobj.c */
1394 void gen6_init_queryobj_functions(struct dd_function_table
*functions
);
1396 /*======================================================================
1399 void brw_debug_batch(struct brw_context
*brw
);
1400 void brw_annotate_aub(struct brw_context
*brw
);
1402 /*======================================================================
1405 void brw_validate_textures( struct brw_context
*brw
);
1408 /*======================================================================
1411 void brwInitFragProgFuncs( struct dd_function_table
*functions
);
1413 int brw_get_scratch_size(int size
);
1414 void brw_get_scratch_bo(struct brw_context
*brw
,
1415 drm_intel_bo
**scratch_bo
, int size
);
1416 void brw_init_shader_time(struct brw_context
*brw
);
1417 int brw_get_shader_time_index(struct brw_context
*brw
,
1418 struct gl_shader_program
*shader_prog
,
1419 struct gl_program
*prog
,
1420 enum shader_time_shader_type type
);
1421 void brw_collect_and_report_shader_time(struct brw_context
*brw
);
1422 void brw_destroy_shader_time(struct brw_context
*brw
);
1426 void brw_upload_urb_fence(struct brw_context
*brw
);
1430 void brw_upload_cs_urb_state(struct brw_context
*brw
);
1432 /* brw_fs_reg_allocate.cpp
1434 void brw_fs_alloc_reg_sets(struct brw_context
*brw
);
1436 /* brw_vec4_reg_allocate.cpp */
1437 void brw_vec4_alloc_reg_set(struct brw_context
*brw
);
1440 int brw_disasm (FILE *file
, struct brw_instruction
*inst
, int gen
);
1443 gl_clip_plane
*brw_select_clip_planes(struct gl_context
*ctx
);
1445 /* brw_draw_upload.c */
1446 unsigned brw_get_vertex_surface_type(struct brw_context
*brw
,
1447 const struct gl_client_array
*glarray
);
1448 unsigned brw_get_index_type(GLenum type
);
1450 /* brw_wm_surface_state.c */
1451 void brw_init_surface_formats(struct brw_context
*brw
);
1453 brw_update_sol_surface(struct brw_context
*brw
,
1454 struct gl_buffer_object
*buffer_obj
,
1455 uint32_t *out_offset
, unsigned num_vector_components
,
1456 unsigned stride_dwords
, unsigned offset_dwords
);
1457 void brw_upload_ubo_surfaces(struct brw_context
*brw
,
1458 struct gl_shader
*shader
,
1459 uint32_t *surf_offsets
);
1461 /* brw_surface_formats.c */
1462 bool brw_is_hiz_depth_format(struct brw_context
*ctx
, gl_format format
);
1463 bool brw_render_target_supported(struct brw_context
*brw
,
1464 struct gl_renderbuffer
*rb
);
1468 brw_begin_transform_feedback(struct gl_context
*ctx
, GLenum mode
,
1469 struct gl_transform_feedback_object
*obj
);
1471 brw_end_transform_feedback(struct gl_context
*ctx
,
1472 struct gl_transform_feedback_object
*obj
);
1474 /* gen7_sol_state.c */
1476 gen7_begin_transform_feedback(struct gl_context
*ctx
, GLenum mode
,
1477 struct gl_transform_feedback_object
*obj
);
1479 gen7_end_transform_feedback(struct gl_context
*ctx
,
1480 struct gl_transform_feedback_object
*obj
);
1482 /* brw_blorp_blit.cpp */
1484 brw_blorp_framebuffer(struct brw_context
*brw
,
1485 GLint srcX0
, GLint srcY0
, GLint srcX1
, GLint srcY1
,
1486 GLint dstX0
, GLint dstY0
, GLint dstX1
, GLint dstY1
,
1487 GLbitfield mask
, GLenum filter
);
1490 brw_blorp_copytexsubimage(struct brw_context
*brw
,
1491 struct gl_renderbuffer
*src_rb
,
1492 struct gl_texture_image
*dst_image
,
1494 int srcX0
, int srcY0
,
1495 int dstX0
, int dstY0
,
1496 int width
, int height
);
1498 /* gen6_multisample_state.c */
1500 gen6_emit_3dstate_multisample(struct brw_context
*brw
,
1501 unsigned num_samples
);
1503 gen6_emit_3dstate_sample_mask(struct brw_context
*brw
,
1504 unsigned num_samples
, float coverage
,
1505 bool coverage_invert
, unsigned sample_mask
);
1507 gen6_get_sample_position(struct gl_context
*ctx
,
1508 struct gl_framebuffer
*fb
,
1514 gen7_emit_push_constant_state(struct brw_context
*brw
, unsigned vs_size
,
1515 unsigned gs_size
, unsigned fs_size
);
1518 gen7_emit_urb_state(struct brw_context
*brw
,
1519 unsigned nr_vs_entries
, unsigned vs_size
,
1520 unsigned vs_start
, unsigned nr_gs_entries
,
1521 unsigned gs_size
, unsigned gs_start
);
1525 /*======================================================================
1526 * Inline conversion functions. These are better-typed than the
1527 * macros used previously:
1529 static INLINE
struct brw_context
*
1530 brw_context( struct gl_context
*ctx
)
1532 return (struct brw_context
*)ctx
;
1535 static INLINE
struct brw_vertex_program
*
1536 brw_vertex_program(struct gl_vertex_program
*p
)
1538 return (struct brw_vertex_program
*) p
;
1541 static INLINE
const struct brw_vertex_program
*
1542 brw_vertex_program_const(const struct gl_vertex_program
*p
)
1544 return (const struct brw_vertex_program
*) p
;
1547 static INLINE
struct brw_fragment_program
*
1548 brw_fragment_program(struct gl_fragment_program
*p
)
1550 return (struct brw_fragment_program
*) p
;
1553 static INLINE
const struct brw_fragment_program
*
1554 brw_fragment_program_const(const struct gl_fragment_program
*p
)
1556 return (const struct brw_fragment_program
*) p
;
1560 * Pre-gen6, the register file of the EUs was shared between threads,
1561 * and each thread used some subset allocated on a 16-register block
1562 * granularity. The unit states wanted these block counts.
1565 brw_register_blocks(int reg_count
)
1567 return ALIGN(reg_count
, 16) / 16 - 1;
1570 static inline uint32_t
1571 brw_program_reloc(struct brw_context
*brw
, uint32_t state_offset
,
1572 uint32_t prog_offset
)
1574 if (brw
->gen
>= 5) {
1575 /* Using state base address. */
1579 drm_intel_bo_emit_reloc(brw
->batch
.bo
,
1583 I915_GEM_DOMAIN_INSTRUCTION
, 0);
1585 return brw
->cache
.bo
->offset
+ prog_offset
;
1588 bool brw_do_cubemap_normalize(struct exec_list
*instructions
);
1589 bool brw_lower_texture_gradients(struct brw_context
*brw
,
1590 struct exec_list
*instructions
);
1592 struct opcode_desc
{
1598 extern const struct opcode_desc opcode_descs
[128];
1601 brw_emit_depthbuffer(struct brw_context
*brw
);
1604 brw_emit_depth_stencil_hiz(struct brw_context
*brw
,
1605 struct intel_mipmap_tree
*depth_mt
,
1606 uint32_t depth_offset
, uint32_t depthbuffer_format
,
1607 uint32_t depth_surface_type
,
1608 struct intel_mipmap_tree
*stencil_mt
,
1609 bool hiz
, bool separate_stencil
,
1610 uint32_t width
, uint32_t height
,
1611 uint32_t tile_x
, uint32_t tile_y
);
1614 gen7_emit_depth_stencil_hiz(struct brw_context
*brw
,
1615 struct intel_mipmap_tree
*depth_mt
,
1616 uint32_t depth_offset
, uint32_t depthbuffer_format
,
1617 uint32_t depth_surface_type
,
1618 struct intel_mipmap_tree
*stencil_mt
,
1619 bool hiz
, bool separate_stencil
,
1620 uint32_t width
, uint32_t height
,
1621 uint32_t tile_x
, uint32_t tile_y
);
1623 extern const GLuint prim_to_hw_prim
[GL_POLYGON
+1];
1626 brw_setup_vec4_key_clip_info(struct brw_context
*brw
,
1627 struct brw_vec4_prog_key
*key
,
1628 bool program_uses_clip_distance
);
1631 gen6_upload_vec4_push_constants(struct brw_context
*brw
,
1632 const struct gl_program
*prog
,
1633 const struct brw_vec4_prog_data
*prog_data
,
1634 struct brw_stage_state
*stage_state
,
1635 enum state_struct_type type
);