2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
36 #include "intel_context.h"
37 #include "brw_structs.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
47 * URB - uniform resource buffer. A mid-sized buffer which is
48 * partitioned between the fixed function units and used for passing
49 * values (vertices, primitives, constants) between them.
51 * CURBE - constant URB entry. An urb region (entry) used to hold
52 * constant values which the fixed function units can be instructed to
53 * preload into the GRF when spawning a thread.
55 * VUE - vertex URB entry. An urb entry holding a vertex and usually
56 * a vertex header. The header contains control information and
57 * things like primitive type, Begin/end flags and clip codes.
59 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
60 * unit holding rasterization and interpolation parameters.
62 * GRF - general register file. One of several register files
63 * addressable by programmed threads. The inputs (r0, payload, curbe,
64 * urb) of the thread are preloaded to this area before the thread is
65 * spawned. The registers are individually 8 dwords wide and suitable
66 * for general usage. Registers holding thread input values are not
67 * special and may be overwritten.
69 * MRF - message register file. Threads communicate (and terminate)
70 * by sending messages. Message parameters are placed in contiguous
71 * MRF registers. All program output is via these messages. URB
72 * entries are populated by sending a message to the shared URB
73 * function containing the new data, together with a control word,
74 * often an unmodified copy of R0.
76 * R0 - GRF register 0. Typically holds control information used when
77 * sending messages to other threads.
79 * EU or GEN4 EU: The name of the programmable subsystem of the
80 * i965 hardware. Threads are executed by the EU, the registers
81 * described above are part of the EU architecture.
83 * Fixed function units:
85 * CS - Command streamer. Notional first unit, little software
86 * interaction. Holds the URB entries used for constant data, ie the
89 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
90 * this unit is responsible for pulling vertices out of vertex buffers
91 * in vram and injecting them into the processing pipe as VUEs. If
92 * enabled, it first passes them to a VS thread which is a good place
93 * for the driver to implement any active vertex shader.
95 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
96 * enabled, incoming strips etc are passed to GS threads in individual
97 * line/triangle/point units. The GS thread may perform arbitary
98 * computation and emit whatever primtives with whatever vertices it
99 * chooses. This makes GS an excellent place to implement GL's
100 * unfilled polygon modes, though of course it is capable of much
101 * more. Additionally, GS is used to translate away primitives not
102 * handled by latter units, including Quads and Lineloops.
104 * CS - Clipper. Mesa's clipping algorithms are imported to run on
105 * this unit. The fixed function part performs cliptesting against
106 * the 6 fixed clipplanes and makes descisions on whether or not the
107 * incoming primitive needs to be passed to a thread for clipping.
108 * User clip planes are handled via cooperation with the VS thread.
110 * SF - Strips Fans or Setup: Triangles are prepared for
111 * rasterization. Interpolation coefficients are calculated.
112 * Flatshading and two-side lighting usually performed here.
114 * WM - Windower. Interpolation of vertex attributes performed here.
115 * Fragment shader implemented here. SIMD aspects of EU taken full
116 * advantage of, as pixels are processed in blocks of 16.
118 * CC - Color Calculator. No EU threads associated with this unit.
119 * Handles blending and (presumably) depth and stencil testing.
123 #define BRW_MAX_CURBE (32*16)
126 struct brw_instruction
;
127 struct brw_vs_prog_key
;
128 struct brw_vec4_prog_key
;
129 struct brw_wm_prog_key
;
130 struct brw_wm_prog_data
;
131 struct brw_perf_bo_layout
;
135 BRW_STATE_FRAGMENT_PROGRAM
,
136 BRW_STATE_GEOMETRY_PROGRAM
,
137 BRW_STATE_VERTEX_PROGRAM
,
138 BRW_STATE_CURBE_OFFSETS
,
139 BRW_STATE_REDUCED_PRIMITIVE
,
144 BRW_STATE_VS_BINDING_TABLE
,
145 BRW_STATE_GS_BINDING_TABLE
,
146 BRW_STATE_PS_BINDING_TABLE
,
150 BRW_STATE_INDEX_BUFFER
,
151 BRW_STATE_VS_CONSTBUF
,
152 BRW_STATE_GS_CONSTBUF
,
153 BRW_STATE_PROGRAM_CACHE
,
154 BRW_STATE_STATE_BASE_ADDRESS
,
155 BRW_STATE_VUE_MAP_VS
,
156 BRW_STATE_VUE_MAP_GEOM_OUT
,
157 BRW_STATE_TRANSFORM_FEEDBACK
,
158 BRW_STATE_RASTERIZER_DISCARD
,
160 BRW_STATE_UNIFORM_BUFFER
,
161 BRW_STATE_META_IN_PROGRESS
,
162 BRW_STATE_INTERPOLATION_MAP
,
163 BRW_STATE_PUSH_CONSTANT_ALLOCATION
,
167 #define BRW_NEW_URB_FENCE (1 << BRW_STATE_URB_FENCE)
168 #define BRW_NEW_FRAGMENT_PROGRAM (1 << BRW_STATE_FRAGMENT_PROGRAM)
169 #define BRW_NEW_GEOMETRY_PROGRAM (1 << BRW_STATE_GEOMETRY_PROGRAM)
170 #define BRW_NEW_VERTEX_PROGRAM (1 << BRW_STATE_VERTEX_PROGRAM)
171 #define BRW_NEW_CURBE_OFFSETS (1 << BRW_STATE_CURBE_OFFSETS)
172 #define BRW_NEW_REDUCED_PRIMITIVE (1 << BRW_STATE_REDUCED_PRIMITIVE)
173 #define BRW_NEW_PRIMITIVE (1 << BRW_STATE_PRIMITIVE)
174 #define BRW_NEW_CONTEXT (1 << BRW_STATE_CONTEXT)
175 #define BRW_NEW_PSP (1 << BRW_STATE_PSP)
176 #define BRW_NEW_SURFACES (1 << BRW_STATE_SURFACES)
177 #define BRW_NEW_VS_BINDING_TABLE (1 << BRW_STATE_VS_BINDING_TABLE)
178 #define BRW_NEW_GS_BINDING_TABLE (1 << BRW_STATE_GS_BINDING_TABLE)
179 #define BRW_NEW_PS_BINDING_TABLE (1 << BRW_STATE_PS_BINDING_TABLE)
180 #define BRW_NEW_INDICES (1 << BRW_STATE_INDICES)
181 #define BRW_NEW_VERTICES (1 << BRW_STATE_VERTICES)
183 * Used for any batch entry with a relocated pointer that will be used
184 * by any 3D rendering.
186 #define BRW_NEW_BATCH (1 << BRW_STATE_BATCH)
187 /** \see brw.state.depth_region */
188 #define BRW_NEW_INDEX_BUFFER (1 << BRW_STATE_INDEX_BUFFER)
189 #define BRW_NEW_VS_CONSTBUF (1 << BRW_STATE_VS_CONSTBUF)
190 #define BRW_NEW_GS_CONSTBUF (1 << BRW_STATE_GS_CONSTBUF)
191 #define BRW_NEW_PROGRAM_CACHE (1 << BRW_STATE_PROGRAM_CACHE)
192 #define BRW_NEW_STATE_BASE_ADDRESS (1 << BRW_STATE_STATE_BASE_ADDRESS)
193 #define BRW_NEW_VUE_MAP_VS (1 << BRW_STATE_VUE_MAP_VS)
194 #define BRW_NEW_VUE_MAP_GEOM_OUT (1 << BRW_STATE_VUE_MAP_GEOM_OUT)
195 #define BRW_NEW_TRANSFORM_FEEDBACK (1 << BRW_STATE_TRANSFORM_FEEDBACK)
196 #define BRW_NEW_RASTERIZER_DISCARD (1 << BRW_STATE_RASTERIZER_DISCARD)
197 #define BRW_NEW_STATS_WM (1 << BRW_STATE_STATS_WM)
198 #define BRW_NEW_UNIFORM_BUFFER (1 << BRW_STATE_UNIFORM_BUFFER)
199 #define BRW_NEW_META_IN_PROGRESS (1 << BRW_STATE_META_IN_PROGRESS)
200 #define BRW_NEW_INTERPOLATION_MAP (1 << BRW_STATE_INTERPOLATION_MAP)
201 #define BRW_NEW_PUSH_CONSTANT_ALLOCATION (1 << BRW_STATE_PUSH_CONSTANT_ALLOCATION)
203 struct brw_state_flags
{
204 /** State update flags signalled by mesa internals */
207 * State update flags signalled as the result of brw_tracked_state updates
210 /** State update flags signalled by brw_state_cache.c searches */
214 #define AUB_TRACE_TYPE_MASK 0x0000ff00
215 #define AUB_TRACE_TYPE_NOTYPE (0 << 8)
216 #define AUB_TRACE_TYPE_BATCH (1 << 8)
217 #define AUB_TRACE_TYPE_VERTEX_BUFFER (5 << 8)
218 #define AUB_TRACE_TYPE_2D_MAP (6 << 8)
219 #define AUB_TRACE_TYPE_CUBE_MAP (7 << 8)
220 #define AUB_TRACE_TYPE_VOLUME_MAP (9 << 8)
221 #define AUB_TRACE_TYPE_1D_MAP (10 << 8)
222 #define AUB_TRACE_TYPE_CONSTANT_BUFFER (11 << 8)
223 #define AUB_TRACE_TYPE_CONSTANT_URB (12 << 8)
224 #define AUB_TRACE_TYPE_INDEX_BUFFER (13 << 8)
225 #define AUB_TRACE_TYPE_GENERAL (14 << 8)
226 #define AUB_TRACE_TYPE_SURFACE (15 << 8)
229 * state_struct_type enum values are encoded with the top 16 bits representing
230 * the type to be delivered to the .aub file, and the bottom 16 bits
231 * representing the subtype. This macro performs the encoding.
233 #define ENCODE_SS_TYPE(type, subtype) (((type) << 16) | (subtype))
235 enum state_struct_type
{
236 AUB_TRACE_VS_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 1),
237 AUB_TRACE_GS_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 2),
238 AUB_TRACE_CLIP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 3),
239 AUB_TRACE_SF_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 4),
240 AUB_TRACE_WM_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 5),
241 AUB_TRACE_CC_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 6),
242 AUB_TRACE_CLIP_VP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 7),
243 AUB_TRACE_SF_VP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 8),
244 AUB_TRACE_CC_VP_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x9),
245 AUB_TRACE_SAMPLER_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xa),
246 AUB_TRACE_KERNEL_INSTRUCTIONS
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xb),
247 AUB_TRACE_SCRATCH_SPACE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xc),
248 AUB_TRACE_SAMPLER_DEFAULT_COLOR
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0xd),
250 AUB_TRACE_SCISSOR_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x15),
251 AUB_TRACE_BLEND_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x16),
252 AUB_TRACE_DEPTH_STENCIL_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL
, 0x17),
254 AUB_TRACE_VERTEX_BUFFER
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_VERTEX_BUFFER
, 0),
255 AUB_TRACE_BINDING_TABLE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE
, 0x100),
256 AUB_TRACE_SURFACE_STATE
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE
, 0x200),
257 AUB_TRACE_VS_CONSTANTS
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER
, 0),
258 AUB_TRACE_WM_CONSTANTS
= ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER
, 1),
262 * Decode a state_struct_type value to determine the type that should be
263 * stored in the .aub file.
265 static inline uint32_t AUB_TRACE_TYPE(enum state_struct_type ss_type
)
267 return (ss_type
& 0xFFFF0000) >> 16;
271 * Decode a state_struct_type value to determine the subtype that should be
272 * stored in the .aub file.
274 static inline uint32_t AUB_TRACE_SUBTYPE(enum state_struct_type ss_type
)
276 return ss_type
& 0xFFFF;
279 /** Subclass of Mesa vertex program */
280 struct brw_vertex_program
{
281 struct gl_vertex_program program
;
286 /** Subclass of Mesa geometry program */
287 struct brw_geometry_program
{
288 struct gl_geometry_program program
;
289 unsigned id
; /**< serial no. to identify geom progs, never re-used */
293 /** Subclass of Mesa fragment program */
294 struct brw_fragment_program
{
295 struct gl_fragment_program program
;
296 GLuint id
; /**< serial no. to identify frag progs, never re-used */
300 struct gl_shader base
;
304 /** Shader IR transformed for native compile, at link time. */
305 struct exec_list
*ir
;
308 /* Data about a particular attempt to compile a program. Note that
309 * there can be many of these, each in a different GL state
310 * corresponding to a different brw_wm_prog_key struct, with different
313 * Note: brw_wm_prog_data_compare() must be updated when adding fields to this
316 struct brw_wm_prog_data
{
317 GLuint curb_read_length
;
318 GLuint num_varying_inputs
;
320 GLuint first_curbe_grf
;
321 GLuint first_curbe_grf_16
;
323 GLuint reg_blocks_16
;
324 GLuint total_scratch
;
326 unsigned binding_table_size
;
328 GLuint nr_params
; /**< number of float params/constants */
329 GLuint nr_pull_params
;
332 uint32_t prog_offset_16
;
335 * Mask of which interpolation modes are required by the fragment shader.
336 * Used in hardware setup on gen6+.
338 uint32_t barycentric_interp_modes
;
341 * Map from gl_varying_slot to the position within the FS setup data
342 * payload where the varying's attribute vertex deltas should be delivered.
343 * For varying slots that are not used by the FS, the value is -1.
345 int urb_setup
[VARYING_SLOT_MAX
];
347 /* Pointers to tracked values (only valid once
348 * _mesa_load_state_parameters has been called at runtime).
350 * These must be the last fields of the struct (see
351 * brw_wm_prog_data_compare()).
354 const float **pull_param
;
358 * Enum representing the i965-specific vertex results that don't correspond
359 * exactly to any element of gl_varying_slot. The values of this enum are
360 * assigned such that they don't conflict with gl_varying_slot.
364 BRW_VARYING_SLOT_NDC
= VARYING_SLOT_MAX
,
365 BRW_VARYING_SLOT_PAD
,
367 * Technically this is not a varying but just a placeholder that
368 * compile_sf_prog() inserts into its VUE map to cause the gl_PointCoord
369 * builtin variable to be compiled correctly. see compile_sf_prog() for
372 BRW_VARYING_SLOT_PNTC
,
373 BRW_VARYING_SLOT_COUNT
378 * Data structure recording the relationship between the gl_varying_slot enum
379 * and "slots" within the vertex URB entry (VUE). A "slot" is defined as a
380 * single octaword within the VUE (128 bits).
382 * Note that each BRW register contains 256 bits (2 octawords), so when
383 * accessing the VUE in URB_NOSWIZZLE mode, each register corresponds to two
384 * consecutive VUE slots. When accessing the VUE in URB_INTERLEAVED mode (as
385 * in a vertex shader), each register corresponds to a single VUE slot, since
386 * it contains data for two separate vertices.
390 * Bitfield representing all varying slots that are (a) stored in this VUE
391 * map, and (b) actually written by the shader. Does not include any of
392 * the additional varying slots defined in brw_varying_slot.
394 GLbitfield64 slots_valid
;
397 * Map from gl_varying_slot value to VUE slot. For gl_varying_slots that are
398 * not stored in a slot (because they are not written, or because
399 * additional processing is applied before storing them in the VUE), the
402 signed char varying_to_slot
[BRW_VARYING_SLOT_COUNT
];
405 * Map from VUE slot to gl_varying_slot value. For slots that do not
406 * directly correspond to a gl_varying_slot, the value comes from
409 * For slots that are not in use, the value is BRW_VARYING_SLOT_COUNT (this
410 * simplifies code that uses the value stored in slot_to_varying to
411 * create a bit mask).
413 signed char slot_to_varying
[BRW_VARYING_SLOT_COUNT
];
416 * Total number of VUE slots in use
422 * Convert a VUE slot number into a byte offset within the VUE.
424 static inline GLuint
brw_vue_slot_to_offset(GLuint slot
)
430 * Convert a vertex output (brw_varying_slot) into a byte offset within the
433 static inline GLuint
brw_varying_to_offset(struct brw_vue_map
*vue_map
,
436 return brw_vue_slot_to_offset(vue_map
->varying_to_slot
[varying
]);
439 void brw_compute_vue_map(struct brw_context
*brw
, struct brw_vue_map
*vue_map
,
440 GLbitfield64 slots_valid
);
444 * Bitmask indicating which fragment shader inputs represent varyings (and
445 * hence have to be delivered to the fragment shader by the SF/SBE stage).
447 #define BRW_FS_VARYING_INPUT_MASK \
448 (BITFIELD64_RANGE(0, VARYING_SLOT_MAX) & \
449 ~VARYING_BIT_POS & ~VARYING_BIT_FACE)
453 * Mapping of VUE map slots to interpolation modes.
455 struct interpolation_mode_map
{
456 unsigned char mode
[BRW_VARYING_SLOT_COUNT
];
459 static inline bool brw_any_flat_varyings(struct interpolation_mode_map
*map
)
461 for (int i
= 0; i
< BRW_VARYING_SLOT_COUNT
; i
++)
462 if (map
->mode
[i
] == INTERP_QUALIFIER_FLAT
)
468 static inline bool brw_any_noperspective_varyings(struct interpolation_mode_map
*map
)
470 for (int i
= 0; i
< BRW_VARYING_SLOT_COUNT
; i
++)
471 if (map
->mode
[i
] == INTERP_QUALIFIER_NOPERSPECTIVE
)
478 struct brw_sf_prog_data
{
479 GLuint urb_read_length
;
482 /* Each vertex may have upto 12 attributes, 4 components each,
483 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
486 * Actually we use 4 for each, so call it 12 rows.
488 GLuint urb_entry_size
;
493 * We always program SF to start reading at an offset of 1 (2 varying slots)
494 * from the start of the vertex URB entry. This causes it to skip:
495 * - VARYING_SLOT_PSIZ and BRW_VARYING_SLOT_NDC on gen4-5
496 * - VARYING_SLOT_PSIZ and VARYING_SLOT_POS on gen6+
498 #define BRW_SF_URB_ENTRY_READ_OFFSET 1
501 struct brw_clip_prog_data
{
502 GLuint curb_read_length
; /* user planes? */
504 GLuint urb_read_length
;
508 struct brw_ff_gs_prog_data
{
509 GLuint urb_read_length
;
513 * Gen6 transform feedback: Amount by which the streaming vertex buffer
514 * indices should be incremented each time the GS is invoked.
516 unsigned svbi_postincrement_value
;
520 /* Note: brw_vec4_prog_data_compare() must be updated when adding fields to
523 struct brw_vec4_prog_data
{
524 struct brw_vue_map vue_map
;
527 * Register where the thread expects to find input data from the URB
528 * (typically uniforms, followed by per-vertex inputs).
530 unsigned dispatch_grf_start_reg
;
532 GLuint curb_read_length
;
533 GLuint urb_read_length
;
535 GLuint nr_params
; /**< number of float params/constants */
536 GLuint nr_pull_params
; /**< number of dwords referenced by pull_param[] */
537 GLuint total_scratch
;
539 /* Used for calculating urb partitions. In the VS, this is the size of the
540 * URB entry used for both input and output to the thread. In the GS, this
541 * is the size of the URB entry used for output.
543 GLuint urb_entry_size
;
545 unsigned binding_table_size
;
547 /* These pointers must appear last. See brw_vec4_prog_data_compare(). */
549 const float **pull_param
;
553 /* Note: brw_vs_prog_data_compare() must be updated when adding fields to this
556 struct brw_vs_prog_data
{
557 struct brw_vec4_prog_data base
;
559 GLbitfield64 inputs_read
;
565 /* Note: brw_gs_prog_data_compare() must be updated when adding fields to
568 struct brw_gs_prog_data
570 struct brw_vec4_prog_data base
;
573 * Size of an output vertex, measured in HWORDS (32 bytes).
575 unsigned output_vertex_size_hwords
;
577 unsigned output_topology
;
580 * Size of the control data (cut bits or StreamID bits), in hwords (32
581 * bytes). 0 if there is no control data.
583 unsigned control_data_header_size_hwords
;
586 * Format of the control data (either GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID
587 * if the control data is StreamID bits, or
588 * GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_CUT if the control data is cut bits).
589 * Ignored if control_data_header_size is 0.
591 unsigned control_data_format
;
593 bool include_primitive_id
;
596 /** Number of texture sampler units */
597 #define BRW_MAX_TEX_UNIT 16
599 /** Max number of render targets in a shader */
600 #define BRW_MAX_DRAW_BUFFERS 8
603 * Max number of binding table entries used for stream output.
605 * From the OpenGL 3.0 spec, table 6.44 (Transform Feedback State), the
606 * minimum value of MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS is 64.
608 * On Gen6, the size of transform feedback data is limited not by the number
609 * of components but by the number of binding table entries we set aside. We
610 * use one binding table entry for a float, one entry for a vector, and one
611 * entry per matrix column. Since the only way we can communicate our
612 * transform feedback capabilities to the client is via
613 * MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS, we need to plan for the
614 * worst case, in which all the varyings are floats, so we use up one binding
615 * table entry per component. Therefore we need to set aside at least 64
616 * binding table entries for use by transform feedback.
618 * Note: since we don't currently pack varyings, it is currently impossible
619 * for the client to actually use up all of these binding table entries--if
620 * all of their varyings were floats, they would run out of varying slots and
621 * fail to link. But that's a bug, so it seems prudent to go ahead and
622 * allocate the number of binding table entries we will need once the bug is
625 #define BRW_MAX_SOL_BINDINGS 64
627 /** Maximum number of actual buffers used for stream output */
628 #define BRW_MAX_SOL_BUFFERS 4
630 #define BRW_MAX_WM_UBOS 12
631 #define BRW_MAX_VS_UBOS 12
634 * Helpers to create Surface Binding Table indexes for draw buffers,
635 * textures, and constant buffers.
637 * Shader threads access surfaces via numeric handles, rather than directly
638 * using pointers. The binding table maps these numeric handles to the
639 * address of the actual buffer.
641 * For example, a shader might ask to sample from "surface 7." In this case,
642 * bind[7] would contain a pointer to a texture.
644 * Currently, our WM binding tables are (arbitrarily) programmed as follows:
646 * +-------------------------------+
647 * | 0 | Draw buffer 0 |
650 * | 7 | Draw buffer 7 |
651 * |-----|-------------------------|
652 * | 8 | WM Pull Constant Buffer |
653 * |-----|-------------------------|
657 * | 24 | Texture 15 |
658 * |-----|-------------------------|
663 * |-----|-------------------------|
664 * | 37 | Shader time buffer |
665 * |-----|-------------------------|
666 * | 38 | Gather texture 0 |
669 * | 53 | Gather texture 15 |
670 * +-------------------------------+
672 * Our VS (and Gen7 GS) binding tables are programmed as follows:
674 * +-----+-------------------------+
675 * | 0 | Pull Constant Buffer |
676 * +-----+-------------------------+
680 * | 16 | Texture 15 |
681 * +-----+-------------------------+
686 * |-----|-------------------------|
687 * | 29 | Shader time buffer |
688 * |-----|-------------------------|
689 * | 30 | Gather texture 0 |
692 * | 45 | Gather texture 15 |
693 * +-------------------------------+
695 * Our (gen6) GS binding tables are programmed as follows:
697 * +-----+-------------------------+
698 * | 0 | SOL Binding 0 |
701 * | 63 | SOL Binding 63 |
702 * +-----+-------------------------+
704 #define SURF_INDEX_DRAW(d) (d)
705 #define SURF_INDEX_FRAG_CONST_BUFFER (BRW_MAX_DRAW_BUFFERS + 1)
706 #define SURF_INDEX_TEXTURE(t) (BRW_MAX_DRAW_BUFFERS + 2 + (t))
707 #define SURF_INDEX_WM_UBO(u) (SURF_INDEX_TEXTURE(BRW_MAX_TEX_UNIT) + u)
708 #define SURF_INDEX_WM_SHADER_TIME (SURF_INDEX_WM_UBO(12))
709 #define SURF_INDEX_GATHER_TEXTURE(t) (SURF_INDEX_WM_SHADER_TIME + 1 + (t))
710 /** Maximum size of the binding table. */
711 #define BRW_MAX_WM_SURFACES (SURF_INDEX_GATHER_TEXTURE(BRW_MAX_TEX_UNIT))
713 #define SURF_INDEX_VEC4_CONST_BUFFER (0)
714 #define SURF_INDEX_VEC4_TEXTURE(t) (SURF_INDEX_VEC4_CONST_BUFFER + 1 + (t))
715 #define SURF_INDEX_VEC4_UBO(u) (SURF_INDEX_VEC4_TEXTURE(BRW_MAX_TEX_UNIT) + u)
716 #define SURF_INDEX_VEC4_SHADER_TIME (SURF_INDEX_VEC4_UBO(12))
717 #define SURF_INDEX_VEC4_GATHER_TEXTURE(t) (SURF_INDEX_VEC4_SHADER_TIME + 1 + (t))
718 #define BRW_MAX_VEC4_SURFACES (SURF_INDEX_VEC4_GATHER_TEXTURE(BRW_MAX_TEX_UNIT))
720 #define SURF_INDEX_GEN6_SOL_BINDING(t) (t)
721 #define BRW_MAX_GEN6_GS_SURFACES SURF_INDEX_GEN6_SOL_BINDING(BRW_MAX_SOL_BINDINGS)
724 * Stride in bytes between shader_time entries.
726 * We separate entries by a cacheline to reduce traffic between EUs writing to
729 #define SHADER_TIME_STRIDE 64
736 BRW_BLORP_CONST_COLOR_PROG
,
741 BRW_SF_UNIT
, /* scissor state on gen6 */
754 struct brw_cache_item
{
756 * Effectively part of the key, cache_id identifies what kind of state
757 * buffer is involved, and also which brw->state.dirty.cache flag should
758 * be set when this cache item is chosen.
760 enum brw_cache_id cache_id
;
761 /** 32-bit hash of the key data */
763 GLuint key_size
; /* for variable-sized keys */
770 struct brw_cache_item
*next
;
774 typedef bool (*cache_aux_compare_func
)(const void *a
, const void *b
,
775 int aux_size
, const void *key
);
776 typedef void (*cache_aux_free_func
)(const void *aux
);
779 struct brw_context
*brw
;
781 struct brw_cache_item
**items
;
783 GLuint size
, n_items
;
785 uint32_t next_offset
;
789 * Optional functions used in determining whether the prog_data for a new
790 * cache item matches an existing cache item (in case there's relevant data
791 * outside of the prog_data). If NULL, a plain memcmp is done.
793 cache_aux_compare_func aux_compare
[BRW_MAX_CACHE
];
794 /** Optional functions for freeing other pointers attached to a prog_data. */
795 cache_aux_free_func aux_free
[BRW_MAX_CACHE
];
799 /* Considered adding a member to this struct to document which flags
800 * an update might raise so that ordering of the state atoms can be
801 * checked or derived at runtime. Dropped the idea in favor of having
802 * a debug mode where the state is monitored for flags which are
803 * raised that have already been tested against.
805 struct brw_tracked_state
{
806 struct brw_state_flags dirty
;
807 void (*emit
)( struct brw_context
*brw
);
810 enum shader_time_shader_type
{
823 /* Flags for brw->state.cache.
825 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
826 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
827 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
828 #define CACHE_NEW_BLORP_BLIT_PROG (1<<BRW_BLORP_BLIT_PROG)
829 #define CACHE_NEW_BLORP_CONST_COLOR_PROG (1<<BRW_BLORP_CONST_COLOR_PROG)
830 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
831 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
832 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
833 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
834 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
835 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
836 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
837 #define CACHE_NEW_FF_GS_UNIT (1<<BRW_FF_GS_UNIT)
838 #define CACHE_NEW_FF_GS_PROG (1<<BRW_FF_GS_PROG)
839 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
840 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
841 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
842 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
844 struct brw_cached_batch_item
{
845 struct header
*header
;
847 struct brw_cached_batch_item
*next
;
850 struct brw_vertex_buffer
{
851 /** Buffer object containing the uploaded vertex data */
854 /** Byte stride between elements in the uploaded array */
858 struct brw_vertex_element
{
859 const struct gl_client_array
*glarray
;
863 /** The corresponding Mesa vertex attribute */
864 gl_vert_attrib attrib
;
865 /** Offset of the first element within the buffer object */
869 struct brw_query_object
{
870 struct gl_query_object Base
;
872 /** Last query BO associated with this query. */
875 /** Last index in bo with query data for this object. */
881 * Data shared between brw_context::vs and brw_context::gs
883 struct brw_stage_state
886 * Optional scratch buffer used to store spilled register values and
887 * variably-indexed GRF arrays.
889 drm_intel_bo
*scratch_bo
;
891 /** Pull constant buffer */
892 drm_intel_bo
*const_bo
;
894 /** Offset in the program cache to the program */
895 uint32_t prog_offset
;
897 /** Offset in the batchbuffer to Gen4-5 pipelined state (VS/WM/GS_STATE). */
898 uint32_t state_offset
;
900 uint32_t push_const_offset
; /* Offset in the batchbuffer */
901 int push_const_size
; /* in 256-bit register increments */
903 /* Binding table: pointers to SURFACE_STATE entries. */
904 uint32_t bind_bo_offset
;
905 uint32_t surf_offset
[BRW_MAX_WM_SURFACES
];
907 /** SAMPLER_STATE count and table offset */
908 uint32_t sampler_count
;
909 uint32_t sampler_offset
;
911 /** Offsets in the batch to sampler default colors (texture border color) */
912 uint32_t sdc_offset
[BRW_MAX_TEX_UNIT
];
917 * brw_context is derived from gl_context.
921 struct gl_context ctx
; /**< base class, must be first field */
925 void (*destroy
) (struct brw_context
* brw
);
926 void (*finish_batch
) (struct brw_context
* brw
);
927 void (*new_batch
) (struct brw_context
* brw
);
929 void (*update_texture_surface
)(struct gl_context
*ctx
,
931 uint32_t *surf_offset
,
933 void (*update_renderbuffer_surface
)(struct brw_context
*brw
,
934 struct gl_renderbuffer
*rb
,
937 void (*update_null_renderbuffer_surface
)(struct brw_context
*brw
,
939 void (*create_constant_surface
)(struct brw_context
*brw
,
943 uint32_t *out_offset
,
946 /** Upload a SAMPLER_STATE table. */
947 void (*upload_sampler_state_table
)(struct brw_context
*brw
,
948 struct gl_program
*prog
,
949 uint32_t sampler_count
,
950 uint32_t *sst_offset
,
951 uint32_t *sdc_offset
);
954 * Send the appropriate state packets to configure depth, stencil, and
955 * HiZ buffers (i965+ only)
957 void (*emit_depth_stencil_hiz
)(struct brw_context
*brw
,
958 struct intel_mipmap_tree
*depth_mt
,
959 uint32_t depth_offset
,
960 uint32_t depthbuffer_format
,
961 uint32_t depth_surface_type
,
962 struct intel_mipmap_tree
*stencil_mt
,
963 bool hiz
, bool separate_stencil
,
964 uint32_t width
, uint32_t height
,
965 uint32_t tile_x
, uint32_t tile_y
);
971 drm_intel_context
*hw_ctx
;
973 struct intel_batchbuffer batch
;
980 uint32_t buffer_offset
;
985 * Set if rendering has occured to the drawable's front buffer.
987 * This is used in the DRI2 case to detect that glFlush should also copy
988 * the contents of the fake front buffer to the real front buffer.
990 bool front_buffer_dirty
;
993 * Track whether front-buffer rendering is currently enabled
995 * A separate flag is used to track this in order to support MRT more
998 bool is_front_buffer_rendering
;
1001 * Track whether front-buffer is the current read target.
1003 * This is closely associated with is_front_buffer_rendering, but may
1004 * be set separately. The DRI2 fake front buffer must be referenced
1007 bool is_front_buffer_reading
;
1009 /** Framerate throttling: @{ */
1010 drm_intel_bo
*first_post_swapbuffers_batch
;
1021 bool always_flush_batch
;
1022 bool always_flush_cache
;
1023 bool disable_throttling
;
1025 bool disable_derivative_optimization
;
1027 driOptionCache optionCache
;
1030 GLuint primitive
; /**< Hardware primitive, such as _3DPRIM_TRILIST. */
1032 GLenum reduced_primitive
;
1035 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
1036 * variable is set, this is the flag indicating to do expensive work that
1037 * might lead to a perf_debug() call.
1041 uint32_t max_gtt_map_object_size
;
1043 bool emit_state_always
;
1053 bool has_separate_stencil
;
1054 bool must_use_separate_stencil
;
1057 bool has_surface_tile_offset
;
1059 bool has_negative_rhw_bug
;
1060 bool has_aa_line_parameters
;
1064 * Some versions of Gen hardware don't do centroid interpolation correctly
1065 * on unlit pixels, causing incorrect values for derivatives near triangle
1066 * edges. Enabling this flag causes the fragment shader to use
1067 * non-centroid interpolation for unlit pixels, at the expense of two extra
1068 * fragment shader instructions.
1070 bool needs_unlit_centroid_workaround
;
1074 struct brw_state_flags dirty
;
1077 struct brw_cache cache
;
1078 struct brw_cached_batch_item
*cached_batch_items
;
1080 /* Whether a meta-operation is in progress. */
1081 bool meta_in_progress
;
1084 struct brw_vertex_element inputs
[VERT_ATTRIB_MAX
];
1085 struct brw_vertex_buffer buffers
[VERT_ATTRIB_MAX
];
1087 struct brw_vertex_element
*enabled
[VERT_ATTRIB_MAX
];
1091 /* Summary of size and varying of active arrays, so we can check
1092 * for changes to this state:
1094 unsigned int min_index
, max_index
;
1096 /* Offset from start of vertex buffer so we can avoid redefining
1097 * the same VB packed over and over again.
1099 unsigned int start_vertex_bias
;
1104 * Index buffer for this draw_prims call.
1106 * Updates are signaled by BRW_NEW_INDICES.
1108 const struct _mesa_index_buffer
*ib
;
1110 /* Updates are signaled by BRW_NEW_INDEX_BUFFER. */
1114 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
1115 * avoid re-uploading the IB packet over and over if we're actually
1116 * referencing the same index buffer.
1118 unsigned int start_vertex_offset
;
1121 /* Active vertex program:
1123 const struct gl_vertex_program
*vertex_program
;
1124 const struct gl_geometry_program
*geometry_program
;
1125 const struct gl_fragment_program
*fragment_program
;
1127 /* hw-dependent 3DSTATE_VF_STATISTICS opcode */
1128 uint32_t CMD_VF_STATISTICS
;
1129 /* hw-dependent 3DSTATE_PIPELINE_SELECT opcode */
1130 uint32_t CMD_PIPELINE_SELECT
;
1133 * Platform specific constants containing the maximum number of threads
1134 * for each pipeline stage.
1140 /* BRW_NEW_URB_ALLOCATIONS:
1143 GLuint vsize
; /* vertex size plus header in urb registers */
1144 GLuint csize
; /* constant buffer size in urb registers */
1145 GLuint sfsize
; /* setup data size in urb registers */
1149 GLuint min_vs_entries
; /* Minimum number of VS entries */
1150 GLuint max_vs_entries
; /* Maximum number of VS entries */
1151 GLuint max_gs_entries
; /* Maximum number of GS entries */
1153 GLuint nr_vs_entries
;
1154 GLuint nr_gs_entries
;
1155 GLuint nr_clip_entries
;
1156 GLuint nr_sf_entries
;
1157 GLuint nr_cs_entries
;
1164 GLuint size
; /* Hardware URB size, in KB. */
1166 /* gen6: True if the most recently sent _3DSTATE_URB message allocated
1167 * URB space for the GS.
1169 bool gen6_gs_previously_active
;
1173 /* BRW_NEW_CURBE_OFFSETS:
1176 GLuint wm_start
; /**< pos of first wm const in CURBE buffer */
1177 GLuint wm_size
; /**< number of float[4] consts, multiple of 16 */
1184 drm_intel_bo
*curbe_bo
;
1185 /** Offset within curbe_bo of space for current curbe entry */
1186 GLuint curbe_offset
;
1187 /** Offset within curbe_bo of space for next curbe entry */
1188 GLuint curbe_next_offset
;
1191 * Copy of the last set of CURBEs uploaded. Frequently we'll end up
1192 * in brw_curbe.c with the same set of constant data to be uploaded,
1193 * so we'd rather not upload new constants in that case (it can cause
1194 * a pipeline bubble since only up to 4 can be pipelined at a time).
1198 * Allocation for where to calculate the next set of CURBEs.
1199 * It's a hot enough path that malloc/free of that data matters.
1206 * Layout of vertex data exiting the vertex shader.
1208 * BRW_NEW_VUE_MAP_VS is flagged when this VUE map changes.
1210 struct brw_vue_map vue_map_vs
;
1213 * Layout of vertex data exiting the geometry portion of the pipleine.
1214 * This comes from the geometry shader if one exists, otherwise from the
1217 * BRW_NEW_VUE_MAP_GEOM_OUT is flagged when the VUE map changes.
1219 struct brw_vue_map vue_map_geom_out
;
1222 * Data structures used by all vec4 program compiles (not specific to any
1223 * particular program).
1226 struct ra_regs
*regs
;
1229 * Array of the ra classes for the unaligned contiguous register
1235 * Mapping for register-allocated objects in *regs to the first
1236 * GRF for that object.
1238 uint8_t *ra_reg_to_grf
;
1242 struct brw_stage_state base
;
1243 struct brw_vs_prog_data
*prog_data
;
1247 struct brw_stage_state base
;
1248 struct brw_gs_prog_data
*prog_data
;
1252 struct brw_ff_gs_prog_data
*prog_data
;
1255 /** Offset in the program cache to the CLIP program pre-gen6 */
1256 uint32_t prog_offset
;
1257 uint32_t state_offset
;
1259 uint32_t bind_bo_offset
;
1260 uint32_t surf_offset
[BRW_MAX_GEN6_GS_SURFACES
];
1264 struct brw_clip_prog_data
*prog_data
;
1266 /** Offset in the program cache to the CLIP program pre-gen6 */
1267 uint32_t prog_offset
;
1269 /* Offset in the batch to the CLIP state on pre-gen6. */
1270 uint32_t state_offset
;
1272 /* As of gen6, this is the offset in the batch to the CLIP VP,
1280 struct brw_sf_prog_data
*prog_data
;
1282 /** Offset in the program cache to the CLIP program pre-gen6 */
1283 uint32_t prog_offset
;
1284 uint32_t state_offset
;
1289 struct brw_stage_state base
;
1290 struct brw_wm_prog_data
*prog_data
;
1295 * Buffer object used in place of multisampled null render targets on
1296 * Gen6. See brw_update_null_renderbuffer_surface().
1298 drm_intel_bo
*multisampled_null_render_target_bo
;
1301 struct ra_regs
*regs
;
1304 * Array of the ra classes for the unaligned contiguous register
1305 * block sizes used, indexed by register size.
1310 * Mapping for register-allocated objects in *regs to the first
1311 * GRF for that object.
1313 uint8_t *ra_reg_to_grf
;
1316 * ra class for the aligned pairs we use for PLN, which doesn't
1317 * appear in *classes.
1319 int aligned_pairs_class
;
1325 uint32_t state_offset
;
1326 uint32_t blend_state_offset
;
1327 uint32_t depth_stencil_state_offset
;
1332 struct brw_query_object
*obj
;
1337 /* A map describing which counters are stored at a particular 32-bit
1338 * offset in the buffer object.
1340 const struct brw_perf_bo_layout
*bo_layout
;
1342 /* Number of 32-bit entries in the buffer object. */
1347 const struct brw_tracked_state
**atoms
;
1349 /* If (INTEL_DEBUG & DEBUG_BATCH) */
1353 enum state_struct_type type
;
1354 } *state_batch_list
;
1355 int state_batch_count
;
1357 uint32_t render_target_format
[MESA_FORMAT_COUNT
];
1358 bool format_supported_as_render_target
[MESA_FORMAT_COUNT
];
1360 /* Interpolation modes, one byte per vue slot.
1361 * Used Gen4/5 by the clip|sf|wm stages. Ignored on Gen6+.
1363 struct interpolation_mode_map interpolation_mode
;
1365 /* PrimitiveRestart */
1368 bool enable_cut_index
;
1371 /** Computed depth/stencil/hiz state from the current attached
1372 * renderbuffers, valid only during the drawing state upload loop after
1373 * brw_workaround_depthstencil_alignment().
1376 struct intel_mipmap_tree
*depth_mt
;
1377 struct intel_mipmap_tree
*stencil_mt
;
1379 /* Inter-tile (page-aligned) byte offsets. */
1380 uint32_t depth_offset
, hiz_offset
, stencil_offset
;
1381 /* Intra-tile x,y offsets for drawing to depth/stencil/hiz */
1382 uint32_t tile_x
, tile_y
;
1385 uint32_t num_instances
;
1390 struct gl_shader_program
**shader_programs
;
1391 struct gl_program
**programs
;
1392 enum shader_time_shader_type
*types
;
1393 uint64_t *cumulative
;
1399 __DRIcontext
*driContext
;
1400 struct intel_screen
*intelScreen
;
1401 void (*saved_viewport
)(struct gl_context
*ctx
,
1402 GLint x
, GLint y
, GLsizei width
, GLsizei height
);
1405 /*======================================================================
1408 void brwInitVtbl( struct brw_context
*brw
);
1410 /*======================================================================
1413 bool brwCreateContext(gl_api api
,
1414 const struct gl_config
*mesaVis
,
1415 __DRIcontext
*driContextPriv
,
1416 unsigned major_version
,
1417 unsigned minor_version
,
1420 void *sharedContextPrivate
);
1422 /*======================================================================
1425 void brw_get_depthstencil_tile_masks(struct intel_mipmap_tree
*depth_mt
,
1426 uint32_t depth_level
,
1427 uint32_t depth_layer
,
1428 struct intel_mipmap_tree
*stencil_mt
,
1429 uint32_t *out_tile_mask_x
,
1430 uint32_t *out_tile_mask_y
);
1431 void brw_workaround_depthstencil_alignment(struct brw_context
*brw
,
1432 GLbitfield clear_mask
);
1434 /* brw_object_purgeable.c */
1435 void brw_init_object_purgeable_functions(struct dd_function_table
*functions
);
1437 /*======================================================================
1440 void brw_init_common_queryobj_functions(struct dd_function_table
*functions
);
1441 void gen4_init_queryobj_functions(struct dd_function_table
*functions
);
1442 void brw_emit_query_begin(struct brw_context
*brw
);
1443 void brw_emit_query_end(struct brw_context
*brw
);
1445 /** gen6_queryobj.c */
1446 void gen6_init_queryobj_functions(struct dd_function_table
*functions
);
1448 /*======================================================================
1451 void brw_debug_batch(struct brw_context
*brw
);
1452 void brw_annotate_aub(struct brw_context
*brw
);
1454 /*======================================================================
1457 void brw_validate_textures( struct brw_context
*brw
);
1460 /*======================================================================
1463 void brwInitFragProgFuncs( struct dd_function_table
*functions
);
1465 int brw_get_scratch_size(int size
);
1466 void brw_get_scratch_bo(struct brw_context
*brw
,
1467 drm_intel_bo
**scratch_bo
, int size
);
1468 void brw_init_shader_time(struct brw_context
*brw
);
1469 int brw_get_shader_time_index(struct brw_context
*brw
,
1470 struct gl_shader_program
*shader_prog
,
1471 struct gl_program
*prog
,
1472 enum shader_time_shader_type type
);
1473 void brw_collect_and_report_shader_time(struct brw_context
*brw
);
1474 void brw_destroy_shader_time(struct brw_context
*brw
);
1478 void brw_upload_urb_fence(struct brw_context
*brw
);
1482 void brw_upload_cs_urb_state(struct brw_context
*brw
);
1484 /* brw_fs_reg_allocate.cpp
1486 void brw_fs_alloc_reg_sets(struct brw_context
*brw
);
1488 /* brw_vec4_reg_allocate.cpp */
1489 void brw_vec4_alloc_reg_set(struct brw_context
*brw
);
1492 int brw_disasm (FILE *file
, struct brw_instruction
*inst
, int gen
);
1495 gl_clip_plane
*brw_select_clip_planes(struct gl_context
*ctx
);
1497 /* brw_draw_upload.c */
1498 unsigned brw_get_vertex_surface_type(struct brw_context
*brw
,
1499 const struct gl_client_array
*glarray
);
1500 unsigned brw_get_index_type(GLenum type
);
1502 /* brw_wm_surface_state.c */
1503 void brw_init_surface_formats(struct brw_context
*brw
);
1505 brw_update_sol_surface(struct brw_context
*brw
,
1506 struct gl_buffer_object
*buffer_obj
,
1507 uint32_t *out_offset
, unsigned num_vector_components
,
1508 unsigned stride_dwords
, unsigned offset_dwords
);
1509 void brw_upload_ubo_surfaces(struct brw_context
*brw
,
1510 struct gl_shader
*shader
,
1511 uint32_t *surf_offsets
);
1513 /* brw_surface_formats.c */
1514 bool brw_is_hiz_depth_format(struct brw_context
*ctx
, gl_format format
);
1515 bool brw_render_target_supported(struct brw_context
*brw
,
1516 struct gl_renderbuffer
*rb
);
1518 /* brw_performance_monitor.c */
1519 void brw_init_performance_monitors(struct brw_context
*brw
);
1523 brw_begin_transform_feedback(struct gl_context
*ctx
, GLenum mode
,
1524 struct gl_transform_feedback_object
*obj
);
1526 brw_end_transform_feedback(struct gl_context
*ctx
,
1527 struct gl_transform_feedback_object
*obj
);
1529 /* gen7_sol_state.c */
1531 gen7_begin_transform_feedback(struct gl_context
*ctx
, GLenum mode
,
1532 struct gl_transform_feedback_object
*obj
);
1534 gen7_end_transform_feedback(struct gl_context
*ctx
,
1535 struct gl_transform_feedback_object
*obj
);
1537 /* brw_blorp_blit.cpp */
1539 brw_blorp_framebuffer(struct brw_context
*brw
,
1540 GLint srcX0
, GLint srcY0
, GLint srcX1
, GLint srcY1
,
1541 GLint dstX0
, GLint dstY0
, GLint dstX1
, GLint dstY1
,
1542 GLbitfield mask
, GLenum filter
);
1545 brw_blorp_copytexsubimage(struct brw_context
*brw
,
1546 struct gl_renderbuffer
*src_rb
,
1547 struct gl_texture_image
*dst_image
,
1549 int srcX0
, int srcY0
,
1550 int dstX0
, int dstY0
,
1551 int width
, int height
);
1553 /* gen6_multisample_state.c */
1555 gen6_emit_3dstate_multisample(struct brw_context
*brw
,
1556 unsigned num_samples
);
1558 gen6_emit_3dstate_sample_mask(struct brw_context
*brw
,
1559 unsigned num_samples
, float coverage
,
1560 bool coverage_invert
, unsigned sample_mask
);
1562 gen6_get_sample_position(struct gl_context
*ctx
,
1563 struct gl_framebuffer
*fb
,
1569 gen7_emit_push_constant_state(struct brw_context
*brw
, unsigned vs_size
,
1570 unsigned gs_size
, unsigned fs_size
);
1573 gen7_emit_urb_state(struct brw_context
*brw
,
1574 unsigned nr_vs_entries
, unsigned vs_size
,
1575 unsigned vs_start
, unsigned nr_gs_entries
,
1576 unsigned gs_size
, unsigned gs_start
);
1580 /*======================================================================
1581 * Inline conversion functions. These are better-typed than the
1582 * macros used previously:
1584 static INLINE
struct brw_context
*
1585 brw_context( struct gl_context
*ctx
)
1587 return (struct brw_context
*)ctx
;
1590 static INLINE
struct brw_vertex_program
*
1591 brw_vertex_program(struct gl_vertex_program
*p
)
1593 return (struct brw_vertex_program
*) p
;
1596 static INLINE
const struct brw_vertex_program
*
1597 brw_vertex_program_const(const struct gl_vertex_program
*p
)
1599 return (const struct brw_vertex_program
*) p
;
1602 static INLINE
struct brw_fragment_program
*
1603 brw_fragment_program(struct gl_fragment_program
*p
)
1605 return (struct brw_fragment_program
*) p
;
1608 static INLINE
const struct brw_fragment_program
*
1609 brw_fragment_program_const(const struct gl_fragment_program
*p
)
1611 return (const struct brw_fragment_program
*) p
;
1615 * Pre-gen6, the register file of the EUs was shared between threads,
1616 * and each thread used some subset allocated on a 16-register block
1617 * granularity. The unit states wanted these block counts.
1620 brw_register_blocks(int reg_count
)
1622 return ALIGN(reg_count
, 16) / 16 - 1;
1625 static inline uint32_t
1626 brw_program_reloc(struct brw_context
*brw
, uint32_t state_offset
,
1627 uint32_t prog_offset
)
1629 if (brw
->gen
>= 5) {
1630 /* Using state base address. */
1634 drm_intel_bo_emit_reloc(brw
->batch
.bo
,
1638 I915_GEM_DOMAIN_INSTRUCTION
, 0);
1640 return brw
->cache
.bo
->offset
+ prog_offset
;
1643 bool brw_do_cubemap_normalize(struct exec_list
*instructions
);
1644 bool brw_lower_texture_gradients(struct brw_context
*brw
,
1645 struct exec_list
*instructions
);
1647 struct opcode_desc
{
1653 extern const struct opcode_desc opcode_descs
[128];
1656 brw_emit_depthbuffer(struct brw_context
*brw
);
1659 brw_emit_depth_stencil_hiz(struct brw_context
*brw
,
1660 struct intel_mipmap_tree
*depth_mt
,
1661 uint32_t depth_offset
, uint32_t depthbuffer_format
,
1662 uint32_t depth_surface_type
,
1663 struct intel_mipmap_tree
*stencil_mt
,
1664 bool hiz
, bool separate_stencil
,
1665 uint32_t width
, uint32_t height
,
1666 uint32_t tile_x
, uint32_t tile_y
);
1669 gen7_emit_depth_stencil_hiz(struct brw_context
*brw
,
1670 struct intel_mipmap_tree
*depth_mt
,
1671 uint32_t depth_offset
, uint32_t depthbuffer_format
,
1672 uint32_t depth_surface_type
,
1673 struct intel_mipmap_tree
*stencil_mt
,
1674 bool hiz
, bool separate_stencil
,
1675 uint32_t width
, uint32_t height
,
1676 uint32_t tile_x
, uint32_t tile_y
);
1678 extern const GLuint prim_to_hw_prim
[GL_TRIANGLE_STRIP_ADJACENCY
+1];
1681 brw_setup_vec4_key_clip_info(struct brw_context
*brw
,
1682 struct brw_vec4_prog_key
*key
,
1683 bool program_uses_clip_distance
);
1686 gen6_upload_vec4_push_constants(struct brw_context
*brw
,
1687 const struct gl_program
*prog
,
1688 const struct brw_vec4_prog_data
*prog_data
,
1689 struct brw_stage_state
*stage_state
,
1690 enum state_struct_type type
);