2 * Copyright (c) 2014 - 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 #include "util/ralloc.h"
25 #include "brw_context.h"
29 #include "brw_shader.h"
30 #include "intel_mipmap_tree.h"
31 #include "brw_state.h"
32 #include "intel_batchbuffer.h"
34 #include "brw_program.h"
35 #include "compiler/glsl/ir_uniform.h"
38 assign_cs_binding_table_offsets(const struct gen_device_info
*devinfo
,
39 const struct gl_shader_program
*shader_prog
,
40 const struct gl_program
*prog
,
41 struct brw_cs_prog_data
*prog_data
)
43 uint32_t next_binding_table_offset
= 0;
45 /* May not be used if the gl_NumWorkGroups variable is not accessed. */
46 prog_data
->binding_table
.work_groups_start
= next_binding_table_offset
;
47 next_binding_table_offset
++;
49 brw_assign_common_binding_table_offsets(MESA_SHADER_COMPUTE
, devinfo
,
50 shader_prog
, prog
, &prog_data
->base
,
51 next_binding_table_offset
);
55 brw_codegen_cs_prog(struct brw_context
*brw
,
56 struct gl_shader_program
*prog
,
57 struct brw_program
*cp
,
58 struct brw_cs_prog_key
*key
)
60 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
61 struct gl_context
*ctx
= &brw
->ctx
;
62 const GLuint
*program
;
63 void *mem_ctx
= ralloc_context(NULL
);
65 struct brw_cs_prog_data prog_data
;
66 bool start_busy
= false;
67 double start_time
= 0;
69 struct brw_shader
*cs
=
70 (struct brw_shader
*) prog
->_LinkedShaders
[MESA_SHADER_COMPUTE
];
73 memset(&prog_data
, 0, sizeof(prog_data
));
75 if (prog
->Comp
.SharedSize
> 64 * 1024) {
76 prog
->LinkStatus
= false;
77 const char *error_str
=
78 "Compute shader used more than 64KB of shared variables";
79 ralloc_strcat(&prog
->InfoLog
, error_str
);
80 _mesa_problem(NULL
, "Failed to link compute shader: %s\n", error_str
);
85 prog_data
.base
.total_shared
= prog
->Comp
.SharedSize
;
88 assign_cs_binding_table_offsets(devinfo
, prog
, &cp
->program
, &prog_data
);
90 /* Allocate the references to the uniforms that will end up in the
91 * prog_data associated with the compiled program, and which will be freed
94 int param_count
= cp
->program
.nir
->num_uniforms
/ 4;
96 /* The backend also sometimes add a param for the thread local id. */
97 prog_data
.thread_local_id_index
= param_count
++;
99 /* The backend also sometimes adds params for texture size. */
100 param_count
+= 2 * ctx
->Const
.Program
[MESA_SHADER_COMPUTE
].MaxTextureImageUnits
;
101 prog_data
.base
.param
=
102 rzalloc_array(NULL
, const gl_constant_value
*, param_count
);
103 prog_data
.base
.pull_param
=
104 rzalloc_array(NULL
, const gl_constant_value
*, param_count
);
105 prog_data
.base
.image_param
=
106 rzalloc_array(NULL
, struct brw_image_param
, cs
->base
.NumImages
);
107 prog_data
.base
.nr_params
= param_count
;
108 prog_data
.base
.nr_image_params
= cs
->base
.NumImages
;
110 brw_nir_setup_glsl_uniforms(cp
->program
.nir
, prog
, &cp
->program
,
111 &prog_data
.base
, true);
113 if (unlikely(brw
->perf_debug
)) {
114 start_busy
= (brw
->batch
.last_bo
&&
115 drm_intel_bo_busy(brw
->batch
.last_bo
));
116 start_time
= get_time();
120 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
)
121 st_index
= brw_get_shader_time_index(brw
, prog
, &cp
->program
, ST_CS
);
124 program
= brw_compile_cs(brw
->screen
->compiler
, brw
, mem_ctx
, key
,
125 &prog_data
, cp
->program
.nir
, st_index
,
126 &program_size
, &error_str
);
127 if (program
== NULL
) {
128 prog
->LinkStatus
= false;
129 ralloc_strcat(&prog
->InfoLog
, error_str
);
130 _mesa_problem(NULL
, "Failed to compile compute shader: %s\n", error_str
);
132 ralloc_free(mem_ctx
);
136 if (unlikely(brw
->perf_debug
) && cs
) {
137 if (cs
->compiled_once
) {
138 _mesa_problem(&brw
->ctx
, "CS programs shouldn't need recompiles");
140 cs
->compiled_once
= true;
142 if (start_busy
&& !drm_intel_bo_busy(brw
->batch
.last_bo
)) {
143 perf_debug("CS compile took %.03f ms and stalled the GPU\n",
144 (get_time() - start_time
) * 1000);
148 const unsigned subslices
= MAX2(brw
->screen
->subslice_total
, 1);
150 /* WaCSScratchSize:hsw
152 * Haswell's scratch space address calculation appears to be sparse
153 * rather than tightly packed. The Thread ID has bits indicating
154 * which subslice, EU within a subslice, and thread within an EU
155 * it is. There's a maximum of two slices and two subslices, so these
156 * can be stored with a single bit. Even though there are only 10 EUs
157 * per subslice, this is stored in 4 bits, so there's an effective
158 * maximum value of 16 EUs. Similarly, although there are only 7
159 * threads per EU, this is stored in a 3 bit number, giving an effective
160 * maximum value of 8 threads per EU.
162 * This means that we need to use 16 * 8 instead of 10 * 7 for the
163 * number of threads per subslice.
165 const unsigned scratch_ids_per_subslice
=
166 brw
->is_haswell
? 16 * 8 : devinfo
->max_cs_threads
;
168 brw_alloc_stage_scratch(brw
, &brw
->cs
.base
,
169 prog_data
.base
.total_scratch
,
170 scratch_ids_per_subslice
* subslices
);
172 brw_upload_cache(&brw
->cache
, BRW_CACHE_CS_PROG
,
174 program
, program_size
,
175 &prog_data
, sizeof(prog_data
),
176 &brw
->cs
.base
.prog_offset
, &brw
->cs
.base
.prog_data
);
177 ralloc_free(mem_ctx
);
184 brw_cs_populate_key(struct brw_context
*brw
, struct brw_cs_prog_key
*key
)
186 struct gl_context
*ctx
= &brw
->ctx
;
187 /* BRW_NEW_COMPUTE_PROGRAM */
188 const struct brw_program
*cp
= (struct brw_program
*) brw
->compute_program
;
189 const struct gl_program
*prog
= (struct gl_program
*) cp
;
191 memset(key
, 0, sizeof(*key
));
194 brw_populate_sampler_prog_key_data(ctx
, prog
, &key
->tex
);
196 /* The unique compute program ID */
197 key
->program_string_id
= cp
->id
;
202 brw_upload_cs_prog(struct brw_context
*brw
)
204 struct gl_context
*ctx
= &brw
->ctx
;
205 struct brw_cs_prog_key key
;
206 struct brw_program
*cp
= (struct brw_program
*) brw
->compute_program
;
211 if (!brw_state_dirty(brw
, _NEW_TEXTURE
, BRW_NEW_COMPUTE_PROGRAM
))
214 brw
->cs
.base
.sampler_count
=
215 util_last_bit(ctx
->ComputeProgram
._Current
->SamplersUsed
);
217 brw_cs_populate_key(brw
, &key
);
219 if (!brw_search_cache(&brw
->cache
, BRW_CACHE_CS_PROG
,
221 &brw
->cs
.base
.prog_offset
,
222 &brw
->cs
.base
.prog_data
)) {
224 brw_codegen_cs_prog(brw
,
225 ctx
->Shader
.CurrentProgram
[MESA_SHADER_COMPUTE
],
234 brw_cs_precompile(struct gl_context
*ctx
,
235 struct gl_shader_program
*shader_prog
,
236 struct gl_program
*prog
)
238 struct brw_context
*brw
= brw_context(ctx
);
239 struct brw_cs_prog_key key
;
241 struct brw_program
*bcp
= brw_program(prog
);
243 memset(&key
, 0, sizeof(key
));
244 key
.program_string_id
= bcp
->id
;
246 brw_setup_tex_for_precompile(brw
, &key
.tex
, prog
);
248 uint32_t old_prog_offset
= brw
->cs
.base
.prog_offset
;
249 struct brw_stage_prog_data
*old_prog_data
= brw
->cs
.base
.prog_data
;
251 bool success
= brw_codegen_cs_prog(brw
, shader_prog
, bcp
, &key
);
253 brw
->cs
.base
.prog_offset
= old_prog_offset
;
254 brw
->cs
.base
.prog_data
= old_prog_data
;