i965: Update brw_wm_debug_recompile() for newer key entries.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_cs.c
1 /*
2 * Copyright (c) 2014 - 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "util/ralloc.h"
25 #include "brw_context.h"
26 #include "brw_cs.h"
27 #include "brw_wm.h"
28 #include "intel_mipmap_tree.h"
29 #include "brw_state.h"
30 #include "intel_batchbuffer.h"
31 #include "compiler/brw_nir.h"
32 #include "brw_program.h"
33 #include "compiler/glsl/ir_uniform.h"
34
35 static void
36 assign_cs_binding_table_offsets(const struct gen_device_info *devinfo,
37 const struct gl_program *prog,
38 struct brw_cs_prog_data *prog_data)
39 {
40 uint32_t next_binding_table_offset = 0;
41
42 /* May not be used if the gl_NumWorkGroups variable is not accessed. */
43 prog_data->binding_table.work_groups_start = next_binding_table_offset;
44 next_binding_table_offset++;
45
46 brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base,
47 next_binding_table_offset);
48 }
49
50 static bool
51 brw_codegen_cs_prog(struct brw_context *brw,
52 struct brw_program *cp,
53 struct brw_cs_prog_key *key)
54 {
55 const struct gen_device_info *devinfo = &brw->screen->devinfo;
56 const GLuint *program;
57 void *mem_ctx = ralloc_context(NULL);
58 GLuint program_size;
59 struct brw_cs_prog_data prog_data;
60 bool start_busy = false;
61 double start_time = 0;
62
63 memset(&prog_data, 0, sizeof(prog_data));
64
65 if (cp->program.info.cs.shared_size > 64 * 1024) {
66 cp->program.sh.data->LinkStatus = linking_failure;
67 const char *error_str =
68 "Compute shader used more than 64KB of shared variables";
69 ralloc_strcat(&cp->program.sh.data->InfoLog, error_str);
70 _mesa_problem(NULL, "Failed to link compute shader: %s\n", error_str);
71
72 ralloc_free(mem_ctx);
73 return false;
74 } else {
75 prog_data.base.total_shared = cp->program.info.cs.shared_size;
76 }
77
78 assign_cs_binding_table_offsets(devinfo, &cp->program, &prog_data);
79
80 brw_nir_setup_glsl_uniforms(mem_ctx, cp->program.nir,
81 &cp->program, &prog_data.base, true);
82
83 if (unlikely(brw->perf_debug)) {
84 start_busy = (brw->batch.last_bo &&
85 brw_bo_busy(brw->batch.last_bo));
86 start_time = get_time();
87 }
88
89 int st_index = -1;
90 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
91 st_index = brw_get_shader_time_index(brw, &cp->program, ST_CS, true);
92
93 char *error_str;
94 program = brw_compile_cs(brw->screen->compiler, brw, mem_ctx, key,
95 &prog_data, cp->program.nir, st_index,
96 &program_size, &error_str);
97 if (program == NULL) {
98 cp->program.sh.data->LinkStatus = linking_failure;
99 ralloc_strcat(&cp->program.sh.data->InfoLog, error_str);
100 _mesa_problem(NULL, "Failed to compile compute shader: %s\n", error_str);
101
102 ralloc_free(mem_ctx);
103 return false;
104 }
105
106 if (unlikely(brw->perf_debug)) {
107 if (cp->compiled_once) {
108 _mesa_problem(&brw->ctx, "CS programs shouldn't need recompiles");
109 }
110 cp->compiled_once = true;
111
112 if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
113 perf_debug("CS compile took %.03f ms and stalled the GPU\n",
114 (get_time() - start_time) * 1000);
115 }
116 }
117
118 const unsigned subslices = MAX2(brw->screen->subslice_total, 1);
119
120 /* WaCSScratchSize:hsw
121 *
122 * Haswell's scratch space address calculation appears to be sparse
123 * rather than tightly packed. The Thread ID has bits indicating
124 * which subslice, EU within a subslice, and thread within an EU
125 * it is. There's a maximum of two slices and two subslices, so these
126 * can be stored with a single bit. Even though there are only 10 EUs
127 * per subslice, this is stored in 4 bits, so there's an effective
128 * maximum value of 16 EUs. Similarly, although there are only 7
129 * threads per EU, this is stored in a 3 bit number, giving an effective
130 * maximum value of 8 threads per EU.
131 *
132 * This means that we need to use 16 * 8 instead of 10 * 7 for the
133 * number of threads per subslice.
134 */
135 const unsigned scratch_ids_per_subslice =
136 devinfo->is_haswell ? 16 * 8 : devinfo->max_cs_threads;
137
138 brw_alloc_stage_scratch(brw, &brw->cs.base,
139 prog_data.base.total_scratch,
140 scratch_ids_per_subslice * subslices);
141
142 /* The param and pull_param arrays will be freed by the shader cache. */
143 ralloc_steal(NULL, prog_data.base.param);
144 ralloc_steal(NULL, prog_data.base.pull_param);
145 brw_upload_cache(&brw->cache, BRW_CACHE_CS_PROG,
146 key, sizeof(*key),
147 program, program_size,
148 &prog_data, sizeof(prog_data),
149 &brw->cs.base.prog_offset, &brw->cs.base.prog_data);
150 ralloc_free(mem_ctx);
151
152 return true;
153 }
154
155
156 static void
157 brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key)
158 {
159 struct gl_context *ctx = &brw->ctx;
160 /* BRW_NEW_COMPUTE_PROGRAM */
161 const struct brw_program *cp =
162 (struct brw_program *) brw->programs[MESA_SHADER_COMPUTE];
163 const struct gl_program *prog = (struct gl_program *) cp;
164
165 memset(key, 0, sizeof(*key));
166
167 /* _NEW_TEXTURE */
168 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
169
170 /* The unique compute program ID */
171 key->program_string_id = cp->id;
172 }
173
174
175 void
176 brw_upload_cs_prog(struct brw_context *brw)
177 {
178 struct gl_context *ctx = &brw->ctx;
179 struct brw_cs_prog_key key;
180 struct brw_program *cp =
181 (struct brw_program *) brw->programs[MESA_SHADER_COMPUTE];
182
183 if (!cp)
184 return;
185
186 if (!brw_state_dirty(brw, _NEW_TEXTURE, BRW_NEW_COMPUTE_PROGRAM))
187 return;
188
189 brw->cs.base.sampler_count =
190 util_last_bit(ctx->ComputeProgram._Current->SamplersUsed);
191
192 brw_cs_populate_key(brw, &key);
193
194 if (!brw_search_cache(&brw->cache, BRW_CACHE_CS_PROG,
195 &key, sizeof(key),
196 &brw->cs.base.prog_offset,
197 &brw->cs.base.prog_data)) {
198 bool success = brw_codegen_cs_prog(brw, cp, &key);
199 (void) success;
200 assert(success);
201 }
202 }
203
204
205 bool
206 brw_cs_precompile(struct gl_context *ctx, struct gl_program *prog)
207 {
208 struct brw_context *brw = brw_context(ctx);
209 struct brw_cs_prog_key key;
210
211 struct brw_program *bcp = brw_program(prog);
212
213 memset(&key, 0, sizeof(key));
214 key.program_string_id = bcp->id;
215
216 brw_setup_tex_for_precompile(brw, &key.tex, prog);
217
218 uint32_t old_prog_offset = brw->cs.base.prog_offset;
219 struct brw_stage_prog_data *old_prog_data = brw->cs.base.prog_data;
220
221 bool success = brw_codegen_cs_prog(brw, bcp, &key);
222
223 brw->cs.base.prog_offset = old_prog_offset;
224 brw->cs.base.prog_data = old_prog_data;
225
226 return success;
227 }