fa8b5c8415d743a49b142810c72f81d61b905147
[mesa.git] / src / mesa / drivers / dri / i965 / brw_cs.cpp
1 /*
2 * Copyright (c) 2014 - 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24
25 #include "util/ralloc.h"
26 #include "brw_context.h"
27 #include "brw_cs.h"
28 #include "brw_fs.h"
29 #include "brw_eu.h"
30 #include "brw_wm.h"
31 #include "intel_mipmap_tree.h"
32 #include "brw_state.h"
33 #include "intel_batchbuffer.h"
34
35 extern "C"
36 bool
37 brw_cs_prog_data_compare(const void *in_a, const void *in_b)
38 {
39 const struct brw_cs_prog_data *a =
40 (const struct brw_cs_prog_data *)in_a;
41 const struct brw_cs_prog_data *b =
42 (const struct brw_cs_prog_data *)in_b;
43
44 /* Compare the base structure. */
45 if (!brw_stage_prog_data_compare(&a->base, &b->base))
46 return false;
47
48 /* Compare the rest of the structure. */
49 const unsigned offset = sizeof(struct brw_stage_prog_data);
50 if (memcmp(((char *) a) + offset, ((char *) b) + offset,
51 sizeof(struct brw_cs_prog_data) - offset))
52 return false;
53
54 return true;
55 }
56
57
58 static const unsigned *
59 brw_cs_emit(struct brw_context *brw,
60 void *mem_ctx,
61 const struct brw_cs_prog_key *key,
62 struct brw_cs_prog_data *prog_data,
63 struct gl_compute_program *cp,
64 struct gl_shader_program *prog,
65 unsigned *final_assembly_size)
66 {
67 bool start_busy = false;
68 double start_time = 0;
69
70 if (unlikely(brw->perf_debug)) {
71 start_busy = (brw->batch.last_bo &&
72 drm_intel_bo_busy(brw->batch.last_bo));
73 start_time = get_time();
74 }
75
76 struct brw_shader *shader =
77 (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_COMPUTE];
78
79 if (unlikely(INTEL_DEBUG & DEBUG_CS))
80 brw_dump_ir("compute", prog, &shader->base, &cp->Base);
81
82 prog_data->local_size[0] = cp->LocalSize[0];
83 prog_data->local_size[1] = cp->LocalSize[1];
84 prog_data->local_size[2] = cp->LocalSize[2];
85 int local_workgroup_size =
86 cp->LocalSize[0] * cp->LocalSize[1] * cp->LocalSize[2];
87
88 cfg_t *cfg = NULL;
89 const char *fail_msg = NULL;
90
91 int st_index = -1;
92 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
93 st_index = brw_get_shader_time_index(brw, prog, &cp->Base, ST_CS);
94
95 /* Now the main event: Visit the shader IR and generate our CS IR for it.
96 */
97 fs_visitor v8(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
98 &cp->Base, 8, st_index);
99 if (!v8.run_cs()) {
100 fail_msg = v8.fail_msg;
101 } else if (local_workgroup_size <= 8 * brw->max_cs_threads) {
102 cfg = v8.cfg;
103 prog_data->simd_size = 8;
104 }
105
106 fs_visitor v16(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
107 &cp->Base, 16, st_index);
108 if (likely(!(INTEL_DEBUG & DEBUG_NO16)) &&
109 !fail_msg && !v8.simd16_unsupported &&
110 local_workgroup_size <= 16 * brw->max_cs_threads) {
111 /* Try a SIMD16 compile */
112 v16.import_uniforms(&v8);
113 if (!v16.run_cs()) {
114 perf_debug("SIMD16 shader failed to compile: %s", v16.fail_msg);
115 if (!cfg) {
116 fail_msg =
117 "Couldn't generate SIMD16 program and not "
118 "enough threads for SIMD8";
119 }
120 } else {
121 cfg = v16.cfg;
122 prog_data->simd_size = 16;
123 }
124 }
125
126 if (unlikely(cfg == NULL)) {
127 assert(fail_msg);
128 prog->LinkStatus = false;
129 ralloc_strcat(&prog->InfoLog, fail_msg);
130 _mesa_problem(NULL, "Failed to compile compute shader: %s\n",
131 fail_msg);
132 return NULL;
133 }
134
135 fs_generator g(brw->intelScreen->compiler, brw,
136 mem_ctx, (void*) key, &prog_data->base, &cp->Base,
137 v8.promoted_constants, v8.runtime_check_aads_emit, "CS");
138 if (INTEL_DEBUG & DEBUG_CS) {
139 char *name = ralloc_asprintf(mem_ctx, "%s compute shader %d",
140 prog->Label ? prog->Label : "unnamed",
141 prog->Name);
142 g.enable_debug(name);
143 }
144
145 g.generate_code(cfg, prog_data->simd_size);
146
147 if (unlikely(brw->perf_debug) && shader) {
148 if (shader->compiled_once) {
149 _mesa_problem(&brw->ctx, "CS programs shouldn't need recompiles");
150 }
151 shader->compiled_once = true;
152
153 if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
154 perf_debug("CS compile took %.03f ms and stalled the GPU\n",
155 (get_time() - start_time) * 1000);
156 }
157 }
158
159 return g.get_assembly(final_assembly_size);
160 }
161
162 static bool
163 brw_codegen_cs_prog(struct brw_context *brw,
164 struct gl_shader_program *prog,
165 struct brw_compute_program *cp,
166 struct brw_cs_prog_key *key)
167 {
168 struct gl_context *ctx = &brw->ctx;
169 const GLuint *program;
170 void *mem_ctx = ralloc_context(NULL);
171 GLuint program_size;
172 struct brw_cs_prog_data prog_data;
173
174 struct gl_shader *cs = prog->_LinkedShaders[MESA_SHADER_COMPUTE];
175 assert (cs);
176
177 memset(&prog_data, 0, sizeof(prog_data));
178
179 /* Allocate the references to the uniforms that will end up in the
180 * prog_data associated with the compiled program, and which will be freed
181 * by the state cache.
182 */
183 int param_count = cs->num_uniform_components;
184
185 /* The backend also sometimes adds params for texture size. */
186 param_count += 2 * ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits;
187 prog_data.base.param =
188 rzalloc_array(NULL, const gl_constant_value *, param_count);
189 prog_data.base.pull_param =
190 rzalloc_array(NULL, const gl_constant_value *, param_count);
191 prog_data.base.nr_params = param_count;
192
193 program = brw_cs_emit(brw, mem_ctx, key, &prog_data,
194 &cp->program, prog, &program_size);
195 if (program == NULL) {
196 ralloc_free(mem_ctx);
197 return false;
198 }
199
200 if (prog_data.base.total_scratch) {
201 brw_get_scratch_bo(brw, &brw->cs.base.scratch_bo,
202 prog_data.base.total_scratch * brw->max_cs_threads);
203 }
204
205 if (unlikely(INTEL_DEBUG & DEBUG_CS))
206 fprintf(stderr, "\n");
207
208 brw_upload_cache(&brw->cache, BRW_CACHE_CS_PROG,
209 key, sizeof(*key),
210 program, program_size,
211 &prog_data, sizeof(prog_data),
212 &brw->cs.base.prog_offset, &brw->cs.prog_data);
213 ralloc_free(mem_ctx);
214
215 return true;
216 }
217
218
219 static void
220 brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key)
221 {
222 /* BRW_NEW_COMPUTE_PROGRAM */
223 const struct brw_compute_program *cp =
224 (struct brw_compute_program *) brw->compute_program;
225
226 memset(key, 0, sizeof(*key));
227
228 /* The unique compute program ID */
229 key->program_string_id = cp->id;
230 }
231
232
233 extern "C"
234 void
235 brw_upload_cs_prog(struct brw_context *brw)
236 {
237 struct gl_context *ctx = &brw->ctx;
238 struct brw_cs_prog_key key;
239 struct brw_compute_program *cp = (struct brw_compute_program *)
240 brw->compute_program;
241
242 if (!cp)
243 return;
244
245 if (!brw_state_dirty(brw, 0, BRW_NEW_COMPUTE_PROGRAM))
246 return;
247
248 brw_cs_populate_key(brw, &key);
249
250 if (!brw_search_cache(&brw->cache, BRW_CACHE_CS_PROG,
251 &key, sizeof(key),
252 &brw->cs.base.prog_offset, &brw->cs.prog_data)) {
253 bool success =
254 brw_codegen_cs_prog(brw,
255 ctx->Shader.CurrentProgram[MESA_SHADER_COMPUTE],
256 cp, &key);
257 (void) success;
258 assert(success);
259 }
260 brw->cs.base.prog_data = &brw->cs.prog_data->base;
261 }
262
263
264 extern "C" bool
265 brw_cs_precompile(struct gl_context *ctx,
266 struct gl_shader_program *shader_prog,
267 struct gl_program *prog)
268 {
269 struct brw_context *brw = brw_context(ctx);
270 struct brw_cs_prog_key key;
271
272 struct gl_compute_program *cp = (struct gl_compute_program *) prog;
273 struct brw_compute_program *bcp = brw_compute_program(cp);
274
275 memset(&key, 0, sizeof(key));
276 key.program_string_id = bcp->id;
277
278 brw_setup_tex_for_precompile(brw, &key.tex, prog);
279
280 uint32_t old_prog_offset = brw->cs.base.prog_offset;
281 struct brw_cs_prog_data *old_prog_data = brw->cs.prog_data;
282
283 bool success = brw_codegen_cs_prog(brw, shader_prog, bcp, &key);
284
285 brw->cs.base.prog_offset = old_prog_offset;
286 brw->cs.prog_data = old_prog_data;
287
288 return success;
289 }
290
291
292 static void
293 brw_upload_cs_state(struct brw_context *brw)
294 {
295 if (!brw->cs.prog_data)
296 return;
297
298 uint32_t offset;
299 uint32_t *desc = (uint32_t*) brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
300 8 * 4, 64, &offset);
301 struct brw_stage_state *stage_state = &brw->cs.base;
302 struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data;
303 struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
304
305 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
306 brw->vtbl.emit_buffer_surface_state(
307 brw, &stage_state->surf_offset[
308 prog_data->binding_table.shader_time_start],
309 brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW,
310 brw->shader_time.bo->size, 1, true);
311 }
312
313 uint32_t *bind = (uint32_t*) brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
314 prog_data->binding_table.size_bytes,
315 32, &stage_state->bind_bo_offset);
316
317 uint32_t dwords = brw->gen < 8 ? 8 : 9;
318 BEGIN_BATCH(dwords);
319 OUT_BATCH(MEDIA_VFE_STATE << 16 | (dwords - 2));
320
321 if (prog_data->total_scratch) {
322 if (brw->gen >= 8)
323 OUT_RELOC64(stage_state->scratch_bo,
324 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
325 ffs(prog_data->total_scratch) - 11);
326 else
327 OUT_RELOC(stage_state->scratch_bo,
328 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
329 ffs(prog_data->total_scratch) - 11);
330 } else {
331 OUT_BATCH(0);
332 if (brw->gen >= 8)
333 OUT_BATCH(0);
334 }
335
336 const uint32_t vfe_num_urb_entries = brw->gen >= 8 ? 2 : 0;
337 const uint32_t vfe_gpgpu_mode =
338 brw->gen == 7 ? SET_FIELD(1, GEN7_MEDIA_VFE_STATE_GPGPU_MODE) : 0;
339 OUT_BATCH(SET_FIELD(brw->max_cs_threads - 1, MEDIA_VFE_STATE_MAX_THREADS) |
340 SET_FIELD(vfe_num_urb_entries, MEDIA_VFE_STATE_URB_ENTRIES) |
341 SET_FIELD(1, MEDIA_VFE_STATE_RESET_GTW_TIMER) |
342 SET_FIELD(1, MEDIA_VFE_STATE_BYPASS_GTW) |
343 vfe_gpgpu_mode);
344
345 OUT_BATCH(0);
346 const uint32_t vfe_urb_allocation = brw->gen >= 8 ? 2 : 0;
347 OUT_BATCH(SET_FIELD(vfe_urb_allocation, MEDIA_VFE_STATE_URB_ALLOC));
348 OUT_BATCH(0);
349 OUT_BATCH(0);
350 OUT_BATCH(0);
351 ADVANCE_BATCH();
352
353 /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
354 memcpy(bind, stage_state->surf_offset,
355 prog_data->binding_table.size_bytes);
356
357 memset(desc, 0, 8 * 4);
358
359 int dw = 0;
360 desc[dw++] = brw->cs.base.prog_offset;
361 if (brw->gen >= 8)
362 desc[dw++] = 0; /* Kernel Start Pointer High */
363 desc[dw++] = 0;
364 desc[dw++] = 0;
365 desc[dw++] = stage_state->bind_bo_offset;
366
367 BEGIN_BATCH(4);
368 OUT_BATCH(MEDIA_INTERFACE_DESCRIPTOR_LOAD << 16 | (4 - 2));
369 OUT_BATCH(0);
370 OUT_BATCH(8 * 4);
371 OUT_BATCH(offset);
372 ADVANCE_BATCH();
373 }
374
375
376 extern "C"
377 const struct brw_tracked_state brw_cs_state = {
378 /* explicit initialisers aren't valid C++, comment
379 * them for documentation purposes */
380 /* .dirty = */{
381 /* .mesa = */ 0,
382 /* .brw = */ BRW_NEW_CS_PROG_DATA,
383 },
384 /* .emit = */ brw_upload_cs_state
385 };