src/mesa/drivers/dri/i965/brw_curbe.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32 /** @file brw_curbe.c
  33  *
  34  * Push constant handling for gen4/5.
  35  *
  36  * Push constants are constant values (such as GLSL uniforms) that are
  37  * pre-loaded into a shader stage's register space at thread spawn time.  On
  38  * gen4 and gen5, we create a blob in memory containing all the push constants
  39  * for all the stages in order.  At CMD_CONST_BUFFER time that blob is loaded
  40  * into URB space as a constant URB entry (CURBE) so that it can be accessed
  41  * quickly at thread setup time.  Each individual fixed function unit's state
  42  * (brw_vs_state.c for example) tells the hardware which subset of the CURBE
  43  * it wants in its register space, and we calculate those areas here under the
  44  * BRW_NEW_CURBE_OFFSETS state flag.  The brw_urb.c allocation will control
  45  * how many CURBEs can be loaded into the hardware at once before a pipeline
  46  * stall occurs at CMD_CONST_BUFFER time.
  47  *
  48  * On gen6+, constant handling becomes a much simpler set of per-unit state.
  49  * See gen6_upload_vec4_push_constants() in gen6_vs_state.c for that code.
  50  */
  51
  52
  53 #include "main/glheader.h"
  54 #include "main/context.h"
  55 #include "main/macros.h"
  56 #include "main/enums.h"
  57 #include "program/prog_parameter.h"
  58 #include "program/prog_print.h"
  59 #include "program/prog_statevars.h"
  60 #include "intel_batchbuffer.h"
  61 #include "intel_buffer_objects.h"
  62 #include "brw_context.h"
  63 #include "brw_defines.h"
  64 #include "brw_state.h"
  65 #include "brw_util.h"
  66
  67
  68 /**
  69  * Partition the CURBE between the various users of constant values.
  70  *
  71  * If the users all fit within the previous allocatation, we avoid changing
  72  * the layout because that means reuploading all unit state and uploading new
  73  * constant buffers.
  74  */
  75 static void calculate_curbe_offsets( struct brw_context *brw )
  76 {
  77    struct gl_context *ctx = &brw->ctx;
  78    /* BRW_NEW_FS_PROG_DATA */
  79    const GLuint nr_fp_regs = (brw->wm.prog_data->base.nr_params + 15) / 16;
  80
  81    /* BRW_NEW_VS_PROG_DATA */
  82    const GLuint nr_vp_regs = (brw->vs.prog_data->base.base.nr_params + 15) / 16;
  83    GLuint nr_clip_regs = 0;
  84    GLuint total_regs;
  85
  86    /* _NEW_TRANSFORM */
  87    if (ctx->Transform.ClipPlanesEnabled) {
  88       GLuint nr_planes = 6 + _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
  89       nr_clip_regs = (nr_planes * 4 + 15) / 16;
  90    }
  91
  92
  93    total_regs = nr_fp_regs + nr_vp_regs + nr_clip_regs;
  94
  95    /* The CURBE allocation size is limited to 32 512-bit units (128 EU
  96     * registers, or 1024 floats).  See CS_URB_STATE in the gen4 or gen5
  97     * (volume 1, part 1) PRMs.
  98     *
  99     * Note that in brw_fs.cpp we're only loading up to 16 EU registers of
 100     * values as push constants before spilling to pull constants, and in
 101     * brw_vec4.cpp we're loading up to 32 registers of push constants.  An EU
 102     * register is 1/2 of one of these URB entry units, so that leaves us 16 EU
 103     * regs for clip.
 104     */
 105    assert(total_regs <= 32);
 106
 107    /* Lazy resize:
 108     */
 109    if (nr_fp_regs > brw->curbe.wm_size ||
 110        nr_vp_regs > brw->curbe.vs_size ||
 111        nr_clip_regs != brw->curbe.clip_size ||
 112        (total_regs < brw->curbe.total_size / 4 &&
 113         brw->curbe.total_size > 16)) {
 114
 115       GLuint reg = 0;
 116
 117       /* Calculate a new layout:
 118        */
 119       reg = 0;
 120       brw->curbe.wm_start = reg;
 121       brw->curbe.wm_size = nr_fp_regs; reg += nr_fp_regs;
 122       brw->curbe.clip_start = reg;
 123       brw->curbe.clip_size = nr_clip_regs; reg += nr_clip_regs;
 124       brw->curbe.vs_start = reg;
 125       brw->curbe.vs_size = nr_vp_regs; reg += nr_vp_regs;
 126       brw->curbe.total_size = reg;
 127
 128       if (0)
 129          fprintf(stderr, "curbe wm %d+%d clip %d+%d vs %d+%d\n",
 130                  brw->curbe.wm_start,
 131                  brw->curbe.wm_size,
 132                  brw->curbe.clip_start,
 133                  brw->curbe.clip_size,
 134                  brw->curbe.vs_start,
 135                  brw->curbe.vs_size );
 136
 137       brw->state.dirty.brw |= BRW_NEW_CURBE_OFFSETS;
 138    }
 139 }
 140
 141
 142 const struct brw_tracked_state brw_curbe_offsets = {
 143    .dirty = {
 144       .mesa = _NEW_TRANSFORM,
 145       .brw  = BRW_NEW_CONTEXT,
 146       .cache = BRW_NEW_VS_PROG_DATA |
 147                BRW_NEW_FS_PROG_DATA
 148    },
 149    .emit = calculate_curbe_offsets
 150 };
 151
 152
 153
 154
 155 /** Uploads the CS_URB_STATE packet.
 156  *
 157  * Just like brw_vs_state.c and brw_wm_state.c define a URB entry size and
 158  * number of entries for their stages, constant buffers do so using this state
 159  * packet.  Having multiple CURBEs in the URB at the same time allows the
 160  * hardware to avoid a pipeline stall between primitives using different
 161  * constant buffer contents.
 162  */
 163 void brw_upload_cs_urb_state(struct brw_context *brw)
 164 {
 165    BEGIN_BATCH(2);
 166    OUT_BATCH(CMD_CS_URB_STATE << 16 | (2-2));
 167
 168    /* BRW_NEW_URB_FENCE */
 169    if (brw->urb.csize == 0) {
 170       OUT_BATCH(0);
 171    } else {
 172       /* BRW_NEW_URB_FENCE */
 173       assert(brw->urb.nr_cs_entries);
 174       OUT_BATCH((brw->urb.csize - 1) << 4 | brw->urb.nr_cs_entries);
 175    }
 176    ADVANCE_BATCH();
 177 }
 178
 179 static GLfloat fixed_plane[6][4] = {
 180    { 0,    0,   -1, 1 },
 181    { 0,    0,    1, 1 },
 182    { 0,   -1,    0, 1 },
 183    { 0,    1,    0, 1 },
 184    {-1,    0,    0, 1 },
 185    { 1,    0,    0, 1 }
 186 };
 187
 188 /**
 189  * Gathers together all the uniform values into a block of memory to be
 190  * uploaded into the CURBE, then emits the state packet telling the hardware
 191  * the new location.
 192  */
 193 static void
 194 brw_upload_constant_buffer(struct brw_context *brw)
 195 {
 196    struct gl_context *ctx = &brw->ctx;
 197    /* BRW_NEW_CURBE_OFFSETS */
 198    const GLuint sz = brw->curbe.total_size;
 199    const GLuint bufsz = sz * 16 * sizeof(GLfloat);
 200    gl_constant_value *buf;
 201    GLuint i;
 202    gl_clip_plane *clip_planes;
 203
 204    if (sz == 0) {
 205       goto emit;
 206    }
 207
 208    buf = intel_upload_space(brw, bufsz, 64,
 209                             &brw->curbe.curbe_bo, &brw->curbe.curbe_offset);
 210
 211    STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
 212
 213    /* fragment shader constants */
 214    if (brw->curbe.wm_size) {
 215       _mesa_load_state_parameters(ctx, brw->fragment_program->Base.Parameters);
 216
 217       /* BRW_NEW_CURBE_OFFSETS */
 218       GLuint offset = brw->curbe.wm_start * 16;
 219
 220       /* BRW_NEW_FS_PROG_DATA | _NEW_PROGRAM_CONSTANTS: copy uniform values */
 221       for (i = 0; i < brw->wm.prog_data->base.nr_params; i++) {
 222          buf[offset + i] = *brw->wm.prog_data->base.param[i];
 223       }
 224    }
 225
 226    /* clipper constants */
 227    if (brw->curbe.clip_size) {
 228       GLuint offset = brw->curbe.clip_start * 16;
 229       GLuint j;
 230
 231       /* If any planes are going this way, send them all this way:
 232        */
 233       for (i = 0; i < 6; i++) {
 234          buf[offset + i * 4 + 0].f = fixed_plane[i][0];
 235          buf[offset + i * 4 + 1].f = fixed_plane[i][1];
 236          buf[offset + i * 4 + 2].f = fixed_plane[i][2];
 237          buf[offset + i * 4 + 3].f = fixed_plane[i][3];
 238       }
 239
 240       /* Clip planes: _NEW_TRANSFORM plus _NEW_PROJECTION to get to
 241        * clip-space:
 242        */
 243       clip_planes = brw_select_clip_planes(ctx);
 244       for (j = 0; j < MAX_CLIP_PLANES; j++) {
 245          if (ctx->Transform.ClipPlanesEnabled & (1<<j)) {
 246             buf[offset + i * 4 + 0].f = clip_planes[j][0];
 247             buf[offset + i * 4 + 1].f = clip_planes[j][1];
 248             buf[offset + i * 4 + 2].f = clip_planes[j][2];
 249             buf[offset + i * 4 + 3].f = clip_planes[j][3];
 250             i++;
 251          }
 252       }
 253    }
 254
 255    /* vertex shader constants */
 256    if (brw->curbe.vs_size) {
 257       _mesa_load_state_parameters(ctx, brw->vertex_program->Base.Parameters);
 258
 259       GLuint offset = brw->curbe.vs_start * 16;
 260
 261       /* BRW_NEW_VS_PROG_DATA | _NEW_PROGRAM_CONSTANTS: copy uniform values */
 262       for (i = 0; i < brw->vs.prog_data->base.base.nr_params; i++) {
 263          buf[offset + i] = *brw->vs.prog_data->base.base.param[i];
 264       }
 265    }
 266
 267    if (0) {
 268       for (i = 0; i < sz*16; i+=4)
 269          fprintf(stderr, "curbe %d.%d: %f %f %f %f\n", i/8, i&4,
 270                  buf[i+0].f, buf[i+1].f, buf[i+2].f, buf[i+3].f);
 271    }
 272
 273    /* Because this provokes an action (ie copy the constants into the
 274     * URB), it shouldn't be shortcircuited if identical to the
 275     * previous time - because eg. the urb destination may have
 276     * changed, or the urb contents different to last time.
 277     *
 278     * Note that the data referred to is actually copied internally,
 279     * not just used in place according to passed pointer.
 280     *
 281     * It appears that the CS unit takes care of using each available
 282     * URB entry (Const URB Entry == CURBE) in turn, and issuing
 283     * flushes as necessary when doublebuffering of CURBEs isn't
 284     * possible.
 285     */
 286
 287 emit:
 288    /* BRW_NEW_URB_FENCE: From the gen4 PRM, volume 1, section 3.9.8
 289     * (CONSTANT_BUFFER (CURBE Load)):
 290     *
 291     *     "Modifying the CS URB allocation via URB_FENCE invalidates any
 292     *      previous CURBE entries. Therefore software must subsequently
 293     *      [re]issue a CONSTANT_BUFFER command before CURBE data can be used
 294     *      in the pipeline."
 295     */
 296    BEGIN_BATCH(2);
 297    if (brw->curbe.total_size == 0) {
 298       OUT_BATCH((CMD_CONST_BUFFER << 16) | (2 - 2));
 299       OUT_BATCH(0);
 300    } else {
 301       OUT_BATCH((CMD_CONST_BUFFER << 16) | (1 << 8) | (2 - 2));
 302       OUT_RELOC(brw->curbe.curbe_bo,
 303                 I915_GEM_DOMAIN_INSTRUCTION, 0,
 304                 (brw->curbe.total_size - 1) + brw->curbe.curbe_offset);
 305    }
 306    ADVANCE_BATCH();
 307 }
 308
 309 const struct brw_tracked_state brw_constant_buffer = {
 310    .dirty = {
 311       .mesa = _NEW_PROGRAM_CONSTANTS,
 312       .brw  = BRW_NEW_BATCH |
 313               BRW_NEW_CURBE_OFFSETS |
 314               BRW_NEW_PSP | /* Implicit - hardware requires this, not used above */
 315               BRW_NEW_URB_FENCE,
 316       .cache = BRW_NEW_VS_PROG_DATA |
 317                BRW_NEW_FS_PROG_DATA
 318    },
 319    .emit = brw_upload_constant_buffer,
 320 };
 321