Merge branch 'master' of git://anongit.freedesktop.org/mesa/mesa
[mesa.git] / src / mesa / drivers / dri / i965 / brw_defines.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #define INTEL_MASK(high, low) (((1<<((high)-(low)+1))-1)<<(low))
33 #define SET_FIELD(value, field) (((value) << field ## _SHIFT) & field ## _MASK)
34 #define GET_FIELD(word, field) (((word) & field ## _MASK) >> field ## _SHIFT)
35
36 #ifndef BRW_DEFINES_H
37 #define BRW_DEFINES_H
38
39 /* 3D state:
40 */
41 #define PIPE_CONTROL_NOWRITE 0x00
42 #define PIPE_CONTROL_WRITEIMMEDIATE 0x01
43 #define PIPE_CONTROL_WRITEDEPTH 0x02
44 #define PIPE_CONTROL_WRITETIMESTAMP 0x03
45
46 #define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00
47 #define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01
48
49 #define CMD_3D_PRIM 0x7b00 /* 3DPRIMITIVE */
50 /* DW0 */
51 # define GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT 10
52 # define GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 15)
53 # define GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 15)
54 /* DW1 */
55 # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8)
56 # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8)
57
58 #define _3DPRIM_POINTLIST 0x01
59 #define _3DPRIM_LINELIST 0x02
60 #define _3DPRIM_LINESTRIP 0x03
61 #define _3DPRIM_TRILIST 0x04
62 #define _3DPRIM_TRISTRIP 0x05
63 #define _3DPRIM_TRIFAN 0x06
64 #define _3DPRIM_QUADLIST 0x07
65 #define _3DPRIM_QUADSTRIP 0x08
66 #define _3DPRIM_LINELIST_ADJ 0x09
67 #define _3DPRIM_LINESTRIP_ADJ 0x0A
68 #define _3DPRIM_TRILIST_ADJ 0x0B
69 #define _3DPRIM_TRISTRIP_ADJ 0x0C
70 #define _3DPRIM_TRISTRIP_REVERSE 0x0D
71 #define _3DPRIM_POLYGON 0x0E
72 #define _3DPRIM_RECTLIST 0x0F
73 #define _3DPRIM_LINELOOP 0x10
74 #define _3DPRIM_POINTLIST_BF 0x11
75 #define _3DPRIM_LINESTRIP_CONT 0x12
76 #define _3DPRIM_LINESTRIP_BF 0x13
77 #define _3DPRIM_LINESTRIP_CONT_BF 0x14
78 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15
79
80 #define BRW_ANISORATIO_2 0
81 #define BRW_ANISORATIO_4 1
82 #define BRW_ANISORATIO_6 2
83 #define BRW_ANISORATIO_8 3
84 #define BRW_ANISORATIO_10 4
85 #define BRW_ANISORATIO_12 5
86 #define BRW_ANISORATIO_14 6
87 #define BRW_ANISORATIO_16 7
88
89 #define BRW_BLENDFACTOR_ONE 0x1
90 #define BRW_BLENDFACTOR_SRC_COLOR 0x2
91 #define BRW_BLENDFACTOR_SRC_ALPHA 0x3
92 #define BRW_BLENDFACTOR_DST_ALPHA 0x4
93 #define BRW_BLENDFACTOR_DST_COLOR 0x5
94 #define BRW_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6
95 #define BRW_BLENDFACTOR_CONST_COLOR 0x7
96 #define BRW_BLENDFACTOR_CONST_ALPHA 0x8
97 #define BRW_BLENDFACTOR_SRC1_COLOR 0x9
98 #define BRW_BLENDFACTOR_SRC1_ALPHA 0x0A
99 #define BRW_BLENDFACTOR_ZERO 0x11
100 #define BRW_BLENDFACTOR_INV_SRC_COLOR 0x12
101 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13
102 #define BRW_BLENDFACTOR_INV_DST_ALPHA 0x14
103 #define BRW_BLENDFACTOR_INV_DST_COLOR 0x15
104 #define BRW_BLENDFACTOR_INV_CONST_COLOR 0x17
105 #define BRW_BLENDFACTOR_INV_CONST_ALPHA 0x18
106 #define BRW_BLENDFACTOR_INV_SRC1_COLOR 0x19
107 #define BRW_BLENDFACTOR_INV_SRC1_ALPHA 0x1A
108
109 #define BRW_BLENDFUNCTION_ADD 0
110 #define BRW_BLENDFUNCTION_SUBTRACT 1
111 #define BRW_BLENDFUNCTION_REVERSE_SUBTRACT 2
112 #define BRW_BLENDFUNCTION_MIN 3
113 #define BRW_BLENDFUNCTION_MAX 4
114
115 #define BRW_ALPHATEST_FORMAT_UNORM8 0
116 #define BRW_ALPHATEST_FORMAT_FLOAT32 1
117
118 #define BRW_CHROMAKEY_KILL_ON_ANY_MATCH 0
119 #define BRW_CHROMAKEY_REPLACE_BLACK 1
120
121 #define BRW_CLIP_API_OGL 0
122 #define BRW_CLIP_API_DX 1
123
124 #define BRW_CLIPMODE_NORMAL 0
125 #define BRW_CLIPMODE_CLIP_ALL 1
126 #define BRW_CLIPMODE_CLIP_NON_REJECTED 2
127 #define BRW_CLIPMODE_REJECT_ALL 3
128 #define BRW_CLIPMODE_ACCEPT_ALL 4
129 #define BRW_CLIPMODE_KERNEL_CLIP 5
130
131 #define BRW_CLIP_NDCSPACE 0
132 #define BRW_CLIP_SCREENSPACE 1
133
134 #define BRW_COMPAREFUNCTION_ALWAYS 0
135 #define BRW_COMPAREFUNCTION_NEVER 1
136 #define BRW_COMPAREFUNCTION_LESS 2
137 #define BRW_COMPAREFUNCTION_EQUAL 3
138 #define BRW_COMPAREFUNCTION_LEQUAL 4
139 #define BRW_COMPAREFUNCTION_GREATER 5
140 #define BRW_COMPAREFUNCTION_NOTEQUAL 6
141 #define BRW_COMPAREFUNCTION_GEQUAL 7
142
143 #define BRW_COVERAGE_PIXELS_HALF 0
144 #define BRW_COVERAGE_PIXELS_1 1
145 #define BRW_COVERAGE_PIXELS_2 2
146 #define BRW_COVERAGE_PIXELS_4 3
147
148 #define BRW_CULLMODE_BOTH 0
149 #define BRW_CULLMODE_NONE 1
150 #define BRW_CULLMODE_FRONT 2
151 #define BRW_CULLMODE_BACK 3
152
153 #define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0
154 #define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1
155
156 #define BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0
157 #define BRW_DEPTHFORMAT_D32_FLOAT 1
158 #define BRW_DEPTHFORMAT_D24_UNORM_S8_UINT 2
159 #define BRW_DEPTHFORMAT_D24_UNORM_X8_UINT 3 /* GEN5 */
160 #define BRW_DEPTHFORMAT_D16_UNORM 5
161
162 #define BRW_FLOATING_POINT_IEEE_754 0
163 #define BRW_FLOATING_POINT_NON_IEEE_754 1
164
165 #define BRW_FRONTWINDING_CW 0
166 #define BRW_FRONTWINDING_CCW 1
167
168 #define BRW_SPRITE_POINT_ENABLE 16
169
170 #define BRW_INDEX_BYTE 0
171 #define BRW_INDEX_WORD 1
172 #define BRW_INDEX_DWORD 2
173
174 #define BRW_LOGICOPFUNCTION_CLEAR 0
175 #define BRW_LOGICOPFUNCTION_NOR 1
176 #define BRW_LOGICOPFUNCTION_AND_INVERTED 2
177 #define BRW_LOGICOPFUNCTION_COPY_INVERTED 3
178 #define BRW_LOGICOPFUNCTION_AND_REVERSE 4
179 #define BRW_LOGICOPFUNCTION_INVERT 5
180 #define BRW_LOGICOPFUNCTION_XOR 6
181 #define BRW_LOGICOPFUNCTION_NAND 7
182 #define BRW_LOGICOPFUNCTION_AND 8
183 #define BRW_LOGICOPFUNCTION_EQUIV 9
184 #define BRW_LOGICOPFUNCTION_NOOP 10
185 #define BRW_LOGICOPFUNCTION_OR_INVERTED 11
186 #define BRW_LOGICOPFUNCTION_COPY 12
187 #define BRW_LOGICOPFUNCTION_OR_REVERSE 13
188 #define BRW_LOGICOPFUNCTION_OR 14
189 #define BRW_LOGICOPFUNCTION_SET 15
190
191 #define BRW_MAPFILTER_NEAREST 0x0
192 #define BRW_MAPFILTER_LINEAR 0x1
193 #define BRW_MAPFILTER_ANISOTROPIC 0x2
194
195 #define BRW_MIPFILTER_NONE 0
196 #define BRW_MIPFILTER_NEAREST 1
197 #define BRW_MIPFILTER_LINEAR 3
198
199 #define BRW_POLYGON_FRONT_FACING 0
200 #define BRW_POLYGON_BACK_FACING 1
201
202 #define BRW_PREFILTER_ALWAYS 0x0
203 #define BRW_PREFILTER_NEVER 0x1
204 #define BRW_PREFILTER_LESS 0x2
205 #define BRW_PREFILTER_EQUAL 0x3
206 #define BRW_PREFILTER_LEQUAL 0x4
207 #define BRW_PREFILTER_GREATER 0x5
208 #define BRW_PREFILTER_NOTEQUAL 0x6
209 #define BRW_PREFILTER_GEQUAL 0x7
210
211 #define BRW_PROVOKING_VERTEX_0 0
212 #define BRW_PROVOKING_VERTEX_1 1
213 #define BRW_PROVOKING_VERTEX_2 2
214
215 #define BRW_RASTRULE_UPPER_LEFT 0
216 #define BRW_RASTRULE_UPPER_RIGHT 1
217 /* These are listed as "Reserved, but not seen as useful"
218 * in Intel documentation (page 212, "Point Rasterization Rule",
219 * section 7.4 "SF Pipeline State Summary", of document
220 * "IntelĀ® 965 Express Chipset Family and IntelĀ® G35 Express
221 * Chipset Graphics Controller Programmer's Reference Manual,
222 * Volume 2: 3D/Media", Revision 1.0b as of January 2008,
223 * available at
224 * http://intellinuxgraphics.org/documentation.html
225 * at the time of this writing).
226 *
227 * These appear to be supported on at least some
228 * i965-family devices, and the BRW_RASTRULE_LOWER_RIGHT
229 * is useful when using OpenGL to render to a FBO
230 * (which has the pixel coordinate Y orientation inverted
231 * with respect to the normal OpenGL pixel coordinate system).
232 */
233 #define BRW_RASTRULE_LOWER_LEFT 2
234 #define BRW_RASTRULE_LOWER_RIGHT 3
235
236 #define BRW_RENDERTARGET_CLAMPRANGE_UNORM 0
237 #define BRW_RENDERTARGET_CLAMPRANGE_SNORM 1
238 #define BRW_RENDERTARGET_CLAMPRANGE_FORMAT 2
239
240 #define BRW_STENCILOP_KEEP 0
241 #define BRW_STENCILOP_ZERO 1
242 #define BRW_STENCILOP_REPLACE 2
243 #define BRW_STENCILOP_INCRSAT 3
244 #define BRW_STENCILOP_DECRSAT 4
245 #define BRW_STENCILOP_INCR 5
246 #define BRW_STENCILOP_DECR 6
247 #define BRW_STENCILOP_INVERT 7
248
249 /* Surface state DW0 */
250 #define BRW_SURFACE_RC_READ_WRITE (1 << 8)
251 #define BRW_SURFACE_MIPLAYOUT_SHIFT 10
252 #define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0
253 #define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1
254 #define BRW_SURFACE_CUBEFACE_ENABLES 0x3f
255 #define BRW_SURFACE_BLEND_ENABLED (1 << 13)
256 #define BRW_SURFACE_WRITEDISABLE_B_SHIFT 14
257 #define BRW_SURFACE_WRITEDISABLE_G_SHIFT 15
258 #define BRW_SURFACE_WRITEDISABLE_R_SHIFT 16
259 #define BRW_SURFACE_WRITEDISABLE_A_SHIFT 17
260
261 #define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000
262 #define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001
263 #define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002
264 #define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003
265 #define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004
266 #define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005
267 #define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006
268 #define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007
269 #define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008
270 #define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040
271 #define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041
272 #define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042
273 #define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043
274 #define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044
275 #define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045
276 #define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046
277 #define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080
278 #define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081
279 #define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082
280 #define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083
281 #define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084
282 #define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085
283 #define BRW_SURFACEFORMAT_R32G32_SINT 0x086
284 #define BRW_SURFACEFORMAT_R32G32_UINT 0x087
285 #define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088
286 #define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089
287 #define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A
288 #define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B
289 #define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C
290 #define BRW_SURFACEFORMAT_R64_FLOAT 0x08D
291 #define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E
292 #define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F
293 #define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090
294 #define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091
295 #define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092
296 #define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093
297 #define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094
298 #define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095
299 #define BRW_SURFACEFORMAT_R32G32_USCALED 0x096
300 #define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0
301 #define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1
302 #define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2
303 #define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3
304 #define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4
305 #define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5
306 #define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7
307 #define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8
308 #define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9
309 #define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA
310 #define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB
311 #define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC
312 #define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD
313 #define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE
314 #define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF
315 #define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0
316 #define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1
317 #define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2
318 #define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3
319 #define BRW_SURFACEFORMAT_R32_SINT 0x0D6
320 #define BRW_SURFACEFORMAT_R32_UINT 0x0D7
321 #define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8
322 #define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9
323 #define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA
324 #define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF
325 #define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0
326 #define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1
327 #define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2
328 #define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3
329 #define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4
330 #define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5
331 #define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9
332 #define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA
333 #define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB
334 #define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC
335 #define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED
336 #define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE
337 #define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0
338 #define BRW_SURFACEFORMAT_R32_UNORM 0x0F1
339 #define BRW_SURFACEFORMAT_R32_SNORM 0x0F2
340 #define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3
341 #define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4
342 #define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5
343 #define BRW_SURFACEFORMAT_R16G16_SSCALED 0x0F6
344 #define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7
345 #define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8
346 #define BRW_SURFACEFORMAT_R32_USCALED 0x0F9
347 #define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100
348 #define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101
349 #define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102
350 #define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103
351 #define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104
352 #define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105
353 #define BRW_SURFACEFORMAT_R8G8_UNORM 0x106
354 #define BRW_SURFACEFORMAT_R8G8_SNORM 0x107
355 #define BRW_SURFACEFORMAT_R8G8_SINT 0x108
356 #define BRW_SURFACEFORMAT_R8G8_UINT 0x109
357 #define BRW_SURFACEFORMAT_R16_UNORM 0x10A
358 #define BRW_SURFACEFORMAT_R16_SNORM 0x10B
359 #define BRW_SURFACEFORMAT_R16_SINT 0x10C
360 #define BRW_SURFACEFORMAT_R16_UINT 0x10D
361 #define BRW_SURFACEFORMAT_R16_FLOAT 0x10E
362 #define BRW_SURFACEFORMAT_I16_UNORM 0x111
363 #define BRW_SURFACEFORMAT_L16_UNORM 0x112
364 #define BRW_SURFACEFORMAT_A16_UNORM 0x113
365 #define BRW_SURFACEFORMAT_L8A8_UNORM 0x114
366 #define BRW_SURFACEFORMAT_I16_FLOAT 0x115
367 #define BRW_SURFACEFORMAT_L16_FLOAT 0x116
368 #define BRW_SURFACEFORMAT_A16_FLOAT 0x117
369 #define BRW_SURFACEFORMAT_L8A8_UNORM_SRGB 0x118
370 #define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119
371 #define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A
372 #define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B
373 #define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C
374 #define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D
375 #define BRW_SURFACEFORMAT_R16_SSCALED 0x11E
376 #define BRW_SURFACEFORMAT_R16_USCALED 0x11F
377 #define BRW_SURFACEFORMAT_R8_UNORM 0x140
378 #define BRW_SURFACEFORMAT_R8_SNORM 0x141
379 #define BRW_SURFACEFORMAT_R8_SINT 0x142
380 #define BRW_SURFACEFORMAT_R8_UINT 0x143
381 #define BRW_SURFACEFORMAT_A8_UNORM 0x144
382 #define BRW_SURFACEFORMAT_I8_UNORM 0x145
383 #define BRW_SURFACEFORMAT_L8_UNORM 0x146
384 #define BRW_SURFACEFORMAT_P4A4_UNORM 0x147
385 #define BRW_SURFACEFORMAT_A4P4_UNORM 0x148
386 #define BRW_SURFACEFORMAT_R8_SSCALED 0x149
387 #define BRW_SURFACEFORMAT_R8_USCALED 0x14A
388 #define BRW_SURFACEFORMAT_L8_UNORM_SRGB 0x14C
389 #define BRW_SURFACEFORMAT_DXT1_RGB_SRGB 0x180
390 #define BRW_SURFACEFORMAT_R1_UINT 0x181
391 #define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182
392 #define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
393 #define BRW_SURFACEFORMAT_BC1_UNORM 0x186
394 #define BRW_SURFACEFORMAT_BC2_UNORM 0x187
395 #define BRW_SURFACEFORMAT_BC3_UNORM 0x188
396 #define BRW_SURFACEFORMAT_BC4_UNORM 0x189
397 #define BRW_SURFACEFORMAT_BC5_UNORM 0x18A
398 #define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B
399 #define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C
400 #define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D
401 #define BRW_SURFACEFORMAT_MONO8 0x18E
402 #define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F
403 #define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190
404 #define BRW_SURFACEFORMAT_DXT1_RGB 0x191
405 #define BRW_SURFACEFORMAT_FXT1 0x192
406 #define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193
407 #define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194
408 #define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195
409 #define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196
410 #define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197
411 #define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198
412 #define BRW_SURFACEFORMAT_BC4_SNORM 0x199
413 #define BRW_SURFACEFORMAT_BC5_SNORM 0x19A
414 #define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C
415 #define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D
416 #define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E
417 #define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F
418 #define BRW_SURFACE_FORMAT_SHIFT 18
419 #define BRW_SURFACE_FORMAT_MASK INTEL_MASK(26, 18)
420
421 #define BRW_SURFACERETURNFORMAT_FLOAT32 0
422 #define BRW_SURFACERETURNFORMAT_S1 1
423
424 #define BRW_SURFACE_TYPE_SHIFT 29
425 #define BRW_SURFACE_TYPE_MASK INTEL_MASK(31, 29)
426 #define BRW_SURFACE_1D 0
427 #define BRW_SURFACE_2D 1
428 #define BRW_SURFACE_3D 2
429 #define BRW_SURFACE_CUBE 3
430 #define BRW_SURFACE_BUFFER 4
431 #define BRW_SURFACE_NULL 7
432
433 /* Surface state DW2 */
434 #define BRW_SURFACE_HEIGHT_SHIFT 19
435 #define BRW_SURFACE_HEIGHT_MASK INTEL_MASK(31, 19)
436 #define BRW_SURFACE_WIDTH_SHIFT 6
437 #define BRW_SURFACE_WIDTH_MASK INTEL_MASK(18, 6)
438 #define BRW_SURFACE_LOD_SHIFT 2
439 #define BRW_SURFACE_LOD_MASK INTEL_MASK(5, 2)
440
441 /* Surface state DW3 */
442 #define BRW_SURFACE_DEPTH_SHIFT 21
443 #define BRW_SURFACE_DEPTH_MASK INTEL_MASK(31, 21)
444 #define BRW_SURFACE_PITCH_SHIFT 3
445 #define BRW_SURFACE_PITCH_MASK INTEL_MASK(19, 3)
446 #define BRW_SURFACE_TILED (1 << 1)
447 #define BRW_SURFACE_TILED_Y (1 << 0)
448
449 /* Surface state DW4 */
450 #define BRW_SURFACE_MIN_LOD_SHIFT 28
451 #define BRW_SURFACE_MIN_LOD_MASK INTEL_MASK(31, 28)
452
453 /* Surface state DW5 */
454 #define BRW_SURFACE_X_OFFSET_SHIFT 25
455 #define BRW_SURFACE_X_OFFSET_MASK INTEL_MASK(31, 25)
456 #define BRW_SURFACE_Y_OFFSET_SHIFT 20
457 #define BRW_SURFACE_Y_OFFSET_MASK INTEL_MASK(23, 20)
458
459 #define BRW_TEXCOORDMODE_WRAP 0
460 #define BRW_TEXCOORDMODE_MIRROR 1
461 #define BRW_TEXCOORDMODE_CLAMP 2
462 #define BRW_TEXCOORDMODE_CUBE 3
463 #define BRW_TEXCOORDMODE_CLAMP_BORDER 4
464 #define BRW_TEXCOORDMODE_MIRROR_ONCE 5
465
466 #define BRW_THREAD_PRIORITY_NORMAL 0
467 #define BRW_THREAD_PRIORITY_HIGH 1
468
469 #define BRW_TILEWALK_XMAJOR 0
470 #define BRW_TILEWALK_YMAJOR 1
471
472 #define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS 0
473 #define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS 1
474
475 /* Execution Unit (EU) defines
476 */
477
478 #define BRW_ALIGN_1 0
479 #define BRW_ALIGN_16 1
480
481 #define BRW_ADDRESS_DIRECT 0
482 #define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1
483
484 #define BRW_CHANNEL_X 0
485 #define BRW_CHANNEL_Y 1
486 #define BRW_CHANNEL_Z 2
487 #define BRW_CHANNEL_W 3
488
489 #define BRW_COMPRESSION_NONE 0
490 #define BRW_COMPRESSION_2NDHALF 1
491 #define BRW_COMPRESSION_COMPRESSED 2
492
493 #define GEN6_COMPRESSION_1Q 0
494 #define GEN6_COMPRESSION_2Q 1
495 #define GEN6_COMPRESSION_3Q 2
496 #define GEN6_COMPRESSION_4Q 3
497 #define GEN6_COMPRESSION_1H 0
498 #define GEN6_COMPRESSION_2H 2
499
500 #define BRW_CONDITIONAL_NONE 0
501 #define BRW_CONDITIONAL_Z 1
502 #define BRW_CONDITIONAL_NZ 2
503 #define BRW_CONDITIONAL_EQ 1 /* Z */
504 #define BRW_CONDITIONAL_NEQ 2 /* NZ */
505 #define BRW_CONDITIONAL_G 3
506 #define BRW_CONDITIONAL_GE 4
507 #define BRW_CONDITIONAL_L 5
508 #define BRW_CONDITIONAL_LE 6
509 #define BRW_CONDITIONAL_R 7
510 #define BRW_CONDITIONAL_O 8
511 #define BRW_CONDITIONAL_U 9
512
513 #define BRW_DEBUG_NONE 0
514 #define BRW_DEBUG_BREAKPOINT 1
515
516 #define BRW_DEPENDENCY_NORMAL 0
517 #define BRW_DEPENDENCY_NOTCLEARED 1
518 #define BRW_DEPENDENCY_NOTCHECKED 2
519 #define BRW_DEPENDENCY_DISABLE 3
520
521 #define BRW_EXECUTE_1 0
522 #define BRW_EXECUTE_2 1
523 #define BRW_EXECUTE_4 2
524 #define BRW_EXECUTE_8 3
525 #define BRW_EXECUTE_16 4
526 #define BRW_EXECUTE_32 5
527
528 #define BRW_HORIZONTAL_STRIDE_0 0
529 #define BRW_HORIZONTAL_STRIDE_1 1
530 #define BRW_HORIZONTAL_STRIDE_2 2
531 #define BRW_HORIZONTAL_STRIDE_4 3
532
533 #define BRW_INSTRUCTION_NORMAL 0
534 #define BRW_INSTRUCTION_SATURATE 1
535
536 #define BRW_MASK_ENABLE 0
537 #define BRW_MASK_DISABLE 1
538
539 /** @{
540 *
541 * Gen6 has replaced "mask enable/disable" with WECtrl, which is
542 * effectively the same but much simpler to think about. Now, there
543 * are two contributors ANDed together to whether channels are
544 * executed: The predication on the instruction, and the channel write
545 * enable.
546 */
547 /**
548 * This is the default value. It means that a channel's write enable is set
549 * if the per-channel IP is pointing at this instruction.
550 */
551 #define BRW_WE_NORMAL 0
552 /**
553 * This is used like BRW_MASK_DISABLE, and causes all channels to have
554 * their write enable set. Note that predication still contributes to
555 * whether the channel actually gets written.
556 */
557 #define BRW_WE_ALL 1
558 /** @} */
559
560 enum opcode {
561 /* These are the actual hardware opcodes. */
562 BRW_OPCODE_MOV = 1,
563 BRW_OPCODE_SEL = 2,
564 BRW_OPCODE_NOT = 4,
565 BRW_OPCODE_AND = 5,
566 BRW_OPCODE_OR = 6,
567 BRW_OPCODE_XOR = 7,
568 BRW_OPCODE_SHR = 8,
569 BRW_OPCODE_SHL = 9,
570 BRW_OPCODE_RSR = 10,
571 BRW_OPCODE_RSL = 11,
572 BRW_OPCODE_ASR = 12,
573 BRW_OPCODE_CMP = 16,
574 BRW_OPCODE_CMPN = 17,
575 BRW_OPCODE_JMPI = 32,
576 BRW_OPCODE_IF = 34,
577 BRW_OPCODE_IFF = 35,
578 BRW_OPCODE_ELSE = 36,
579 BRW_OPCODE_ENDIF = 37,
580 BRW_OPCODE_DO = 38,
581 BRW_OPCODE_WHILE = 39,
582 BRW_OPCODE_BREAK = 40,
583 BRW_OPCODE_CONTINUE = 41,
584 BRW_OPCODE_HALT = 42,
585 BRW_OPCODE_MSAVE = 44,
586 BRW_OPCODE_MRESTORE = 45,
587 BRW_OPCODE_PUSH = 46,
588 BRW_OPCODE_POP = 47,
589 BRW_OPCODE_WAIT = 48,
590 BRW_OPCODE_SEND = 49,
591 BRW_OPCODE_SENDC = 50,
592 BRW_OPCODE_MATH = 56,
593 BRW_OPCODE_ADD = 64,
594 BRW_OPCODE_MUL = 65,
595 BRW_OPCODE_AVG = 66,
596 BRW_OPCODE_FRC = 67,
597 BRW_OPCODE_RNDU = 68,
598 BRW_OPCODE_RNDD = 69,
599 BRW_OPCODE_RNDE = 70,
600 BRW_OPCODE_RNDZ = 71,
601 BRW_OPCODE_MAC = 72,
602 BRW_OPCODE_MACH = 73,
603 BRW_OPCODE_LZD = 74,
604 BRW_OPCODE_SAD2 = 80,
605 BRW_OPCODE_SADA2 = 81,
606 BRW_OPCODE_DP4 = 84,
607 BRW_OPCODE_DPH = 85,
608 BRW_OPCODE_DP3 = 86,
609 BRW_OPCODE_DP2 = 87,
610 BRW_OPCODE_DPA2 = 88,
611 BRW_OPCODE_LINE = 89,
612 BRW_OPCODE_PLN = 90,
613 BRW_OPCODE_NOP = 126,
614
615 /* These are compiler backend opcodes that get translated into other
616 * instructions.
617 */
618 FS_OPCODE_FB_WRITE = 128,
619 SHADER_OPCODE_RCP,
620 SHADER_OPCODE_RSQ,
621 SHADER_OPCODE_SQRT,
622 SHADER_OPCODE_EXP2,
623 SHADER_OPCODE_LOG2,
624 SHADER_OPCODE_POW,
625 SHADER_OPCODE_SIN,
626 SHADER_OPCODE_COS,
627 FS_OPCODE_DDX,
628 FS_OPCODE_DDY,
629 FS_OPCODE_PIXEL_X,
630 FS_OPCODE_PIXEL_Y,
631 FS_OPCODE_CINTERP,
632 FS_OPCODE_LINTERP,
633 FS_OPCODE_TEX,
634 FS_OPCODE_TXB,
635 FS_OPCODE_TXD,
636 FS_OPCODE_TXL,
637 FS_OPCODE_TXS,
638 FS_OPCODE_DISCARD,
639 FS_OPCODE_SPILL,
640 FS_OPCODE_UNSPILL,
641 FS_OPCODE_PULL_CONSTANT_LOAD,
642
643 VS_OPCODE_URB_WRITE,
644 VS_OPCODE_SCRATCH_READ,
645 VS_OPCODE_SCRATCH_WRITE,
646 };
647
648 #define BRW_PREDICATE_NONE 0
649 #define BRW_PREDICATE_NORMAL 1
650 #define BRW_PREDICATE_ALIGN1_ANYV 2
651 #define BRW_PREDICATE_ALIGN1_ALLV 3
652 #define BRW_PREDICATE_ALIGN1_ANY2H 4
653 #define BRW_PREDICATE_ALIGN1_ALL2H 5
654 #define BRW_PREDICATE_ALIGN1_ANY4H 6
655 #define BRW_PREDICATE_ALIGN1_ALL4H 7
656 #define BRW_PREDICATE_ALIGN1_ANY8H 8
657 #define BRW_PREDICATE_ALIGN1_ALL8H 9
658 #define BRW_PREDICATE_ALIGN1_ANY16H 10
659 #define BRW_PREDICATE_ALIGN1_ALL16H 11
660 #define BRW_PREDICATE_ALIGN16_REPLICATE_X 2
661 #define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3
662 #define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4
663 #define BRW_PREDICATE_ALIGN16_REPLICATE_W 5
664 #define BRW_PREDICATE_ALIGN16_ANY4H 6
665 #define BRW_PREDICATE_ALIGN16_ALL4H 7
666
667 #define BRW_ARCHITECTURE_REGISTER_FILE 0
668 #define BRW_GENERAL_REGISTER_FILE 1
669 #define BRW_MESSAGE_REGISTER_FILE 2
670 #define BRW_IMMEDIATE_VALUE 3
671
672 #define BRW_REGISTER_TYPE_UD 0
673 #define BRW_REGISTER_TYPE_D 1
674 #define BRW_REGISTER_TYPE_UW 2
675 #define BRW_REGISTER_TYPE_W 3
676 #define BRW_REGISTER_TYPE_UB 4
677 #define BRW_REGISTER_TYPE_B 5
678 #define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */
679 #define BRW_REGISTER_TYPE_HF 6
680 #define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */
681 #define BRW_REGISTER_TYPE_F 7
682
683 #define BRW_ARF_NULL 0x00
684 #define BRW_ARF_ADDRESS 0x10
685 #define BRW_ARF_ACCUMULATOR 0x20
686 #define BRW_ARF_FLAG 0x30
687 #define BRW_ARF_MASK 0x40
688 #define BRW_ARF_MASK_STACK 0x50
689 #define BRW_ARF_MASK_STACK_DEPTH 0x60
690 #define BRW_ARF_STATE 0x70
691 #define BRW_ARF_CONTROL 0x80
692 #define BRW_ARF_NOTIFICATION_COUNT 0x90
693 #define BRW_ARF_IP 0xA0
694
695 #define BRW_MRF_COMPR4 (1 << 7)
696
697 #define BRW_AMASK 0
698 #define BRW_IMASK 1
699 #define BRW_LMASK 2
700 #define BRW_CMASK 3
701
702
703
704 #define BRW_THREAD_NORMAL 0
705 #define BRW_THREAD_ATOMIC 1
706 #define BRW_THREAD_SWITCH 2
707
708 #define BRW_VERTICAL_STRIDE_0 0
709 #define BRW_VERTICAL_STRIDE_1 1
710 #define BRW_VERTICAL_STRIDE_2 2
711 #define BRW_VERTICAL_STRIDE_4 3
712 #define BRW_VERTICAL_STRIDE_8 4
713 #define BRW_VERTICAL_STRIDE_16 5
714 #define BRW_VERTICAL_STRIDE_32 6
715 #define BRW_VERTICAL_STRIDE_64 7
716 #define BRW_VERTICAL_STRIDE_128 8
717 #define BRW_VERTICAL_STRIDE_256 9
718 #define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF
719
720 #define BRW_WIDTH_1 0
721 #define BRW_WIDTH_2 1
722 #define BRW_WIDTH_4 2
723 #define BRW_WIDTH_8 3
724 #define BRW_WIDTH_16 4
725
726 #define BRW_STATELESS_BUFFER_BOUNDARY_1K 0
727 #define BRW_STATELESS_BUFFER_BOUNDARY_2K 1
728 #define BRW_STATELESS_BUFFER_BOUNDARY_4K 2
729 #define BRW_STATELESS_BUFFER_BOUNDARY_8K 3
730 #define BRW_STATELESS_BUFFER_BOUNDARY_16K 4
731 #define BRW_STATELESS_BUFFER_BOUNDARY_32K 5
732 #define BRW_STATELESS_BUFFER_BOUNDARY_64K 6
733 #define BRW_STATELESS_BUFFER_BOUNDARY_128K 7
734 #define BRW_STATELESS_BUFFER_BOUNDARY_256K 8
735 #define BRW_STATELESS_BUFFER_BOUNDARY_512K 9
736 #define BRW_STATELESS_BUFFER_BOUNDARY_1M 10
737 #define BRW_STATELESS_BUFFER_BOUNDARY_2M 11
738
739 #define BRW_POLYGON_FACING_FRONT 0
740 #define BRW_POLYGON_FACING_BACK 1
741
742 #define BRW_MESSAGE_TARGET_NULL 0
743 #define BRW_MESSAGE_TARGET_MATH 1 /* reserved on GEN6 */
744 #define BRW_MESSAGE_TARGET_SAMPLER 2
745 #define BRW_MESSAGE_TARGET_GATEWAY 3
746 #define BRW_MESSAGE_TARGET_DATAPORT_READ 4
747 #define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5
748 #define BRW_MESSAGE_TARGET_URB 6
749 #define BRW_MESSAGE_TARGET_THREAD_SPAWNER 7
750
751 #define GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE 4
752 #define GEN6_MESSAGE_TARGET_DP_RENDER_CACHE 5
753 #define GEN6_MESSAGE_TARGET_DP_CONST_CACHE 9
754
755 #define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0
756 #define BRW_SAMPLER_RETURN_FORMAT_UINT32 2
757 #define BRW_SAMPLER_RETURN_FORMAT_SINT32 3
758
759 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0
760 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0
761 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0
762 #define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1
763 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1
764 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1
765 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2
766 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2
767 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0
768 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2
769 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_BIAS_COMPARE 0
770 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_LOD_COMPARE 1
771 #define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2
772 #define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2
773 #define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3
774 #define BRW_SAMPLER_MESSAGE_SIMD8_LD 3
775 #define BRW_SAMPLER_MESSAGE_SIMD16_LD 3
776
777 #define GEN5_SAMPLER_MESSAGE_SAMPLE 0
778 #define GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS 1
779 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD 2
780 #define GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE 3
781 #define GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS 4
782 #define GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE 5
783 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE 6
784 #define GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO 10
785
786 /* for GEN5 only */
787 #define BRW_SAMPLER_SIMD_MODE_SIMD4X2 0
788 #define BRW_SAMPLER_SIMD_MODE_SIMD8 1
789 #define BRW_SAMPLER_SIMD_MODE_SIMD16 2
790 #define BRW_SAMPLER_SIMD_MODE_SIMD32_64 3
791
792 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0
793 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1
794 #define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2
795 #define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3
796 #define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4
797
798 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0
799 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2
800
801 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2
802 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3
803
804 /* This one stays the same across generations. */
805 #define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0
806 /* GEN4 */
807 #define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1
808 #define BRW_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 2
809 #define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3
810 /* G45, GEN5 */
811 #define G45_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ 1
812 #define G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2
813 #define G45_DATAPORT_READ_MESSAGE_AVC_LOOP_FILTER_READ 3
814 #define G45_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4
815 #define G45_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6
816 /* GEN6 */
817 #define GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ 1
818 #define GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2
819 #define GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4
820 #define GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ 5
821 #define GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6
822
823 #define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0
824 #define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1
825 #define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2
826
827 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0
828 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1
829 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2
830 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3
831 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4
832
833 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0
834 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1
835 #define BRW_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE 2
836 #define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3
837 #define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4
838 #define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5
839 #define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7
840
841 /* GEN6 */
842 #define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE 7
843 #define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 8
844 #define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 9
845 #define GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE 10
846 #define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 11
847 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 12
848 #define GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE 13
849 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE 14
850
851 #define BRW_MATH_FUNCTION_INV 1
852 #define BRW_MATH_FUNCTION_LOG 2
853 #define BRW_MATH_FUNCTION_EXP 3
854 #define BRW_MATH_FUNCTION_SQRT 4
855 #define BRW_MATH_FUNCTION_RSQ 5
856 #define BRW_MATH_FUNCTION_SIN 6 /* was 7 */
857 #define BRW_MATH_FUNCTION_COS 7 /* was 8 */
858 #define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */
859 #define BRW_MATH_FUNCTION_TAN 9 /* gen4 */
860 #define BRW_MATH_FUNCTION_FDIV 9 /* gen6+ */
861 #define BRW_MATH_FUNCTION_POW 10
862 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11
863 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12
864 #define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13
865
866 #define BRW_MATH_INTEGER_UNSIGNED 0
867 #define BRW_MATH_INTEGER_SIGNED 1
868
869 #define BRW_MATH_PRECISION_FULL 0
870 #define BRW_MATH_PRECISION_PARTIAL 1
871
872 #define BRW_MATH_SATURATE_NONE 0
873 #define BRW_MATH_SATURATE_SATURATE 1
874
875 #define BRW_MATH_DATA_VECTOR 0
876 #define BRW_MATH_DATA_SCALAR 1
877
878 #define BRW_URB_OPCODE_WRITE 0
879
880 #define BRW_URB_SWIZZLE_NONE 0
881 #define BRW_URB_SWIZZLE_INTERLEAVE 1
882 #define BRW_URB_SWIZZLE_TRANSPOSE 2
883
884 #define BRW_SCRATCH_SPACE_SIZE_1K 0
885 #define BRW_SCRATCH_SPACE_SIZE_2K 1
886 #define BRW_SCRATCH_SPACE_SIZE_4K 2
887 #define BRW_SCRATCH_SPACE_SIZE_8K 3
888 #define BRW_SCRATCH_SPACE_SIZE_16K 4
889 #define BRW_SCRATCH_SPACE_SIZE_32K 5
890 #define BRW_SCRATCH_SPACE_SIZE_64K 6
891 #define BRW_SCRATCH_SPACE_SIZE_128K 7
892 #define BRW_SCRATCH_SPACE_SIZE_256K 8
893 #define BRW_SCRATCH_SPACE_SIZE_512K 9
894 #define BRW_SCRATCH_SPACE_SIZE_1M 10
895 #define BRW_SCRATCH_SPACE_SIZE_2M 11
896
897
898
899
900 #define CMD_URB_FENCE 0x6000
901 #define CMD_CS_URB_STATE 0x6001
902 #define CMD_CONST_BUFFER 0x6002
903
904 #define CMD_STATE_BASE_ADDRESS 0x6101
905 #define CMD_STATE_SIP 0x6102
906 #define CMD_PIPELINE_SELECT_965 0x6104
907 #define CMD_PIPELINE_SELECT_GM45 0x6904
908
909 #define _3DSTATE_PIPELINED_POINTERS 0x7800
910 #define _3DSTATE_BINDING_TABLE_POINTERS 0x7801
911 # define GEN6_BINDING_TABLE_MODIFY_VS (1 << 8)
912 # define GEN6_BINDING_TABLE_MODIFY_GS (1 << 9)
913 # define GEN6_BINDING_TABLE_MODIFY_PS (1 << 12)
914
915 #define _3DSTATE_BINDING_TABLE_POINTERS_VS 0x7826 /* GEN7+ */
916 #define _3DSTATE_BINDING_TABLE_POINTERS_HS 0x7827 /* GEN7+ */
917 #define _3DSTATE_BINDING_TABLE_POINTERS_DS 0x7828 /* GEN7+ */
918 #define _3DSTATE_BINDING_TABLE_POINTERS_GS 0x7829 /* GEN7+ */
919 #define _3DSTATE_BINDING_TABLE_POINTERS_PS 0x782A /* GEN7+ */
920
921 #define _3DSTATE_SAMPLER_STATE_POINTERS 0x7802 /* GEN6+ */
922 # define PS_SAMPLER_STATE_CHANGE (1 << 12)
923 # define GS_SAMPLER_STATE_CHANGE (1 << 9)
924 # define VS_SAMPLER_STATE_CHANGE (1 << 8)
925 /* DW1: VS */
926 /* DW2: GS */
927 /* DW3: PS */
928
929 #define _3DSTATE_SAMPLER_STATE_POINTERS_VS 0x782B /* GEN7+ */
930 #define _3DSTATE_SAMPLER_STATE_POINTERS_GS 0x782E /* GEN7+ */
931 #define _3DSTATE_SAMPLER_STATE_POINTERS_PS 0x782F /* GEN7+ */
932
933 #define _3DSTATE_VERTEX_BUFFERS 0x7808
934 # define BRW_VB0_INDEX_SHIFT 27
935 # define GEN6_VB0_INDEX_SHIFT 26
936 # define BRW_VB0_ACCESS_VERTEXDATA (0 << 26)
937 # define BRW_VB0_ACCESS_INSTANCEDATA (1 << 26)
938 # define GEN6_VB0_ACCESS_VERTEXDATA (0 << 20)
939 # define GEN6_VB0_ACCESS_INSTANCEDATA (1 << 20)
940 # define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14)
941 # define BRW_VB0_PITCH_SHIFT 0
942
943 #define _3DSTATE_VERTEX_ELEMENTS 0x7809
944 # define BRW_VE0_INDEX_SHIFT 27
945 # define GEN6_VE0_INDEX_SHIFT 26
946 # define BRW_VE0_FORMAT_SHIFT 16
947 # define BRW_VE0_VALID (1 << 26)
948 # define GEN6_VE0_VALID (1 << 25)
949 # define BRW_VE0_SRC_OFFSET_SHIFT 0
950 # define BRW_VE1_COMPONENT_NOSTORE 0
951 # define BRW_VE1_COMPONENT_STORE_SRC 1
952 # define BRW_VE1_COMPONENT_STORE_0 2
953 # define BRW_VE1_COMPONENT_STORE_1_FLT 3
954 # define BRW_VE1_COMPONENT_STORE_1_INT 4
955 # define BRW_VE1_COMPONENT_STORE_VID 5
956 # define BRW_VE1_COMPONENT_STORE_IID 6
957 # define BRW_VE1_COMPONENT_STORE_PID 7
958 # define BRW_VE1_COMPONENT_0_SHIFT 28
959 # define BRW_VE1_COMPONENT_1_SHIFT 24
960 # define BRW_VE1_COMPONENT_2_SHIFT 20
961 # define BRW_VE1_COMPONENT_3_SHIFT 16
962 # define BRW_VE1_DST_OFFSET_SHIFT 0
963
964 #define CMD_INDEX_BUFFER 0x780a
965 #define GEN4_3DSTATE_VF_STATISTICS 0x780b
966 #define GM45_3DSTATE_VF_STATISTICS 0x680b
967 #define _3DSTATE_CC_STATE_POINTERS 0x780e /* GEN6+ */
968 #define _3DSTATE_BLEND_STATE_POINTERS 0x7824 /* GEN7+ */
969 #define _3DSTATE_DEPTH_STENCIL_STATE_POINTERS 0x7825 /* GEN7+ */
970
971 #define _3DSTATE_URB 0x7805 /* GEN6 */
972 # define GEN6_URB_VS_SIZE_SHIFT 16
973 # define GEN6_URB_VS_ENTRIES_SHIFT 0
974 # define GEN6_URB_GS_ENTRIES_SHIFT 8
975 # define GEN6_URB_GS_SIZE_SHIFT 0
976
977 #define _3DSTATE_URB_VS 0x7830 /* GEN7+ */
978 #define _3DSTATE_URB_HS 0x7831 /* GEN7+ */
979 #define _3DSTATE_URB_DS 0x7832 /* GEN7+ */
980 #define _3DSTATE_URB_GS 0x7833 /* GEN7+ */
981 # define GEN7_URB_ENTRY_SIZE_SHIFT 16
982 # define GEN7_URB_STARTING_ADDRESS_SHIFT 25
983
984 #define _3DSTATE_PUSH_CONSTANT_ALLOC_VS 0x7912 /* GEN7+ */
985 #define _3DSTATE_PUSH_CONSTANT_ALLOC_PS 0x7916 /* GEN7+ */
986 # define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16
987
988 #define _3DSTATE_VIEWPORT_STATE_POINTERS 0x780d /* GEN6+ */
989 # define GEN6_CC_VIEWPORT_MODIFY (1 << 12)
990 # define GEN6_SF_VIEWPORT_MODIFY (1 << 11)
991 # define GEN6_CLIP_VIEWPORT_MODIFY (1 << 10)
992
993 #define _3DSTATE_VIEWPORT_STATE_POINTERS_CC 0x7823 /* GEN7+ */
994 #define _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL 0x7821 /* GEN7+ */
995
996 #define _3DSTATE_SCISSOR_STATE_POINTERS 0x780f /* GEN6+ */
997
998 #define _3DSTATE_VS 0x7810 /* GEN6+ */
999 /* DW2 */
1000 # define GEN6_VS_SPF_MODE (1 << 31)
1001 # define GEN6_VS_VECTOR_MASK_ENABLE (1 << 30)
1002 # define GEN6_VS_SAMPLER_COUNT_SHIFT 27
1003 # define GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
1004 # define GEN6_VS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
1005 # define GEN6_VS_FLOATING_POINT_MODE_ALT (1 << 16)
1006 /* DW4 */
1007 # define GEN6_VS_DISPATCH_START_GRF_SHIFT 20
1008 # define GEN6_VS_URB_READ_LENGTH_SHIFT 11
1009 # define GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT 4
1010 /* DW5 */
1011 # define GEN6_VS_MAX_THREADS_SHIFT 25
1012 # define GEN6_VS_STATISTICS_ENABLE (1 << 10)
1013 # define GEN6_VS_CACHE_DISABLE (1 << 1)
1014 # define GEN6_VS_ENABLE (1 << 0)
1015
1016 #define _3DSTATE_GS 0x7811 /* GEN6+ */
1017 /* DW2 */
1018 # define GEN6_GS_SPF_MODE (1 << 31)
1019 # define GEN6_GS_VECTOR_MASK_ENABLE (1 << 30)
1020 # define GEN6_GS_SAMPLER_COUNT_SHIFT 27
1021 # define GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
1022 /* DW4 */
1023 # define GEN6_GS_URB_READ_LENGTH_SHIFT 11
1024 # define GEN7_GS_INCLUDE_VERTEX_HANDLES (1 << 10)
1025 # define GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT 4
1026 # define GEN6_GS_DISPATCH_START_GRF_SHIFT 0
1027 /* DW5 */
1028 # define GEN6_GS_MAX_THREADS_SHIFT 25
1029 # define GEN6_GS_STATISTICS_ENABLE (1 << 10)
1030 # define GEN6_GS_SO_STATISTICS_ENABLE (1 << 9)
1031 # define GEN6_GS_RENDERING_ENABLE (1 << 8)
1032 # define GEN7_GS_ENABLE (1 << 0)
1033 /* DW6 */
1034 # define GEN6_GS_ENABLE (1 << 15)
1035
1036 #define _3DSTATE_HS 0x781B /* GEN7+ */
1037 #define _3DSTATE_TE 0x781C /* GEN7+ */
1038 #define _3DSTATE_DS 0x781D /* GEN7+ */
1039
1040 #define _3DSTATE_CLIP 0x7812 /* GEN6+ */
1041 /* DW1 */
1042 # define GEN7_CLIP_WINDING_CW (0 << 20)
1043 # define GEN7_CLIP_WINDING_CCW (1 << 20)
1044 # define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_8 (0 << 19)
1045 # define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_4 (1 << 19)
1046 # define GEN7_CLIP_EARLY_CULL (1 << 18)
1047 # define GEN7_CLIP_CULLMODE_BOTH (0 << 16)
1048 # define GEN7_CLIP_CULLMODE_NONE (1 << 16)
1049 # define GEN7_CLIP_CULLMODE_FRONT (2 << 16)
1050 # define GEN7_CLIP_CULLMODE_BACK (3 << 16)
1051 # define GEN6_CLIP_STATISTICS_ENABLE (1 << 10)
1052 /**
1053 * Just does cheap culling based on the clip distance. Bits must be
1054 * disjoint with USER_CLIP_CLIP_DISTANCE bits.
1055 */
1056 # define GEN6_USER_CLIP_CULL_DISTANCES_SHIFT 0
1057 /* DW2 */
1058 # define GEN6_CLIP_ENABLE (1 << 31)
1059 # define GEN6_CLIP_API_OGL (0 << 30)
1060 # define GEN6_CLIP_API_D3D (1 << 30)
1061 # define GEN6_CLIP_XY_TEST (1 << 28)
1062 # define GEN6_CLIP_Z_TEST (1 << 27)
1063 # define GEN6_CLIP_GB_TEST (1 << 26)
1064 /** 8-bit field of which user clip distances to clip aganist. */
1065 # define GEN6_USER_CLIP_CLIP_DISTANCES_SHIFT 16
1066 # define GEN6_CLIP_MODE_NORMAL (0 << 13)
1067 # define GEN6_CLIP_MODE_REJECT_ALL (3 << 13)
1068 # define GEN6_CLIP_MODE_ACCEPT_ALL (4 << 13)
1069 # define GEN6_CLIP_PERSPECTIVE_DIVIDE_DISABLE (1 << 9)
1070 # define GEN6_CLIP_BARYCENTRIC_ENABLE (1 << 8)
1071 # define GEN6_CLIP_TRI_PROVOKE_SHIFT 4
1072 # define GEN6_CLIP_LINE_PROVOKE_SHIFT 2
1073 # define GEN6_CLIP_TRIFAN_PROVOKE_SHIFT 0
1074 /* DW3 */
1075 # define GEN6_CLIP_MIN_POINT_WIDTH_SHIFT 17
1076 # define GEN6_CLIP_MAX_POINT_WIDTH_SHIFT 6
1077 # define GEN6_CLIP_FORCE_ZERO_RTAINDEX (1 << 5)
1078
1079 #define _3DSTATE_SF 0x7813 /* GEN6+ */
1080 /* DW1 (for gen6) */
1081 # define GEN6_SF_NUM_OUTPUTS_SHIFT 22
1082 # define GEN6_SF_SWIZZLE_ENABLE (1 << 21)
1083 # define GEN6_SF_POINT_SPRITE_LOWERLEFT (1 << 20)
1084 # define GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT 11
1085 # define GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT 4
1086 /* DW2 */
1087 # define GEN6_SF_LEGACY_GLOBAL_DEPTH_BIAS (1 << 11)
1088 # define GEN6_SF_STATISTICS_ENABLE (1 << 10)
1089 # define GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID (1 << 9)
1090 # define GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME (1 << 8)
1091 # define GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT (1 << 7)
1092 # define GEN6_SF_FRONT_SOLID (0 << 5)
1093 # define GEN6_SF_FRONT_WIREFRAME (1 << 5)
1094 # define GEN6_SF_FRONT_POINT (2 << 5)
1095 # define GEN6_SF_BACK_SOLID (0 << 3)
1096 # define GEN6_SF_BACK_WIREFRAME (1 << 3)
1097 # define GEN6_SF_BACK_POINT (2 << 3)
1098 # define GEN6_SF_VIEWPORT_TRANSFORM_ENABLE (1 << 1)
1099 # define GEN6_SF_WINDING_CCW (1 << 0)
1100 /* DW3 */
1101 # define GEN6_SF_LINE_AA_ENABLE (1 << 31)
1102 # define GEN6_SF_CULL_BOTH (0 << 29)
1103 # define GEN6_SF_CULL_NONE (1 << 29)
1104 # define GEN6_SF_CULL_FRONT (2 << 29)
1105 # define GEN6_SF_CULL_BACK (3 << 29)
1106 # define GEN6_SF_LINE_WIDTH_SHIFT 18 /* U3.7 */
1107 # define GEN6_SF_LINE_END_CAP_WIDTH_0_5 (0 << 16)
1108 # define GEN6_SF_LINE_END_CAP_WIDTH_1_0 (1 << 16)
1109 # define GEN6_SF_LINE_END_CAP_WIDTH_2_0 (2 << 16)
1110 # define GEN6_SF_LINE_END_CAP_WIDTH_4_0 (3 << 16)
1111 # define GEN6_SF_SCISSOR_ENABLE (1 << 11)
1112 # define GEN6_SF_MSRAST_OFF_PIXEL (0 << 8)
1113 # define GEN6_SF_MSRAST_OFF_PATTERN (1 << 8)
1114 # define GEN6_SF_MSRAST_ON_PIXEL (2 << 8)
1115 # define GEN6_SF_MSRAST_ON_PATTERN (3 << 8)
1116 /* DW4 */
1117 # define GEN6_SF_TRI_PROVOKE_SHIFT 29
1118 # define GEN6_SF_LINE_PROVOKE_SHIFT 27
1119 # define GEN6_SF_TRIFAN_PROVOKE_SHIFT 25
1120 # define GEN6_SF_LINE_AA_MODE_MANHATTAN (0 << 14)
1121 # define GEN6_SF_LINE_AA_MODE_TRUE (1 << 14)
1122 # define GEN6_SF_VERTEX_SUBPIXEL_8BITS (0 << 12)
1123 # define GEN6_SF_VERTEX_SUBPIXEL_4BITS (1 << 12)
1124 # define GEN6_SF_USE_STATE_POINT_WIDTH (1 << 11)
1125 # define GEN6_SF_POINT_WIDTH_SHIFT 0 /* U8.3 */
1126 /* DW5: depth offset constant */
1127 /* DW6: depth offset scale */
1128 /* DW7: depth offset clamp */
1129 /* DW8 */
1130 # define ATTRIBUTE_1_OVERRIDE_W (1 << 31)
1131 # define ATTRIBUTE_1_OVERRIDE_Z (1 << 30)
1132 # define ATTRIBUTE_1_OVERRIDE_Y (1 << 29)
1133 # define ATTRIBUTE_1_OVERRIDE_X (1 << 28)
1134 # define ATTRIBUTE_1_CONST_SOURCE_SHIFT 25
1135 # define ATTRIBUTE_1_SWIZZLE_SHIFT 22
1136 # define ATTRIBUTE_1_SOURCE_SHIFT 16
1137 # define ATTRIBUTE_0_OVERRIDE_W (1 << 15)
1138 # define ATTRIBUTE_0_OVERRIDE_Z (1 << 14)
1139 # define ATTRIBUTE_0_OVERRIDE_Y (1 << 13)
1140 # define ATTRIBUTE_0_OVERRIDE_X (1 << 12)
1141 # define ATTRIBUTE_0_CONST_SOURCE_SHIFT 9
1142 # define ATTRIBUTE_0_SWIZZLE_SHIFT 6
1143 # define ATTRIBUTE_0_SOURCE_SHIFT 0
1144
1145 # define ATTRIBUTE_SWIZZLE_INPUTATTR 0
1146 # define ATTRIBUTE_SWIZZLE_INPUTATTR_FACING 1
1147 # define ATTRIBUTE_SWIZZLE_INPUTATTR_W 2
1148 # define ATTRIBUTE_SWIZZLE_INPUTATTR_FACING_W 3
1149 # define ATTRIBUTE_SWIZZLE_SHIFT 6
1150
1151 /* DW16: Point sprite texture coordinate enables */
1152 /* DW17: Constant interpolation enables */
1153 /* DW18: attr 0-7 wrap shortest enables */
1154 /* DW19: attr 8-16 wrap shortest enables */
1155
1156 /* On GEN7, many fields of 3DSTATE_SF were split out into a new command:
1157 * 3DSTATE_SBE. The remaining fields live in different DWords, but retain
1158 * the same bit-offset. The only new field:
1159 */
1160 /* GEN7/DW1: */
1161 # define GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT 12
1162
1163 #define _3DSTATE_SBE 0x781F /* GEN7+ */
1164 /* DW1 */
1165 # define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28)
1166 # define GEN7_SBE_NUM_OUTPUTS_SHIFT 22
1167 # define GEN7_SBE_SWIZZLE_ENABLE (1 << 21)
1168 # define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20)
1169 # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11
1170 # define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4
1171 /* DW2-9: Attribute setup (same as DW8-15 of gen6 _3DSTATE_SF) */
1172 /* DW10: Point sprite texture coordinate enables */
1173 /* DW11: Constant interpolation enables */
1174 /* DW12: attr 0-7 wrap shortest enables */
1175 /* DW13: attr 8-16 wrap shortest enables */
1176
1177 #define _3DSTATE_WM 0x7814 /* GEN6+ */
1178 /* DW1: kernel pointer */
1179 /* DW2 */
1180 # define GEN6_WM_SPF_MODE (1 << 31)
1181 # define GEN6_WM_VECTOR_MASK_ENABLE (1 << 30)
1182 # define GEN6_WM_SAMPLER_COUNT_SHIFT 27
1183 # define GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
1184 # define GEN6_WM_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
1185 # define GEN6_WM_FLOATING_POINT_MODE_ALT (1 << 16)
1186 /* DW3: scratch space */
1187 /* DW4 */
1188 # define GEN6_WM_STATISTICS_ENABLE (1 << 31)
1189 # define GEN6_WM_DEPTH_CLEAR (1 << 30)
1190 # define GEN6_WM_DEPTH_RESOLVE (1 << 28)
1191 # define GEN6_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27)
1192 # define GEN6_WM_DISPATCH_START_GRF_SHIFT_0 16
1193 # define GEN6_WM_DISPATCH_START_GRF_SHIFT_1 8
1194 # define GEN6_WM_DISPATCH_START_GRF_SHIFT_2 0
1195 /* DW5 */
1196 # define GEN6_WM_MAX_THREADS_SHIFT 25
1197 # define GEN6_WM_KILL_ENABLE (1 << 22)
1198 # define GEN6_WM_COMPUTED_DEPTH (1 << 21)
1199 # define GEN6_WM_USES_SOURCE_DEPTH (1 << 20)
1200 # define GEN6_WM_DISPATCH_ENABLE (1 << 19)
1201 # define GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 16)
1202 # define GEN6_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 16)
1203 # define GEN6_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 16)
1204 # define GEN6_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 16)
1205 # define GEN6_WM_LINE_AA_WIDTH_0_5 (0 << 14)
1206 # define GEN6_WM_LINE_AA_WIDTH_1_0 (1 << 14)
1207 # define GEN6_WM_LINE_AA_WIDTH_2_0 (2 << 14)
1208 # define GEN6_WM_LINE_AA_WIDTH_4_0 (3 << 14)
1209 # define GEN6_WM_POLYGON_STIPPLE_ENABLE (1 << 13)
1210 # define GEN6_WM_LINE_STIPPLE_ENABLE (1 << 11)
1211 # define GEN6_WM_OMASK_TO_RENDER_TARGET (1 << 9)
1212 # define GEN6_WM_USES_SOURCE_W (1 << 8)
1213 # define GEN6_WM_DUAL_SOURCE_BLEND_ENABLE (1 << 7)
1214 # define GEN6_WM_32_DISPATCH_ENABLE (1 << 2)
1215 # define GEN6_WM_16_DISPATCH_ENABLE (1 << 1)
1216 # define GEN6_WM_8_DISPATCH_ENABLE (1 << 0)
1217 /* DW6 */
1218 # define GEN6_WM_NUM_SF_OUTPUTS_SHIFT 20
1219 # define GEN6_WM_POSOFFSET_NONE (0 << 18)
1220 # define GEN6_WM_POSOFFSET_CENTROID (2 << 18)
1221 # define GEN6_WM_POSOFFSET_SAMPLE (3 << 18)
1222 # define GEN6_WM_POSITION_ZW_PIXEL (0 << 16)
1223 # define GEN6_WM_POSITION_ZW_CENTROID (2 << 16)
1224 # define GEN6_WM_POSITION_ZW_SAMPLE (3 << 16)
1225 # define GEN6_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15)
1226 # define GEN6_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14)
1227 # define GEN6_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13)
1228 # define GEN6_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12)
1229 # define GEN6_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11)
1230 # define GEN6_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10)
1231 # define GEN6_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 9)
1232 # define GEN6_WM_MSRAST_OFF_PIXEL (0 << 1)
1233 # define GEN6_WM_MSRAST_OFF_PATTERN (1 << 1)
1234 # define GEN6_WM_MSRAST_ON_PIXEL (2 << 1)
1235 # define GEN6_WM_MSRAST_ON_PATTERN (3 << 1)
1236 # define GEN6_WM_MSDISPMODE_PERPIXEL (1 << 0)
1237 /* DW7: kernel 1 pointer */
1238 /* DW8: kernel 2 pointer */
1239
1240 #define _3DSTATE_CONSTANT_VS 0x7815 /* GEN6+ */
1241 #define _3DSTATE_CONSTANT_GS 0x7816 /* GEN6+ */
1242 #define _3DSTATE_CONSTANT_PS 0x7817 /* GEN6+ */
1243 # define GEN6_CONSTANT_BUFFER_3_ENABLE (1 << 15)
1244 # define GEN6_CONSTANT_BUFFER_2_ENABLE (1 << 14)
1245 # define GEN6_CONSTANT_BUFFER_1_ENABLE (1 << 13)
1246 # define GEN6_CONSTANT_BUFFER_0_ENABLE (1 << 12)
1247
1248 #define _3DSTATE_CONSTANT_HS 0x7819 /* GEN7+ */
1249 #define _3DSTATE_CONSTANT_DS 0x781A /* GEN7+ */
1250
1251 /* 3DSTATE_WM for Gen7 */
1252 /* DW1 */
1253 # define GEN7_WM_STATISTICS_ENABLE (1 << 31)
1254 # define GEN7_WM_DEPTH_CLEAR (1 << 30)
1255 # define GEN7_WM_DISPATCH_ENABLE (1 << 29)
1256 # define GEN6_WM_DEPTH_RESOLVE (1 << 28)
1257 # define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27)
1258 # define GEN7_WM_KILL_ENABLE (1 << 25)
1259 # define GEN7_WM_PSCDEPTH_OFF (0 << 23)
1260 # define GEN7_WM_PSCDEPTH_ON (1 << 23)
1261 # define GEN7_WM_PSCDEPTH_ON_GE (2 << 23)
1262 # define GEN7_WM_PSCDEPTH_ON_LE (3 << 23)
1263 # define GEN7_WM_USES_SOURCE_DEPTH (1 << 20)
1264 # define GEN7_WM_USES_SOURCE_W (1 << 19)
1265 # define GEN7_WM_POSITION_ZW_PIXEL (0 << 17)
1266 # define GEN7_WM_POSITION_ZW_CENTROID (2 << 17)
1267 # define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17)
1268 # define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16)
1269 # define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15)
1270 # define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14)
1271 # define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13)
1272 # define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12)
1273 # define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11)
1274 # define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10)
1275 # define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8)
1276 # define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8)
1277 # define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8)
1278 # define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8)
1279 # define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6)
1280 # define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6)
1281 # define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6)
1282 # define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6)
1283 # define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4)
1284 # define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3)
1285 # define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2)
1286 # define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0)
1287 # define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0)
1288 # define GEN7_WM_MSRAST_ON_PIXEL (2 << 0)
1289 # define GEN7_WM_MSRAST_ON_PATTERN (3 << 0)
1290 /* DW2 */
1291 # define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31)
1292
1293 #define _3DSTATE_PS 0x7820 /* GEN7+ */
1294 /* DW1: kernel pointer */
1295 /* DW2 */
1296 # define GEN7_PS_SPF_MODE (1 << 31)
1297 # define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30)
1298 # define GEN7_PS_SAMPLER_COUNT_SHIFT 27
1299 # define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
1300 # define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
1301 # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16)
1302 /* DW3: scratch space */
1303 /* DW4 */
1304 # define GEN7_PS_MAX_THREADS_SHIFT 23
1305 # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11)
1306 # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10)
1307 # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9)
1308 # define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7)
1309 # define GEN7_PS_POSOFFSET_NONE (0 << 3)
1310 # define GEN7_PS_POSOFFSET_CENTROID (2 << 3)
1311 # define GEN7_PS_POSOFFSET_SAMPLE (3 << 3)
1312 # define GEN7_PS_32_DISPATCH_ENABLE (1 << 2)
1313 # define GEN7_PS_16_DISPATCH_ENABLE (1 << 1)
1314 # define GEN7_PS_8_DISPATCH_ENABLE (1 << 0)
1315 /* DW5 */
1316 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16
1317 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8
1318 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0
1319 /* DW6: kernel 1 pointer */
1320 /* DW7: kernel 2 pointer */
1321
1322 #define _3DSTATE_STREAMOUT 0x781e /* GEN7+ */
1323
1324 #define _3DSTATE_SAMPLE_MASK 0x7818 /* GEN6+ */
1325
1326 #define _3DSTATE_DRAWING_RECTANGLE 0x7900
1327 #define _3DSTATE_BLEND_CONSTANT_COLOR 0x7901
1328 #define _3DSTATE_CHROMA_KEY 0x7904
1329 #define _3DSTATE_DEPTH_BUFFER 0x7905 /* GEN4-6 */
1330 #define _3DSTATE_POLY_STIPPLE_OFFSET 0x7906
1331 #define _3DSTATE_POLY_STIPPLE_PATTERN 0x7907
1332 #define _3DSTATE_LINE_STIPPLE_PATTERN 0x7908
1333 #define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x7909
1334 #define _3DSTATE_AA_LINE_PARAMETERS 0x790a /* G45+ */
1335
1336 #define _3DSTATE_GS_SVB_INDEX 0x790b /* CTG+ */
1337 /* DW1 */
1338 # define SVB_INDEX_SHIFT 29
1339 # define SVB_LOAD_INTERNAL_VERTEX_COUNT (1 << 0) /* SNB+ */
1340 /* DW2: SVB index */
1341 /* DW3: SVB maximum index */
1342
1343 #define _3DSTATE_MULTISAMPLE 0x790d /* GEN6+ */
1344 /* DW1 */
1345 # define MS_PIXEL_LOCATION_CENTER (0 << 4)
1346 # define MS_PIXEL_LOCATION_UPPER_LEFT (1 << 4)
1347 # define MS_NUMSAMPLES_1 (0 << 1)
1348 # define MS_NUMSAMPLES_4 (2 << 1)
1349 # define MS_NUMSAMPLES_8 (3 << 1)
1350
1351 #define _3DSTATE_STENCIL_BUFFER 0x790e /* ILK, SNB */
1352 #define _3DSTATE_HIER_DEPTH_BUFFER 0x790f /* ILK, SNB */
1353
1354 #define GEN7_3DSTATE_CLEAR_PARAMS 0x7804
1355 #define GEN7_3DSTATE_DEPTH_BUFFER 0x7805
1356 #define GEN7_3DSTATE_STENCIL_BUFFER 0x7806
1357 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER 0x7807
1358
1359 #define _3DSTATE_CLEAR_PARAMS 0x7910 /* ILK, SNB */
1360 # define DEPTH_CLEAR_VALID (1 << 15)
1361 /* DW1: depth clear value */
1362
1363 #define CMD_PIPE_CONTROL 0x7a00
1364
1365 #define CMD_MI_FLUSH 0x0200
1366
1367
1368 /* Various values from the R0 vertex header:
1369 */
1370 #define R02_PRIM_END 0x1
1371 #define R02_PRIM_START 0x2
1372
1373 #include "intel_chipset.h"
1374
1375 #endif