src/mesa/drivers/dri/i965/brw_device_info.c

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <stdio.h>
  25 #include <stdlib.h>
  26 #include "brw_device_info.h"
  27
  28 static const struct brw_device_info brw_device_info_i965 = {
  29    .gen = 4,
  30    .has_negative_rhw_bug = true,
  31    .max_vs_threads = 16,
  32    .max_gs_threads = 2,
  33    .max_wm_threads = 8 * 4,
  34    .urb = {
  35       .size = 256,
  36    },
  37 };
  38
  39 static const struct brw_device_info brw_device_info_g4x = {
  40    .gen = 4,
  41    .has_pln = true,
  42    .has_compr4 = true,
  43    .has_surface_tile_offset = true,
  44    .is_g4x = true,
  45    .max_vs_threads = 32,
  46    .max_gs_threads = 2,
  47    .max_wm_threads = 10 * 5,
  48    .urb = {
  49       .size = 384,
  50    },
  51 };
  52
  53 static const struct brw_device_info brw_device_info_ilk = {
  54    .gen = 5,
  55    .has_pln = true,
  56    .has_compr4 = true,
  57    .has_surface_tile_offset = true,
  58    .max_vs_threads = 72,
  59    .max_gs_threads = 32,
  60    .max_wm_threads = 12 * 6,
  61    .urb = {
  62       .size = 1024,
  63    },
  64 };
  65
  66 static const struct brw_device_info brw_device_info_snb_gt1 = {
  67    .gen = 6,
  68    .gt = 1,
  69    .has_hiz_and_separate_stencil = true,
  70    .has_llc = true,
  71    .has_pln = true,
  72    .has_surface_tile_offset = true,
  73    .needs_unlit_centroid_workaround = true,
  74    .max_vs_threads = 24,
  75    .max_gs_threads = 21, /* conservative; 24 if rendering disabled. */
  76    .max_wm_threads = 40,
  77    .urb = {
  78       .size = 32,
  79       .min_vs_entries = 24,
  80       .max_vs_entries = 256,
  81       .max_gs_entries = 256,
  82    },
  83 };
  84
  85 static const struct brw_device_info brw_device_info_snb_gt2 = {
  86    .gen = 6,
  87    .gt = 2,
  88    .has_hiz_and_separate_stencil = true,
  89    .has_llc = true,
  90    .has_pln = true,
  91    .has_surface_tile_offset = true,
  92    .needs_unlit_centroid_workaround = true,
  93    .max_vs_threads = 60,
  94    .max_gs_threads = 60,
  95    .max_wm_threads = 80,
  96    .urb = {
  97       .size = 64,
  98       .min_vs_entries = 24,
  99       .max_vs_entries = 256,
 100       .max_gs_entries = 256,
 101    },
 102 };
 103
 104 #define GEN7_FEATURES                               \
 105    .gen = 7,                                        \
 106    .has_hiz_and_separate_stencil = true,            \
 107    .must_use_separate_stencil = true,               \
 108    .has_llc = true,                                 \
 109    .has_pln = true,                                 \
 110    .has_surface_tile_offset = true
 111
 112 static const struct brw_device_info brw_device_info_ivb_gt1 = {
 113    GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
 114    .needs_unlit_centroid_workaround = true,
 115    .max_vs_threads = 36,
 116    .max_hs_threads = 36,
 117    .max_ds_threads = 36,
 118    .max_gs_threads = 36,
 119    .max_wm_threads = 48,
 120    .max_cs_threads = 36,
 121    .urb = {
 122       .size = 128,
 123       .min_vs_entries = 32,
 124       .max_vs_entries = 512,
 125       .max_hs_entries = 32,
 126       .min_ds_entries = 10,
 127       .max_ds_entries = 288,
 128       .max_gs_entries = 192,
 129    },
 130 };
 131
 132 static const struct brw_device_info brw_device_info_ivb_gt2 = {
 133    GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
 134    .needs_unlit_centroid_workaround = true,
 135    .max_vs_threads = 128,
 136    .max_hs_threads = 128,
 137    .max_ds_threads = 128,
 138    .max_gs_threads = 128,
 139    .max_wm_threads = 172,
 140    .max_cs_threads = 64,
 141    .urb = {
 142       .size = 256,
 143       .min_vs_entries = 32,
 144       .max_vs_entries = 704,
 145       .max_hs_entries = 64,
 146       .min_ds_entries = 10,
 147       .max_ds_entries = 448,
 148       .max_gs_entries = 320,
 149    },
 150 };
 151
 152 static const struct brw_device_info brw_device_info_byt = {
 153    GEN7_FEATURES, .is_baytrail = true, .gt = 1,
 154    .needs_unlit_centroid_workaround = true,
 155    .has_llc = false,
 156    .max_vs_threads = 36,
 157    .max_hs_threads = 36,
 158    .max_ds_threads = 36,
 159    .max_gs_threads = 36,
 160    .max_wm_threads = 48,
 161    .max_cs_threads = 32,
 162    .urb = {
 163       .size = 128,
 164       .min_vs_entries = 32,
 165       .max_vs_entries = 512,
 166       .max_hs_entries = 32,
 167       .min_ds_entries = 10,
 168       .max_ds_entries = 288,
 169       .max_gs_entries = 192,
 170    },
 171 };
 172
 173 #define HSW_FEATURES             \
 174    GEN7_FEATURES,                \
 175    .is_haswell = true,           \
 176    .supports_simd16_3src = true, \
 177    .has_resource_streamer = true
 178
 179 static const struct brw_device_info brw_device_info_hsw_gt1 = {
 180    HSW_FEATURES, .gt = 1,
 181    .max_vs_threads = 70,
 182    .max_hs_threads = 70,
 183    .max_ds_threads = 70,
 184    .max_gs_threads = 70,
 185    .max_wm_threads = 102,
 186    .max_cs_threads = 70,
 187    .urb = {
 188       .size = 128,
 189       .min_vs_entries = 32,
 190       .max_vs_entries = 640,
 191       .max_hs_entries = 64,
 192       .min_ds_entries = 10,
 193       .max_ds_entries = 384,
 194       .max_gs_entries = 256,
 195    },
 196 };
 197
 198 static const struct brw_device_info brw_device_info_hsw_gt2 = {
 199    HSW_FEATURES, .gt = 2,
 200    .max_vs_threads = 280,
 201    .max_hs_threads = 256,
 202    .max_ds_threads = 280,
 203    .max_gs_threads = 256,
 204    .max_wm_threads = 204,
 205    .max_cs_threads = 70,
 206    .urb = {
 207       .size = 256,
 208       .min_vs_entries = 64,
 209       .max_vs_entries = 1664,
 210       .max_hs_entries = 128,
 211       .min_ds_entries = 10,
 212       .max_ds_entries = 960,
 213       .max_gs_entries = 640,
 214    },
 215 };
 216
 217 static const struct brw_device_info brw_device_info_hsw_gt3 = {
 218    HSW_FEATURES, .gt = 3,
 219    .max_vs_threads = 280,
 220    .max_hs_threads = 256,
 221    .max_ds_threads = 280,
 222    .max_gs_threads = 256,
 223    .max_wm_threads = 408,
 224    .max_cs_threads = 70,
 225    .urb = {
 226       .size = 512,
 227       .min_vs_entries = 64,
 228       .max_vs_entries = 1664,
 229       .max_hs_entries = 128,
 230       .min_ds_entries = 10,
 231       .max_ds_entries = 960,
 232       .max_gs_entries = 640,
 233    },
 234 };
 235
 236 #define GEN8_FEATURES                               \
 237    .gen = 8,                                        \
 238    .has_hiz_and_separate_stencil = true,            \
 239    .has_resource_streamer = true,                   \
 240    .must_use_separate_stencil = true,               \
 241    .has_llc = true,                                 \
 242    .has_pln = true,                                 \
 243    .supports_simd16_3src = true,                    \
 244    .max_vs_threads = 504,                           \
 245    .max_hs_threads = 504,                           \
 246    .max_ds_threads = 504,                           \
 247    .max_gs_threads = 504,                           \
 248    .max_wm_threads = 384
 249
 250 static const struct brw_device_info brw_device_info_bdw_gt1 = {
 251    GEN8_FEATURES, .gt = 1,
 252    .max_cs_threads = 42,
 253    .urb = {
 254       .size = 192,
 255       .min_vs_entries = 64,
 256       .max_vs_entries = 2560,
 257       .max_hs_entries = 504,
 258       .min_ds_entries = 34,
 259       .max_ds_entries = 1536,
 260       .max_gs_entries = 960,
 261    }
 262 };
 263
 264 static const struct brw_device_info brw_device_info_bdw_gt2 = {
 265    GEN8_FEATURES, .gt = 2,
 266    .max_cs_threads = 56,
 267    .urb = {
 268       .size = 384,
 269       .min_vs_entries = 64,
 270       .max_vs_entries = 2560,
 271       .max_hs_entries = 504,
 272       .min_ds_entries = 34,
 273       .max_ds_entries = 1536,
 274       .max_gs_entries = 960,
 275    }
 276 };
 277
 278 static const struct brw_device_info brw_device_info_bdw_gt3 = {
 279    GEN8_FEATURES, .gt = 3,
 280    .max_cs_threads = 56,
 281    .urb = {
 282       .size = 384,
 283       .min_vs_entries = 64,
 284       .max_vs_entries = 2560,
 285       .max_hs_entries = 504,
 286       .min_ds_entries = 34,
 287       .max_ds_entries = 1536,
 288       .max_gs_entries = 960,
 289    }
 290 };
 291
 292 static const struct brw_device_info brw_device_info_chv = {
 293    GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
 294    .has_llc = false,
 295    .max_vs_threads = 80,
 296    .max_hs_threads = 80,
 297    .max_ds_threads = 80,
 298    .max_gs_threads = 80,
 299    .max_wm_threads = 128,
 300    .max_cs_threads = 28,
 301    .urb = {
 302       .size = 192,
 303       .min_vs_entries = 34,
 304       .max_vs_entries = 640,
 305       .max_hs_entries = 80,
 306       .min_ds_entries = 34,
 307       .max_ds_entries = 384,
 308       .max_gs_entries = 256,
 309    }
 310 };
 311
 312 #define GEN9_FEATURES                               \
 313    .gen = 9,                                        \
 314    .has_hiz_and_separate_stencil = true,            \
 315    .has_resource_streamer = true,                   \
 316    .must_use_separate_stencil = true,               \
 317    .has_llc = true,                                 \
 318    .has_pln = true,                                 \
 319    .supports_simd16_3src = true,                    \
 320    .max_vs_threads = 336,                           \
 321    .max_gs_threads = 336,                           \
 322    .max_hs_threads = 336,                           \
 323    .max_ds_threads = 336,                           \
 324    .max_wm_threads = 64 * 9,                        \
 325    .max_cs_threads = 56,                            \
 326    .urb = {                                         \
 327       .size = 384,                                  \
 328       .min_vs_entries = 64,                         \
 329       .max_vs_entries = 1856,                       \
 330       .max_hs_entries = 672,                        \
 331       .min_ds_entries = 34,                         \
 332       .max_ds_entries = 1120,                       \
 333       .max_gs_entries = 640,                        \
 334    }
 335
 336 static const struct brw_device_info brw_device_info_skl_gt1 = {
 337    GEN9_FEATURES, .gt = 1,
 338    .urb.size = 192,
 339 };
 340
 341 static const struct brw_device_info brw_device_info_skl_gt2 = {
 342    GEN9_FEATURES, .gt = 2,
 343 };
 344
 345 static const struct brw_device_info brw_device_info_skl_gt3 = {
 346    GEN9_FEATURES, .gt = 3,
 347 };
 348
 349 static const struct brw_device_info brw_device_info_skl_gt4 = {
 350    GEN9_FEATURES, .gt = 4,
 351    /* From the "L3 Allocation and Programming" documentation:
 352     *
 353     * "URB is limited to 1008KB due to programming restrictions.  This is not a
 354     * restriction of the L3 implementation, but of the FF and other clients.
 355     * Therefore, in a GT4 implementation it is possible for the programmed
 356     * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but
 357     * only 1008KB of this will be used."
 358     */
 359    .urb.size = 1008 / 3,
 360 };
 361
 362 static const struct brw_device_info brw_device_info_bxt = {
 363    GEN9_FEATURES,
 364    .is_broxton = 1,
 365    .gt = 1,
 366    .has_llc = false,
 367
 368    /* XXX: These are preliminary thread counts and URB sizes. */
 369    .max_vs_threads = 56,
 370    .max_hs_threads = 56,
 371    .max_ds_threads = 56,
 372    .max_gs_threads = 56,
 373    .max_wm_threads = 32,
 374    .max_cs_threads = 28,
 375    .urb = {
 376       .size = 64,
 377       .min_vs_entries = 34,
 378       .max_vs_entries = 640,
 379       .max_hs_entries = 80,
 380       .max_ds_entries = 80,
 381       .max_gs_entries = 256,
 382    }
 383 };
 384
 385 const struct brw_device_info *
 386 brw_get_device_info(int devid)
 387 {
 388    const struct brw_device_info *devinfo;
 389    switch (devid) {
 390 #undef CHIPSET
 391 #define CHIPSET(id, family, name) \
 392    case id: devinfo = &brw_device_info_##family; break;
 393 #include "pci_ids/i965_pci_ids.h"
 394    default:
 395       fprintf(stderr, "i965_dri.so does not support the 0x%x PCI ID.\n", devid);
 396       return NULL;
 397    }
 398
 399    return devinfo;
 400 }