i965: Move hardware limits to brw_device_info.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_device_info.c
1 /*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include <stdlib.h>
26 #include "brw_device_info.h"
27
28 static const struct brw_device_info brw_device_info_i965 = {
29 .gen = 4,
30 .max_vs_threads = 16,
31 .max_gs_threads = 2,
32 .max_wm_threads = 8 * 4,
33 .urb = {
34 .size = 256,
35 },
36 };
37
38 static const struct brw_device_info brw_device_info_g4x = {
39 .gen = 4,
40 .is_g4x = true,
41 .max_vs_threads = 32,
42 .max_gs_threads = 2,
43 .max_wm_threads = 10 * 5,
44 .urb = {
45 .size = 384,
46 },
47 };
48
49 static const struct brw_device_info brw_device_info_ilk = {
50 .gen = 5,
51 .max_vs_threads = 72,
52 .max_gs_threads = 32,
53 .max_wm_threads = 12 * 6,
54 .urb = {
55 .size = 1024,
56 },
57 };
58
59 static const struct brw_device_info brw_device_info_snb_gt1 = {
60 .gen = 6,
61 .gt = 2,
62 .has_hiz_and_separate_stencil = true,
63 .has_llc = true,
64 .max_vs_threads = 24,
65 .max_gs_threads = 21, /* conservative; 24 if rendering disabled. */
66 .max_wm_threads = 40,
67 .urb = {
68 .size = 32,
69 .min_vs_entries = 24,
70 .max_vs_entries = 256,
71 .max_gs_entries = 256,
72 },
73 };
74
75 static const struct brw_device_info brw_device_info_snb_gt2 = {
76 .gen = 6,
77 .gt = 2,
78 .has_hiz_and_separate_stencil = true,
79 .has_llc = true,
80 .max_vs_threads = 60,
81 .max_gs_threads = 60,
82 .max_wm_threads = 80,
83 .urb = {
84 .size = 64,
85 .min_vs_entries = 24,
86 .max_vs_entries = 256,
87 .max_gs_entries = 256,
88 },
89 };
90
91 #define GEN7_FEATURES \
92 .gen = 7, \
93 .has_hiz_and_separate_stencil = true, \
94 .must_use_separate_stencil = true, \
95 .has_llc = true
96
97 static const struct brw_device_info brw_device_info_ivb_gt1 = {
98 GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
99 .max_vs_threads = 36,
100 .max_gs_threads = 36,
101 .max_wm_threads = 48,
102 .urb = {
103 .size = 128,
104 .min_vs_entries = 32,
105 .max_vs_entries = 512,
106 .max_gs_entries = 192,
107 },
108 };
109
110 static const struct brw_device_info brw_device_info_ivb_gt2 = {
111 GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
112 .max_vs_threads = 128,
113 .max_gs_threads = 128,
114 .max_wm_threads = 172,
115 .urb = {
116 .size = 256,
117 .min_vs_entries = 32,
118 .max_vs_entries = 704,
119 .max_gs_entries = 320,
120 },
121 };
122
123 static const struct brw_device_info brw_device_info_byt = {
124 GEN7_FEATURES, .is_baytrail = true, .gt = 1,
125 .has_llc = false,
126 .max_vs_threads = 36,
127 .max_gs_threads = 36,
128 .max_wm_threads = 48,
129 .urb = {
130 .size = 128,
131 .min_vs_entries = 32,
132 .max_vs_entries = 512,
133 .max_gs_entries = 192,
134 },
135 };
136
137 static const struct brw_device_info brw_device_info_hsw_gt1 = {
138 GEN7_FEATURES, .is_haswell = true, .gt = 1,
139 .max_vs_threads = 70,
140 .max_gs_threads = 70,
141 .max_wm_threads = 102,
142 .urb = {
143 .size = 128,
144 .min_vs_entries = 32,
145 .max_vs_entries = 640,
146 .max_gs_entries = 256,
147 },
148 };
149
150 static const struct brw_device_info brw_device_info_hsw_gt2 = {
151 GEN7_FEATURES, .is_haswell = true, .gt = 2,
152 .max_vs_threads = 280,
153 .max_gs_threads = 256,
154 .max_wm_threads = 204,
155 .urb = {
156 .size = 256,
157 .min_vs_entries = 64,
158 .max_vs_entries = 1664,
159 .max_gs_entries = 640,
160 },
161 };
162
163 static const struct brw_device_info brw_device_info_hsw_gt3 = {
164 GEN7_FEATURES, .is_haswell = true, .gt = 3,
165 .max_vs_threads = 280,
166 .max_gs_threads = 256,
167 .max_wm_threads = 408,
168 .urb = {
169 .size = 512,
170 .min_vs_entries = 64,
171 .max_vs_entries = 1664,
172 .max_gs_entries = 640,
173 },
174 };
175
176 const struct brw_device_info *
177 brw_get_device_info(int devid)
178 {
179 switch (devid) {
180 #undef CHIPSET
181 #define CHIPSET(id, family, name) case id: return &brw_device_info_##family;
182 #include "pci_ids/i965_pci_ids.h"
183 default:
184 fprintf(stderr, "Unknown Intel device.");
185 abort();
186 }
187 }