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i965/fs: Lower 32x32 bit multiplication on BXT.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "brw_context.h"
31 #include "brw_defines.h"
32 #include "brw_reg.h"
33 #include "brw_inst.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1 },
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1 },
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1 },
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_CSEL] = { .name = "csel", .nsrc = 3, .ndst = 1 },
78 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1 },
79 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1 },
80 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1 },
81 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1 },
82 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1 },
83
84 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
86 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_NENOP] = { .name = "nenop", .nsrc = 0, .ndst = 0 },
88 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
89 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
90 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
91 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
93 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
94 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
95 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
96 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
98 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
99 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
100 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
101 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
102 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
103 };
104
105 static bool
106 has_jip(const struct brw_device_info *devinfo, enum opcode opcode)
107 {
108 if (devinfo->gen < 6)
109 return false;
110
111 return opcode == BRW_OPCODE_IF ||
112 opcode == BRW_OPCODE_ELSE ||
113 opcode == BRW_OPCODE_ENDIF ||
114 opcode == BRW_OPCODE_WHILE ||
115 opcode == BRW_OPCODE_BREAK ||
116 opcode == BRW_OPCODE_CONTINUE ||
117 opcode == BRW_OPCODE_HALT;
118 }
119
120 static bool
121 has_uip(const struct brw_device_info *devinfo, enum opcode opcode)
122 {
123 if (devinfo->gen < 6)
124 return false;
125
126 return (devinfo->gen >= 7 && opcode == BRW_OPCODE_IF) ||
127 (devinfo->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
128 opcode == BRW_OPCODE_BREAK ||
129 opcode == BRW_OPCODE_CONTINUE ||
130 opcode == BRW_OPCODE_HALT;
131 }
132
133 static bool
134 has_branch_ctrl(const struct brw_device_info *devinfo, enum opcode opcode)
135 {
136 if (devinfo->gen < 8)
137 return false;
138
139 return opcode == BRW_OPCODE_IF ||
140 opcode == BRW_OPCODE_ELSE ||
141 opcode == BRW_OPCODE_GOTO;
142 }
143
144 static bool
145 is_logic_instruction(unsigned opcode)
146 {
147 return opcode == BRW_OPCODE_AND ||
148 opcode == BRW_OPCODE_NOT ||
149 opcode == BRW_OPCODE_OR ||
150 opcode == BRW_OPCODE_XOR;
151 }
152
153 const char *const conditional_modifier[16] = {
154 [BRW_CONDITIONAL_NONE] = "",
155 [BRW_CONDITIONAL_Z] = ".z",
156 [BRW_CONDITIONAL_NZ] = ".nz",
157 [BRW_CONDITIONAL_G] = ".g",
158 [BRW_CONDITIONAL_GE] = ".ge",
159 [BRW_CONDITIONAL_L] = ".l",
160 [BRW_CONDITIONAL_LE] = ".le",
161 [BRW_CONDITIONAL_R] = ".r",
162 [BRW_CONDITIONAL_O] = ".o",
163 [BRW_CONDITIONAL_U] = ".u",
164 };
165
166 static const char *const m_negate[2] = {
167 [0] = "",
168 [1] = "-",
169 };
170
171 static const char *const _abs[2] = {
172 [0] = "",
173 [1] = "(abs)",
174 };
175
176 static const char *const m_bitnot[2] = { "", "~" };
177
178 static const char *const vert_stride[16] = {
179 [0] = "0",
180 [1] = "1",
181 [2] = "2",
182 [3] = "4",
183 [4] = "8",
184 [5] = "16",
185 [6] = "32",
186 [15] = "VxH",
187 };
188
189 static const char *const width[8] = {
190 [0] = "1",
191 [1] = "2",
192 [2] = "4",
193 [3] = "8",
194 [4] = "16",
195 };
196
197 static const char *const horiz_stride[4] = {
198 [0] = "0",
199 [1] = "1",
200 [2] = "2",
201 [3] = "4"
202 };
203
204 static const char *const chan_sel[4] = {
205 [0] = "x",
206 [1] = "y",
207 [2] = "z",
208 [3] = "w",
209 };
210
211 static const char *const debug_ctrl[2] = {
212 [0] = "",
213 [1] = ".breakpoint"
214 };
215
216 static const char *const saturate[2] = {
217 [0] = "",
218 [1] = ".sat"
219 };
220
221 static const char *const cmpt_ctrl[2] = {
222 [0] = "",
223 [1] = "compacted"
224 };
225
226 static const char *const accwr[2] = {
227 [0] = "",
228 [1] = "AccWrEnable"
229 };
230
231 static const char *const branch_ctrl[2] = {
232 [0] = "",
233 [1] = "BranchCtrl"
234 };
235
236 static const char *const wectrl[2] = {
237 [0] = "",
238 [1] = "WE_all"
239 };
240
241 static const char *const exec_size[8] = {
242 [0] = "1",
243 [1] = "2",
244 [2] = "4",
245 [3] = "8",
246 [4] = "16",
247 [5] = "32"
248 };
249
250 static const char *const pred_inv[2] = {
251 [0] = "+",
252 [1] = "-"
253 };
254
255 static const char *const pred_ctrl_align16[16] = {
256 [1] = "",
257 [2] = ".x",
258 [3] = ".y",
259 [4] = ".z",
260 [5] = ".w",
261 [6] = ".any4h",
262 [7] = ".all4h",
263 };
264
265 static const char *const pred_ctrl_align1[16] = {
266 [BRW_PREDICATE_NORMAL] = "",
267 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
268 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
269 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
270 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
271 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
272 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
273 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
274 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
275 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
276 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
277 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
278 [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",
279 };
280
281 static const char *const thread_ctrl[4] = {
282 [BRW_THREAD_NORMAL] = "",
283 [BRW_THREAD_ATOMIC] = "atomic",
284 [BRW_THREAD_SWITCH] = "switch",
285 };
286
287 static const char *const compr_ctrl[4] = {
288 [0] = "",
289 [1] = "sechalf",
290 [2] = "compr",
291 [3] = "compr4",
292 };
293
294 static const char *const dep_ctrl[4] = {
295 [0] = "",
296 [1] = "NoDDClr",
297 [2] = "NoDDChk",
298 [3] = "NoDDClr,NoDDChk",
299 };
300
301 static const char *const mask_ctrl[4] = {
302 [0] = "",
303 [1] = "nomask",
304 };
305
306 static const char *const access_mode[2] = {
307 [0] = "align1",
308 [1] = "align16",
309 };
310
311 static const char * const reg_encoding[] = {
312 [BRW_HW_REG_TYPE_UD] = "UD",
313 [BRW_HW_REG_TYPE_D] = "D",
314 [BRW_HW_REG_TYPE_UW] = "UW",
315 [BRW_HW_REG_TYPE_W] = "W",
316 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
317 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
318 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
319 [BRW_HW_REG_TYPE_F] = "F",
320 [GEN8_HW_REG_TYPE_UQ] = "UQ",
321 [GEN8_HW_REG_TYPE_Q] = "Q",
322 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
323 };
324
325 static const char *const three_source_reg_encoding[] = {
326 [BRW_3SRC_TYPE_F] = "F",
327 [BRW_3SRC_TYPE_D] = "D",
328 [BRW_3SRC_TYPE_UD] = "UD",
329 };
330
331 const int reg_type_size[] = {
332 [BRW_HW_REG_TYPE_UD] = 4,
333 [BRW_HW_REG_TYPE_D] = 4,
334 [BRW_HW_REG_TYPE_UW] = 2,
335 [BRW_HW_REG_TYPE_W] = 2,
336 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
337 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
338 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
339 [BRW_HW_REG_TYPE_F] = 4,
340 [GEN8_HW_REG_TYPE_UQ] = 8,
341 [GEN8_HW_REG_TYPE_Q] = 8,
342 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
343 };
344
345 static const char *const reg_file[4] = {
346 [0] = "A",
347 [1] = "g",
348 [2] = "m",
349 [3] = "imm",
350 };
351
352 static const char *const writemask[16] = {
353 [0x0] = ".",
354 [0x1] = ".x",
355 [0x2] = ".y",
356 [0x3] = ".xy",
357 [0x4] = ".z",
358 [0x5] = ".xz",
359 [0x6] = ".yz",
360 [0x7] = ".xyz",
361 [0x8] = ".w",
362 [0x9] = ".xw",
363 [0xa] = ".yw",
364 [0xb] = ".xyw",
365 [0xc] = ".zw",
366 [0xd] = ".xzw",
367 [0xe] = ".yzw",
368 [0xf] = "",
369 };
370
371 static const char *const end_of_thread[2] = {
372 [0] = "",
373 [1] = "EOT"
374 };
375
376 /* SFIDs on Gen4-5 */
377 static const char *const gen4_sfid[16] = {
378 [BRW_SFID_NULL] = "null",
379 [BRW_SFID_MATH] = "math",
380 [BRW_SFID_SAMPLER] = "sampler",
381 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
382 [BRW_SFID_DATAPORT_READ] = "read",
383 [BRW_SFID_DATAPORT_WRITE] = "write",
384 [BRW_SFID_URB] = "urb",
385 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
386 [BRW_SFID_VME] = "vme",
387 };
388
389 static const char *const gen6_sfid[16] = {
390 [BRW_SFID_NULL] = "null",
391 [BRW_SFID_MATH] = "math",
392 [BRW_SFID_SAMPLER] = "sampler",
393 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
394 [BRW_SFID_URB] = "urb",
395 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
396 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
397 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
398 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
399 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
400 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
401 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
402 [HSW_SFID_CRE] = "cre",
403 };
404
405 static const char *const gen7_gateway_subfuncid[8] = {
406 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open",
407 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close",
408 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg",
409 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp",
410 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg",
411 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state",
412 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write",
413 };
414
415 static const char *const dp_write_port_msg_type[8] = {
416 [0b000] = "OWord block write",
417 [0b001] = "OWord dual block write",
418 [0b010] = "media block write",
419 [0b011] = "DWord scattered write",
420 [0b100] = "RT write",
421 [0b101] = "streamed VB write",
422 [0b110] = "RT UNORM write", /* G45+ */
423 [0b111] = "flush render cache",
424 };
425
426 static const char *const dp_rc_msg_type_gen6[16] = {
427 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
428 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
429 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
430 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
431 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
432 "OWORD unaligned block read",
433 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
434 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
435 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
436 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
437 "OWORD dual block write",
438 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
439 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
440 "DWORD scattered write",
441 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
442 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
443 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
444 };
445
446 static const char *const m_rt_write_subtype[] = {
447 [0b000] = "SIMD16",
448 [0b001] = "SIMD16/RepData",
449 [0b010] = "SIMD8/DualSrcLow",
450 [0b011] = "SIMD8/DualSrcHigh",
451 [0b100] = "SIMD8",
452 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
453 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
454 };
455
456 static const char *const dp_dc0_msg_type_gen7[16] = {
457 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
458 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
459 "DC unaligned OWORD block read",
460 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
461 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
462 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
463 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",
464 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
465 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
466 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
467 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
468 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
469 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
470 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
471 };
472
473 static const char *const dp_dc1_msg_type_hsw[16] = {
474 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
475 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
476 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
477 "DC untyped 4x2 atomic op",
478 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
479 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
480 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
481 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
482 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
483 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
484 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
485 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
486 "DC 4x2 atomic counter op",
487 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
488 };
489
490 static const char *const aop[16] = {
491 [BRW_AOP_AND] = "and",
492 [BRW_AOP_OR] = "or",
493 [BRW_AOP_XOR] = "xor",
494 [BRW_AOP_MOV] = "mov",
495 [BRW_AOP_INC] = "inc",
496 [BRW_AOP_DEC] = "dec",
497 [BRW_AOP_ADD] = "add",
498 [BRW_AOP_SUB] = "sub",
499 [BRW_AOP_REVSUB] = "revsub",
500 [BRW_AOP_IMAX] = "imax",
501 [BRW_AOP_IMIN] = "imin",
502 [BRW_AOP_UMAX] = "umax",
503 [BRW_AOP_UMIN] = "umin",
504 [BRW_AOP_CMPWR] = "cmpwr",
505 [BRW_AOP_PREDEC] = "predec",
506 };
507
508 static const char * const pixel_interpolator_msg_types[4] = {
509 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
510 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
511 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
512 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
513 };
514
515 static const char *const math_function[16] = {
516 [BRW_MATH_FUNCTION_INV] = "inv",
517 [BRW_MATH_FUNCTION_LOG] = "log",
518 [BRW_MATH_FUNCTION_EXP] = "exp",
519 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
520 [BRW_MATH_FUNCTION_RSQ] = "rsq",
521 [BRW_MATH_FUNCTION_SIN] = "sin",
522 [BRW_MATH_FUNCTION_COS] = "cos",
523 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
524 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
525 [BRW_MATH_FUNCTION_POW] = "pow",
526 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
527 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
528 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
529 [GEN8_MATH_FUNCTION_INVM] = "invm",
530 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
531 };
532
533 static const char *const math_saturate[2] = {
534 [0] = "",
535 [1] = "sat"
536 };
537
538 static const char *const math_signed[2] = {
539 [0] = "",
540 [1] = "signed"
541 };
542
543 static const char *const math_scalar[2] = {
544 [0] = "",
545 [1] = "scalar"
546 };
547
548 static const char *const math_precision[2] = {
549 [0] = "",
550 [1] = "partial_precision"
551 };
552
553 static const char *const gen5_urb_opcode[] = {
554 [0] = "urb_write",
555 [1] = "ff_sync",
556 };
557
558 static const char *const gen7_urb_opcode[] = {
559 [0] = "write HWord",
560 [1] = "write OWord",
561 [2] = "read HWord",
562 [3] = "read OWord",
563 [4] = "atomic mov", /* Gen7+ */
564 [5] = "atomic inc", /* Gen7+ */
565 [6] = "atomic add", /* Gen8+ */
566 [7] = "SIMD8 write", /* Gen8+ */
567 [8] = "SIMD8 read", /* Gen8+ */
568 /* [9-15] - reserved */
569 };
570
571 static const char *const urb_swizzle[4] = {
572 [BRW_URB_SWIZZLE_NONE] = "",
573 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
574 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
575 };
576
577 static const char *const urb_allocate[2] = {
578 [0] = "",
579 [1] = "allocate"
580 };
581
582 static const char *const urb_used[2] = {
583 [0] = "",
584 [1] = "used"
585 };
586
587 static const char *const urb_complete[2] = {
588 [0] = "",
589 [1] = "complete"
590 };
591
592 static const char *const gen5_sampler_msg_type[] = {
593 [GEN5_SAMPLER_MESSAGE_SAMPLE] = "sample",
594 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b",
595 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l",
596 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c",
597 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d",
598 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",
599 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c",
600 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld",
601 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4",
602 [GEN5_SAMPLER_MESSAGE_LOD] = "lod",
603 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo",
604 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c",
605 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",
606 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",
607 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
608 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",
609 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms",
610 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
611 };
612
613 static const char *const gen5_sampler_simd_mode[4] = {
614 [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",
615 [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",
616 [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16",
617 [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
618 };
619
620 static const char *const sampler_target_format[4] = {
621 [0] = "F",
622 [2] = "UD",
623 [3] = "D"
624 };
625
626
627 static int column;
628
629 static int
630 string(FILE *file, const char *string)
631 {
632 fputs(string, file);
633 column += strlen(string);
634 return 0;
635 }
636
637 static int
638 format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
639
640 static int
641 format(FILE *f, const char *format, ...)
642 {
643 char buf[1024];
644 va_list args;
645 va_start(args, format);
646
647 vsnprintf(buf, sizeof(buf) - 1, format, args);
648 va_end(args);
649 string(f, buf);
650 return 0;
651 }
652
653 static int
654 newline(FILE *f)
655 {
656 putc('\n', f);
657 column = 0;
658 return 0;
659 }
660
661 static int
662 pad(FILE *f, int c)
663 {
664 do
665 string(f, " ");
666 while (column < c);
667 return 0;
668 }
669
670 static int
671 control(FILE *file, const char *name, const char *const ctrl[],
672 unsigned id, int *space)
673 {
674 if (!ctrl[id]) {
675 fprintf(file, "*** invalid %s value %d ", name, id);
676 return 1;
677 }
678 if (ctrl[id][0]) {
679 if (space && *space)
680 string(file, " ");
681 string(file, ctrl[id]);
682 if (space)
683 *space = 1;
684 }
685 return 0;
686 }
687
688 static int
689 print_opcode(FILE *file, int id)
690 {
691 if (!opcode_descs[id].name) {
692 format(file, "*** invalid opcode value %d ", id);
693 return 1;
694 }
695 string(file, opcode_descs[id].name);
696 return 0;
697 }
698
699 static int
700 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
701 {
702 int err = 0;
703
704 /* Clear the Compr4 instruction compression bit. */
705 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
706 _reg_nr &= ~(1 << 7);
707
708 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
709 switch (_reg_nr & 0xf0) {
710 case BRW_ARF_NULL:
711 string(file, "null");
712 return -1;
713 case BRW_ARF_ADDRESS:
714 format(file, "a%d", _reg_nr & 0x0f);
715 break;
716 case BRW_ARF_ACCUMULATOR:
717 format(file, "acc%d", _reg_nr & 0x0f);
718 break;
719 case BRW_ARF_FLAG:
720 format(file, "f%d", _reg_nr & 0x0f);
721 break;
722 case BRW_ARF_MASK:
723 format(file, "mask%d", _reg_nr & 0x0f);
724 break;
725 case BRW_ARF_MASK_STACK:
726 format(file, "msd%d", _reg_nr & 0x0f);
727 break;
728 case BRW_ARF_STATE:
729 format(file, "sr%d", _reg_nr & 0x0f);
730 break;
731 case BRW_ARF_CONTROL:
732 format(file, "cr%d", _reg_nr & 0x0f);
733 break;
734 case BRW_ARF_NOTIFICATION_COUNT:
735 format(file, "n%d", _reg_nr & 0x0f);
736 break;
737 case BRW_ARF_IP:
738 string(file, "ip");
739 return -1;
740 break;
741 case BRW_ARF_TDR:
742 format(file, "tdr0");
743 return -1;
744 case BRW_ARF_TIMESTAMP:
745 format(file, "tm%d", _reg_nr & 0x0f);
746 break;
747 default:
748 format(file, "ARF%d", _reg_nr);
749 break;
750 }
751 } else {
752 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
753 format(file, "%d", _reg_nr);
754 }
755 return err;
756 }
757
758 static int
759 dest(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
760 {
761 int err = 0;
762
763 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
764 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
765 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
766 brw_inst_dst_da_reg_nr(devinfo, inst));
767 if (err == -1)
768 return 0;
769 if (brw_inst_dst_da1_subreg_nr(devinfo, inst))
770 format(file, ".%ld", brw_inst_dst_da1_subreg_nr(devinfo, inst) /
771 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
772 string(file, "<");
773 err |= control(file, "horiz stride", horiz_stride,
774 brw_inst_dst_hstride(devinfo, inst), NULL);
775 string(file, ">");
776 err |= control(file, "dest reg encoding", reg_encoding,
777 brw_inst_dst_reg_type(devinfo, inst), NULL);
778 } else {
779 string(file, "g[a0");
780 if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
781 format(file, ".%ld", brw_inst_dst_ia_subreg_nr(devinfo, inst) /
782 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
783 if (brw_inst_dst_ia1_addr_imm(devinfo, inst))
784 format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));
785 string(file, "]<");
786 err |= control(file, "horiz stride", horiz_stride,
787 brw_inst_dst_hstride(devinfo, inst), NULL);
788 string(file, ">");
789 err |= control(file, "dest reg encoding", reg_encoding,
790 brw_inst_dst_reg_type(devinfo, inst), NULL);
791 }
792 } else {
793 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
794 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
795 brw_inst_dst_da_reg_nr(devinfo, inst));
796 if (err == -1)
797 return 0;
798 if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
799 format(file, ".%ld", brw_inst_dst_da16_subreg_nr(devinfo, inst) /
800 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
801 string(file, "<1>");
802 err |= control(file, "writemask", writemask,
803 brw_inst_da16_writemask(devinfo, inst), NULL);
804 err |= control(file, "dest reg encoding", reg_encoding,
805 brw_inst_dst_reg_type(devinfo, inst), NULL);
806 } else {
807 err = 1;
808 string(file, "Indirect align16 address mode not supported");
809 }
810 }
811
812 return 0;
813 }
814
815 static int
816 dest_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
817 {
818 int err = 0;
819 uint32_t reg_file;
820
821 if (devinfo->gen == 6 && brw_inst_3src_dst_reg_file(devinfo, inst))
822 reg_file = BRW_MESSAGE_REGISTER_FILE;
823 else
824 reg_file = BRW_GENERAL_REGISTER_FILE;
825
826 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));
827 if (err == -1)
828 return 0;
829 if (brw_inst_3src_dst_subreg_nr(devinfo, inst))
830 format(file, ".%ld", brw_inst_3src_dst_subreg_nr(devinfo, inst));
831 string(file, "<1>");
832 err |= control(file, "writemask", writemask,
833 brw_inst_3src_dst_writemask(devinfo, inst), NULL);
834 err |= control(file, "dest reg encoding", three_source_reg_encoding,
835 brw_inst_3src_dst_type(devinfo, inst), NULL);
836
837 return 0;
838 }
839
840 static int
841 src_align1_region(FILE *file,
842 unsigned _vert_stride, unsigned _width,
843 unsigned _horiz_stride)
844 {
845 int err = 0;
846 string(file, "<");
847 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
848 string(file, ",");
849 err |= control(file, "width", width, _width, NULL);
850 string(file, ",");
851 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
852 string(file, ">");
853 return err;
854 }
855
856 static int
857 src_da1(FILE *file,
858 const struct brw_device_info *devinfo,
859 unsigned opcode,
860 unsigned type, unsigned _reg_file,
861 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
862 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
863 unsigned _negate)
864 {
865 int err = 0;
866
867 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
868 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
869 else
870 err |= control(file, "negate", m_negate, _negate, NULL);
871
872 err |= control(file, "abs", _abs, __abs, NULL);
873
874 err |= reg(file, _reg_file, reg_num);
875 if (err == -1)
876 return 0;
877 if (sub_reg_num)
878 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
879 src_align1_region(file, _vert_stride, _width, _horiz_stride);
880 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
881 return err;
882 }
883
884 static int
885 src_ia1(FILE *file,
886 const struct brw_device_info *devinfo,
887 unsigned opcode,
888 unsigned type,
889 unsigned _reg_file,
890 int _addr_imm,
891 unsigned _addr_subreg_nr,
892 unsigned _negate,
893 unsigned __abs,
894 unsigned _addr_mode,
895 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
896 {
897 int err = 0;
898
899 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
900 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
901 else
902 err |= control(file, "negate", m_negate, _negate, NULL);
903
904 err |= control(file, "abs", _abs, __abs, NULL);
905
906 string(file, "g[a0");
907 if (_addr_subreg_nr)
908 format(file, ".%d", _addr_subreg_nr);
909 if (_addr_imm)
910 format(file, " %d", _addr_imm);
911 string(file, "]");
912 src_align1_region(file, _vert_stride, _width, _horiz_stride);
913 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
914 return err;
915 }
916
917 static int
918 src_swizzle(FILE *file, unsigned swiz)
919 {
920 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
921 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
922 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
923 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
924 int err = 0;
925
926 if (x == y && x == z && x == w) {
927 string(file, ".");
928 err |= control(file, "channel select", chan_sel, x, NULL);
929 } else if (swiz != BRW_SWIZZLE_XYZW) {
930 string(file, ".");
931 err |= control(file, "channel select", chan_sel, x, NULL);
932 err |= control(file, "channel select", chan_sel, y, NULL);
933 err |= control(file, "channel select", chan_sel, z, NULL);
934 err |= control(file, "channel select", chan_sel, w, NULL);
935 }
936 return err;
937 }
938
939 static int
940 src_da16(FILE *file,
941 const struct brw_device_info *devinfo,
942 unsigned opcode,
943 unsigned _reg_type,
944 unsigned _reg_file,
945 unsigned _vert_stride,
946 unsigned _reg_nr,
947 unsigned _subreg_nr,
948 unsigned __abs,
949 unsigned _negate,
950 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
951 {
952 int err = 0;
953
954 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
955 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
956 else
957 err |= control(file, "negate", m_negate, _negate, NULL);
958
959 err |= control(file, "abs", _abs, __abs, NULL);
960
961 err |= reg(file, _reg_file, _reg_nr);
962 if (err == -1)
963 return 0;
964 if (_subreg_nr)
965 /* bit4 for subreg number byte addressing. Make this same meaning as
966 in da1 case, so output looks consistent. */
967 format(file, ".%d", 16 / reg_type_size[_reg_type]);
968 string(file, "<");
969 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
970 string(file, ",4,1>");
971 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
972 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
973 return err;
974 }
975
976 static int
977 src0_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
978 {
979 int err = 0;
980 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(devinfo, inst);
981
982 err |= control(file, "negate", m_negate,
983 brw_inst_3src_src0_negate(devinfo, inst), NULL);
984 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);
985
986 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
987 brw_inst_3src_src0_reg_nr(devinfo, inst));
988 if (err == -1)
989 return 0;
990 if (src0_subreg_nr || brw_inst_3src_src0_rep_ctrl(devinfo, inst))
991 format(file, ".%d", src0_subreg_nr);
992 if (brw_inst_3src_src0_rep_ctrl(devinfo, inst))
993 string(file, "<0,1,0>");
994 else {
995 string(file, "<4,4,1>");
996 err |= src_swizzle(file, brw_inst_3src_src0_swizzle(devinfo, inst));
997 }
998 err |= control(file, "src da16 reg type", three_source_reg_encoding,
999 brw_inst_3src_src_type(devinfo, inst), NULL);
1000 return err;
1001 }
1002
1003 static int
1004 src1_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1005 {
1006 int err = 0;
1007 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(devinfo, inst);
1008
1009 err |= control(file, "negate", m_negate,
1010 brw_inst_3src_src1_negate(devinfo, inst), NULL);
1011 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);
1012
1013 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
1014 brw_inst_3src_src1_reg_nr(devinfo, inst));
1015 if (err == -1)
1016 return 0;
1017 if (src1_subreg_nr || brw_inst_3src_src1_rep_ctrl(devinfo, inst))
1018 format(file, ".%d", src1_subreg_nr);
1019 if (brw_inst_3src_src1_rep_ctrl(devinfo, inst))
1020 string(file, "<0,1,0>");
1021 else {
1022 string(file, "<4,4,1>");
1023 err |= src_swizzle(file, brw_inst_3src_src1_swizzle(devinfo, inst));
1024 }
1025 err |= control(file, "src da16 reg type", three_source_reg_encoding,
1026 brw_inst_3src_src_type(devinfo, inst), NULL);
1027 return err;
1028 }
1029
1030
1031 static int
1032 src2_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1033 {
1034 int err = 0;
1035 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(devinfo, inst);
1036
1037 err |= control(file, "negate", m_negate,
1038 brw_inst_3src_src2_negate(devinfo, inst), NULL);
1039 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);
1040
1041 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
1042 brw_inst_3src_src2_reg_nr(devinfo, inst));
1043 if (err == -1)
1044 return 0;
1045 if (src2_subreg_nr || brw_inst_3src_src2_rep_ctrl(devinfo, inst))
1046 format(file, ".%d", src2_subreg_nr);
1047 if (brw_inst_3src_src2_rep_ctrl(devinfo, inst))
1048 string(file, "<0,1,0>");
1049 else {
1050 string(file, "<4,4,1>");
1051 err |= src_swizzle(file, brw_inst_3src_src2_swizzle(devinfo, inst));
1052 }
1053 err |= control(file, "src da16 reg type", three_source_reg_encoding,
1054 brw_inst_3src_src_type(devinfo, inst), NULL);
1055 return err;
1056 }
1057
1058 static int
1059 imm(FILE *file, const struct brw_device_info *devinfo, unsigned type, brw_inst *inst)
1060 {
1061 switch (type) {
1062 case BRW_HW_REG_TYPE_UD:
1063 format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
1064 break;
1065 case BRW_HW_REG_TYPE_D:
1066 format(file, "%dD", brw_inst_imm_d(devinfo, inst));
1067 break;
1068 case BRW_HW_REG_TYPE_UW:
1069 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
1070 break;
1071 case BRW_HW_REG_TYPE_W:
1072 format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
1073 break;
1074 case BRW_HW_REG_IMM_TYPE_UV:
1075 format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
1076 break;
1077 case BRW_HW_REG_IMM_TYPE_VF:
1078 format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
1079 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
1080 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
1081 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
1082 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
1083 break;
1084 case BRW_HW_REG_IMM_TYPE_V:
1085 format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
1086 break;
1087 case BRW_HW_REG_TYPE_F:
1088 format(file, "%-gF", brw_inst_imm_f(devinfo, inst));
1089 break;
1090 case GEN8_HW_REG_IMM_TYPE_DF:
1091 string(file, "Double IMM");
1092 break;
1093 case GEN8_HW_REG_IMM_TYPE_HF:
1094 string(file, "Half Float IMM");
1095 break;
1096 }
1097 return 0;
1098 }
1099
1100 static int
1101 src0(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1102 {
1103 if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1104 return imm(file, devinfo, brw_inst_src0_reg_type(devinfo, inst), inst);
1105 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1106 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1107 return src_da1(file,
1108 devinfo,
1109 brw_inst_opcode(devinfo, inst),
1110 brw_inst_src0_reg_type(devinfo, inst),
1111 brw_inst_src0_reg_file(devinfo, inst),
1112 brw_inst_src0_vstride(devinfo, inst),
1113 brw_inst_src0_width(devinfo, inst),
1114 brw_inst_src0_hstride(devinfo, inst),
1115 brw_inst_src0_da_reg_nr(devinfo, inst),
1116 brw_inst_src0_da1_subreg_nr(devinfo, inst),
1117 brw_inst_src0_abs(devinfo, inst),
1118 brw_inst_src0_negate(devinfo, inst));
1119 } else {
1120 return src_ia1(file,
1121 devinfo,
1122 brw_inst_opcode(devinfo, inst),
1123 brw_inst_src0_reg_type(devinfo, inst),
1124 brw_inst_src0_reg_file(devinfo, inst),
1125 brw_inst_src0_ia1_addr_imm(devinfo, inst),
1126 brw_inst_src0_ia_subreg_nr(devinfo, inst),
1127 brw_inst_src0_negate(devinfo, inst),
1128 brw_inst_src0_abs(devinfo, inst),
1129 brw_inst_src0_address_mode(devinfo, inst),
1130 brw_inst_src0_hstride(devinfo, inst),
1131 brw_inst_src0_width(devinfo, inst),
1132 brw_inst_src0_vstride(devinfo, inst));
1133 }
1134 } else {
1135 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1136 return src_da16(file,
1137 devinfo,
1138 brw_inst_opcode(devinfo, inst),
1139 brw_inst_src0_reg_type(devinfo, inst),
1140 brw_inst_src0_reg_file(devinfo, inst),
1141 brw_inst_src0_vstride(devinfo, inst),
1142 brw_inst_src0_da_reg_nr(devinfo, inst),
1143 brw_inst_src0_da16_subreg_nr(devinfo, inst),
1144 brw_inst_src0_abs(devinfo, inst),
1145 brw_inst_src0_negate(devinfo, inst),
1146 brw_inst_src0_da16_swiz_x(devinfo, inst),
1147 brw_inst_src0_da16_swiz_y(devinfo, inst),
1148 brw_inst_src0_da16_swiz_z(devinfo, inst),
1149 brw_inst_src0_da16_swiz_w(devinfo, inst));
1150 } else {
1151 string(file, "Indirect align16 address mode not supported");
1152 return 1;
1153 }
1154 }
1155 }
1156
1157 static int
1158 src1(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1159 {
1160 if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1161 return imm(file, devinfo, brw_inst_src1_reg_type(devinfo, inst), inst);
1162 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1163 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1164 return src_da1(file,
1165 devinfo,
1166 brw_inst_opcode(devinfo, inst),
1167 brw_inst_src1_reg_type(devinfo, inst),
1168 brw_inst_src1_reg_file(devinfo, inst),
1169 brw_inst_src1_vstride(devinfo, inst),
1170 brw_inst_src1_width(devinfo, inst),
1171 brw_inst_src1_hstride(devinfo, inst),
1172 brw_inst_src1_da_reg_nr(devinfo, inst),
1173 brw_inst_src1_da1_subreg_nr(devinfo, inst),
1174 brw_inst_src1_abs(devinfo, inst),
1175 brw_inst_src1_negate(devinfo, inst));
1176 } else {
1177 return src_ia1(file,
1178 devinfo,
1179 brw_inst_opcode(devinfo, inst),
1180 brw_inst_src1_reg_type(devinfo, inst),
1181 brw_inst_src1_reg_file(devinfo, inst),
1182 brw_inst_src1_ia1_addr_imm(devinfo, inst),
1183 brw_inst_src1_ia_subreg_nr(devinfo, inst),
1184 brw_inst_src1_negate(devinfo, inst),
1185 brw_inst_src1_abs(devinfo, inst),
1186 brw_inst_src1_address_mode(devinfo, inst),
1187 brw_inst_src1_hstride(devinfo, inst),
1188 brw_inst_src1_width(devinfo, inst),
1189 brw_inst_src1_vstride(devinfo, inst));
1190 }
1191 } else {
1192 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1193 return src_da16(file,
1194 devinfo,
1195 brw_inst_opcode(devinfo, inst),
1196 brw_inst_src1_reg_type(devinfo, inst),
1197 brw_inst_src1_reg_file(devinfo, inst),
1198 brw_inst_src1_vstride(devinfo, inst),
1199 brw_inst_src1_da_reg_nr(devinfo, inst),
1200 brw_inst_src1_da16_subreg_nr(devinfo, inst),
1201 brw_inst_src1_abs(devinfo, inst),
1202 brw_inst_src1_negate(devinfo, inst),
1203 brw_inst_src1_da16_swiz_x(devinfo, inst),
1204 brw_inst_src1_da16_swiz_y(devinfo, inst),
1205 brw_inst_src1_da16_swiz_z(devinfo, inst),
1206 brw_inst_src1_da16_swiz_w(devinfo, inst));
1207 } else {
1208 string(file, "Indirect align16 address mode not supported");
1209 return 1;
1210 }
1211 }
1212 }
1213
1214 static int
1215 qtr_ctrl(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1216 {
1217 int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
1218 int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
1219
1220 if (exec_size == 8) {
1221 switch (qtr_ctl) {
1222 case 0:
1223 string(file, " 1Q");
1224 break;
1225 case 1:
1226 string(file, " 2Q");
1227 break;
1228 case 2:
1229 string(file, " 3Q");
1230 break;
1231 case 3:
1232 string(file, " 4Q");
1233 break;
1234 }
1235 } else if (exec_size == 16) {
1236 if (qtr_ctl < 2)
1237 string(file, " 1H");
1238 else
1239 string(file, " 2H");
1240 }
1241 return 0;
1242 }
1243
1244 #ifdef DEBUG
1245 static __attribute__((__unused__)) int
1246 brw_disassemble_imm(const struct brw_device_info *devinfo,
1247 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
1248 {
1249 brw_inst inst;
1250 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);
1251 inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);
1252 return brw_disassemble_inst(stderr, devinfo, &inst, false);
1253 }
1254 #endif
1255
1256 int
1257 brw_disassemble_inst(FILE *file, const struct brw_device_info *devinfo,
1258 brw_inst *inst, bool is_compacted)
1259 {
1260 int err = 0;
1261 int space = 0;
1262
1263 const enum opcode opcode = brw_inst_opcode(devinfo, inst);
1264
1265 if (brw_inst_pred_control(devinfo, inst)) {
1266 string(file, "(");
1267 err |= control(file, "predicate inverse", pred_inv,
1268 brw_inst_pred_inv(devinfo, inst), NULL);
1269 format(file, "f%ld", devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1270 if (brw_inst_flag_subreg_nr(devinfo, inst))
1271 format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst));
1272 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1273 err |= control(file, "predicate control align1", pred_ctrl_align1,
1274 brw_inst_pred_control(devinfo, inst), NULL);
1275 } else {
1276 err |= control(file, "predicate control align16", pred_ctrl_align16,
1277 brw_inst_pred_control(devinfo, inst), NULL);
1278 }
1279 string(file, ") ");
1280 }
1281
1282 err |= print_opcode(file, opcode);
1283 err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),
1284 NULL);
1285
1286 err |= control(file, "debug control", debug_ctrl,
1287 brw_inst_debug_control(devinfo, inst), NULL);
1288
1289 if (opcode == BRW_OPCODE_MATH) {
1290 string(file, " ");
1291 err |= control(file, "function", math_function,
1292 brw_inst_math_function(devinfo, inst), NULL);
1293 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1294 err |= control(file, "conditional modifier", conditional_modifier,
1295 brw_inst_cond_modifier(devinfo, inst), NULL);
1296
1297 /* If we're using the conditional modifier, print which flags reg is
1298 * used for it. Note that on gen6+, the embedded-condition SEL and
1299 * control flow doesn't update flags.
1300 */
1301 if (brw_inst_cond_modifier(devinfo, inst) &&
1302 (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1303 opcode != BRW_OPCODE_IF &&
1304 opcode != BRW_OPCODE_WHILE))) {
1305 format(file, ".f%ld",
1306 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1307 if (brw_inst_flag_subreg_nr(devinfo, inst))
1308 format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst));
1309 }
1310 }
1311
1312 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1313 string(file, "(");
1314 err |= control(file, "execution size", exec_size,
1315 brw_inst_exec_size(devinfo, inst), NULL);
1316 string(file, ")");
1317 }
1318
1319 if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6)
1320 format(file, " %ld", brw_inst_base_mrf(devinfo, inst));
1321
1322 if (has_uip(devinfo, opcode)) {
1323 /* Instructions that have UIP also have JIP. */
1324 pad(file, 16);
1325 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1326 pad(file, 32);
1327 format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
1328 } else if (has_jip(devinfo, opcode)) {
1329 pad(file, 16);
1330 if (devinfo->gen >= 7) {
1331 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1332 } else {
1333 format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst));
1334 }
1335 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1336 opcode == BRW_OPCODE_CONTINUE ||
1337 opcode == BRW_OPCODE_ELSE)) {
1338 pad(file, 16);
1339 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1340 pad(file, 32);
1341 format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst));
1342 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
1343 opcode == BRW_OPCODE_IFF ||
1344 opcode == BRW_OPCODE_HALT)) {
1345 pad(file, 16);
1346 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1347 } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1348 pad(file, 16);
1349 format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst));
1350 } else if (opcode == BRW_OPCODE_JMPI) {
1351 pad(file, 16);
1352 err |= src1(file, devinfo, inst);
1353 } else if (opcode_descs[opcode].nsrc == 3) {
1354 pad(file, 16);
1355 err |= dest_3src(file, devinfo, inst);
1356
1357 pad(file, 32);
1358 err |= src0_3src(file, devinfo, inst);
1359
1360 pad(file, 48);
1361 err |= src1_3src(file, devinfo, inst);
1362
1363 pad(file, 64);
1364 err |= src2_3src(file, devinfo, inst);
1365 } else {
1366 if (opcode_descs[opcode].ndst > 0) {
1367 pad(file, 16);
1368 err |= dest(file, devinfo, inst);
1369 }
1370
1371 if (opcode_descs[opcode].nsrc > 0) {
1372 pad(file, 32);
1373 err |= src0(file, devinfo, inst);
1374 }
1375
1376 if (opcode_descs[opcode].nsrc > 1) {
1377 pad(file, 48);
1378 err |= src1(file, devinfo, inst);
1379 }
1380 }
1381
1382 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1383 enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
1384
1385 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1386 /* show the indirect descriptor source */
1387 pad(file, 48);
1388 err |= src1(file, devinfo, inst);
1389 }
1390
1391 newline(file);
1392 pad(file, 16);
1393 space = 0;
1394
1395 fprintf(file, " ");
1396 err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
1397 sfid, &space);
1398
1399
1400 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1401 format(file, " indirect");
1402 } else {
1403 switch (sfid) {
1404 case BRW_SFID_MATH:
1405 err |= control(file, "math function", math_function,
1406 brw_inst_math_msg_function(devinfo, inst), &space);
1407 err |= control(file, "math saturate", math_saturate,
1408 brw_inst_math_msg_saturate(devinfo, inst), &space);
1409 err |= control(file, "math signed", math_signed,
1410 brw_inst_math_msg_signed_int(devinfo, inst), &space);
1411 err |= control(file, "math scalar", math_scalar,
1412 brw_inst_math_msg_data_type(devinfo, inst), &space);
1413 err |= control(file, "math precision", math_precision,
1414 brw_inst_math_msg_precision(devinfo, inst), &space);
1415 break;
1416 case BRW_SFID_SAMPLER:
1417 if (devinfo->gen >= 5) {
1418 err |= control(file, "sampler message", gen5_sampler_msg_type,
1419 brw_inst_sampler_msg_type(devinfo, inst), &space);
1420 err |= control(file, "sampler simd mode", gen5_sampler_simd_mode,
1421 brw_inst_sampler_simd_mode(devinfo, inst), &space);
1422 format(file, " Surface = %ld Sampler = %ld",
1423 brw_inst_binding_table_index(devinfo, inst),
1424 brw_inst_sampler(devinfo, inst));
1425 } else {
1426 format(file, " (%ld, %ld, %ld, ",
1427 brw_inst_binding_table_index(devinfo, inst),
1428 brw_inst_sampler(devinfo, inst),
1429 brw_inst_sampler_msg_type(devinfo, inst));
1430 if (!devinfo->is_g4x) {
1431 err |= control(file, "sampler target format",
1432 sampler_target_format,
1433 brw_inst_sampler_return_format(devinfo, inst), NULL);
1434 }
1435 string(file, ")");
1436 }
1437 break;
1438 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1439 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1440 if (devinfo->gen >= 6) {
1441 format(file, " (%ld, %ld, %ld, %ld)",
1442 brw_inst_binding_table_index(devinfo, inst),
1443 brw_inst_dp_msg_control(devinfo, inst),
1444 brw_inst_dp_msg_type(devinfo, inst),
1445 devinfo->gen >= 7 ? 0 : brw_inst_dp_write_commit(devinfo, inst));
1446 } else {
1447 format(file, " (%ld, %ld, %ld)",
1448 brw_inst_binding_table_index(devinfo, inst),
1449 brw_inst_dp_read_msg_control(devinfo, inst),
1450 brw_inst_dp_read_msg_type(devinfo, inst));
1451 }
1452 break;
1453
1454 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1455 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1456 unsigned msg_type = brw_inst_dp_write_msg_type(devinfo, inst);
1457
1458 err |= control(file, "DP rc message type",
1459 devinfo->gen >= 6 ? dp_rc_msg_type_gen6
1460 : dp_write_port_msg_type,
1461 msg_type, &space);
1462
1463 bool is_rt_write = msg_type ==
1464 (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1465 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1466
1467 if (is_rt_write) {
1468 err |= control(file, "RT message type", m_rt_write_subtype,
1469 brw_inst_rt_message_type(devinfo, inst), &space);
1470 if (devinfo->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst))
1471 string(file, " Hi");
1472 if (brw_inst_rt_last(devinfo, inst))
1473 string(file, " LastRT");
1474 if (devinfo->gen < 7 && brw_inst_dp_write_commit(devinfo, inst))
1475 string(file, " WriteCommit");
1476 } else {
1477 format(file, " MsgCtrl = 0x%lx",
1478 brw_inst_dp_write_msg_control(devinfo, inst));
1479 }
1480
1481 format(file, " Surface = %ld", brw_inst_binding_table_index(devinfo, inst));
1482 break;
1483 }
1484
1485 case BRW_SFID_URB:
1486 format(file, " %ld", brw_inst_urb_global_offset(devinfo, inst));
1487
1488 space = 1;
1489 if (devinfo->gen >= 7) {
1490 err |= control(file, "urb opcode", gen7_urb_opcode,
1491 brw_inst_urb_opcode(devinfo, inst), &space);
1492 } else if (devinfo->gen >= 5) {
1493 err |= control(file, "urb opcode", gen5_urb_opcode,
1494 brw_inst_urb_opcode(devinfo, inst), &space);
1495 }
1496 err |= control(file, "urb swizzle", urb_swizzle,
1497 brw_inst_urb_swizzle_control(devinfo, inst), &space);
1498 if (devinfo->gen < 7) {
1499 err |= control(file, "urb allocate", urb_allocate,
1500 brw_inst_urb_allocate(devinfo, inst), &space);
1501 err |= control(file, "urb used", urb_used,
1502 brw_inst_urb_used(devinfo, inst), &space);
1503 }
1504 if (devinfo->gen < 8) {
1505 err |= control(file, "urb complete", urb_complete,
1506 brw_inst_urb_complete(devinfo, inst), &space);
1507 }
1508 break;
1509 case BRW_SFID_THREAD_SPAWNER:
1510 break;
1511
1512 case BRW_SFID_MESSAGE_GATEWAY:
1513 format(file, " (%s)",
1514 gen7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]);
1515 break;
1516
1517 case GEN7_SFID_DATAPORT_DATA_CACHE:
1518 if (devinfo->gen >= 7) {
1519 format(file, " (");
1520
1521 err |= control(file, "DP DC0 message type",
1522 dp_dc0_msg_type_gen7,
1523 brw_inst_dp_msg_type(devinfo, inst), &space);
1524
1525 format(file, ", %ld, ", brw_inst_binding_table_index(devinfo, inst));
1526
1527 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1528 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1529 control(file, "atomic op", aop,
1530 brw_inst_imm_ud(devinfo, inst) >> 8 & 0xf, &space);
1531 break;
1532 default:
1533 format(file, "%ld", brw_inst_dp_msg_control(devinfo, inst));
1534 }
1535 format(file, ")");
1536 break;
1537 }
1538 /* FALLTHROUGH */
1539
1540 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1541 if (devinfo->gen >= 7) {
1542 format(file, " (");
1543
1544 unsigned msg_ctrl = brw_inst_dp_msg_control(devinfo, inst);
1545
1546 err |= control(file, "DP DC1 message type",
1547 dp_dc1_msg_type_hsw,
1548 brw_inst_dp_msg_type(devinfo, inst), &space);
1549
1550 format(file, ", Surface = %ld, ",
1551 brw_inst_binding_table_index(devinfo, inst));
1552
1553 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1554 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1555 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1556 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1557 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1558 /* fallthrough */
1559 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1560 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1561 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1562 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1563 break;
1564 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1565 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1566 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1567 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1568 static const char *simd_modes[] = { "4x2", "16", "8" };
1569 format(file, "SIMD%s, Mask = 0x%x",
1570 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1571 break;
1572 }
1573 default:
1574 format(file, "0x%x", msg_ctrl);
1575 }
1576 format(file, ")");
1577 break;
1578 }
1579 /* FALLTHROUGH */
1580 }
1581
1582 case GEN7_SFID_PIXEL_INTERPOLATOR:
1583 if (devinfo->gen >= 7) {
1584 format(file, " (%s, %s, 0x%02lx)",
1585 brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",
1586 pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],
1587 brw_inst_pi_message_data(devinfo, inst));
1588 break;
1589 }
1590 /* FALLTHROUGH */
1591
1592 default:
1593 format(file, "unsupported shared function ID %d", sfid);
1594 break;
1595 }
1596
1597 if (space)
1598 string(file, " ");
1599 format(file, "mlen %ld", brw_inst_mlen(devinfo, inst));
1600 format(file, " rlen %ld", brw_inst_rlen(devinfo, inst));
1601 }
1602 }
1603 pad(file, 64);
1604 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1605 string(file, "{");
1606 space = 1;
1607 err |= control(file, "access mode", access_mode,
1608 brw_inst_access_mode(devinfo, inst), &space);
1609 if (devinfo->gen >= 6) {
1610 err |= control(file, "write enable control", wectrl,
1611 brw_inst_mask_control(devinfo, inst), &space);
1612 } else {
1613 err |= control(file, "mask control", mask_ctrl,
1614 brw_inst_mask_control(devinfo, inst), &space);
1615 }
1616 err |= control(file, "dependency control", dep_ctrl,
1617 ((brw_inst_no_dd_check(devinfo, inst) << 1) |
1618 brw_inst_no_dd_clear(devinfo, inst)), &space);
1619
1620 if (devinfo->gen >= 6)
1621 err |= qtr_ctrl(file, devinfo, inst);
1622 else {
1623 if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&
1624 opcode_descs[opcode].ndst > 0 &&
1625 brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&
1626 brw_inst_dst_da_reg_nr(devinfo, inst) & (1 << 7)) {
1627 format(file, " compr4");
1628 } else {
1629 err |= control(file, "compression control", compr_ctrl,
1630 brw_inst_qtr_control(devinfo, inst), &space);
1631 }
1632 }
1633
1634 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1635 err |= control(file, "thread control", thread_ctrl,
1636 brw_inst_thread_control(devinfo, inst), &space);
1637 if (has_branch_ctrl(devinfo, opcode)) {
1638 err |= control(file, "branch ctrl", branch_ctrl,
1639 brw_inst_branch_control(devinfo, inst), &space);
1640 } else if (devinfo->gen >= 6) {
1641 err |= control(file, "acc write control", accwr,
1642 brw_inst_acc_wr_control(devinfo, inst), &space);
1643 }
1644 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1645 err |= control(file, "end of thread", end_of_thread,
1646 brw_inst_eot(devinfo, inst), &space);
1647 if (space)
1648 string(file, " ");
1649 string(file, "}");
1650 }
1651 string(file, ";");
1652 newline(file);
1653 return err;
1654 }