2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
30 #include "main/mtypes.h"
32 #include "brw_context.h"
33 #include "brw_defines.h"
40 [BRW_OPCODE_MOV
] = { .name
= "mov", .nsrc
= 1, .ndst
= 1 },
41 [BRW_OPCODE_FRC
] = { .name
= "frc", .nsrc
= 1, .ndst
= 1 },
42 [BRW_OPCODE_RNDU
] = { .name
= "rndu", .nsrc
= 1, .ndst
= 1 },
43 [BRW_OPCODE_RNDD
] = { .name
= "rndd", .nsrc
= 1, .ndst
= 1 },
44 [BRW_OPCODE_RNDE
] = { .name
= "rnde", .nsrc
= 1, .ndst
= 1 },
45 [BRW_OPCODE_RNDZ
] = { .name
= "rndz", .nsrc
= 1, .ndst
= 1 },
46 [BRW_OPCODE_NOT
] = { .name
= "not", .nsrc
= 1, .ndst
= 1 },
47 [BRW_OPCODE_LZD
] = { .name
= "lzd", .nsrc
= 1, .ndst
= 1 },
49 [BRW_OPCODE_MUL
] = { .name
= "mul", .nsrc
= 2, .ndst
= 1 },
50 [BRW_OPCODE_MAC
] = { .name
= "mac", .nsrc
= 2, .ndst
= 1 },
51 [BRW_OPCODE_MACH
] = { .name
= "mach", .nsrc
= 2, .ndst
= 1 },
52 [BRW_OPCODE_LINE
] = { .name
= "line", .nsrc
= 2, .ndst
= 1 },
53 [BRW_OPCODE_PLN
] = { .name
= "pln", .nsrc
= 2, .ndst
= 1 },
54 [BRW_OPCODE_SAD2
] = { .name
= "sad2", .nsrc
= 2, .ndst
= 1 },
55 [BRW_OPCODE_SADA2
] = { .name
= "sada2", .nsrc
= 2, .ndst
= 1 },
56 [BRW_OPCODE_DP4
] = { .name
= "dp4", .nsrc
= 2, .ndst
= 1 },
57 [BRW_OPCODE_DPH
] = { .name
= "dph", .nsrc
= 2, .ndst
= 1 },
58 [BRW_OPCODE_DP3
] = { .name
= "dp3", .nsrc
= 2, .ndst
= 1 },
59 [BRW_OPCODE_DP2
] = { .name
= "dp2", .nsrc
= 2, .ndst
= 1 },
60 [BRW_OPCODE_MATH
] = { .name
= "math", .nsrc
= 2, .ndst
= 1 },
62 [BRW_OPCODE_AVG
] = { .name
= "avg", .nsrc
= 2, .ndst
= 1 },
63 [BRW_OPCODE_ADD
] = { .name
= "add", .nsrc
= 2, .ndst
= 1 },
64 [BRW_OPCODE_SEL
] = { .name
= "sel", .nsrc
= 2, .ndst
= 1 },
65 [BRW_OPCODE_AND
] = { .name
= "and", .nsrc
= 2, .ndst
= 1 },
66 [BRW_OPCODE_OR
] = { .name
= "or", .nsrc
= 2, .ndst
= 1 },
67 [BRW_OPCODE_XOR
] = { .name
= "xor", .nsrc
= 2, .ndst
= 1 },
68 [BRW_OPCODE_SHR
] = { .name
= "shr", .nsrc
= 2, .ndst
= 1 },
69 [BRW_OPCODE_SHL
] = { .name
= "shl", .nsrc
= 2, .ndst
= 1 },
70 [BRW_OPCODE_ASR
] = { .name
= "asr", .nsrc
= 2, .ndst
= 1 },
71 [BRW_OPCODE_CMP
] = { .name
= "cmp", .nsrc
= 2, .ndst
= 1 },
72 [BRW_OPCODE_CMPN
] = { .name
= "cmpn", .nsrc
= 2, .ndst
= 1 },
74 [BRW_OPCODE_SEND
] = { .name
= "send", .nsrc
= 1, .ndst
= 1 },
75 [BRW_OPCODE_NOP
] = { .name
= "nop", .nsrc
= 0, .ndst
= 0 },
76 [BRW_OPCODE_JMPI
] = { .name
= "jmpi", .nsrc
= 1, .ndst
= 0 },
77 [BRW_OPCODE_IF
] = { .name
= "if", .nsrc
= 2, .ndst
= 0 },
78 [BRW_OPCODE_IFF
] = { .name
= "iff", .nsrc
= 2, .ndst
= 1 },
79 [BRW_OPCODE_WHILE
] = { .name
= "while", .nsrc
= 2, .ndst
= 0 },
80 [BRW_OPCODE_ELSE
] = { .name
= "else", .nsrc
= 2, .ndst
= 0 },
81 [BRW_OPCODE_BREAK
] = { .name
= "break", .nsrc
= 2, .ndst
= 0 },
82 [BRW_OPCODE_CONTINUE
] = { .name
= "cont", .nsrc
= 1, .ndst
= 0 },
83 [BRW_OPCODE_HALT
] = { .name
= "halt", .nsrc
= 1, .ndst
= 0 },
84 [BRW_OPCODE_MSAVE
] = { .name
= "msave", .nsrc
= 1, .ndst
= 1 },
85 [BRW_OPCODE_PUSH
] = { .name
= "push", .nsrc
= 1, .ndst
= 1 },
86 [BRW_OPCODE_MRESTORE
] = { .name
= "mrest", .nsrc
= 1, .ndst
= 1 },
87 [BRW_OPCODE_POP
] = { .name
= "pop", .nsrc
= 2, .ndst
= 0 },
88 [BRW_OPCODE_WAIT
] = { .name
= "wait", .nsrc
= 1, .ndst
= 0 },
89 [BRW_OPCODE_DO
] = { .name
= "do", .nsrc
= 0, .ndst
= 0 },
90 [BRW_OPCODE_ENDIF
] = { .name
= "endif", .nsrc
= 2, .ndst
= 0 },
93 char *conditional_modifier
[16] = {
94 [BRW_CONDITIONAL_NONE
] = "",
95 [BRW_CONDITIONAL_Z
] = ".e",
96 [BRW_CONDITIONAL_NZ
] = ".ne",
97 [BRW_CONDITIONAL_G
] = ".g",
98 [BRW_CONDITIONAL_GE
] = ".ge",
99 [BRW_CONDITIONAL_L
] = ".l",
100 [BRW_CONDITIONAL_LE
] = ".le",
101 [BRW_CONDITIONAL_R
] = ".r",
102 [BRW_CONDITIONAL_O
] = ".o",
103 [BRW_CONDITIONAL_U
] = ".u",
116 char *vert_stride
[16] = {
135 char *horiz_stride
[4] = {
142 char *chan_sel
[4] = {
149 char *dest_condmod
[16] = {
152 char *debug_ctrl
[2] = {
157 char *saturate
[2] = {
162 char *exec_size
[8] = {
171 char *pred_inv
[2] = {
176 char *pred_ctrl_align16
[16] = {
186 char *pred_ctrl_align1
[16] = {
200 char *thread_ctrl
[4] = {
205 char *compr_ctrl
[4] = {
211 char *dep_ctrl
[4] = {
215 [3] = "NoDDClr,NoDDChk",
218 char *mask_ctrl
[4] = {
223 char *access_mode
[2] = {
228 char *reg_encoding
[8] = {
238 char *imm_encoding
[8] = {
248 char *reg_file
[4] = {
255 char *writemask
[16] = {
274 char *end_of_thread
[2] = {
279 char *target_function
[16] = {
280 [BRW_MESSAGE_TARGET_NULL
] = "null",
281 [BRW_MESSAGE_TARGET_MATH
] = "math",
282 [BRW_MESSAGE_TARGET_SAMPLER
] = "sampler",
283 [BRW_MESSAGE_TARGET_GATEWAY
] = "gateway",
284 [BRW_MESSAGE_TARGET_DATAPORT_READ
] = "read",
285 [BRW_MESSAGE_TARGET_DATAPORT_WRITE
] = "write",
286 [BRW_MESSAGE_TARGET_URB
] = "urb",
287 [BRW_MESSAGE_TARGET_THREAD_SPAWNER
] = "thread_spawner"
290 char *math_function
[16] = {
291 [BRW_MATH_FUNCTION_INV
] = "inv",
292 [BRW_MATH_FUNCTION_LOG
] = "log",
293 [BRW_MATH_FUNCTION_EXP
] = "exp",
294 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
295 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
296 [BRW_MATH_FUNCTION_SIN
] = "sin",
297 [BRW_MATH_FUNCTION_COS
] = "cos",
298 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
299 [BRW_MATH_FUNCTION_TAN
] = "tan",
300 [BRW_MATH_FUNCTION_POW
] = "pow",
301 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
302 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intmod",
303 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intdiv",
306 char *math_saturate
[2] = {
311 char *math_signed
[2] = {
316 char *math_scalar
[2] = {
321 char *math_precision
[2] = {
323 [1] = "partial_precision"
326 char *urb_opcode
[2] = {
331 char *urb_swizzle
[4] = {
332 [BRW_URB_SWIZZLE_NONE
] = "",
333 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
334 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
337 char *urb_allocate
[2] = {
342 char *urb_used
[2] = {
347 char *urb_complete
[2] = {
352 char *sampler_target_format
[4] = {
361 static int string (FILE *file
, char *string
)
363 fputs (string
, file
);
364 column
+= strlen (string
);
368 static int format (FILE *f
, char *format
, ...)
372 va_start (args
, format
);
374 vsnprintf (buf
, sizeof (buf
) - 1, format
, args
);
380 static int newline (FILE *f
)
387 static int pad (FILE *f
, int c
)
395 static int control (FILE *file
, char *name
, char *ctrl
[], GLuint id
, int *space
)
398 fprintf (file
, "*** invalid %s value %d ",
406 string (file
, ctrl
[id
]);
413 static int print_opcode (FILE *file
, int id
)
415 if (!opcode
[id
].name
) {
416 format (file
, "*** invalid opcode value %d ", id
);
419 string (file
, opcode
[id
].name
);
423 static int reg (FILE *file
, GLuint _reg_file
, GLuint _reg_nr
)
426 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
427 switch (_reg_nr
& 0xf0) {
429 string (file
, "null");
431 case BRW_ARF_ADDRESS
:
432 format (file
, "a%d", _reg_nr
& 0x0f);
434 case BRW_ARF_ACCUMULATOR
:
435 format (file
, "acc%d", _reg_nr
& 0x0f);
438 format (file
, "mask%d", _reg_nr
& 0x0f);
440 case BRW_ARF_MASK_STACK
:
441 format (file
, "msd%d", _reg_nr
& 0x0f);
444 format (file
, "sr%d", _reg_nr
& 0x0f);
446 case BRW_ARF_CONTROL
:
447 format (file
, "cr%d", _reg_nr
& 0x0f);
449 case BRW_ARF_NOTIFICATION_COUNT
:
450 format (file
, "n%d", _reg_nr
& 0x0f);
457 format (file
, "ARF%d", _reg_nr
);
461 err
|= control (file
, "src reg file", reg_file
, _reg_file
, NULL
);
462 format (file
, "%d", _reg_nr
);
467 static int dest (FILE *file
, struct brw_instruction
*inst
)
471 if (inst
->header
.access_mode
== BRW_ALIGN_1
)
473 if (inst
->bits1
.da1
.dest_address_mode
== BRW_ADDRESS_DIRECT
)
475 err
|= reg (file
, inst
->bits1
.da1
.dest_reg_file
, inst
->bits1
.da1
.dest_reg_nr
);
478 if (inst
->bits1
.da1
.dest_subreg_nr
)
479 format (file
, ".%d", inst
->bits1
.da1
.dest_subreg_nr
);
480 format (file
, "<%d>", inst
->bits1
.da1
.dest_horiz_stride
);
481 err
|= control (file
, "dest reg encoding", reg_encoding
, inst
->bits1
.da1
.dest_reg_type
, NULL
);
485 string (file
, "g[a0");
486 if (inst
->bits1
.ia1
.dest_subreg_nr
)
487 format (file
, ".%d", inst
->bits1
.ia1
.dest_subreg_nr
);
488 if (inst
->bits1
.ia1
.dest_indirect_offset
)
489 format (file
, " %d", inst
->bits1
.ia1
.dest_indirect_offset
);
491 format (file
, "<%d>", inst
->bits1
.ia1
.dest_horiz_stride
);
492 err
|= control (file
, "dest reg encoding", reg_encoding
, inst
->bits1
.ia1
.dest_reg_type
, NULL
);
497 if (inst
->bits1
.da16
.dest_address_mode
== BRW_ADDRESS_DIRECT
)
499 err
|= reg (file
, inst
->bits1
.da16
.dest_reg_file
, inst
->bits1
.da16
.dest_reg_nr
);
502 if (inst
->bits1
.da16
.dest_subreg_nr
)
503 format (file
, ".%d", inst
->bits1
.da16
.dest_subreg_nr
);
504 string (file
, "<1>");
505 err
|= control (file
, "writemask", writemask
, inst
->bits1
.da16
.dest_writemask
, NULL
);
506 err
|= control (file
, "dest reg encoding", reg_encoding
, inst
->bits1
.da16
.dest_reg_type
, NULL
);
511 string (file
, "Indirect align16 address mode not supported");
518 static int src_align1_region (FILE *file
,
519 GLuint _vert_stride
, GLuint _width
, GLuint _horiz_stride
)
523 err
|= control (file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
525 err
|= control (file
, "width", width
, _width
, NULL
);
527 err
|= control (file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
532 static int src_da1 (FILE *file
, GLuint type
, GLuint _reg_file
,
533 GLuint _vert_stride
, GLuint _width
, GLuint _horiz_stride
,
534 GLuint reg_num
, GLuint sub_reg_num
, GLuint __abs
, GLuint _negate
)
537 err
|= control (file
, "negate", negate
, _negate
, NULL
);
538 err
|= control (file
, "abs", _abs
, __abs
, NULL
);
540 err
|= reg (file
, _reg_file
, reg_num
);
544 format (file
, ".%d", sub_reg_num
);
545 src_align1_region (file
, _vert_stride
, _width
, _horiz_stride
);
546 err
|= control (file
, "src reg encoding", reg_encoding
, type
, NULL
);
550 static int src_ia1 (FILE *file
,
554 GLuint _addr_subreg_nr
,
558 GLuint _horiz_stride
,
563 err
|= control (file
, "negate", negate
, _negate
, NULL
);
564 err
|= control (file
, "abs", _abs
, __abs
, NULL
);
566 string (file
, "g[a0");
568 format (file
, ".%d", _addr_subreg_nr
);
570 format (file
, " %d", _addr_imm
);
572 src_align1_region (file
, _vert_stride
, _width
, _horiz_stride
);
573 err
|= control (file
, "src reg encoding", reg_encoding
, type
, NULL
);
577 static int src_da16 (FILE *file
,
591 err
|= control (file
, "negate", negate
, _negate
, NULL
);
592 err
|= control (file
, "abs", _abs
, __abs
, NULL
);
594 err
|= reg (file
, _reg_file
, _reg_nr
);
598 format (file
, ".%d", _subreg_nr
);
600 err
|= control (file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
601 string (file
, ",1,1>");
602 err
|= control (file
, "src da16 reg type", reg_encoding
, _reg_type
, NULL
);
604 * Three kinds of swizzle display:
605 * identity - nothing printed
606 * 1->all - print the single channel
607 * 1->1 - print the mapping
609 if (swz_x
== BRW_CHANNEL_X
&&
610 swz_y
== BRW_CHANNEL_Y
&&
611 swz_z
== BRW_CHANNEL_Z
&&
612 swz_w
== BRW_CHANNEL_W
)
616 else if (swz_x
== swz_y
&& swz_x
== swz_z
&& swz_x
== swz_w
)
619 err
|= control (file
, "channel select", chan_sel
, swz_x
, NULL
);
624 err
|= control (file
, "channel select", chan_sel
, swz_x
, NULL
);
625 err
|= control (file
, "channel select", chan_sel
, swz_y
, NULL
);
626 err
|= control (file
, "channel select", chan_sel
, swz_z
, NULL
);
627 err
|= control (file
, "channel select", chan_sel
, swz_w
, NULL
);
633 static int imm (FILE *file
, GLuint type
, struct brw_instruction
*inst
) {
635 case BRW_REGISTER_TYPE_UD
:
636 format (file
, "0x%08xUD", inst
->bits3
.ud
);
638 case BRW_REGISTER_TYPE_D
:
639 format (file
, "%dD", inst
->bits3
.d
);
641 case BRW_REGISTER_TYPE_UW
:
642 format (file
, "0x%04xUW", (uint16_t) inst
->bits3
.ud
);
644 case BRW_REGISTER_TYPE_W
:
645 format (file
, "%dW", (int16_t) inst
->bits3
.d
);
647 case BRW_REGISTER_TYPE_UB
:
648 format (file
, "0x%02xUB", (int8_t) inst
->bits3
.ud
);
650 case BRW_REGISTER_TYPE_VF
:
651 format (file
, "Vector Float");
653 case BRW_REGISTER_TYPE_V
:
654 format (file
, "0x%08xV", inst
->bits3
.ud
);
656 case BRW_REGISTER_TYPE_F
:
657 format (file
, "%-gF", inst
->bits3
.f
);
662 static int src0 (FILE *file
, struct brw_instruction
*inst
)
664 if (inst
->bits1
.da1
.src0_reg_file
== BRW_IMMEDIATE_VALUE
)
665 return imm (file
, inst
->bits1
.da1
.src0_reg_type
,
667 else if (inst
->header
.access_mode
== BRW_ALIGN_1
)
669 if (inst
->bits2
.da1
.src0_address_mode
== BRW_ADDRESS_DIRECT
)
671 return src_da1 (file
,
672 inst
->bits1
.da1
.src0_reg_type
,
673 inst
->bits1
.da1
.src0_reg_file
,
674 inst
->bits2
.da1
.src0_vert_stride
,
675 inst
->bits2
.da1
.src0_width
,
676 inst
->bits2
.da1
.src0_horiz_stride
,
677 inst
->bits2
.da1
.src0_reg_nr
,
678 inst
->bits2
.da1
.src0_subreg_nr
,
679 inst
->bits2
.da1
.src0_abs
,
680 inst
->bits2
.da1
.src0_negate
);
684 return src_ia1 (file
,
685 inst
->bits1
.ia1
.src0_reg_type
,
686 inst
->bits1
.ia1
.src0_reg_file
,
687 inst
->bits2
.ia1
.src0_indirect_offset
,
688 inst
->bits2
.ia1
.src0_subreg_nr
,
689 inst
->bits2
.ia1
.src0_negate
,
690 inst
->bits2
.ia1
.src0_abs
,
691 inst
->bits2
.ia1
.src0_address_mode
,
692 inst
->bits2
.ia1
.src0_horiz_stride
,
693 inst
->bits2
.ia1
.src0_width
,
694 inst
->bits2
.ia1
.src0_vert_stride
);
699 if (inst
->bits2
.da16
.src0_address_mode
== BRW_ADDRESS_DIRECT
)
701 return src_da16 (file
,
702 inst
->bits1
.da16
.src0_reg_type
,
703 inst
->bits1
.da16
.src0_reg_file
,
704 inst
->bits2
.da16
.src0_vert_stride
,
705 inst
->bits2
.da16
.src0_reg_nr
,
706 inst
->bits2
.da16
.src0_subreg_nr
,
707 inst
->bits2
.da16
.src0_abs
,
708 inst
->bits2
.da16
.src0_negate
,
709 inst
->bits2
.da16
.src0_swz_x
,
710 inst
->bits2
.da16
.src0_swz_y
,
711 inst
->bits2
.da16
.src0_swz_z
,
712 inst
->bits2
.da16
.src0_swz_w
);
716 string (file
, "Indirect align16 address mode not supported");
722 static int src1 (FILE *file
, struct brw_instruction
*inst
)
724 if (inst
->bits1
.da1
.src1_reg_file
== BRW_IMMEDIATE_VALUE
)
725 return imm (file
, inst
->bits1
.da1
.src1_reg_type
,
727 else if (inst
->header
.access_mode
== BRW_ALIGN_1
)
729 if (inst
->bits3
.da1
.src1_address_mode
== BRW_ADDRESS_DIRECT
)
731 return src_da1 (file
,
732 inst
->bits1
.da1
.src1_reg_type
,
733 inst
->bits1
.da1
.src1_reg_file
,
734 inst
->bits3
.da1
.src1_vert_stride
,
735 inst
->bits3
.da1
.src1_width
,
736 inst
->bits3
.da1
.src1_horiz_stride
,
737 inst
->bits3
.da1
.src1_reg_nr
,
738 inst
->bits3
.da1
.src1_subreg_nr
,
739 inst
->bits3
.da1
.src1_abs
,
740 inst
->bits3
.da1
.src1_negate
);
744 return src_ia1 (file
,
745 inst
->bits1
.ia1
.src1_reg_type
,
746 inst
->bits1
.ia1
.src1_reg_file
,
747 inst
->bits3
.ia1
.src1_indirect_offset
,
748 inst
->bits3
.ia1
.src1_subreg_nr
,
749 inst
->bits3
.ia1
.src1_negate
,
750 inst
->bits3
.ia1
.src1_abs
,
751 inst
->bits3
.ia1
.src1_address_mode
,
752 inst
->bits3
.ia1
.src1_horiz_stride
,
753 inst
->bits3
.ia1
.src1_width
,
754 inst
->bits3
.ia1
.src1_vert_stride
);
759 if (inst
->bits3
.da16
.src1_address_mode
== BRW_ADDRESS_DIRECT
)
761 return src_da16 (file
,
762 inst
->bits1
.da16
.src1_reg_type
,
763 inst
->bits1
.da16
.src1_reg_file
,
764 inst
->bits3
.da16
.src1_vert_stride
,
765 inst
->bits3
.da16
.src1_reg_nr
,
766 inst
->bits3
.da16
.src1_subreg_nr
,
767 inst
->bits3
.da16
.src1_abs
,
768 inst
->bits3
.da16
.src1_negate
,
769 inst
->bits3
.da16
.src1_swz_x
,
770 inst
->bits3
.da16
.src1_swz_y
,
771 inst
->bits3
.da16
.src1_swz_z
,
772 inst
->bits3
.da16
.src1_swz_w
);
776 string (file
, "Indirect align16 address mode not supported");
782 int brw_disasm (FILE *file
, struct brw_instruction
*inst
, int gen
)
787 if (inst
->header
.predicate_control
) {
789 err
|= control (file
, "predicate inverse", pred_inv
, inst
->header
.predicate_inverse
, NULL
);
791 if (inst
->bits2
.da1
.flag_reg_nr
)
792 format (file
, ".%d", inst
->bits2
.da1
.flag_reg_nr
);
793 if (inst
->header
.access_mode
== BRW_ALIGN_1
)
794 err
|= control (file
, "predicate control align1", pred_ctrl_align1
,
795 inst
->header
.predicate_control
, NULL
);
797 err
|= control (file
, "predicate control align16", pred_ctrl_align16
,
798 inst
->header
.predicate_control
, NULL
);
802 err
|= print_opcode (file
, inst
->header
.opcode
);
803 err
|= control (file
, "saturate", saturate
, inst
->header
.saturate
, NULL
);
804 err
|= control (file
, "debug control", debug_ctrl
, inst
->header
.debug_control
, NULL
);
806 if (inst
->header
.opcode
== BRW_OPCODE_MATH
) {
808 err
|= control (file
, "function", math_function
,
809 inst
->header
.destreg__conditionalmod
, NULL
);
810 } else if (inst
->header
.opcode
!= BRW_OPCODE_SEND
)
811 err
|= control (file
, "conditional modifier", conditional_modifier
,
812 inst
->header
.destreg__conditionalmod
, NULL
);
814 if (inst
->header
.opcode
!= BRW_OPCODE_NOP
) {
816 err
|= control (file
, "execution size", exec_size
, inst
->header
.execution_size
, NULL
);
820 if (inst
->header
.opcode
== BRW_OPCODE_SEND
)
821 format (file
, " %d", inst
->header
.destreg__conditionalmod
);
823 if (opcode
[inst
->header
.opcode
].ndst
> 0) {
825 err
|= dest (file
, inst
);
827 if (opcode
[inst
->header
.opcode
].nsrc
> 0) {
829 err
|= src0 (file
, inst
);
831 if (opcode
[inst
->header
.opcode
].nsrc
> 1) {
833 err
|= src1 (file
, inst
);
836 if (inst
->header
.opcode
== BRW_OPCODE_SEND
) {
840 target
= inst
->header
.destreg__conditionalmod
;
842 target
= inst
->bits2
.send_gen5
.sfid
;
844 target
= inst
->bits3
.generic
.msg_target
;
849 err
|= control (file
, "target function", target_function
,
853 case BRW_MESSAGE_TARGET_MATH
:
854 err
|= control (file
, "math function", math_function
,
855 inst
->bits3
.math
.function
, &space
);
856 err
|= control (file
, "math saturate", math_saturate
,
857 inst
->bits3
.math
.saturate
, &space
);
858 err
|= control (file
, "math signed", math_signed
,
859 inst
->bits3
.math
.int_type
, &space
);
860 err
|= control (file
, "math scalar", math_scalar
,
861 inst
->bits3
.math
.data_type
, &space
);
862 err
|= control (file
, "math precision", math_precision
,
863 inst
->bits3
.math
.precision
, &space
);
865 case BRW_MESSAGE_TARGET_SAMPLER
:
866 format (file
, " (%d, %d, ",
867 inst
->bits3
.sampler
.binding_table_index
,
868 inst
->bits3
.sampler
.sampler
);
869 err
|= control (file
, "sampler target format", sampler_target_format
,
870 inst
->bits3
.sampler
.return_format
, NULL
);
873 case BRW_MESSAGE_TARGET_DATAPORT_WRITE
:
875 format (file
, " (%d, %d, %d, %d, %d, %d)",
876 inst
->bits3
.dp_render_cache
.binding_table_index
,
877 inst
->bits3
.dp_render_cache
.msg_control
,
878 inst
->bits3
.dp_render_cache
.msg_type
,
879 inst
->bits3
.dp_render_cache
.send_commit_msg
,
880 inst
->bits3
.dp_render_cache
.msg_length
,
881 inst
->bits3
.dp_render_cache
.response_length
);
883 format (file
, " (%d, %d, %d, %d)",
884 inst
->bits3
.dp_write
.binding_table_index
,
885 (inst
->bits3
.dp_write
.pixel_scoreboard_clear
<< 3) |
886 inst
->bits3
.dp_write
.msg_control
,
887 inst
->bits3
.dp_write
.msg_type
,
888 inst
->bits3
.dp_write
.send_commit_msg
);
891 case BRW_MESSAGE_TARGET_URB
:
893 format (file
, " %d", inst
->bits3
.urb_gen5
.offset
);
895 format (file
, " %d", inst
->bits3
.urb
.offset
);
900 err
|= control (file
, "urb opcode", urb_opcode
,
901 inst
->bits3
.urb_gen5
.opcode
, &space
);
903 err
|= control (file
, "urb swizzle", urb_swizzle
,
904 inst
->bits3
.urb
.swizzle_control
, &space
);
905 err
|= control (file
, "urb allocate", urb_allocate
,
906 inst
->bits3
.urb
.allocate
, &space
);
907 err
|= control (file
, "urb used", urb_used
,
908 inst
->bits3
.urb
.used
, &space
);
909 err
|= control (file
, "urb complete", urb_complete
,
910 inst
->bits3
.urb
.complete
, &space
);
912 case BRW_MESSAGE_TARGET_THREAD_SPAWNER
:
915 format (file
, "unsupported target %d", inst
->bits3
.generic
.msg_target
);
921 format (file
, "mlen %d",
922 inst
->bits3
.generic_gen5
.msg_length
);
923 format (file
, " rlen %d",
924 inst
->bits3
.generic_gen5
.response_length
);
926 format (file
, "mlen %d",
927 inst
->bits3
.generic
.msg_length
);
928 format (file
, " rlen %d",
929 inst
->bits3
.generic
.response_length
);
933 if (inst
->header
.opcode
!= BRW_OPCODE_NOP
) {
936 err
|= control(file
, "access mode", access_mode
, inst
->header
.access_mode
, &space
);
937 err
|= control (file
, "mask control", mask_ctrl
, inst
->header
.mask_control
, &space
);
938 err
|= control (file
, "dependency control", dep_ctrl
, inst
->header
.dependency_control
, &space
);
939 err
|= control (file
, "compression control", compr_ctrl
, inst
->header
.compression_control
, &space
);
940 err
|= control (file
, "thread control", thread_ctrl
, inst
->header
.thread_control
, &space
);
941 if (inst
->header
.opcode
== BRW_OPCODE_SEND
)
942 err
|= control (file
, "end of thread", end_of_thread
,
943 inst
->bits3
.generic
.end_of_thread
, &space
);