i965: Add HiZ operation state to brw_context
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "main/mtypes.h"
31
32 #include "brw_context.h"
33 #include "brw_defines.h"
34
35 struct {
36 char *name;
37 int nsrc;
38 int ndst;
39 } opcode[128] = {
40 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
48
49 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
50 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
51 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
57 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
58 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
61
62 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
65 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
66 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
73
74 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
75 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
76 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
77 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 1, .ndst = 0 },
78 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
79 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
80 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
81 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
82 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
83 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
84 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
85 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
86 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
87 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
88 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
89 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
90 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
91 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
92 };
93
94 char *conditional_modifier[16] = {
95 [BRW_CONDITIONAL_NONE] = "",
96 [BRW_CONDITIONAL_Z] = ".e",
97 [BRW_CONDITIONAL_NZ] = ".ne",
98 [BRW_CONDITIONAL_G] = ".g",
99 [BRW_CONDITIONAL_GE] = ".ge",
100 [BRW_CONDITIONAL_L] = ".l",
101 [BRW_CONDITIONAL_LE] = ".le",
102 [BRW_CONDITIONAL_R] = ".r",
103 [BRW_CONDITIONAL_O] = ".o",
104 [BRW_CONDITIONAL_U] = ".u",
105 };
106
107 char *negate[2] = {
108 [0] = "",
109 [1] = "-",
110 };
111
112 char *_abs[2] = {
113 [0] = "",
114 [1] = "(abs)",
115 };
116
117 char *vert_stride[16] = {
118 [0] = "0",
119 [1] = "1",
120 [2] = "2",
121 [3] = "4",
122 [4] = "8",
123 [5] = "16",
124 [6] = "32",
125 [15] = "VxH",
126 };
127
128 char *width[8] = {
129 [0] = "1",
130 [1] = "2",
131 [2] = "4",
132 [3] = "8",
133 [4] = "16",
134 };
135
136 char *horiz_stride[4] = {
137 [0] = "0",
138 [1] = "1",
139 [2] = "2",
140 [3] = "4"
141 };
142
143 char *chan_sel[4] = {
144 [0] = "x",
145 [1] = "y",
146 [2] = "z",
147 [3] = "w",
148 };
149
150 char *dest_condmod[16] = {
151 };
152
153 char *debug_ctrl[2] = {
154 [0] = "",
155 [1] = ".breakpoint"
156 };
157
158 char *saturate[2] = {
159 [0] = "",
160 [1] = ".sat"
161 };
162
163 char *accwr[2] = {
164 [0] = "",
165 [1] = "AccWrEnable"
166 };
167
168 char *wectrl[2] = {
169 [0] = "WE_normal",
170 [1] = "WE_all"
171 };
172
173 char *exec_size[8] = {
174 [0] = "1",
175 [1] = "2",
176 [2] = "4",
177 [3] = "8",
178 [4] = "16",
179 [5] = "32"
180 };
181
182 char *pred_inv[2] = {
183 [0] = "+",
184 [1] = "-"
185 };
186
187 char *pred_ctrl_align16[16] = {
188 [1] = "",
189 [2] = ".x",
190 [3] = ".y",
191 [4] = ".z",
192 [5] = ".w",
193 [6] = ".any4h",
194 [7] = ".all4h",
195 };
196
197 char *pred_ctrl_align1[16] = {
198 [1] = "",
199 [2] = ".anyv",
200 [3] = ".allv",
201 [4] = ".any2h",
202 [5] = ".all2h",
203 [6] = ".any4h",
204 [7] = ".all4h",
205 [8] = ".any8h",
206 [9] = ".all8h",
207 [10] = ".any16h",
208 [11] = ".all16h",
209 };
210
211 char *thread_ctrl[4] = {
212 [0] = "",
213 [2] = "switch"
214 };
215
216 char *compr_ctrl[4] = {
217 [0] = "",
218 [1] = "sechalf",
219 [2] = "compr",
220 [3] = "compr4",
221 };
222
223 char *dep_ctrl[4] = {
224 [0] = "",
225 [1] = "NoDDClr",
226 [2] = "NoDDChk",
227 [3] = "NoDDClr,NoDDChk",
228 };
229
230 char *mask_ctrl[4] = {
231 [0] = "",
232 [1] = "nomask",
233 };
234
235 char *access_mode[2] = {
236 [0] = "align1",
237 [1] = "align16",
238 };
239
240 char *reg_encoding[8] = {
241 [0] = "UD",
242 [1] = "D",
243 [2] = "UW",
244 [3] = "W",
245 [4] = "UB",
246 [5] = "B",
247 [7] = "F"
248 };
249
250 int reg_type_size[8] = {
251 [0] = 4,
252 [1] = 4,
253 [2] = 2,
254 [3] = 2,
255 [4] = 1,
256 [5] = 1,
257 [7] = 4
258 };
259
260 char *imm_encoding[8] = {
261 [0] = "UD",
262 [1] = "D",
263 [2] = "UW",
264 [3] = "W",
265 [5] = "VF",
266 [6] = "V",
267 [7] = "F"
268 };
269
270 char *reg_file[4] = {
271 [0] = "A",
272 [1] = "g",
273 [2] = "m",
274 [3] = "imm",
275 };
276
277 char *writemask[16] = {
278 [0x0] = ".",
279 [0x1] = ".x",
280 [0x2] = ".y",
281 [0x3] = ".xy",
282 [0x4] = ".z",
283 [0x5] = ".xz",
284 [0x6] = ".yz",
285 [0x7] = ".xyz",
286 [0x8] = ".w",
287 [0x9] = ".xw",
288 [0xa] = ".yw",
289 [0xb] = ".xyw",
290 [0xc] = ".zw",
291 [0xd] = ".xzw",
292 [0xe] = ".yzw",
293 [0xf] = "",
294 };
295
296 char *end_of_thread[2] = {
297 [0] = "",
298 [1] = "EOT"
299 };
300
301 char *target_function[16] = {
302 [BRW_SFID_NULL] = "null",
303 [BRW_SFID_MATH] = "math",
304 [BRW_SFID_SAMPLER] = "sampler",
305 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
306 [BRW_SFID_DATAPORT_READ] = "read",
307 [BRW_SFID_DATAPORT_WRITE] = "write",
308 [BRW_SFID_URB] = "urb",
309 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner"
310 };
311
312 char *target_function_gen6[16] = {
313 [BRW_SFID_NULL] = "null",
314 [BRW_SFID_MATH] = "math",
315 [BRW_SFID_SAMPLER] = "sampler",
316 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
317 [BRW_SFID_URB] = "urb",
318 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
319 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
320 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
321 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
322 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data"
323 };
324
325 char *dp_rc_msg_type_gen6[16] = {
326 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
327 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
328 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
329 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
330 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read",
331 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
332 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
333 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
334 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write",
335 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
336 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write",
337 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
338 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
339 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write",
340 };
341
342 char *math_function[16] = {
343 [BRW_MATH_FUNCTION_INV] = "inv",
344 [BRW_MATH_FUNCTION_LOG] = "log",
345 [BRW_MATH_FUNCTION_EXP] = "exp",
346 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
347 [BRW_MATH_FUNCTION_RSQ] = "rsq",
348 [BRW_MATH_FUNCTION_SIN] = "sin",
349 [BRW_MATH_FUNCTION_COS] = "cos",
350 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
351 [BRW_MATH_FUNCTION_TAN] = "tan",
352 [BRW_MATH_FUNCTION_POW] = "pow",
353 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
354 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
355 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
356 };
357
358 char *math_saturate[2] = {
359 [0] = "",
360 [1] = "sat"
361 };
362
363 char *math_signed[2] = {
364 [0] = "",
365 [1] = "signed"
366 };
367
368 char *math_scalar[2] = {
369 [0] = "",
370 [1] = "scalar"
371 };
372
373 char *math_precision[2] = {
374 [0] = "",
375 [1] = "partial_precision"
376 };
377
378 char *urb_opcode[2] = {
379 [0] = "urb_write",
380 [1] = "ff_sync",
381 };
382
383 char *urb_swizzle[4] = {
384 [BRW_URB_SWIZZLE_NONE] = "",
385 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
386 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
387 };
388
389 char *urb_allocate[2] = {
390 [0] = "",
391 [1] = "allocate"
392 };
393
394 char *urb_used[2] = {
395 [0] = "",
396 [1] = "used"
397 };
398
399 char *urb_complete[2] = {
400 [0] = "",
401 [1] = "complete"
402 };
403
404 char *sampler_target_format[4] = {
405 [0] = "F",
406 [2] = "UD",
407 [3] = "D"
408 };
409
410
411 static int column;
412
413 static int string (FILE *file, char *string)
414 {
415 fputs (string, file);
416 column += strlen (string);
417 return 0;
418 }
419
420 static int format (FILE *f, char *format, ...)
421 {
422 char buf[1024];
423 va_list args;
424 va_start (args, format);
425
426 vsnprintf (buf, sizeof (buf) - 1, format, args);
427 va_end (args);
428 string (f, buf);
429 return 0;
430 }
431
432 static int newline (FILE *f)
433 {
434 putc ('\n', f);
435 column = 0;
436 return 0;
437 }
438
439 static int pad (FILE *f, int c)
440 {
441 do
442 string (f, " ");
443 while (column < c);
444 return 0;
445 }
446
447 static int control (FILE *file, char *name, char *ctrl[], GLuint id, int *space)
448 {
449 if (!ctrl[id]) {
450 fprintf (file, "*** invalid %s value %d ",
451 name, id);
452 return 1;
453 }
454 if (ctrl[id][0])
455 {
456 if (space && *space)
457 string (file, " ");
458 string (file, ctrl[id]);
459 if (space)
460 *space = 1;
461 }
462 return 0;
463 }
464
465 static int print_opcode (FILE *file, int id)
466 {
467 if (!opcode[id].name) {
468 format (file, "*** invalid opcode value %d ", id);
469 return 1;
470 }
471 string (file, opcode[id].name);
472 return 0;
473 }
474
475 static int reg (FILE *file, GLuint _reg_file, GLuint _reg_nr)
476 {
477 int err = 0;
478
479 /* Clear the Compr4 instruction compression bit. */
480 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
481 _reg_nr &= ~(1 << 7);
482
483 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
484 switch (_reg_nr & 0xf0) {
485 case BRW_ARF_NULL:
486 string (file, "null");
487 return -1;
488 case BRW_ARF_ADDRESS:
489 format (file, "a%d", _reg_nr & 0x0f);
490 break;
491 case BRW_ARF_ACCUMULATOR:
492 format (file, "acc%d", _reg_nr & 0x0f);
493 break;
494 case BRW_ARF_FLAG:
495 format (file, "f%d", _reg_nr & 0x0f);
496 break;
497 case BRW_ARF_MASK:
498 format (file, "mask%d", _reg_nr & 0x0f);
499 break;
500 case BRW_ARF_MASK_STACK:
501 format (file, "msd%d", _reg_nr & 0x0f);
502 break;
503 case BRW_ARF_STATE:
504 format (file, "sr%d", _reg_nr & 0x0f);
505 break;
506 case BRW_ARF_CONTROL:
507 format (file, "cr%d", _reg_nr & 0x0f);
508 break;
509 case BRW_ARF_NOTIFICATION_COUNT:
510 format (file, "n%d", _reg_nr & 0x0f);
511 break;
512 case BRW_ARF_IP:
513 string (file, "ip");
514 return -1;
515 break;
516 default:
517 format (file, "ARF%d", _reg_nr);
518 break;
519 }
520 } else {
521 err |= control (file, "src reg file", reg_file, _reg_file, NULL);
522 format (file, "%d", _reg_nr);
523 }
524 return err;
525 }
526
527 static int dest (FILE *file, struct brw_instruction *inst)
528 {
529 int err = 0;
530
531 if (inst->header.access_mode == BRW_ALIGN_1)
532 {
533 if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT)
534 {
535 err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr);
536 if (err == -1)
537 return 0;
538 if (inst->bits1.da1.dest_subreg_nr)
539 format (file, ".%d", inst->bits1.da1.dest_subreg_nr /
540 reg_type_size[inst->bits1.da1.dest_reg_type]);
541 format (file, "<%d>", inst->bits1.da1.dest_horiz_stride);
542 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL);
543 }
544 else
545 {
546 string (file, "g[a0");
547 if (inst->bits1.ia1.dest_subreg_nr)
548 format (file, ".%d", inst->bits1.ia1.dest_subreg_nr /
549 reg_type_size[inst->bits1.ia1.dest_reg_type]);
550 if (inst->bits1.ia1.dest_indirect_offset)
551 format (file, " %d", inst->bits1.ia1.dest_indirect_offset);
552 string (file, "]");
553 format (file, "<%d>", inst->bits1.ia1.dest_horiz_stride);
554 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
555 }
556 }
557 else
558 {
559 if (inst->bits1.da16.dest_address_mode == BRW_ADDRESS_DIRECT)
560 {
561 err |= reg (file, inst->bits1.da16.dest_reg_file, inst->bits1.da16.dest_reg_nr);
562 if (err == -1)
563 return 0;
564 if (inst->bits1.da16.dest_subreg_nr)
565 format (file, ".%d", inst->bits1.da16.dest_subreg_nr /
566 reg_type_size[inst->bits1.da16.dest_reg_type]);
567 string (file, "<1>");
568 err |= control (file, "writemask", writemask, inst->bits1.da16.dest_writemask, NULL);
569 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da16.dest_reg_type, NULL);
570 }
571 else
572 {
573 err = 1;
574 string (file, "Indirect align16 address mode not supported");
575 }
576 }
577
578 return 0;
579 }
580
581 static int src_align1_region (FILE *file,
582 GLuint _vert_stride, GLuint _width, GLuint _horiz_stride)
583 {
584 int err = 0;
585 string (file, "<");
586 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
587 string (file, ",");
588 err |= control (file, "width", width, _width, NULL);
589 string (file, ",");
590 err |= control (file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
591 string (file, ">");
592 return err;
593 }
594
595 static int src_da1 (FILE *file, GLuint type, GLuint _reg_file,
596 GLuint _vert_stride, GLuint _width, GLuint _horiz_stride,
597 GLuint reg_num, GLuint sub_reg_num, GLuint __abs, GLuint _negate)
598 {
599 int err = 0;
600 err |= control (file, "negate", negate, _negate, NULL);
601 err |= control (file, "abs", _abs, __abs, NULL);
602
603 err |= reg (file, _reg_file, reg_num);
604 if (err == -1)
605 return 0;
606 if (sub_reg_num)
607 format (file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
608 src_align1_region (file, _vert_stride, _width, _horiz_stride);
609 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
610 return err;
611 }
612
613 static int src_ia1 (FILE *file,
614 GLuint type,
615 GLuint _reg_file,
616 GLint _addr_imm,
617 GLuint _addr_subreg_nr,
618 GLuint _negate,
619 GLuint __abs,
620 GLuint _addr_mode,
621 GLuint _horiz_stride,
622 GLuint _width,
623 GLuint _vert_stride)
624 {
625 int err = 0;
626 err |= control (file, "negate", negate, _negate, NULL);
627 err |= control (file, "abs", _abs, __abs, NULL);
628
629 string (file, "g[a0");
630 if (_addr_subreg_nr)
631 format (file, ".%d", _addr_subreg_nr);
632 if (_addr_imm)
633 format (file, " %d", _addr_imm);
634 string (file, "]");
635 src_align1_region (file, _vert_stride, _width, _horiz_stride);
636 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
637 return err;
638 }
639
640 static int src_da16 (FILE *file,
641 GLuint _reg_type,
642 GLuint _reg_file,
643 GLuint _vert_stride,
644 GLuint _reg_nr,
645 GLuint _subreg_nr,
646 GLuint __abs,
647 GLuint _negate,
648 GLuint swz_x,
649 GLuint swz_y,
650 GLuint swz_z,
651 GLuint swz_w)
652 {
653 int err = 0;
654 err |= control (file, "negate", negate, _negate, NULL);
655 err |= control (file, "abs", _abs, __abs, NULL);
656
657 err |= reg (file, _reg_file, _reg_nr);
658 if (err == -1)
659 return 0;
660 if (_subreg_nr)
661 /* bit4 for subreg number byte addressing. Make this same meaning as
662 in da1 case, so output looks consistent. */
663 format (file, ".%d", 16 / reg_type_size[_reg_type]);
664 string (file, "<");
665 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
666 string (file, ",4,1>");
667 /*
668 * Three kinds of swizzle display:
669 * identity - nothing printed
670 * 1->all - print the single channel
671 * 1->1 - print the mapping
672 */
673 if (swz_x == BRW_CHANNEL_X &&
674 swz_y == BRW_CHANNEL_Y &&
675 swz_z == BRW_CHANNEL_Z &&
676 swz_w == BRW_CHANNEL_W)
677 {
678 ;
679 }
680 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
681 {
682 string (file, ".");
683 err |= control (file, "channel select", chan_sel, swz_x, NULL);
684 }
685 else
686 {
687 string (file, ".");
688 err |= control (file, "channel select", chan_sel, swz_x, NULL);
689 err |= control (file, "channel select", chan_sel, swz_y, NULL);
690 err |= control (file, "channel select", chan_sel, swz_z, NULL);
691 err |= control (file, "channel select", chan_sel, swz_w, NULL);
692 }
693 err |= control (file, "src da16 reg type", reg_encoding, _reg_type, NULL);
694 return err;
695 }
696
697
698 static int imm (FILE *file, GLuint type, struct brw_instruction *inst) {
699 switch (type) {
700 case BRW_REGISTER_TYPE_UD:
701 format (file, "0x%08xUD", inst->bits3.ud);
702 break;
703 case BRW_REGISTER_TYPE_D:
704 format (file, "%dD", inst->bits3.d);
705 break;
706 case BRW_REGISTER_TYPE_UW:
707 format (file, "0x%04xUW", (uint16_t) inst->bits3.ud);
708 break;
709 case BRW_REGISTER_TYPE_W:
710 format (file, "%dW", (int16_t) inst->bits3.d);
711 break;
712 case BRW_REGISTER_TYPE_UB:
713 format (file, "0x%02xUB", (int8_t) inst->bits3.ud);
714 break;
715 case BRW_REGISTER_TYPE_VF:
716 format (file, "Vector Float");
717 break;
718 case BRW_REGISTER_TYPE_V:
719 format (file, "0x%08xV", inst->bits3.ud);
720 break;
721 case BRW_REGISTER_TYPE_F:
722 format (file, "%-gF", inst->bits3.f);
723 }
724 return 0;
725 }
726
727 static int src0 (FILE *file, struct brw_instruction *inst)
728 {
729 if (inst->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE)
730 return imm (file, inst->bits1.da1.src0_reg_type,
731 inst);
732 else if (inst->header.access_mode == BRW_ALIGN_1)
733 {
734 if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT)
735 {
736 return src_da1 (file,
737 inst->bits1.da1.src0_reg_type,
738 inst->bits1.da1.src0_reg_file,
739 inst->bits2.da1.src0_vert_stride,
740 inst->bits2.da1.src0_width,
741 inst->bits2.da1.src0_horiz_stride,
742 inst->bits2.da1.src0_reg_nr,
743 inst->bits2.da1.src0_subreg_nr,
744 inst->bits2.da1.src0_abs,
745 inst->bits2.da1.src0_negate);
746 }
747 else
748 {
749 return src_ia1 (file,
750 inst->bits1.ia1.src0_reg_type,
751 inst->bits1.ia1.src0_reg_file,
752 inst->bits2.ia1.src0_indirect_offset,
753 inst->bits2.ia1.src0_subreg_nr,
754 inst->bits2.ia1.src0_negate,
755 inst->bits2.ia1.src0_abs,
756 inst->bits2.ia1.src0_address_mode,
757 inst->bits2.ia1.src0_horiz_stride,
758 inst->bits2.ia1.src0_width,
759 inst->bits2.ia1.src0_vert_stride);
760 }
761 }
762 else
763 {
764 if (inst->bits2.da16.src0_address_mode == BRW_ADDRESS_DIRECT)
765 {
766 return src_da16 (file,
767 inst->bits1.da16.src0_reg_type,
768 inst->bits1.da16.src0_reg_file,
769 inst->bits2.da16.src0_vert_stride,
770 inst->bits2.da16.src0_reg_nr,
771 inst->bits2.da16.src0_subreg_nr,
772 inst->bits2.da16.src0_abs,
773 inst->bits2.da16.src0_negate,
774 inst->bits2.da16.src0_swz_x,
775 inst->bits2.da16.src0_swz_y,
776 inst->bits2.da16.src0_swz_z,
777 inst->bits2.da16.src0_swz_w);
778 }
779 else
780 {
781 string (file, "Indirect align16 address mode not supported");
782 return 1;
783 }
784 }
785 }
786
787 static int src1 (FILE *file, struct brw_instruction *inst)
788 {
789 if (inst->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE)
790 return imm (file, inst->bits1.da1.src1_reg_type,
791 inst);
792 else if (inst->header.access_mode == BRW_ALIGN_1)
793 {
794 if (inst->bits3.da1.src1_address_mode == BRW_ADDRESS_DIRECT)
795 {
796 return src_da1 (file,
797 inst->bits1.da1.src1_reg_type,
798 inst->bits1.da1.src1_reg_file,
799 inst->bits3.da1.src1_vert_stride,
800 inst->bits3.da1.src1_width,
801 inst->bits3.da1.src1_horiz_stride,
802 inst->bits3.da1.src1_reg_nr,
803 inst->bits3.da1.src1_subreg_nr,
804 inst->bits3.da1.src1_abs,
805 inst->bits3.da1.src1_negate);
806 }
807 else
808 {
809 return src_ia1 (file,
810 inst->bits1.ia1.src1_reg_type,
811 inst->bits1.ia1.src1_reg_file,
812 inst->bits3.ia1.src1_indirect_offset,
813 inst->bits3.ia1.src1_subreg_nr,
814 inst->bits3.ia1.src1_negate,
815 inst->bits3.ia1.src1_abs,
816 inst->bits3.ia1.src1_address_mode,
817 inst->bits3.ia1.src1_horiz_stride,
818 inst->bits3.ia1.src1_width,
819 inst->bits3.ia1.src1_vert_stride);
820 }
821 }
822 else
823 {
824 if (inst->bits3.da16.src1_address_mode == BRW_ADDRESS_DIRECT)
825 {
826 return src_da16 (file,
827 inst->bits1.da16.src1_reg_type,
828 inst->bits1.da16.src1_reg_file,
829 inst->bits3.da16.src1_vert_stride,
830 inst->bits3.da16.src1_reg_nr,
831 inst->bits3.da16.src1_subreg_nr,
832 inst->bits3.da16.src1_abs,
833 inst->bits3.da16.src1_negate,
834 inst->bits3.da16.src1_swz_x,
835 inst->bits3.da16.src1_swz_y,
836 inst->bits3.da16.src1_swz_z,
837 inst->bits3.da16.src1_swz_w);
838 }
839 else
840 {
841 string (file, "Indirect align16 address mode not supported");
842 return 1;
843 }
844 }
845 }
846
847 int esize[6] = {
848 [0] = 1,
849 [1] = 2,
850 [2] = 4,
851 [3] = 8,
852 [4] = 16,
853 [5] = 32,
854 };
855
856 static int qtr_ctrl(FILE *file, struct brw_instruction *inst)
857 {
858 int qtr_ctl = inst->header.compression_control;
859 int exec_size = esize[inst->header.execution_size];
860
861 if (exec_size == 8) {
862 switch (qtr_ctl) {
863 case 0:
864 string (file, " 1Q");
865 break;
866 case 1:
867 string (file, " 2Q");
868 break;
869 case 2:
870 string (file, " 3Q");
871 break;
872 case 3:
873 string (file, " 4Q");
874 break;
875 }
876 } else if (exec_size == 16){
877 if (qtr_ctl < 2)
878 string (file, " 1H");
879 else
880 string (file, " 2H");
881 }
882 return 0;
883 }
884
885 int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
886 {
887 int err = 0;
888 int space = 0;
889
890 if (inst->header.predicate_control) {
891 string (file, "(");
892 err |= control (file, "predicate inverse", pred_inv, inst->header.predicate_inverse, NULL);
893 string (file, "f0");
894 if (inst->bits2.da1.flag_reg_nr)
895 format (file, ".%d", inst->bits2.da1.flag_reg_nr);
896 if (inst->header.access_mode == BRW_ALIGN_1)
897 err |= control (file, "predicate control align1", pred_ctrl_align1,
898 inst->header.predicate_control, NULL);
899 else
900 err |= control (file, "predicate control align16", pred_ctrl_align16,
901 inst->header.predicate_control, NULL);
902 string (file, ") ");
903 }
904
905 err |= print_opcode (file, inst->header.opcode);
906 err |= control (file, "saturate", saturate, inst->header.saturate, NULL);
907 err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL);
908
909 if (inst->header.opcode == BRW_OPCODE_MATH) {
910 string (file, " ");
911 err |= control (file, "function", math_function,
912 inst->header.destreg__conditionalmod, NULL);
913 } else if (inst->header.opcode != BRW_OPCODE_SEND &&
914 inst->header.opcode != BRW_OPCODE_SENDC)
915 err |= control (file, "conditional modifier", conditional_modifier,
916 inst->header.destreg__conditionalmod, NULL);
917
918 if (inst->header.opcode != BRW_OPCODE_NOP) {
919 string (file, "(");
920 err |= control (file, "execution size", exec_size, inst->header.execution_size, NULL);
921 string (file, ")");
922 }
923
924 if (inst->header.opcode == BRW_OPCODE_SEND && gen < 6)
925 format (file, " %d", inst->header.destreg__conditionalmod);
926
927 if (opcode[inst->header.opcode].ndst > 0) {
928 pad (file, 16);
929 err |= dest (file, inst);
930 } else if (gen >= 6 && (inst->header.opcode == BRW_OPCODE_IF ||
931 inst->header.opcode == BRW_OPCODE_ELSE ||
932 inst->header.opcode == BRW_OPCODE_ENDIF ||
933 inst->header.opcode == BRW_OPCODE_WHILE)) {
934 format (file, " %d", inst->bits1.branch_gen6.jump_count);
935 }
936
937 if (opcode[inst->header.opcode].nsrc > 0) {
938 pad (file, 32);
939 err |= src0 (file, inst);
940 }
941 if (opcode[inst->header.opcode].nsrc > 1) {
942 pad (file, 48);
943 err |= src1 (file, inst);
944 }
945
946 if (inst->header.opcode == BRW_OPCODE_SEND ||
947 inst->header.opcode == BRW_OPCODE_SENDC) {
948 enum brw_message_target target;
949
950 if (gen >= 6)
951 target = inst->header.destreg__conditionalmod;
952 else if (gen == 5)
953 target = inst->bits2.send_gen5.sfid;
954 else
955 target = inst->bits3.generic.msg_target;
956
957 newline (file);
958 pad (file, 16);
959 space = 0;
960
961 if (gen >= 6) {
962 err |= control (file, "target function", target_function_gen6,
963 target, &space);
964 } else {
965 err |= control (file, "target function", target_function,
966 target, &space);
967 }
968
969 switch (target) {
970 case BRW_SFID_MATH:
971 err |= control (file, "math function", math_function,
972 inst->bits3.math.function, &space);
973 err |= control (file, "math saturate", math_saturate,
974 inst->bits3.math.saturate, &space);
975 err |= control (file, "math signed", math_signed,
976 inst->bits3.math.int_type, &space);
977 err |= control (file, "math scalar", math_scalar,
978 inst->bits3.math.data_type, &space);
979 err |= control (file, "math precision", math_precision,
980 inst->bits3.math.precision, &space);
981 break;
982 case BRW_SFID_SAMPLER:
983 if (gen >= 5) {
984 format (file, " (%d, %d, %d, %d)",
985 inst->bits3.sampler_gen5.binding_table_index,
986 inst->bits3.sampler_gen5.sampler,
987 inst->bits3.sampler_gen5.msg_type,
988 inst->bits3.sampler_gen5.simd_mode);
989 } else if (0 /* FINISHME: is_g4x */) {
990 format (file, " (%d, %d)",
991 inst->bits3.sampler_g4x.binding_table_index,
992 inst->bits3.sampler_g4x.sampler);
993 } else {
994 format (file, " (%d, %d, ",
995 inst->bits3.sampler.binding_table_index,
996 inst->bits3.sampler.sampler);
997 err |= control (file, "sampler target format",
998 sampler_target_format,
999 inst->bits3.sampler.return_format, NULL);
1000 string (file, ")");
1001 }
1002 break;
1003 case BRW_SFID_DATAPORT_READ:
1004 if (gen >= 6) {
1005 format (file, " (%d, %d, %d, %d)",
1006 inst->bits3.gen6_dp.binding_table_index,
1007 inst->bits3.gen6_dp.msg_control,
1008 inst->bits3.gen6_dp.msg_type,
1009 inst->bits3.gen6_dp.send_commit_msg);
1010 } else if (gen >= 5 /* FINISHME: || is_g4x */) {
1011 format (file, " (%d, %d, %d)",
1012 inst->bits3.dp_read_gen5.binding_table_index,
1013 inst->bits3.dp_read_gen5.msg_control,
1014 inst->bits3.dp_read_gen5.msg_type);
1015 } else {
1016 format (file, " (%d, %d, %d)",
1017 inst->bits3.dp_read.binding_table_index,
1018 inst->bits3.dp_read.msg_control,
1019 inst->bits3.dp_read.msg_type);
1020 }
1021 break;
1022
1023 case BRW_SFID_DATAPORT_WRITE:
1024 if (gen >= 6) {
1025 format (file, " (");
1026
1027 err |= control (file, "DP rc message type",
1028 dp_rc_msg_type_gen6,
1029 inst->bits3.gen6_dp.msg_type, &space);
1030
1031 format (file, ", %d, %d, %d, %d)",
1032 inst->bits3.gen6_dp.binding_table_index,
1033 inst->bits3.gen6_dp.msg_control,
1034 inst->bits3.gen6_dp.msg_type,
1035 inst->bits3.gen6_dp.send_commit_msg);
1036 } else {
1037 format (file, " (%d, %d, %d, %d)",
1038 inst->bits3.dp_write.binding_table_index,
1039 (inst->bits3.dp_write.last_render_target << 3) |
1040 inst->bits3.dp_write.msg_control,
1041 inst->bits3.dp_write.msg_type,
1042 inst->bits3.dp_write.send_commit_msg);
1043 }
1044 break;
1045
1046 case BRW_SFID_URB:
1047 if (gen >= 5) {
1048 format (file, " %d", inst->bits3.urb_gen5.offset);
1049 } else {
1050 format (file, " %d", inst->bits3.urb.offset);
1051 }
1052
1053 space = 1;
1054 if (gen >= 5) {
1055 err |= control (file, "urb opcode", urb_opcode,
1056 inst->bits3.urb_gen5.opcode, &space);
1057 }
1058 err |= control (file, "urb swizzle", urb_swizzle,
1059 inst->bits3.urb.swizzle_control, &space);
1060 err |= control (file, "urb allocate", urb_allocate,
1061 inst->bits3.urb.allocate, &space);
1062 err |= control (file, "urb used", urb_used,
1063 inst->bits3.urb.used, &space);
1064 err |= control (file, "urb complete", urb_complete,
1065 inst->bits3.urb.complete, &space);
1066 break;
1067 case BRW_SFID_THREAD_SPAWNER:
1068 break;
1069 case GEN7_SFID_DATAPORT_DATA_CACHE:
1070 format (file, " (%d, %d, %d)",
1071 inst->bits3.gen7_dp.binding_table_index,
1072 inst->bits3.gen7_dp.msg_control,
1073 inst->bits3.gen7_dp.msg_type);
1074 break;
1075
1076
1077 default:
1078 format (file, "unsupported target %d", target);
1079 break;
1080 }
1081 if (space)
1082 string (file, " ");
1083 if (gen >= 5) {
1084 format (file, "mlen %d",
1085 inst->bits3.generic_gen5.msg_length);
1086 format (file, " rlen %d",
1087 inst->bits3.generic_gen5.response_length);
1088 } else {
1089 format (file, "mlen %d",
1090 inst->bits3.generic.msg_length);
1091 format (file, " rlen %d",
1092 inst->bits3.generic.response_length);
1093 }
1094 }
1095 pad (file, 64);
1096 if (inst->header.opcode != BRW_OPCODE_NOP) {
1097 string (file, "{");
1098 space = 1;
1099 err |= control(file, "access mode", access_mode, inst->header.access_mode, &space);
1100 if (gen >= 6)
1101 err |= control (file, "write enable control", wectrl, inst->header.mask_control, &space);
1102 else
1103 err |= control (file, "mask control", mask_ctrl, inst->header.mask_control, &space);
1104 err |= control (file, "dependency control", dep_ctrl, inst->header.dependency_control, &space);
1105
1106 if (gen >= 6)
1107 err |= qtr_ctrl (file, inst);
1108 else {
1109 if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED &&
1110 opcode[inst->header.opcode].ndst > 0 &&
1111 inst->bits1.da1.dest_reg_file == BRW_MESSAGE_REGISTER_FILE &&
1112 inst->bits1.da1.dest_reg_nr & (1 << 7)) {
1113 format (file, " compr4");
1114 } else {
1115 err |= control (file, "compression control", compr_ctrl,
1116 inst->header.compression_control, &space);
1117 }
1118 }
1119
1120 err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space);
1121 if (gen >= 6)
1122 err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space);
1123 if (inst->header.opcode == BRW_OPCODE_SEND ||
1124 inst->header.opcode == BRW_OPCODE_SENDC)
1125 err |= control (file, "end of thread", end_of_thread,
1126 inst->bits3.generic.end_of_thread, &space);
1127 if (space)
1128 string (file, " ");
1129 string (file, "}");
1130 }
1131 string (file, ";");
1132 newline (file);
1133 return err;
1134 }